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June 2009
- 211 participants
- 509 discussions
all mips boards except a few use the same cpu lds so move it to cpu/$(CPU)
that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com>
Cc: Shinya Kuribayashi <shinya.kuribayashi(a)necel.com>
---
Makefile | 2 +
board/dbau1x00/u-boot.lds | 70 --------------------------
board/gth2/u-boot.lds | 70 --------------------------
board/incaip/u-boot.lds | 70 --------------------------
board/pb1x00/u-boot.lds | 70 --------------------------
board/purple/config.mk | 2 +
board/qemu-mips/u-boot.lds | 72 ---------------------------
board/tb0229/u-boot.lds | 70 --------------------------
{board/micronas/vct => cpu/mips}/u-boot.lds | 32 ++++++------
mips_config.mk | 25 +++++++++
10 files changed, 46 insertions(+), 437 deletions(-)
delete mode 100644 board/dbau1x00/u-boot.lds
delete mode 100644 board/gth2/u-boot.lds
delete mode 100644 board/incaip/u-boot.lds
delete mode 100644 board/pb1x00/u-boot.lds
delete mode 100644 board/qemu-mips/u-boot.lds
delete mode 100644 board/tb0229/u-boot.lds
rename {board/micronas/vct => cpu/mips}/u-boot.lds (75%)
diff --git a/Makefile b/Makefile
index ee09856..2cb0ce2 100644
--- a/Makefile
+++ b/Makefile
@@ -3222,6 +3222,7 @@ dbau1550_config : unconfig
dbau1550_el_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
+ @echo "#define CONFIG_CPU_LITTLE_ENDIAN" >>$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
gth2_config : unconfig
@@ -3232,6 +3233,7 @@ gth2_config : unconfig
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
+ @echo "#define CONFIG_CPU_LITTLE_ENDIAN" >>$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
qemu_mips_config : unconfig
diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds
deleted file mode 100644
index 9a6cd1b..0000000
--- a/board/dbau1x00/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd(a)denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = .;
- _gp = ALIGN(16) + 0x7ff0;
-
- .got : {
- __got_start = .;
- *(.got)
- __got_end = .;
- }
-
- .sdata : { *(.sdata) }
-
- .u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss (NOLOAD) : { *(.sbss) }
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- uboot_end = .;
-}
diff --git a/board/gth2/u-boot.lds b/board/gth2/u-boot.lds
deleted file mode 100644
index e6eee9b..0000000
--- a/board/gth2/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003-2005
- * Wolfgang Denk Engineering, <wd(a)denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = .;
- _gp = ALIGN(16) + 0x7ff0;
-
- .got : {
- __got_start = .;
- *(.got)
- __got_end = .;
- }
-
- .sdata : { *(.sdata) }
-
- .u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss (NOLOAD) : { *(.sbss) }
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- uboot_end = .;
-}
diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds
deleted file mode 100644
index 9a6cd1b..0000000
--- a/board/incaip/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd(a)denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = .;
- _gp = ALIGN(16) + 0x7ff0;
-
- .got : {
- __got_start = .;
- *(.got)
- __got_end = .;
- }
-
- .sdata : { *(.sdata) }
-
- .u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss (NOLOAD) : { *(.sbss) }
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- uboot_end = .;
-}
diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds
deleted file mode 100644
index 9a6cd1b..0000000
--- a/board/pb1x00/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd(a)denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = .;
- _gp = ALIGN(16) + 0x7ff0;
-
- .got : {
- __got_start = .;
- *(.got)
- __got_end = .;
- }
-
- .sdata : { *(.sdata) }
-
- .u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss (NOLOAD) : { *(.sbss) }
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- uboot_end = .;
-}
diff --git a/board/purple/config.mk b/board/purple/config.mk
index ea478ed..16a55c6 100644
--- a/board/purple/config.mk
+++ b/board/purple/config.mk
@@ -30,3 +30,5 @@ TEXT_BASE = 0xB0000000
# RAM version
#TEXT_BASE = 0x80100000
+
+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
diff --git a/board/qemu-mips/u-boot.lds b/board/qemu-mips/u-boot.lds
deleted file mode 100644
index ad058ca..0000000
--- a/board/qemu-mips/u-boot.lds
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd(a)denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = .;
- _gp = ALIGN(16) +0x7ff0;
-
- .got : {
- __got_start = .;
- *(.got)
- __got_end = .;
- }
-
- . = ALIGN(4);
- .sdata : { *(.sdata) }
-
- . = .;
- .u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss : { *(.sbss) }
- .bss : { *(.bss) . = ALIGN(4); }
- uboot_end = .;
-}
diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds
deleted file mode 100644
index 56d7c25..0000000
--- a/board/tb0229/u-boot.lds
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Masami Komiya <mkomiya(a)sonare.it> 2004
- *
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd(a)denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
-
-OUTPUT_ARCH(mips)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = .;
- _gp = ALIGN(16) + 0x7ff0;
-
- .got : {
- __got_start = .;
- *(.got)
- __got_end = .;
- }
-
- .sdata : { *(.sdata) }
-
- .u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
- }
-
- uboot_end_data = .;
- num_got_entries = (__got_end - __got_start) >> 2;
-
- . = ALIGN(4);
- .sbss (NOLOAD) : { *(.sbss) }
- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
- uboot_end = .;
-}
diff --git a/board/micronas/vct/u-boot.lds b/cpu/mips/u-boot.lds
similarity index 75%
rename from board/micronas/vct/u-boot.lds
rename to cpu/mips/u-boot.lds
index b90b186..dda0dda 100644
--- a/board/micronas/vct/u-boot.lds
+++ b/cpu/mips/u-boot.lds
@@ -1,5 +1,8 @@
/*
- * (C) Copyright 2003
+ * (C) Copyright 2004
+ * Masami Komiya <mkomiya(a)sonare.it>
+ *
+ * (C) Copyright 2003-2005
* Wolfgang Denk Engineering, <wd(a)denx.de>
*
* See file CREDITS for list of people who contributed to this
@@ -29,34 +32,34 @@ SECTIONS
. = 0x00000000;
. = ALIGN(4);
- .text :
+ .text :
{
- *(.text)
+ *(.text)
}
. = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
- .data : { *(.data) }
+ .data : { *(.data) }
. = .;
_gp = ALIGN(16) + 0x7ff0;
.got : {
- __got_start = .;
- *(.got)
- __got_end = .;
+ __got_start = .;
+ *(.got)
+ __got_end = .;
}
. = ALIGN(4);
- .sdata : { *(.sdata) }
+ .sdata : { *(.sdata) }
. = ALIGN(4);
.u_boot_cmd : {
- __u_boot_cmd_start = .;
- *(.u_boot_cmd)
- __u_boot_cmd_end = .;
+ __u_boot_cmd_start = .;
+ *(.u_boot_cmd)
+ __u_boot_cmd_end = .;
}
. = ALIGN(4);
@@ -64,8 +67,7 @@ SECTIONS
num_got_entries = (__got_end - __got_start) >> 2;
. = ALIGN(4);
- .sbss (NOLOAD) : { *(.sbss) }
- . = ALIGN(4);
- .bss (NOLOAD) : { *(.bss) }
+ .sbss (NOLOAD) : { *(.sbss) }
+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
uboot_end = .;
}
diff --git a/mips_config.mk b/mips_config.mk
index 05eb05d..b4365a3 100644
--- a/mips_config.mk
+++ b/mips_config.mk
@@ -46,3 +46,28 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic
PLATFORM_CPPFLAGS += -msoft-float
PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib
+
+#
+# We explicitly add the endianness specifier if needed, this allows
+# to compile kernels with a toolchain for the other endianness. We
+# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
+# when fed the toolchain default!
+#
+# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of
+# 2006-10-10 don't properly change the predefined symbols if -EB / -EL
+# are used, so we kludge that here. A bug has been filed at
+# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413.
+#
+
+UNDEF_ALL += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__
+UNDEF_ALL += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__
+
+ifdef CONFIG_CPU_LITTLE_ENDIAN
+PREDEF +=-DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
+PLATFORM_CFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(UNDEF_ALL) $(PREDEF))
+else
+PREDEF += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__
+PLATFORM_CFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(UNDEF_ALL) $(PREDEF))
+endif
+
+LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds
--
1.6.1.3
5
28

17 Jul '09
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler
Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner, Hans-Joachim Reich
2
2

[U-Boot] [patch/rfc] rm9200 lowevel_init: don't touch reserved/readonly registers
by David Brownell 17 Jul '09
by David Brownell 17 Jul '09
17 Jul '09
For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses. All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.
If there's a real need to write these locations, like an erratum
that's not included in the current list, that should be reflected
in a source code comment. Looks like maybe some very early BDI-2000
setup code has been carried along by cargo cult programming since
at least late 2004 (per GIT history).
Meanwhile, here's a patch/RFC disabling what seems to be bogosity.
If it's eventually a "go", the supporting code should be removed.
---
cpu/arm920t/at91rm9200/lowlevel_init.S | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- a/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ b/cpu/arm920t/at91rm9200/lowlevel_init.S
@@ -81,6 +81,7 @@ LoopOsc:
bne 0b
/* delay - this is all done by guess */
ldr r0, =0x00010000
+ /* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
1:
subs r0, r0, #1
bhi 1b
@@ -108,16 +109,22 @@ LoopOsc:
.ltorg
SMRDATA:
+#if 0
+/* MC_PU* are reserved "do not use" memory controller addresses;
+ * see table 16-1 of the rm9200 manual
+ */
.word AT91C_MC_PUIA
.word CONFIG_SYS_MC_PUIA_VAL
.word AT91C_MC_PUP
.word CONFIG_SYS_MC_PUP_VAL
.word AT91C_MC_PUER
.word CONFIG_SYS_MC_PUER_VAL
+/* MC_ASR/AASR are read-only registers, see table 16-1 again */
.word AT91C_MC_ASR
.word CONFIG_SYS_MC_ASR_VAL
.word AT91C_MC_AASR
.word CONFIG_SYS_MC_AASR_VAL
+#endif
.word AT91C_EBI_CFGR
.word CONFIG_SYS_EBI_CFGR_VAL
.word AT91C_SMC_CSR0
@@ -128,8 +135,7 @@ SMRDATA:
.word CONFIG_SYS_PLLBR_VAL
.word AT91C_MCKR
.word CONFIG_SYS_MCKR_VAL
- /* SMRDATA is 80 bytes long */
- /* here there's a delay of 100 */
+ /* here there's a delay */
SMRDATA1:
.word AT91C_PIOC_ASR
.word CONFIG_SYS_PIOC_ASR_VAL
2
3
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler
Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner, Hans-Joachim Reich
2
1

[U-Boot] [PATCH 7/7] nand: Change NAND_MAX_OOBSIZE to 218 as needed for some 4k page devices
by Stefan Roese 16 Jul '09
by Stefan Roese 16 Jul '09
16 Jul '09
This is needed for the MPC512x NAND driver (fsl_nfc_nand.c) which already
defines such a 4k plus 218 bytes ECC layout.
Signed-off-by: Stefan Roese <sr(a)denx.de>
Cc: Scott Wood <scottwood(a)freescale.com>
---
include/linux/mtd/nand.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index a4ad571..3e0044b 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -50,7 +50,7 @@ extern void nand_wait_ready(struct mtd_info *mtd);
* is supported now. If you add a chip with bigger oobsize/page
* adjust this accordingly.
*/
-#define NAND_MAX_OOBSIZE 128
+#define NAND_MAX_OOBSIZE 218
#define NAND_MAX_PAGESIZE 4096
/*
--
1.6.3.2
2
1

16 Jul '09
this set of patches aims to standardize the mac address handling in all of
u-boot by doing the following:
- add helper funcs for working with mac addresses (binary & string)
- add format strings from Linux for printf-ing mac addresses
- convert all duplicated code to use aforementioned helper funcs
- convert all places to get the mac address from the environment
- drop the global data instances of bi_enet*addr
- document the whole damned thing
ive taken pains to make sure the patchset doesnt break along the way (in
terms of doing bisection and such). but in general, the interdependency
looks something like:
- add util funcs
- convert net/boards/drivers/cpu/commands from global data to env
- convert arch/board.c init to not touch global data
- remove global data from all arch headers
the ppc steps with load_sernum_ethaddr() are a little hairy due to the
spread of code and trying to make sure things don't break bisection. but
the other option is to squash all these commits (the common ppc board code
as well as each individual board) into one change. doesn't matter to me
either way.
v2 of the patchset brings these changes:
- import updated printf modifiers from the kernel
- convert str_enetaddr() to %pM
- convert print_IPaddr() to %pI4
- convert board_get_enetaddr() to board specific code
- misc fixes/changes based on feedback from people
while the new printf code is bigger by about 900bytes, i think we make up
most of that by converting str_enetaddr/print_IPaddr users over to it.
currently this patch series is maintained in my tree:
git://www.denx.de/git/u-boot-blackfin.git macaddr
Mike Frysinger (30):
vsprintf: pull updates from Linux kernel
convert print_IPaddr() to %pI4
net: new utility functions for working with enetaddr's
doc/README.enetaddr: document proper MAC usage
Blackfin: bfin_mac: force boards to setup the MAC themselves
net: get mac address from environment and use eth util funcs
bdinfo: get mac address from environment
bootvx: get mac address from environment
lynxkdi: get mac address from environment
nvedit: do not update global bi_enetaddr and do not call
eth_set_enetaddr()
AmigaOneG3SE/enet: get mac address from environment
boards: get mac address from environment
drivers/net/: get mac address from environment
bcm570x: get mac address from environment
cs8900: get mac address from environment
sh_eth: get mac address from environment
lan91c96/smc91111/smc911x: get mac address from environment
cpu/: get mac address from environment
npe: get mac address from environment
lib_*/board.c: do not initialize bi_enet*addr in global data
nx823: get mac address from environment
arm: get mac address from environment
boards: move board_get_enetaddr() into board-specific init
cmc_pu2: get mac address from environment
pcs440ep: get mac address from environment and move
load_sernum_ethaddr() to board init
kup4k/kup4x: rename load_sernum_ethaddr() to
kup_load_sernum_ethaddr()
tqm8xx: rename load_sernum_ethaddr() to tqc_load_sernum_ethaddr()
ppc: mark global bi_enet*addr as legacy
drop now unused load_sernum_ethaddr() function
remove bi_enet*addr from global data for all arches
board/MAI/AmigaOneG3SE/enet.c | 42 +---
board/RPXClassic/RPXClassic.c | 16 +-
board/cmc_pu2/load_sernum_ethaddr.c | 18 +-
board/etin/debris/debris.c | 10 +-
board/keymile/mgcoge/mgcoge.c | 4 +-
board/keymile/mgsuvd/mgsuvd.c | 4 +-
board/kup/common/load_sernum_ethaddr.c | 2 +-
board/kup/kup4k/kup4k.c | 3 +
board/kup/kup4x/kup4x.c | 4 +-
board/m501sk/m501sk.c | 5 -
board/mbx8xx/mbx8xx.c | 14 +-
board/mpl/vcma9/cmd_vcma9.c | 11 +-
board/muas3001/muas3001.c | 4 +-
board/netstal/common/nm_bsp.c | 40 +--
board/nx823/flash.c | 5 +-
board/nx823/nx823.c | 41 +--
board/pcs440ep/pcs440ep.c | 31 +--
board/pn62/pn62.c | 24 +-
board/sandburst/common/sb_common.c | 4 +-
board/sandburst/common/sb_common.h | 1 +
board/sandburst/karef/karef.c | 29 ++
board/sandburst/metrobox/metrobox.c | 29 ++
board/siemens/IAD210/IAD210.c | 14 +-
board/sixnet/sixnet.c | 11 +-
board/tqc/tqm8xx/load_sernum_ethaddr.c | 2 +-
board/tqc/tqm8xx/tqm8xx.c | 3 +
board/v38b/v38b.c | 12 +
board/xilinx/xilinx_enet/emac_adapter.c | 8 +-
board/xpedite1k/xpedite1k.c | 51 +++-
common/cmd_bdinfo.c | 166 ++++--------
common/cmd_elf.c | 6 +-
common/cmd_ide.c | 10 +-
common/cmd_nvedit.c | 24 +--
common/lynxkdi.c | 2 +-
cpu/arm920t/at91rm9200/ether.c | 8 +-
cpu/ixp/npe/npe.c | 36 +--
cpu/mpc512x/cpu.c | 6 +-
cpu/mpc5xxx/cpu.c | 6 +-
cpu/mpc8260/ether_fcc.c | 4 +-
cpu/mpc8260/ether_scc.c | 4 +-
cpu/ppc4xx/cpu_init.c | 14 +-
disk/part.c | 2 +-
doc/README.enetaddr | 97 +++++++
drivers/net/3c589.c | 7 +-
drivers/net/4xx_enet.c | 13 +-
drivers/net/bcm570x.c | 4 +-
drivers/net/bcm570x_lm.h | 2 +-
drivers/net/bfin_mac.c | 16 +-
drivers/net/bfin_mac.h | 2 +-
drivers/net/cs8900.c | 56 +---
drivers/net/dc2114x.c | 9 +-
drivers/net/dm9000x.c | 26 +--
drivers/net/enc28j60.c | 4 +-
drivers/net/fsl_mcdmafec.c | 11 +-
drivers/net/ks8695eth.c | 8 +-
drivers/net/lan91c96.c | 75 +----
drivers/net/mcffec.c | 10 +-
drivers/net/rtl8019.c | 14 +-
drivers/net/rtl8169.c | 2 +-
drivers/net/s3c4510b_eth.c | 2 +-
drivers/net/s3c4510b_eth.h | 2 +-
drivers/net/sh_eth.c | 28 +--
drivers/net/smc91111.c | 72 +----
drivers/net/smc911x.c | 14 +-
drivers/net/tigon3.c | 7 +-
drivers/net/xilinx_emac.c | 12 +-
drivers/net/xilinx_emaclite.c | 11 +-
include/asm-arm/u-boot.h | 5 -
include/asm-avr32/u-boot.h | 1 -
include/asm-blackfin/u-boot.h | 1 -
include/asm-i386/u-boot.h | 1 -
include/asm-m68k/u-boot.h | 13 -
include/asm-microblaze/u-boot.h | 1 -
include/asm-mips/u-boot.h | 1 -
include/asm-nios/u-boot.h | 1 -
include/asm-nios2/u-boot.h | 1 -
include/asm-ppc/u-boot.h | 14 +-
include/asm-sh/u-boot.h | 1 -
include/asm-sparc/u-boot.h | 12 -
include/common.h | 9 -
include/configs/IAD210.h | 1 +
include/configs/MBX860T.h | 2 +
include/configs/RPXClassic.h | 1 +
include/configs/XPEDITE1K.h | 1 +
include/configs/cmc_pu2.h | 1 +
include/configs/v38b.h | 1 +
include/net.h | 6 +-
lib_arm/board.c | 47 +---
lib_blackfin/board.c | 48 +---
lib_generic/vsprintf.c | 479 ++++++++++++++++++++++++-------
lib_i386/board.c | 17 --
lib_m68k/board.c | 38 ---
lib_microblaze/board.c | 8 -
lib_mips/board.c | 8 -
lib_nios/board.c | 5 -
lib_nios2/board.c | 5 -
lib_ppc/board.c | 92 +------
lib_sh/board.c | 10 -
lib_sparc/board.c | 19 --
net/bootp.c | 29 +--
net/eth.c | 76 +++--
net/net.c | 30 +--
net/nfs.c | 10 +-
net/tftp.c | 10 +-
post/cpu/mpc8xx/ether.c | 4 +-
105 files changed, 1055 insertions(+), 1188 deletions(-)
create mode 100644 doc/README.enetaddr
5
43

[U-Boot] [PATCH 1/2] usb: mpc834x: added support of the MPH USB controller in addition to the DR one
by Valeriy Glushkov 15 Jul '09
by Valeriy Glushkov 15 Jul '09
15 Jul '09
Signed-off-by: Valeriy Glushkov <gvv(a)lstec.com>
---
cpu/mpc83xx/cpu_init.c | 2 ++
include/asm-ppc/immap_83xx.h | 11 ++++++++++-
2 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 414565c..2fb9f99 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -299,6 +299,7 @@ void cpu_init_f (volatile immap_t * im)
im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR;
#endif
#ifdef CONFIG_USB_EHCI_FSL
+#ifndef CONFIG_MPC834x
uint32_t temp;
struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR;
@@ -310,6 +311,7 @@ void cpu_init_f (volatile immap_t * im)
temp = in_be32((void *)ehci->control);
udelay(1000);
} while (!(temp & PHY_CLK_VALID));
+#endif
#endif
}
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 8f945a1..fa0dee8 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -693,6 +693,12 @@ typedef struct immap {
u8 res7[0xC0000];
} immap_t;
+#ifdef CONFIG_HAS_FSL_MPH_USB
+#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x22000 /* use the MPH controller */
+#else
+#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000 /* use the DR controller */
+#endif
+
#elif defined(CONFIG_MPC8313)
typedef struct immap {
sysconf83xx_t sysconf; /* System configuration */
@@ -897,7 +903,10 @@ typedef struct immap {
#define CONFIG_SYS_MPC83xx_ESDHC_OFFSET (0x2e000)
#define CONFIG_SYS_MPC83xx_ESDHC_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET)
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000
+
+#ifndef CONFIG_SYS_MPC83xx_USB_OFFSET
+#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000
+#endif
#define CONFIG_SYS_MPC83xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
#endif /* __IMMAP_83xx__ */
--
1.5.2.5
2
2

14 Jul '09
MECP5123 is a MPC5121E based module by esd gmbh.
Signed-off-by: Stefan Roese <sr(a)denx.de>
Cc: Reinhard Arlt <reinhard.arlt(a)esd-electronics.com>
---
v2:
- Fix indentation problem
- get_ram_size() used
- More documentation added
- Copyright updated
- Too long lines changed
- Removed CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
Wolfgang, I now have to explicit ACK from esd that this board
shall use I2C EEPROM as environment storage.
MAINTAINERS | 1 +
MAKEALL | 1 +
Makefile | 3 +
board/esd/mecp5123/Makefile | 50 +++++
board/esd/mecp5123/config.mk | 23 ++
board/esd/mecp5123/mecp5123.c | 381 ++++++++++++++++++++++++++++++++++
include/configs/mecp5123.h | 458 +++++++++++++++++++++++++++++++++++++++++
7 files changed, 917 insertions(+), 0 deletions(-)
create mode 100644 board/esd/mecp5123/Makefile
create mode 100644 board/esd/mecp5123/config.mk
create mode 100644 board/esd/mecp5123/mecp5123.c
create mode 100644 include/configs/mecp5123.h
diff --git a/MAINTAINERS b/MAINTAINERS
index bba6ce9..1f6008f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -28,6 +28,7 @@ Pantelis Antoniou <panto(a)intracom.gr>
Reinhard Arlt <reinhard.arlt(a)esd-electronics.com>
cpci5200 MPC5200
+ mecp5123 MPC5121
mecp5200 MPC5200
pf5200 MPC5200
diff --git a/MAKEALL b/MAKEALL
index fd31252..f48a08e 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -78,6 +78,7 @@ LIST_5xxx=" \
LIST_512x=" \
aria \
+ mecp5123 \
mpc5121ads \
"
diff --git a/Makefile b/Makefile
index 034441c..2540f74 100644
--- a/Makefile
+++ b/Makefile
@@ -815,6 +815,9 @@ v38b_config: unconfig
aria_config: unconfig
@$(MKCONFIG) -a aria ppc mpc512x aria davedenx
+mecp5123_config: unconfig
+ @$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
+
mpc5121ads_config \
mpc5121ads_rev2_config \
: unconfig
diff --git a/board/esd/mecp5123/Makefile b/board/esd/mecp5123/Makefile
new file mode 100644
index 0000000..2e3d73a
--- /dev/null
+++ b/board/esd/mecp5123/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2009 Wolfgang Denk <wd(a)denx.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y := $(BOARD).o
+
+COBJS := $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/esd/mecp5123/config.mk b/board/esd/mecp5123/config.mk
new file mode 100644
index 0000000..838a018
--- /dev/null
+++ b/board/esd/mecp5123/config.mk
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2009 Wolfgang Denk <wd(a)denx.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFF00000
diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c
new file mode 100644
index 0000000..909b458
--- /dev/null
+++ b/board/esd/mecp5123/mecp5123.c
@@ -0,0 +1,381 @@
+/*
+ * (C) Copyright 2009 Wolfgang Denk <wd(a)denx.de>
+ * (C) Copyright 2009 Dave Srl www.dave.eu
+ * (C) Copyright 2009 Stefan Roese <sr(a)denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/bitops.h>
+#include <command.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <fdt_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Clocks in use */
+#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
+ CLOCK_SCCR1_LPC_EN | \
+ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
+ CLOCK_SCCR1_PSCFIFO_EN | \
+ CLOCK_SCCR1_DDR_EN | \
+ CLOCK_SCCR1_FEC_EN | \
+ CLOCK_SCCR1_NFC_EN | \
+ CLOCK_SCCR1_PCI_EN | \
+ CLOCK_SCCR1_TPR_EN)
+
+#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
+ CLOCK_SCCR2_I2C_EN)
+
+#define CSAW_START(start) ((start) & 0xFFFF0000)
+#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16)
+
+int eeprom_write_enable(unsigned dev_addr, int state)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+ if (dev_addr != CONFIG_SYS_I2C_EEPROM_ADDR)
+ return -1;
+
+ if (state == 0)
+ setbits_be32(&im->gpio.gpdat, 0x00100000);
+ else
+ clrbits_be32(&im->gpio.gpdat, 0x00100000);
+
+return 0;
+}
+
+/*
+ * According to MPC5121e RM, configuring local access windows should
+ * be followed by a dummy read of the config register that was
+ * modified last and an isync.
+ */
+static inline void sync_law(volatile void *addr)
+{
+ in_be32(addr);
+ __asm__ __volatile__ ("isync");
+}
+
+int board_early_init_f(void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ u32 spridr;
+
+ /*
+ * Initialize Local Window for NOR FLASH access
+ */
+ out_be32(&im->sysconf.lpcs0aw,
+ CSAW_START(CONFIG_SYS_FLASH_BASE) |
+ CSAW_STOP(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE));
+ sync_law(&im->sysconf.lpcs0aw);
+
+ /*
+ * Initialize Local Window for boot access
+ */
+ out_be32(&im->sysconf.lpbaw,
+ CSAW_START(0xffb00000) | CSAW_STOP(0xffb00000, 0x00010000));
+ sync_law(&im->sysconf.lpbaw);
+
+ /*
+ * Initialize Local Window for VPC3 access
+ */
+ out_be32(&im->sysconf.lpcs1aw,
+ CSAW_START(CONFIG_SYS_VPC3_BASE) |
+ CSAW_STOP(CONFIG_SYS_VPC3_BASE, CONFIG_SYS_VPC3_SIZE));
+ sync_law(&im->sysconf.lpcs1aw);
+
+ /*
+ * Configure Flash Speed
+ */
+ out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
+
+ /*
+ * Configure VPC3 Speed
+ */
+ out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
+
+ spridr = in_be32(&im->sysconf.spridr);
+ if (SVR_MJREV(spridr) >= 2)
+ out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
+
+ /*
+ * Enable clocks
+ */
+ out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
+ out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
+ setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
+#endif
+
+ /*
+ * Configure MSCAN clocks
+ */
+ out_be32(&im->clk.m1ccr, 0x00300000);
+ out_be32(&im->clk.m2ccr, 0x00300000);
+ out_be32(&im->clk.m3ccr, 0x00300000);
+ out_be32(&im->clk.m4ccr, 0x00300000);
+ out_be32(&im->clk.m1ccr, 0x00310000);
+ out_be32(&im->clk.m2ccr, 0x00310000);
+ out_be32(&im->clk.m3ccr, 0x00310000);
+ out_be32(&im->clk.m4ccr, 0x00310000);
+
+ /*
+ * Configure GPIO's
+ */
+ clrbits_be32(&im->gpio.gpodr, 0x000000e0);
+ clrbits_be32(&im->gpio.gpdir, 0x00ef0000);
+ setbits_be32(&im->gpio.gpdir, 0x001000e0);
+ setbits_be32(&im->gpio.gpdat, 0x00100000);
+
+ return 0;
+}
+
+/*
+ * fixed sdram init:
+ * The board doesn't use memory modules that have serial presence
+ * detect or similar mechanism for discovery of the DRAM settings
+ */
+long int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+ u32 msize_log2 = __ilog2(msize);
+ u32 i;
+
+ /* Initialize IO Control */
+ out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR);
+
+ /* Initialize DDR Local Window */
+ out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000);
+ out_be32(&im->sysconf.ddrlaw.ar, msize_log2 - 1);
+ sync_law(&im->sysconf.ddrlaw.ar);
+
+ /* Enable DDR */
+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_EN);
+
+ /* Initialize DDR Priority Manager */
+ out_be32(&im->mddrc.prioman_config1, CONFIG_SYS_MDDRCGRP_PM_CFG1);
+ out_be32(&im->mddrc.prioman_config2, CONFIG_SYS_MDDRCGRP_PM_CFG2);
+ out_be32(&im->mddrc.hiprio_config, CONFIG_SYS_MDDRCGRP_HIPRIO_CFG);
+ out_be32(&im->mddrc.lut_table0_main_upper, CONFIG_SYS_MDDRCGRP_LUT0_MU);
+ out_be32(&im->mddrc.lut_table0_main_lower, CONFIG_SYS_MDDRCGRP_LUT0_ML);
+ out_be32(&im->mddrc.lut_table1_main_upper, CONFIG_SYS_MDDRCGRP_LUT1_MU);
+ out_be32(&im->mddrc.lut_table1_main_lower, CONFIG_SYS_MDDRCGRP_LUT1_ML);
+ out_be32(&im->mddrc.lut_table2_main_upper, CONFIG_SYS_MDDRCGRP_LUT2_MU);
+ out_be32(&im->mddrc.lut_table2_main_lower, CONFIG_SYS_MDDRCGRP_LUT2_ML);
+ out_be32(&im->mddrc.lut_table3_main_upper, CONFIG_SYS_MDDRCGRP_LUT3_MU);
+ out_be32(&im->mddrc.lut_table3_main_lower, CONFIG_SYS_MDDRCGRP_LUT3_ML);
+ out_be32(&im->mddrc.lut_table4_main_upper, CONFIG_SYS_MDDRCGRP_LUT4_MU);
+ out_be32(&im->mddrc.lut_table4_main_lower, CONFIG_SYS_MDDRCGRP_LUT4_ML);
+ out_be32(&im->mddrc.lut_table0_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT0_AU);
+ out_be32(&im->mddrc.lut_table0_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT0_AL);
+ out_be32(&im->mddrc.lut_table1_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT1_AU);
+ out_be32(&im->mddrc.lut_table1_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT1_AL);
+ out_be32(&im->mddrc.lut_table2_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT2_AU);
+ out_be32(&im->mddrc.lut_table2_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT2_AL);
+ out_be32(&im->mddrc.lut_table3_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT3_AU);
+ out_be32(&im->mddrc.lut_table3_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT3_AL);
+ out_be32(&im->mddrc.lut_table4_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT4_AU);
+ out_be32(&im->mddrc.lut_table4_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT4_AL);
+
+ /* Initialize MDDRC */
+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG);
+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0);
+ out_be32(&im->mddrc.ddr_time_config1, CONFIG_SYS_MDDRC_TIME_CFG1);
+ out_be32(&im->mddrc.ddr_time_config2, CONFIG_SYS_MDDRC_TIME_CFG2);
+
+ /* Initialize DDR */
+ for (i = 0; i < 10; i++)
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM3);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EN_DLL);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_OCD_DEFAULT);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
+
+ /* Start MDDRC */
+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0_RUN);
+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_RUN);
+
+ return msize;
+}
+
+phys_size_t initdram(int board_type)
+{
+ return get_ram_size(0, fixed_sdram());
+}
+
+int misc_init_r(void)
+{
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+ u32 val;
+
+ /*
+ * Optimize access to profibus chip (VPC3) on the local bus
+ */
+
+ /*
+ * Select 1:1 for LPC_DIV
+ */
+ val = in_be32(&im->clk.scfr[0]) & ~SCFR1_LPC_DIV_MASK;
+ out_be32(&im->clk.scfr[0], val | (0x1 << SCFR1_LPC_DIV_SHIFT));
+
+ /*
+ * Configure LPC Chips Select Deadcycle Control Register
+ * CS0 - device can drive data 2 clock cycle(s) after CS deassertion
+ * CS1 - device can drive data 1 clock cycle(s) after CS deassertion
+ */
+ clrbits_be32(&im->lpc.cs_dccr, 0x000000ff);
+ setbits_be32(&im->lpc.cs_dccr, (0x00 << 4) | (0x01 << 0));
+
+ /*
+ * Configure LPC Chips Select Holdcycle Control Register
+ * CS0 - data is valid 2 clock cycle(s) after CS deassertion
+ * CS1 - data is valid 1 clock cycle(s) after CS deassertion
+ */
+ clrbits_be32(&im->lpc.cs_hccr, 0x000000ff);
+ setbits_be32(&im->lpc.cs_hccr, (0x00 << 4) | (0x01 << 0));
+
+ return 0;
+}
+
+static iopin_t ioregs_init[] = {
+ /* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
+ {
+ offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC1=FEC_COL Sets Next 15 to FEC pads */
+ {
+ offsetof(struct ioctrl512x, io_control_psc0_0), 15, 0,
+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC1=SELECT LPC_CS1 */
+ {
+ offsetof(struct ioctrl512x, io_control_lpc_cs1), 1, 0,
+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC5_2 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc5_2), 1, 0,
+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC5_3 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc5_3), 1, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC7_3 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc7_3), 1, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC9_0 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc9_0), 3, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC10_0 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc10_0), 3, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC10_3 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc10_3), 1, 0,
+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC3=SELECT PSC11_0 */
+ {
+ offsetof(struct ioctrl512x, io_control_psc11_0), 4, 0,
+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ },
+ /* FUNC0=SELECT IRQ0 */
+ {
+ offsetof(struct ioctrl512x, io_control_irq0), 4, 0,
+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+ }
+};
+
+static iopin_t rev2_silicon_pci_ioregs_init[] = {
+ /* FUNC0=PCI Sets next 54 to PCI pads */
+ {
+ offsetof(struct ioctrl512x, io_control_pci_ad31), 54, 0,
+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0)
+ }
+};
+
+int checkboard(void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ u32 spridr;
+
+ puts("Board: MECP_5123\n");
+
+ /*
+ * Initialize function mux & slew rate IO inter alia on IO
+ * Pins
+ */
+ iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
+
+ spridr = in_be32(&im->sysconf.spridr);
+ if (SVR_MJREV(spridr) >= 2)
+ iopin_initialize(rev2_silicon_pci_ioregs_init, 1);
+
+ return 0;
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
new file mode 100644
index 0000000..0831843
--- /dev/null
+++ b/include/configs/mecp5123.h
@@ -0,0 +1,458 @@
+/*
+ * (C) Copyright 2009 Wolfgang Denk <wd(a)denx.de>
+ * (C) Copyright 2009, DAVE Srl <www.dave.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * modifications for the MECP5123 by reinhard.arlt(a)esd-electronics.com
+ *
+ */
+
+/*
+ * MECP5123 board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MECP5123 1
+/*
+ * Memory map for the MECP5123 board:
+ *
+ * 0x0000_0000 - 0x1FFF_FFFF DDR RAM (512 MB)
+ * 0x3000_0000 - 0x3001_FFFF SRAM (128 KB)
+ * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB)
+ * 0x8200_0000 - 0x8200_FFFF VPC-3 (64 KB)
+ * 0xFFC0_0000 - 0xFFFF_FFFF NOR Boot FLASH (64 MB)
+ */
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC512X 1 /* MPC512X family */
+
+#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */
+
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_SYS_IMMR 0x80000000
+#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR+0x2100)
+
+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
+#define CONFIG_SYS_MEMTEST_END 0x00400000
+
+/*
+ * DDR Setup - manually set all parameters as there's no SPD etc.
+ */
+#define CONFIG_SYS_DDR_SIZE 512 /* MB */
+
+#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
+
+/* DDR Controller Configuration
+ *
+ * SYS_CFG:
+ * [31:31] MDDRC Soft Reset: Diabled
+ * [30:30] DRAM CKE pin: Enabled
+ * [29:29] DRAM CLK: Enabled
+ * [28:28] Command Mode: Enabled (For initialization only)
+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10]
+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10]
+ * [20:19] Read Test: DON'T USE
+ * [18:18] Self Refresh: Enabled
+ * [17:17] 16bit Mode: Disabled
+ * [16:13] Ready Delay: 2
+ * [12:12] Half DQS Delay: Disabled
+ * [11:11] Quarter DQS Delay: Disabled
+ * [10:08] Write Delay: 2
+ * [07:07] Early ODT: Disabled
+ * [06:06] On DIE Termination: Disabled
+ * [05:05] FIFO Overflow Clear: DON'T USE here
+ * [04:04] FIFO Underflow Clear: DON'T USE here
+ * [03:03] FIFO Overflow Pending: DON'T USE here
+ * [02:02] FIFO Underlfow Pending: DON'T USE here
+ * [01:01] FIFO Overlfow Enabled: Enabled
+ * [00:00] FIFO Underflow Enabled: Enabled
+ * TIME_CFG0
+ * [31:16] DRAM Refresh Time: 0 CSB clocks
+ * [15:8] DRAM Command Time: 0 CSB clocks
+ * [07:00] DRAM Precharge Time: 0 CSB clocks
+ * TIME_CFG1
+ * [31:26] DRAM tRFC:
+ * [25:21] DRAM tWR1:
+ * [20:17] DRAM tWRT1:
+ * [16:11] DRAM tDRR:
+ * [10:05] DRAM tRC:
+ * [04:00] DRAM tRAS:
+ * TIME_CFG2
+ * [31:28] DRAM tRCD:
+ * [27:23] DRAM tFAW:
+ * [22:19] DRAM tRTW1:
+ * [18:15] DRAM tCCD:
+ * [14:10] DRAM tRTP:
+ * [09:05] DRAM tRP:
+ * [04:00] DRAM tRPA
+ */
+#ifdef CONFIG_ADS5121_REV2
+#define CONFIG_SYS_MDDRC_SYS_CFG 0xF8604A00
+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xE8604A00
+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x54EC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x35210864
+#else
+#define CONFIG_SYS_MDDRC_SYS_CFG 0xFA804A00
+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xEA804A00
+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864
+#endif
+#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000
+#define CONFIG_SYS_MDDRC_TIME_CFG0 0x00003D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x06183D2E
+
+#define CONFIG_SYS_MICRON_NOP 0x01380000
+#define CONFIG_SYS_MICRON_PCHG_ALL 0x01100400
+#define CONFIG_SYS_MICRON_EM2 0x01020000
+#define CONFIG_SYS_MICRON_EM3 0x01030000
+#define CONFIG_SYS_MICRON_EN_DLL 0x01010000
+#define CONFIG_SYS_MICRON_RFSH 0x01080000
+#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432
+#define CONFIG_SYS_MICRON_OCD_DEFAULT 0x01010780
+
+/* DDR Priority Manager Configuration */
+#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777
+#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000
+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001
+#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC
+#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA
+#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558
+#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122
+#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111
+
+/*
+ * NOR FLASH on the Local Bus
+ */
+#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
+
+#define CONFIG_SYS_FLASH_BASE 0xFFC00000 /* start of FLASH */
+#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* max flash size */
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */
+
+#undef CONFIG_SYS_FLASH_CHECKSUM
+
+/*
+ * NAND FLASH
+ * drivers/mtd/nand/mpc5121_mpc.c (rev 2 silicon only)
+ */
+#define CONFIG_CMD_NAND
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE 0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS 1
+
+#define CONFIG_SYS_SRAM_BASE 0x30000000
+#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */
+
+/* ALE active low, data size 4bytes */
+#define CONFIG_SYS_CS0_CFG 0x05051150
+
+/* Use not alternative CS timing */
+#define CONFIG_SYS_CS_ALETIMING 0x00000000
+
+/* ALE active low, data size 4bytes */
+#define CONFIG_SYS_CS1_CFG 0x1f1f3090
+#define CONFIG_SYS_VPC3_BASE 0x82000000 /* start of VPC3 space */
+#define CONFIG_SYS_VPC3_SIZE 0x00010000 /* max VPC3 size */
+
+/* Use SRAM for initial stack */
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Init RAM addr */
+#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE
+
+#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Monitor length */
+#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Malloc size */
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 3 /* console is on PSC3 */
+#if CONFIG_PSC_CONSOLE != 3
+#error CONFIG_PSC_CONSOLE must be 3
+#endif
+#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+
+#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC3_TX_SIZE
+#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC3_TX_ADDR
+#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC3_RX_SIZE
+#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC3_RX_ADDR
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#endif
+
+/* I2C */
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
+#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */
+
+/*
+ * IIM - IC Identification Module
+ */
+#undef CONFIG_IIM
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
+#define CONFIG_SYS_EEPROM_WREN /* Use EEPROM write protect */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC512x_FEC 1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_ADDR 0x1
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_FEC_AN_TIMEOUT 1
+#define CONFIG_HAS_ETH0
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_SYS_RTC_BUS_NUM 0x01
+#define CONFIG_SYS_I2C_RTC_ADDR 0x32
+#define CONFIG_RTC_RX8025
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_IN_EEPROM /* Store env in I2C EEPROM */
+#define CONFIG_ENV_SIZE 0x1000
+#define CONFIG_ENV_OFFSET 0x0000 /* environment starts here */
+
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+#undef CONFIG_CMD_FUSE
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_ELF
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock.
+ * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set
+ * to 0xFFFF, watchdog timeouts after about 64s. For details refer
+ * to chapter 36 of the MPC5121e Reference Manual.
+ */
+/* #define CONFIG_WATCHDOG */ /* enable watchdog */
+#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF
+
+ /*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+
+#ifdef CONFIG_CMD_KGDB
+# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS 32
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Linux initial memory map */
+
+/* Cache Configuration */
+#define CONFIG_SYS_DCACHE_SIZE 32768
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CACHELINE_SHIFT 5
+#endif
+
+#define CONFIG_SYS_HID0_INIT 0x000000000
+#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
+#define CONFIG_SYS_HID2 HID2_HBE
+
+#define CONFIG_HIGH_BATS 1 /* High BATs supported */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_TIMESTAMP
+
+#define CONFIG_HOSTNAME mecp512x
+#define CONFIG_BOOTFILE /tftpboot/mecp512x/uImage
+#define CONFIG_ROOTPATH /tftpboot/mecp512x/target_root
+
+#define CONFIG_LOADADDR 400000 /* def. location for tftp and bootm */
+
+#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Welcome to MECP5123" \
+ "echo"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "u-boot_addr_r=200000\0" \
+ "kernel_addr_r=600000\0" \
+ "fdt_addr_r=880000\0" \
+ "ramdisk_addr_r=900000\0" \
+ "u-boot_addr=FFF00000\0" \
+ "kernel_addr=FFC40000\0" \
+ "fdt_addr=FFEC0000\0" \
+ "ramdisk_addr=FC040000\0" \
+ "ramdiskfile=/tftpboot/mecp512x/uRamdisk\0" \
+ "u-boot=/tftpboot/mecp512x/u-boot.bin\0" \
+ "bootfile=/tftpboot/mecp512x/uImage\0" \
+ "fdtfile=/tftpboot/mecp512x/mecp512x.dtb\0" \
+ "rootpath=/tftpboot/mecp512x/target_root\n" \
+ "netdev=eth0\0" \
+ "consdev=ttyPSC0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} " \
+ "console=${consdev},${baudrate}\0" \
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr} - ${fdt_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
+ "tftp ${fdt_addr_r} ${fdtfile};" \
+ "run nfsargs addip addtty;" \
+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
+ "net_self=tftp ${kernel_addr_r} ${bootfile};" \
+ "tftp ${ramdisk_addr_r} ${ramdiskfile};" \
+ "tftp ${fdt_addr_r} ${fdtfile};" \
+ "run ramargs addip addtty;" \
+ "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\
+ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \
+ "update=protect off ${u-boot_addr} +${filesize};" \
+ "era ${u-boot_addr} +${filesize};" \
+ "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \
+ "upd=run load update\0" \
+ ""
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+
+#define OF_CPU "PowerPC,5121@0"
+#define OF_SOC_COMPAT "fsl,mpc5121-immr"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc@80000000/serial@11300"
+
+#endif /* __CONFIG_H */
--
1.6.3.2
2
25

[U-Boot] [PATCH-ARM] Add support for Embest SBC2440-II Board 1/7
by kevin.morfittï¼ fearnside-systems.co.uk 11 Jul '09
by kevin.morfittï¼ fearnside-systems.co.uk 11 Jul '09
11 Jul '09
Patches 1 to 4 replace "[PATCH-ARM 1/2] Add support for
the Embest SBC2440-II Board 1/2" submitted on 19/06/2009.
This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct, from a
comment by Wolfgang on 03/06/2009
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones, from a comment by Scott on 22/06/2009
- make sure registers are accessed using the proper accessor
functions, from a comment by Wolfgang on 03/06/2009
- run checkpatch.pl and fix any error reports
Note that usb_ohci.c still has two lines that exceed 80 characters.
This is because the statements on those lines lose readability when
wrapped - the Linux coding style guidleines allows for this.
This complete series of patches assumes the following patches have
already been applied:
- [PATCH-ARM] Bug-fix in drivers mtd nand Makefile, sent 18/06/2009
- [PATCH-ARM] CONFIG_SYS_HZ fix for ARM920T S3C24X0 Boards, sent
21/06/2009
Signed-off-by: Kevin Morfitt <kevin.morfitt(a)fearnside-systems.co.uk>
---
cpu/arm920t/s3c24x0/speed.c | 42 +-
cpu/arm920t/s3c24x0/timer.c | 80 ++--
cpu/arm920t/s3c24x0/usb.c | 30 +-
cpu/arm920t/s3c24x0/usb_ohci.c | 1268 +++++++++++++++++++++-------------------
cpu/arm920t/s3c24x0/usb_ohci.h | 187 +++---
cpu/arm920t/start.S | 63 +-
6 files changed, 875 insertions(+), 795 deletions(-)
diff --git a/cpu/arm920t/s3c24x0/speed.c b/cpu/arm920t/s3c24x0/speed.c
index e0dca62..bb86335 100644
--- a/cpu/arm920t/s3c24x0/speed.c
+++ b/cpu/arm920t/s3c24x0/speed.c
@@ -32,6 +32,8 @@
#include <common.h>
#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#include <asm/io.h>
+
#if defined(CONFIG_S3C2400)
#include <s3c2400.h>
#elif defined(CONFIG_S3C2410)
@@ -53,49 +55,51 @@
static ulong get_PLLCLK(int pllreg)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- ulong r, m, p, s;
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ ulong r, m, p, s;
- if (pllreg == MPLL)
- r = clk_power->MPLLCON;
- else if (pllreg == UPLL)
- r = clk_power->UPLLCON;
- else
- hang();
+ if (pllreg == MPLL)
+ r = readl(&clk_power->MPLLCON);
+ else if (pllreg == UPLL)
+ r = readl(&clk_power->UPLLCON);
+ else
+ hang();
- m = ((r & 0xFF000) >> 12) + 8;
- p = ((r & 0x003F0) >> 4) + 2;
- s = r & 0x3;
+ m = ((r & 0xFF000) >> 12) + 8;
+ p = ((r & 0x003F0) >> 4) + 2;
+ s = r & 0x3;
- return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
+ return (CONFIG_SYS_CLK_FREQ * m) / (p << s);
}
/* return FCLK frequency */
ulong get_FCLK(void)
{
- return(get_PLLCLK(MPLL));
+ return get_PLLCLK(MPLL);
}
/* return HCLK frequency */
ulong get_HCLK(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
- return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
+ return (readl(&clk_power->CLKDIVN) & 2) ? get_FCLK() / 2 : get_FCLK();
}
/* return PCLK frequency */
ulong get_PCLK(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
- return((clk_power->CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
+ return (readl(&clk_power->CLKDIVN) & 1) ? get_HCLK() / 2 : get_HCLK();
}
/* return UCLK frequency */
ulong get_UCLK(void)
{
- return(get_PLLCLK(UPLL));
+ return get_PLLCLK(UPLL);
}
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400) ||
+ defined (CONFIG_S3C2410) ||
+ defined (CONFIG_TRAB) */
diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c
index 8ea2e4b..0aa7947 100644
--- a/cpu/arm920t/s3c24x0/timer.c
+++ b/cpu/arm920t/s3c24x0/timer.c
@@ -30,7 +30,11 @@
*/
#include <common.h>
-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#if defined(CONFIG_S3C2400) || \
+ defined(CONFIG_S3C2410) || \
+ defined(CONFIG_TRAB)
+
+#include <asm/io.h>
#if defined(CONFIG_S3C2400)
#include <s3c2400.h>
@@ -45,9 +49,9 @@ static ulong timer_clk;
/* macro to read the 16 bit timer */
static inline ulong READ_TIMER(void)
{
- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+ struct s3c24x0_timers *timers = S3C24X0_GetBase_TIMERS();
- return (timers->TCNTO4 & 0xffff);
+ return readl(&timers->TCNTO4) & 0xffff;
}
static ulong timestamp;
@@ -55,27 +59,30 @@ static ulong lastdec;
int timer_init (void)
{
- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
+ struct s3c24x0_timers *timers = S3C24X0_GetBase_TIMERS();
+ ulong tmr;
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
- timers->TCFG0 = 0x0f00;
- if (timer_load_val == 0)
- {
+ writel(0x0f00, &timers->TCFG0);
+ if (timer_load_val == 0) {
/*
* for 10 ms clock period @ PCLK with 4 bit divider = 1/2
* (default) and prescaler = 16. Should be 10390
* @33.25MHz and 15625 @ 50 MHz
*/
- timer_load_val = get_PCLK()/(2 * 16 * 100);
+ timer_load_val = get_PCLK() / (2 * 16 * 100);
timer_clk = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
- lastdec = timers->TCNTB4 = timer_load_val;
+ lastdec = timer_load_val;
+ writel(timer_load_val, &timers->TCNTB4);
/* auto load, manual update of Timer 4 */
- timers->TCON = (timers->TCON & ~0x0700000) | 0x600000;
+ tmr = (readl(&timers->TCON) & ~0x0700000) | 0x0600000;
+ writel(tmr, &timers->TCON);
/* auto load, start Timer 4 */
- timers->TCON = (timers->TCON & ~0x0700000) | 0x500000;
+ tmr = (tmr & ~0x0700000) | 0x0500000;
+ writel(tmr, &timers->TCON);
timestamp = 0;
return (0);
@@ -85,22 +92,22 @@ int timer_init (void)
* timer without interrupts
*/
-void reset_timer (void)
-{
- reset_timer_masked ();
-}
+void reset_timer(void)
+ {
+ reset_timer_masked();
+ }
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
- return get_timer_masked () - base;
+ return get_timer_masked() - base;
}
-void set_timer (ulong t)
+void set_timer(ulong t)
{
timestamp = t;
}
-void udelay (unsigned long usec)
+void udelay(unsigned long usec)
{
ulong tmo;
ulong start = get_timer_raw();
@@ -113,21 +120,21 @@ void udelay (unsigned long usec)
/*NOP*/;
}
-void reset_timer_masked (void)
+void reset_timer_masked(void)
{
/* reset time */
lastdec = READ_TIMER();
timestamp = 0;
}
-ulong get_timer_masked (void)
+ulong get_timer_masked(void)
{
ulong tmr = get_timer_raw();
return tmr / (timer_clk / CONFIG_SYS_HZ);
}
-void udelay_masked (unsigned long usec)
+void udelay_masked(unsigned long usec)
{
ulong tmo;
ulong endtime;
@@ -139,7 +146,7 @@ void udelay_masked (unsigned long usec)
tmo /= 1000;
} else {
tmo = usec * (timer_load_val * 100);
- tmo /= (1000*1000);
+ tmo /= (1000 * 1000);
}
endtime = get_timer_raw() + tmo;
@@ -179,7 +186,7 @@ unsigned long long get_ticks(void)
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
-ulong get_tbclk (void)
+ulong get_tbclk(void)
{
ulong tbclk;
@@ -199,28 +206,27 @@ ulong get_tbclk (void)
/*
* reset the cpu by setting up the watchdog timer and let him time out
*/
-void reset_cpu (ulong ignored)
+void reset_cpu(ulong ignored)
{
- volatile S3C24X0_WATCHDOG * watchdog;
+ struct s3c24x0_watchdog *watchdog;
#ifdef CONFIG_TRAB
- extern void disable_vfd (void);
-
disable_vfd();
#endif
watchdog = S3C24X0_GetBase_WATCHDOG();
/* Disable watchdog */
- watchdog->WTCON = 0x0000;
+ writel(0x0000, &watchdog->WTCON);
/* Initialize watchdog timer count register */
- watchdog->WTCNT = 0x0001;
+ writel(0x0001, &watchdog->WTCNT);
/* Enable watchdog timer; assert reset at timer timeout */
- watchdog->WTCON = 0x0021;
+ writel(0x0021, &watchdog->WTCON);
- while(1); /* loop forever and wait for reset to happen */
+ while (1)
+ /* loop forever and wait for reset to happen */;
/*NOTREACHED*/
}
@@ -228,10 +234,12 @@ void reset_cpu (ulong ignored)
#ifdef CONFIG_USE_IRQ
void s3c2410_irq(void)
{
- S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
- u_int32_t intpnd = irq->INTPND;
-
+ struct s3c24x0_interrupt *irq = S3C24X0_GetBase_INTERRUPT();
+ u_int32_t intpnd = readl(&irq->INTPND);
}
#endif /* USE_IRQ */
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400) ||
+ defined (CONFIG_S3C2410) ||
+ defined (CONFIG_TRAB) */
+
diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c
index 9ccf575..1f495ff 100644
--- a/cpu/arm920t/s3c24x0/usb.c
+++ b/cpu/arm920t/s3c24x0/usb.c
@@ -32,41 +32,43 @@
# include <s3c2410.h>
#endif
-int usb_cpu_init (void)
-{
+#include <asm/io.h>
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+int usb_cpu_init(void)
+{
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_gpio *gpio = S3C24X0_GetBase_GPIO();
/*
* Set the 48 MHz UPLL clocking. Values are taken from
* "PLL value selection guide", 6-23, s3c2400_UM.pdf.
*/
- clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
- gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
+ writel((40 << 12) + (1 << 4) + 2, &clk_power->UPLLCON);
+ /* 1 = use pads related USB for USB host */
+ writel(readl(&gpio->MISCCR) | 0x8, &gpio->MISCCR);
/*
* Enable USB host clock.
*/
- clk_power->CLKCON |= (1 << 4);
+ writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON);
return 0;
}
-int usb_cpu_stop (void)
+int usb_cpu_stop(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
/* may not want to do this */
- clk_power->CLKCON &= ~(1 << 4);
+ writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON);
return 0;
}
-int usb_cpu_init_fail (void)
+int usb_cpu_init_fail(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- clk_power->CLKCON &= ~(1 << 4);
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON);
return 0;
}
-# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
+# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c
index 7838014..fe7b533 100644
--- a/cpu/arm920t/s3c24x0/usb_ohci.c
+++ b/cpu/arm920t/s3c24x0/usb_ohci.c
@@ -44,6 +44,7 @@
#include <s3c2410.h>
#endif
+#include <asm/io.h>
#include <malloc.h>
#include <usb.h>
#include "usb_ohci.h"
@@ -56,10 +57,8 @@
#define OHCI_CONTROL_INIT \
(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-#define readl(a) (*((volatile u32 *)(a)))
-#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
-
-#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
+#define min_t(type, x, y) \
+ ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
#undef DEBUG
#ifdef DEBUG
@@ -109,21 +108,29 @@ int urb_finished = 0;
temp = readl (&hc->regs->roothub.register); \
temp; })
-static u32 roothub_a (struct ohci *hc)
- { return read_roothub (hc, a, 0xfc0fe000); }
-static inline u32 roothub_b (struct ohci *hc)
- { return readl (&hc->regs->roothub.b); }
-static inline u32 roothub_status (struct ohci *hc)
- { return readl (&hc->regs->roothub.status); }
-static u32 roothub_portstatus (struct ohci *hc, int i)
- { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
-
+static u32 roothub_a(struct ohci *hc)
+{
+ return read_roothub(hc, a, 0xfc0fe000);
+}
+static inline u32 roothub_b(struct ohci *hc)
+{
+ return readl(&hc->regs->roothub.b);
+}
+static inline u32 roothub_status(struct ohci *hc)
+{
+ return readl(&hc->regs->roothub.status);
+}
+static u32 roothub_portstatus(struct ohci *hc, int i)
+{
+ return read_roothub(hc, portstatus[i], 0xffe0fce0);
+}
/* forward declaration */
-static int hc_interrupt (void);
-static void
-td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
- int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
+static int hc_interrupt(void);
+static void td_submit_job(struct usb_device *dev, unsigned long pipe,
+ void *buffer, int transfer_len,
+ struct devrequest *setup, urb_priv_t *urb,
+ int interval);
/*-------------------------------------------------------------------------*
* URB support functions
@@ -131,11 +138,11 @@ td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
/* free HCD-private data associated with this URB */
-static void urb_free_priv (urb_priv_t * urb)
+static void urb_free_priv(urb_priv_t *urb)
{
- int i;
- int last;
- struct td * td;
+ int i;
+ int last;
+ struct td *td;
last = urb->length - 1;
if (last >= 0) {
@@ -152,227 +159,219 @@ static void urb_free_priv (urb_priv_t * urb)
/*-------------------------------------------------------------------------*/
#ifdef DEBUG
-static int sohci_get_current_frame_number (struct usb_device * dev);
+static int sohci_get_current_frame_number(struct usb_device *dev);
/* debug| print the main components of an URB
* small: 0) header + data packets 1) just header */
-static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
- int transfer_len, struct devrequest * setup, char * str, int small)
+static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int transfer_len, struct devrequest *setup, char *str,
+ int small)
{
- urb_priv_t * purb = &urb_priv;
+ urb_priv_t *purb = &urb_priv;
dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
- str,
- sohci_get_current_frame_number (dev),
- usb_pipedevice (pipe),
- usb_pipeendpoint (pipe),
- usb_pipeout (pipe)? 'O': 'I',
- usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
- (usb_pipecontrol (pipe)? "CTRL": "BULK"),
- purb->actual_length,
- transfer_len, dev->status);
+ str,
+ sohci_get_current_frame_number(dev),
+ usb_pipedevice(pipe),
+ usb_pipeendpoint(pipe),
+ usb_pipeout(pipe) ? 'O' : 'I',
+ usb_pipetype(pipe) < 2 ?
+ (usb_pipeint(pipe) ? "INTR" : "ISOC") :
+ (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
+ purb->actual_length, transfer_len, dev->status);
#ifdef OHCI_VERBOSE_DEBUG
if (!small) {
int i, len;
- if (usb_pipecontrol (pipe)) {
- printf (__FILE__ ": cmd(8):");
- for (i = 0; i < 8 ; i++)
- printf (" %02x", ((__u8 *) setup) [i]);
- printf ("\n");
+ if (usb_pipecontrol(pipe)) {
+ printf(__FILE__ ": cmd(8):");
+ for (i = 0; i < 8; i++)
+ printf(" %02x", ((__u8 *) setup)[i]);
+ printf("\n");
}
if (transfer_len > 0 && buffer) {
- printf (__FILE__ ": data(%d/%d):",
- purb->actual_length,
- transfer_len);
- len = usb_pipeout (pipe)?
- transfer_len: purb->actual_length;
+ printf(__FILE__ ": data(%d/%d):",
+ purb->actual_length, transfer_len);
+ len = usb_pipeout(pipe) ?
+ transfer_len : purb->actual_length;
for (i = 0; i < 16 && i < len; i++)
- printf (" %02x", ((__u8 *) buffer) [i]);
- printf ("%s\n", i < len? "...": "");
+ printf(" %02x", ((__u8 *) buffer)[i]);
+ printf("%s\n", i < len ? "..." : "");
}
}
#endif
}
-/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
-void ep_print_int_eds (ohci_t *ohci, char * str) {
+/* just for debugging; prints non-empty branches of the
+ int ed tree inclusive iso eds*/
+void ep_print_int_eds(ohci_t *ohci, char *str)
+{
int i, j;
- __u32 * ed_p;
- for (i= 0; i < 32; i++) {
+ __u32 *ed_p;
+ for (i = 0; i < 32; i++) {
j = 5;
- ed_p = &(ohci->hcca->int_table [i]);
+ ed_p = &(ohci->hcca->int_table[i]);
if (*ed_p == 0)
- continue;
- printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
+ continue;
+ printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
while (*ed_p != 0 && j--) {
- ed_t *ed = (ed_t *)m32_swap(ed_p);
- printf (" ed: %4x;", ed->hwINFO);
+ ed_t *ed = (ed_t *) m32_swap(ed_p);
+ printf(" ed: %4x;", ed->hwINFO);
ed_p = &ed->hwNextED;
}
- printf ("\n");
+ printf("\n");
}
}
-static void ohci_dump_intr_mask (char *label, __u32 mask)
+static void ohci_dump_intr_mask(char *label, __u32 mask)
{
- dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
- label,
- mask,
- (mask & OHCI_INTR_MIE) ? " MIE" : "",
- (mask & OHCI_INTR_OC) ? " OC" : "",
- (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
- (mask & OHCI_INTR_FNO) ? " FNO" : "",
- (mask & OHCI_INTR_UE) ? " UE" : "",
- (mask & OHCI_INTR_RD) ? " RD" : "",
- (mask & OHCI_INTR_SF) ? " SF" : "",
- (mask & OHCI_INTR_WDH) ? " WDH" : "",
- (mask & OHCI_INTR_SO) ? " SO" : ""
- );
+ dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
+ label,
+ mask,
+ (mask & OHCI_INTR_MIE) ? " MIE" : "",
+ (mask & OHCI_INTR_OC) ? " OC" : "",
+ (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
+ (mask & OHCI_INTR_FNO) ? " FNO" : "",
+ (mask & OHCI_INTR_UE) ? " UE" : "",
+ (mask & OHCI_INTR_RD) ? " RD" : "",
+ (mask & OHCI_INTR_SF) ? " SF" : "",
+ (mask & OHCI_INTR_WDH) ? " WDH" : "",
+ (mask & OHCI_INTR_SO) ? " SO" : "");
}
-static void maybe_print_eds (char *label, __u32 value)
+static void maybe_print_eds(char *label, __u32 value)
{
- ed_t *edp = (ed_t *)value;
+ ed_t *edp = (ed_t *) value;
if (value) {
- dbg ("%s %08x", label, value);
- dbg ("%08x", edp->hwINFO);
- dbg ("%08x", edp->hwTailP);
- dbg ("%08x", edp->hwHeadP);
- dbg ("%08x", edp->hwNextED);
+ dbg("%s %08x", label, value);
+ dbg("%08x", edp->hwINFO);
+ dbg("%08x", edp->hwTailP);
+ dbg("%08x", edp->hwHeadP);
+ dbg("%08x", edp->hwNextED);
}
}
-static char * hcfs2string (int state)
+static char *hcfs2string(int state)
{
switch (state) {
- case OHCI_USB_RESET: return "reset";
- case OHCI_USB_RESUME: return "resume";
- case OHCI_USB_OPER: return "operational";
- case OHCI_USB_SUSPEND: return "suspend";
+ case OHCI_USB_RESET:
+ return "reset";
+ case OHCI_USB_RESUME:
+ return "resume";
+ case OHCI_USB_OPER:
+ return "operational";
+ case OHCI_USB_SUSPEND:
+ return "suspend";
}
return "?";
}
/* dump control and status registers */
-static void ohci_dump_status (ohci_t *controller)
+static void ohci_dump_status(ohci_t *controller)
{
- struct ohci_regs *regs = controller->regs;
- __u32 temp;
+ struct ohci_regs *regs = controller->regs;
+ __u32 temp;
- temp = readl (®s->revision) & 0xff;
+ temp = readl(®s->revision) & 0xff;
if (temp != 0x10)
- dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
-
- temp = readl (®s->control);
- dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
- (temp & OHCI_CTRL_RWE) ? " RWE" : "",
- (temp & OHCI_CTRL_RWC) ? " RWC" : "",
- (temp & OHCI_CTRL_IR) ? " IR" : "",
- hcfs2string (temp & OHCI_CTRL_HCFS),
- (temp & OHCI_CTRL_BLE) ? " BLE" : "",
- (temp & OHCI_CTRL_CLE) ? " CLE" : "",
- (temp & OHCI_CTRL_IE) ? " IE" : "",
- (temp & OHCI_CTRL_PLE) ? " PLE" : "",
- temp & OHCI_CTRL_CBSR
- );
-
- temp = readl (®s->cmdstatus);
- dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
- (temp & OHCI_SOC) >> 16,
- (temp & OHCI_OCR) ? " OCR" : "",
- (temp & OHCI_BLF) ? " BLF" : "",
- (temp & OHCI_CLF) ? " CLF" : "",
- (temp & OHCI_HCR) ? " HCR" : ""
- );
-
- ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
- ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
-
- maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
-
- maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
- maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
-
- maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
- maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
-
- maybe_print_eds ("donehead", readl (®s->donehead));
+ dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
+
+ temp = readl(®s->control);
+ dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
+ (temp & OHCI_CTRL_RWE) ? " RWE" : "",
+ (temp & OHCI_CTRL_RWC) ? " RWC" : "",
+ (temp & OHCI_CTRL_IR) ? " IR" : "",
+ hcfs2string(temp & OHCI_CTRL_HCFS),
+ (temp & OHCI_CTRL_BLE) ? " BLE" : "",
+ (temp & OHCI_CTRL_CLE) ? " CLE" : "",
+ (temp & OHCI_CTRL_IE) ? " IE" : "",
+ (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
+
+ temp = readl(®s->cmdstatus);
+ dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
+ (temp & OHCI_SOC) >> 16,
+ (temp & OHCI_OCR) ? " OCR" : "",
+ (temp & OHCI_BLF) ? " BLF" : "",
+ (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
+
+ ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus));
+ ohci_dump_intr_mask("intrenable", readl(®s->intrenable));
+
+ maybe_print_eds("ed_periodcurrent", readl(®s->ed_periodcurrent));
+
+ maybe_print_eds("ed_controlhead", readl(®s->ed_controlhead));
+ maybe_print_eds("ed_controlcurrent", readl(®s->ed_controlcurrent));
+
+ maybe_print_eds("ed_bulkhead", readl(®s->ed_bulkhead));
+ maybe_print_eds("ed_bulkcurrent", readl(®s->ed_bulkcurrent));
+
+ maybe_print_eds("donehead", readl(®s->donehead));
}
-static void ohci_dump_roothub (ohci_t *controller, int verbose)
+static void ohci_dump_roothub(ohci_t *controller, int verbose)
{
- __u32 temp, ndp, i;
+ __u32 temp, ndp, i;
- temp = roothub_a (controller);
+ temp = roothub_a(controller);
ndp = (temp & RH_A_NDP);
if (verbose) {
- dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
- ((temp & RH_A_POTPGT) >> 24) & 0xff,
- (temp & RH_A_NOCP) ? " NOCP" : "",
- (temp & RH_A_OCPM) ? " OCPM" : "",
- (temp & RH_A_DT) ? " DT" : "",
- (temp & RH_A_NPS) ? " NPS" : "",
- (temp & RH_A_PSM) ? " PSM" : "",
- ndp
- );
- temp = roothub_b (controller);
- dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
- temp,
- (temp & RH_B_PPCM) >> 16,
- (temp & RH_B_DR)
- );
- temp = roothub_status (controller);
- dbg ("roothub.status: %08x%s%s%s%s%s%s",
- temp,
- (temp & RH_HS_CRWE) ? " CRWE" : "",
- (temp & RH_HS_OCIC) ? " OCIC" : "",
- (temp & RH_HS_LPSC) ? " LPSC" : "",
- (temp & RH_HS_DRWE) ? " DRWE" : "",
- (temp & RH_HS_OCI) ? " OCI" : "",
- (temp & RH_HS_LPS) ? " LPS" : ""
- );
+ dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
+ ((temp & RH_A_POTPGT) >> 24) & 0xff,
+ (temp & RH_A_NOCP) ? " NOCP" : "",
+ (temp & RH_A_OCPM) ? " OCPM" : "",
+ (temp & RH_A_DT) ? " DT" : "",
+ (temp & RH_A_NPS) ? " NPS" : "",
+ (temp & RH_A_PSM) ? " PSM" : "", ndp);
+ temp = roothub_b(controller);
+ dbg("roothub.b: %08x PPCM=%04x DR=%04x",
+ temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
+ );
+ temp = roothub_status(controller);
+ dbg("roothub.status: %08x%s%s%s%s%s%s",
+ temp,
+ (temp & RH_HS_CRWE) ? " CRWE" : "",
+ (temp & RH_HS_OCIC) ? " OCIC" : "",
+ (temp & RH_HS_LPSC) ? " LPSC" : "",
+ (temp & RH_HS_DRWE) ? " DRWE" : "",
+ (temp & RH_HS_OCI) ? " OCI" : "",
+ (temp & RH_HS_LPS) ? " LPS" : "");
}
for (i = 0; i < ndp; i++) {
- temp = roothub_portstatus (controller, i);
- dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
- i,
- temp,
- (temp & RH_PS_PRSC) ? " PRSC" : "",
- (temp & RH_PS_OCIC) ? " OCIC" : "",
- (temp & RH_PS_PSSC) ? " PSSC" : "",
- (temp & RH_PS_PESC) ? " PESC" : "",
- (temp & RH_PS_CSC) ? " CSC" : "",
-
- (temp & RH_PS_LSDA) ? " LSDA" : "",
- (temp & RH_PS_PPS) ? " PPS" : "",
- (temp & RH_PS_PRS) ? " PRS" : "",
- (temp & RH_PS_POCI) ? " POCI" : "",
- (temp & RH_PS_PSS) ? " PSS" : "",
-
- (temp & RH_PS_PES) ? " PES" : "",
- (temp & RH_PS_CCS) ? " CCS" : ""
- );
+ temp = roothub_portstatus(controller, i);
+ dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
+ i,
+ temp,
+ (temp & RH_PS_PRSC) ? " PRSC" : "",
+ (temp & RH_PS_OCIC) ? " OCIC" : "",
+ (temp & RH_PS_PSSC) ? " PSSC" : "",
+ (temp & RH_PS_PESC) ? " PESC" : "",
+ (temp & RH_PS_CSC) ? " CSC" : "",
+ (temp & RH_PS_LSDA) ? " LSDA" : "",
+ (temp & RH_PS_PPS) ? " PPS" : "",
+ (temp & RH_PS_PRS) ? " PRS" : "",
+ (temp & RH_PS_POCI) ? " POCI" : "",
+ (temp & RH_PS_PSS) ? " PSS" : "",
+ (temp & RH_PS_PES) ? " PES" : "",
+ (temp & RH_PS_CCS) ? " CCS" : "");
}
}
-static void ohci_dump (ohci_t *controller, int verbose)
+static void ohci_dump(ohci_t *controller, int verbose)
{
- dbg ("OHCI controller usb-%s state", controller->slot_name);
+ dbg("OHCI controller usb-%s state", controller->slot_name);
/* dumps some of the state we know about */
- ohci_dump_status (controller);
+ ohci_dump_status(controller);
if (verbose)
- ep_print_int_eds (controller, "hcca");
- dbg ("hcca frame #%04x", controller->hcca->frame_no);
- ohci_dump_roothub (controller, 1);
+ ep_print_int_eds(controller, "hcca");
+ dbg("hcca frame #%04x", controller->hcca->frame_no);
+ ohci_dump_roothub(controller, 1);
}
-
#endif /* DEBUG */
/*-------------------------------------------------------------------------*
@@ -382,10 +381,10 @@ static void ohci_dump (ohci_t *controller, int verbose)
/* get a transfer request */
int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup, int interval)
+ int transfer_len, struct devrequest *setup, int interval)
{
ohci_t *ohci;
- ed_t * ed;
+ ed_t *ed;
urb_priv_t *purb_priv;
int i, size = 0;
@@ -405,24 +404,27 @@ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
err("sohci_submit_job: URB NOT FINISHED");
return -1;
}
- /* we're about to begin a new transaction here so mark the URB unfinished */
+ /* we're about to begin a new transaction here
+ so mark the URB unfinished */
urb_finished = 0;
/* every endpoint has a ed, locate and fill it */
- if (!(ed = ep_add_ed (dev, pipe))) {
+ ed = ep_add_ed(dev, pipe);
+ if (!ed) {
err("sohci_submit_job: ENOMEM");
return -1;
}
/* for the private part of the URB we need the number of TDs (size) */
- switch (usb_pipetype (pipe)) {
- case PIPE_BULK: /* one TD for every 4096 Byte */
- size = (transfer_len - 1) / 4096 + 1;
- break;
- case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
- size = (transfer_len == 0)? 2:
- (transfer_len - 1) / 4096 + 3;
- break;
+ switch (usb_pipetype(pipe)) {
+ case PIPE_BULK:
+ /* one TD for every 4096 Byte */
+ size = (transfer_len - 1) / 4096 + 1;
+ break;
+ case PIPE_CONTROL:
+ /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
+ size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
+ break;
}
if (size >= (N_URB_TD - 1)) {
@@ -440,27 +442,28 @@ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
/* allocate the TDs */
/* note that td[0] was allocated in ep_add_ed */
for (i = 0; i < size; i++) {
- purb_priv->td[i] = td_alloc (dev);
+ purb_priv->td[i] = td_alloc(dev);
if (!purb_priv->td[i]) {
purb_priv->length = i;
- urb_free_priv (purb_priv);
+ urb_free_priv(purb_priv);
err("sohci_submit_job: ENOMEM");
return -1;
}
}
if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
- urb_free_priv (purb_priv);
+ urb_free_priv(purb_priv);
err("sohci_submit_job: EINVAL");
return -1;
}
/* link the ed into a chain if is not already */
if (ed->state != ED_OPER)
- ep_link (ohci, ed);
+ ep_link(ohci, ed);
/* fill the TDs and link it to the ed */
- td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
+ td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
+ interval);
return 0;
}
@@ -470,11 +473,11 @@ int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
#ifdef DEBUG
/* tell us the current USB frame number */
-static int sohci_get_current_frame_number (struct usb_device *usb_dev)
+static int sohci_get_current_frame_number(struct usb_device *usb_dev)
{
ohci_t *ohci = &gohci;
- return m16_swap (ohci->hcca->frame_no);
+ return m16_swap(ohci->hcca->frame_no);
}
#endif
@@ -484,7 +487,7 @@ static int sohci_get_current_frame_number (struct usb_device *usb_dev)
/* link an ed into one of the HC chains */
-static int ep_link (ohci_t *ohci, ed_t *edi)
+static int ep_link(ohci_t *ohci, ed_t *edi)
{
volatile ed_t *ed = edi;
@@ -494,15 +497,15 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
case PIPE_CONTROL:
ed->hwNextED = 0;
if (ohci->ed_controltail == NULL) {
- writel (ed, &ohci->regs->ed_controlhead);
+ writel((u32)ed, &ohci->regs->ed_controlhead);
} else {
- ohci->ed_controltail->hwNextED = (__u32)m32_swap (ed);
+ ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed);
}
ed->ed_prev = ohci->ed_controltail;
if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
- !ohci->ed_rm_list[1] && !ohci->sleeping) {
+ !ohci->ed_rm_list[1] && !ohci->sleeping) {
ohci->hc_control |= OHCI_CTRL_CLE;
- writel (ohci->hc_control, &ohci->regs->control);
+ writel(ohci->hc_control, &ohci->regs->control);
}
ohci->ed_controltail = edi;
break;
@@ -510,15 +513,15 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
case PIPE_BULK:
ed->hwNextED = 0;
if (ohci->ed_bulktail == NULL) {
- writel (ed, &ohci->regs->ed_bulkhead);
+ writel((u32)ed, &ohci->regs->ed_bulkhead);
} else {
- ohci->ed_bulktail->hwNextED = (__u32)m32_swap (ed);
+ ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed);
}
ed->ed_prev = ohci->ed_bulktail;
if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
- !ohci->ed_rm_list[1] && !ohci->sleeping) {
+ !ohci->ed_rm_list[1] && !ohci->sleeping) {
ohci->hc_control |= OHCI_CTRL_BLE;
- writel (ohci->hc_control, &ohci->regs->control);
+ writel(ohci->hc_control, &ohci->regs->control);
}
ohci->ed_bulktail = edi;
break;
@@ -533,25 +536,27 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
* the link from the ed still points to another operational ed or 0
* so the HC can eventually finish the processing of the unlinked ed */
-static int ep_unlink (ohci_t *ohci, ed_t *ed)
+static int ep_unlink(ohci_t *ohci, ed_t *ed)
{
- ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
+ ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
switch (ed->type) {
case PIPE_CONTROL:
if (ed->ed_prev == NULL) {
if (!ed->hwNextED) {
ohci->hc_control &= ~OHCI_CTRL_CLE;
- writel (ohci->hc_control, &ohci->regs->control);
+ writel(ohci->hc_control, &ohci->regs->control);
}
- writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
+ writel(m32_swap(*((__u32 *) &ed->hwNextED)),
+ &ohci->regs->ed_controlhead);
} else {
ed->ed_prev->hwNextED = ed->hwNextED;
}
if (ohci->ed_controltail == ed) {
ohci->ed_controltail = ed->ed_prev;
} else {
- ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
+ ((ed_t *)m32_swap(*((__u32 *)&ed->hwNextED)))->ed_prev =
+ ed->ed_prev;
}
break;
@@ -559,16 +564,18 @@ static int ep_unlink (ohci_t *ohci, ed_t *ed)
if (ed->ed_prev == NULL) {
if (!ed->hwNextED) {
ohci->hc_control &= ~OHCI_CTRL_BLE;
- writel (ohci->hc_control, &ohci->regs->control);
+ writel(ohci->hc_control, &ohci->regs->control);
}
- writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
+ writel(m32_swap(*((__u32 *) &ed->hwNextED)),
+ &ohci->regs->ed_bulkhead);
} else {
ed->ed_prev->hwNextED = ed->hwNextED;
}
if (ohci->ed_bulktail == ed) {
ohci->ed_bulktail = ed->ed_prev;
} else {
- ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
+ ((ed_t *)m32_swap(*((__u32 *)&ed->hwNextED)))->ed_prev =
+ ed->ed_prev;
}
break;
}
@@ -576,23 +583,24 @@ static int ep_unlink (ohci_t *ohci, ed_t *ed)
return 0;
}
-
/*-------------------------------------------------------------------------*/
-/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
- * but the USB stack is a little bit stateless so we do it at every transaction
- * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
- * in all other cases the state is left unchanged
- * the ed info fields are setted anyway even though most of them should not change */
+/* add/reinit an endpoint; this should be done once at the usb_set_configuration
+ * command, but the USB stack is a little bit stateless so we do it at every
+ * transaction. If the state of the ed is ED_NEW then a dummy td is added and
+ * the state is changed to ED_UNLINK. In all other cases the state is left
+ * unchanged. The ed info fields are setted anyway even though most of them
+ * should not change */
-static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
+static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
{
td_t *td;
ed_t *ed_ret;
volatile ed_t *ed;
- ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
- (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
+ ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
+ (usb_pipecontrol(pipe) ? 0 :
+ usb_pipeout(pipe))];
if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
err("ep_add_ed: pending delete");
@@ -601,22 +609,23 @@ static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
}
if (ed->state == ED_NEW) {
- ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
+ ed->hwINFO = m32_swap(OHCI_ED_SKIP); /* skip ed */
/* dummy td; end of td list for ed */
- td = td_alloc (usb_dev);
- ed->hwTailP = (__u32)m32_swap (td);
+ td = td_alloc(usb_dev);
+ ed->hwTailP = (__u32) m32_swap(td);
ed->hwHeadP = ed->hwTailP;
ed->state = ED_UNLINK;
- ed->type = usb_pipetype (pipe);
+ ed->type = usb_pipetype(pipe);
ohci_dev.ed_cnt++;
}
- ed->hwINFO = m32_swap (usb_pipedevice (pipe)
- | usb_pipeendpoint (pipe) << 7
- | (usb_pipeisoc (pipe)? 0x8000: 0)
- | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
- | usb_pipeslow (pipe) << 13
- | usb_maxpacket (usb_dev, pipe) << 16);
+ ed->hwINFO = m32_swap(usb_pipedevice(pipe)
+ | usb_pipeendpoint(pipe) << 7
+ | (usb_pipeisoc(pipe) ? 0x8000 : 0)
+ | (usb_pipecontrol(pipe) ? 0 :
+ (usb_pipeout(pipe) ? 0x800 : 0x1000))
+ | usb_pipeslow(pipe) << 13 |
+ usb_maxpacket(usb_dev, pipe) << 16);
return ed_ret;
}
@@ -627,11 +636,10 @@ static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
-static void td_fill (ohci_t *ohci, unsigned int info,
- void *data, int len,
- struct usb_device *dev, int index, urb_priv_t *urb_priv)
+static void td_fill(ohci_t *ohci, unsigned int info, void *data, int len,
+ struct usb_device *dev, int index, urb_priv_t *urb_priv)
{
- volatile td_t *td, *td_pt;
+ volatile td_t *td, *td_pt;
#ifdef OHCI_FILL_TRACE
int i;
#endif
@@ -641,33 +649,35 @@ static void td_fill (ohci_t *ohci, unsigned int info,
return;
}
/* use this td as the next dummy */
- td_pt = urb_priv->td [index];
+ td_pt = urb_priv->td[index];
td_pt->hwNextTD = 0;
/* fill the old dummy TD */
- td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
+ td = urb_priv->td[index] =
+ (td_t *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
td->ed = urb_priv->ed;
td->next_dl_td = NULL;
td->index = index;
- td->data = (__u32)data;
+ td->data = (__u32) data;
#ifdef OHCI_FILL_TRACE
if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
for (i = 0; i < len; i++)
- printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
+ printf("td->data[%d] %#2x ", i,
+ ((unsigned char *)td->data)[i]);
printf("\n");
}
#endif
if (!len)
data = 0;
- td->hwINFO = (__u32)m32_swap (info);
- td->hwCBP = (__u32)m32_swap (data);
+ td->hwINFO = (__u32) m32_swap(info);
+ td->hwCBP = (__u32) m32_swap(data);
if (data)
- td->hwBE = (__u32)m32_swap (data + len - 1);
+ td->hwBE = (__u32) m32_swap(data + len - 1);
else
td->hwBE = 0;
- td->hwNextTD = (__u32)m32_swap (td_pt);
+ td->hwNextTD = (__u32) m32_swap(td_pt);
/* append to queue */
td->ed->hwTailP = td->hwNextTD;
@@ -677,8 +687,10 @@ static void td_fill (ohci_t *ohci, unsigned int info,
/* prepare all TDs of a transfer */
-static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
+static void td_submit_job(struct usb_device *dev, unsigned long pipe,
+ void *buffer, int transfer_len,
+ struct devrequest *setup, urb_priv_t *urb,
+ int interval)
{
ohci_t *ohci = &gohci;
int data_len = transfer_len;
@@ -687,12 +699,14 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf
__u32 info = 0;
unsigned int toggle = 0;
- /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
- if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
+ /* OHCI handles the DATA-toggles itself, we just
+ use the USB-toggle bits for reseting */
+ if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
toggle = TD_T_TOGGLE;
} else {
toggle = TD_T_DATA0;
- usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
+ usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
+ 1);
}
urb->td_cnt = 0;
if (data_len)
@@ -700,37 +714,45 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf
else
data = 0;
- switch (usb_pipetype (pipe)) {
+ switch (usb_pipetype(pipe)) {
case PIPE_BULK:
- info = usb_pipeout (pipe)?
- TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
- while(data_len > 4096) {
- td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
- data += 4096; data_len -= 4096; cnt++;
+ info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
+ while (data_len > 4096) {
+ td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
+ 4096, dev, cnt, urb);
+ data += 4096;
+ data_len -= 4096;
+ cnt++;
}
- info = usb_pipeout (pipe)?
- TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
- td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
+ info = usb_pipeout(pipe) ?
+ TD_CC | TD_DP_OUT :
+ TD_CC | TD_R | TD_DP_IN;
+ td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
+ data_len, dev, cnt, urb);
cnt++;
if (!ohci->sleeping)
- writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
+ /* start bulk list */
+ writel(OHCI_BLF, &ohci->regs->cmdstatus);
break;
case PIPE_CONTROL:
info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
- td_fill (ohci, info, setup, 8, dev, cnt++, urb);
+ td_fill(ohci, info, setup, 8, dev, cnt++, urb);
if (data_len > 0) {
- info = usb_pipeout (pipe)?
- TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
+ info = usb_pipeout(pipe) ?
+ TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
+ TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
/* NOTE: mishandles transfers >8K, some >4K */
- td_fill (ohci, info, data, data_len, dev, cnt++, urb);
+ td_fill(ohci, info, data, data_len, dev, cnt++, urb);
}
- info = usb_pipeout (pipe)?
- TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
- td_fill (ohci, info, data, 0, dev, cnt++, urb);
+ info = usb_pipeout(pipe) ?
+ TD_CC | TD_DP_IN | TD_T_DATA1 :
+ TD_CC | TD_DP_OUT | TD_T_DATA1;
+ td_fill(ohci, info, data, 0, dev, cnt++, urb);
if (!ohci->sleeping)
- writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
+ /* start Control list */
+ writel(OHCI_CLF, &ohci->regs->cmdstatus);
break;
}
if (urb->length != cnt)
@@ -749,13 +771,12 @@ static void dl_transfer_length(td_t * td)
__u32 tdINFO, tdBE, tdCBP;
urb_priv_t *lurb_priv = &urb_priv;
- tdINFO = m32_swap (td->hwINFO);
- tdBE = m32_swap (td->hwBE);
- tdCBP = m32_swap (td->hwCBP);
-
+ tdINFO = m32_swap(td->hwINFO);
+ tdBE = m32_swap(td->hwBE);
+ tdCBP = m32_swap(td->hwCBP);
if (!(usb_pipecontrol(lurb_priv->pipe) &&
- ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
+ ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
if (tdBE != 0) {
if (td->hwCBP == 0)
lurb_priv->actual_length += tdBE - td->data + 1;
@@ -770,37 +791,39 @@ static void dl_transfer_length(td_t * td)
/* replies to the request have to be on a FIFO basis so
* we reverse the reversed done-list */
-static td_t * dl_reverse_done_list (ohci_t *ohci)
+static td_t *dl_reverse_done_list(ohci_t *ohci)
{
__u32 td_list_hc;
td_t *td_rev = NULL;
td_t *td_list = NULL;
urb_priv_t *lurb_priv = NULL;
- td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
+ td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
ohci->hcca->done_head = 0;
while (td_list_hc) {
- td_list = (td_t *)td_list_hc;
+ td_list = (td_t *) td_list_hc;
- if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
+ if (TD_CC_GET(m32_swap(td_list->hwINFO))) {
lurb_priv = &urb_priv;
dbg(" USB-error/status: %x : %p",
- TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
- if (td_list->ed->hwHeadP & m32_swap (0x1)) {
+ TD_CC_GET(m32_swap(td_list->hwINFO)), td_list);
+ if (td_list->ed->hwHeadP & m32_swap(0x1)) {
if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
td_list->ed->hwHeadP =
- (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
- (td_list->ed->hwHeadP & m32_swap (0x2));
+ (lurb_priv->td[lurb_priv->length-1]->hwNextTD &
+ m32_swap(0xfffffff0)) |
+ (td_list->ed->hwHeadP & m32_swap(0x2));
lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
} else
- td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
+ td_list->ed->hwHeadP &=
+ m32_swap(0xfffffff2);
}
}
td_list->next_dl_td = td_rev;
td_rev = td_list;
- td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
+ td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
}
return td_list;
@@ -809,7 +832,7 @@ static td_t * dl_reverse_done_list (ohci_t *ohci)
/*-------------------------------------------------------------------------*/
/* td done list */
-static int dl_done_list (ohci_t *ohci, td_t *td_list)
+static int dl_done_list(ohci_t *ohci, td_t *td_list)
{
td_t *td_list_next = NULL;
ed_t *ed;
@@ -823,14 +846,14 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list)
td_list_next = td_list->next_dl_td;
lurb_priv = &urb_priv;
- tdINFO = m32_swap (td_list->hwINFO);
+ tdINFO = m32_swap(td_list->hwINFO);
ed = td_list->ed;
dl_transfer_length(td_list);
/* error code of transfer */
- cc = TD_CC_GET (tdINFO);
+ cc = TD_CC_GET(tdINFO);
if (cc != 0) {
dbg("ConditionCode %#x", cc);
stat = cc_to_error[cc];
@@ -842,18 +865,19 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list)
if ((ed->state & (ED_OPER | ED_UNLINK)))
urb_finished = 1;
else
- dbg("dl_done_list: strange.., ED state %x, ed->state\n");
+ dbg("dl_done_list: strange.., ED state %x, "
+ "ed->state\n");
} else
- dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
- lurb_priv->length);
+ dbg("dl_done_list: processing TD %x, len %x\n",
+ lurb_priv->td_cnt, lurb_priv->length);
if (ed->state != ED_NEW) {
- edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
- edTailP = m32_swap (ed->hwTailP);
+ edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
+ edTailP = m32_swap(ed->hwTailP);
/* unlink eds if they are not busy */
if ((edHeadP == edTailP) && (ed->state == ED_OPER))
- ep_unlink (ohci, ed);
+ ep_unlink(ohci, ed);
}
td_list = td_list_next;
@@ -866,102 +890,98 @@ static int dl_done_list (ohci_t *ohci, td_t *td_list)
*-------------------------------------------------------------------------*/
/* Device descriptor */
-static __u8 root_hub_dev_des[] =
-{
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x10, /* __u16 bcdUSB; v1.1 */
+static __u8 root_hub_dev_des[] = {
+ 0x12, /* __u8 bLength; */
+ 0x01, /* __u8 bDescriptorType; Device */
+ 0x10, /* __u16 bcdUSB; v1.1 */
0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
+ 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
+ 0x00, /* __u8 bDeviceSubClass; */
+ 0x00, /* __u8 bDeviceProtocol; */
+ 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
+ 0x00, /* __u16 idVendor; */
0x00,
- 0x00, /* __u16 idProduct; */
+ 0x00, /* __u16 idProduct; */
0x00,
- 0x00, /* __u16 bcdDevice; */
+ 0x00, /* __u16 bcdDevice; */
0x00,
- 0x00, /* __u8 iManufacturer; */
- 0x01, /* __u8 iProduct; */
- 0x00, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
+ 0x00, /* __u8 iManufacturer; */
+ 0x01, /* __u8 iProduct; */
+ 0x00, /* __u8 iSerialNumber; */
+ 0x01 /* __u8 bNumConfigurations; */
};
-
/* Configuration descriptor */
-static __u8 root_hub_config_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
+static __u8 root_hub_config_des[] = {
+ 0x09, /* __u8 bLength; */
+ 0x02, /* __u8 bDescriptorType; Configuration */
+ 0x19, /* __u16 wTotalLength; */
0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
+ 0x01, /* __u8 bNumInterfaces; */
+ 0x01, /* __u8 bConfigurationValue; */
+ 0x00, /* __u8 iConfiguration; */
+ 0x40, /* __u8 bmAttributes;
+ Bit 7: Bus-powered, 6: Self-powered,
+ 5 Remote-wakwup, 4..0: resvd */
+ 0x00, /* __u8 MaxPower; */
/* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
+ 0x09, /* __u8 if_bLength; */
+ 0x04, /* __u8 if_bDescriptorType; Interface */
+ 0x00, /* __u8 if_bInterfaceNumber; */
+ 0x00, /* __u8 if_bAlternateSetting; */
+ 0x01, /* __u8 if_bNumEndpoints; */
+ 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
+ 0x00, /* __u8 if_bInterfaceSubClass; */
+ 0x00, /* __u8 if_bInterfaceProtocol; */
+ 0x00, /* __u8 if_iInterface; */
/* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
+ 0x07, /* __u8 ep_bLength; */
+ 0x05, /* __u8 ep_bDescriptorType; Endpoint */
+ 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
+ 0x03, /* __u8 ep_bmAttributes; Interrupt */
+ 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
+ 0xff /* __u8 ep_bInterval; 255 ms */
};
-static unsigned char root_hub_str_index0[] =
-{
- 0x04, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 0x09, /* __u8 lang ID */
- 0x04, /* __u8 lang ID */
+static unsigned char root_hub_str_index0[] = {
+ 0x04, /* __u8 bLength; */
+ 0x03, /* __u8 bDescriptorType; String-descriptor */
+ 0x09, /* __u8 lang ID */
+ 0x04, /* __u8 lang ID */
};
-static unsigned char root_hub_str_index1[] =
-{
- 28, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 'O', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'C', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'I', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'R', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 't', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'u', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'b', /* __u8 Unicode */
- 0, /* __u8 Unicode */
+static unsigned char root_hub_str_index1[] = {
+ 28, /* __u8 bLength; */
+ 0x03, /* __u8 bDescriptorType; String-descriptor */
+ 'O', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'H', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'C', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'I', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ ' ', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'R', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'o', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'o', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 't', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ ' ', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'H', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'u', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'b', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
};
/* Hub class-specific descriptor is constructed dynamically */
@@ -971,14 +991,24 @@ static unsigned char root_hub_str_index1[] =
#define OK(x) len = (x); break
#ifdef DEBUG
-#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
-#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
+#define WR_RH_STAT(x) \
+{ \
+ info("WR:status %#8x", (x)); \
+ writel((x), &gohci.regs->roothub.status); \
+}
+#define WR_RH_PORTSTAT(x) \
+{ \
+ info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \
+ writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \
+}
#else
-#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
-#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
+#define WR_RH_STAT(x) \
+ writel((x), &gohci.regs->roothub.status)
+#define WR_RH_PORTSTAT(x)\
+ writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
#endif
-#define RD_RH_STAT roothub_status(&gohci)
-#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
+#define RD_RH_STAT roothub_status(&gohci)
+#define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
/* request to virtual root hub */
@@ -988,14 +1018,13 @@ int rh_check_port_status(ohci_t *controller)
int res;
res = -1;
- temp = roothub_a (controller);
+ temp = roothub_a(controller);
ndp = (temp & RH_A_NDP);
for (i = 0; i < ndp; i++) {
- temp = roothub_portstatus (controller, i);
+ temp = roothub_portstatus(controller, i);
/* check for a device disconnect */
if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
- (RH_PS_PESC | RH_PS_CSC)) &&
- ((temp & RH_PS_CCS) == 0)) {
+ (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
res = i;
break;
}
@@ -1004,22 +1033,24 @@ int rh_check_port_status(ohci_t *controller)
}
static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len, struct devrequest *cmd)
+ void *buffer, int transfer_len,
+ struct devrequest *cmd)
{
- void * data = buffer;
+ void *data = buffer;
int leni = transfer_len;
int len = 0;
int stat = 0;
__u32 datab[4];
- __u8 *data_buf = (__u8 *)datab;
+ __u8 *data_buf = (__u8 *) datab;
__u16 bmRType_bReq;
__u16 wValue;
__u16 wIndex;
__u16 wLength;
#ifdef DEBUG
-urb_priv.actual_length = 0;
-pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
+ urb_priv.actual_length = 0;
+ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
+ usb_pipein(pipe));
#else
wait_ms(1);
#endif
@@ -1028,189 +1059,216 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
return 0;
}
- bmRType_bReq = cmd->requesttype | (cmd->request << 8);
- wValue = m16_swap (cmd->value);
- wIndex = m16_swap (cmd->index);
- wLength = m16_swap (cmd->length);
+ bmRType_bReq = cmd->requesttype | (cmd->request << 8);
+ wValue = m16_swap(cmd->value);
+ wIndex = m16_swap(cmd->index);
+ wLength = m16_swap(cmd->length);
info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
- dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
+ dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
switch (bmRType_bReq) {
- /* Request Destination:
- without flags: Device,
- RH_INTERFACE: interface,
- RH_ENDPOINT: endpoint,
- RH_CLASS means HUB here,
- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
- */
+ /* Request Destination:
+ without flags: Device,
+ RH_INTERFACE: interface,
+ RH_ENDPOINT: endpoint,
+ RH_CLASS means HUB here,
+ RH_OTHER | RH_CLASS almost ever means HUB_PORT here
+ */
case RH_GET_STATUS:
- *(__u16 *) data_buf = m16_swap (1); OK (2);
+ *(__u16 *) data_buf = m16_swap(1);
+ OK(2);
case RH_GET_STATUS | RH_INTERFACE:
- *(__u16 *) data_buf = m16_swap (0); OK (2);
+ *(__u16 *) data_buf = m16_swap(0);
+ OK(2);
case RH_GET_STATUS | RH_ENDPOINT:
- *(__u16 *) data_buf = m16_swap (0); OK (2);
+ *(__u16 *) data_buf = m16_swap(0);
+ OK(2);
case RH_GET_STATUS | RH_CLASS:
- *(__u32 *) data_buf = m32_swap (
- RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
- OK (4);
+ *(__u32 *) data_buf =
+ m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
+ OK(4);
case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
+ *(__u32 *) data_buf = m32_swap(RD_RH_PORTSTAT);
+ OK(4);
case RH_CLEAR_FEATURE | RH_ENDPOINT:
switch (wValue) {
- case (RH_ENDPOINT_STALL): OK (0);
+ case (RH_ENDPOINT_STALL):
+ OK(0);
}
break;
case RH_CLEAR_FEATURE | RH_CLASS:
switch (wValue) {
- case RH_C_HUB_LOCAL_POWER:
- OK(0);
- case (RH_C_HUB_OVER_CURRENT):
- WR_RH_STAT(RH_HS_OCIC); OK (0);
+ case RH_C_HUB_LOCAL_POWER:
+ OK(0);
+ case (RH_C_HUB_OVER_CURRENT):
+ WR_RH_STAT(RH_HS_OCIC);
+ OK(0);
}
break;
case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
switch (wValue) {
- case (RH_PORT_ENABLE):
- WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
- case (RH_PORT_SUSPEND):
- WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
- case (RH_PORT_POWER):
- WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
- case (RH_C_PORT_CONNECTION):
- WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
- case (RH_C_PORT_ENABLE):
- WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
- case (RH_C_PORT_SUSPEND):
- WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
- case (RH_C_PORT_OVER_CURRENT):
- WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
- case (RH_C_PORT_RESET):
- WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
+ case (RH_PORT_ENABLE):
+ WR_RH_PORTSTAT(RH_PS_CCS);
+ OK(0);
+ case (RH_PORT_SUSPEND):
+ WR_RH_PORTSTAT(RH_PS_POCI);
+ OK(0);
+ case (RH_PORT_POWER):
+ WR_RH_PORTSTAT(RH_PS_LSDA);
+ OK(0);
+ case (RH_C_PORT_CONNECTION):
+ WR_RH_PORTSTAT(RH_PS_CSC);
+ OK(0);
+ case (RH_C_PORT_ENABLE):
+ WR_RH_PORTSTAT(RH_PS_PESC);
+ OK(0);
+ case (RH_C_PORT_SUSPEND):
+ WR_RH_PORTSTAT(RH_PS_PSSC);
+ OK(0);
+ case (RH_C_PORT_OVER_CURRENT):
+ WR_RH_PORTSTAT(RH_PS_OCIC);
+ OK(0);
+ case (RH_C_PORT_RESET):
+ WR_RH_PORTSTAT(RH_PS_PRSC);
+ OK(0);
}
break;
case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
switch (wValue) {
- case (RH_PORT_SUSPEND):
- WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
- case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
- if (RD_RH_PORTSTAT & RH_PS_CCS)
- WR_RH_PORTSTAT (RH_PS_PRS);
- OK (0);
- case (RH_PORT_POWER):
- WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
- case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
- if (RD_RH_PORTSTAT & RH_PS_CCS)
- WR_RH_PORTSTAT (RH_PS_PES );
- OK (0);
+ case (RH_PORT_SUSPEND):
+ WR_RH_PORTSTAT(RH_PS_PSS);
+ OK(0);
+ case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */
+ if (RD_RH_PORTSTAT & RH_PS_CCS)
+ WR_RH_PORTSTAT(RH_PS_PRS);
+ OK(0);
+ case (RH_PORT_POWER):
+ WR_RH_PORTSTAT(RH_PS_PPS);
+ OK(0);
+ case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */
+ if (RD_RH_PORTSTAT & RH_PS_CCS)
+ WR_RH_PORTSTAT(RH_PS_PES);
+ OK(0);
}
break;
- case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
+ case RH_SET_ADDRESS:
+ gohci.rh.devnum = wValue;
+ OK(0);
case RH_GET_DESCRIPTOR:
switch ((wValue & 0xff00) >> 8) {
- case (0x01): /* device descriptor */
+ case (0x01): /* device descriptor */
+ len = min_t(unsigned int,
+ leni,
+ min_t(unsigned int,
+ sizeof(root_hub_dev_des), wLength));
+ data_buf = root_hub_dev_des;
+ OK(len);
+ case (0x02): /* configuration descriptor */
+ len = min_t(unsigned int,
+ leni,
+ min_t(unsigned int,
+ sizeof(root_hub_config_des),
+ wLength));
+ data_buf = root_hub_config_des;
+ OK(len);
+ case (0x03): /* string descriptors */
+ if (wValue == 0x0300) {
len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_dev_des),
- wLength));
- data_buf = root_hub_dev_des; OK(len);
- case (0x02): /* configuration descriptor */
+ leni,
+ min_t(unsigned int,
+ sizeof(root_hub_str_index0),
+ wLength));
+ data_buf = root_hub_str_index0;
+ OK(len);
+ }
+ if (wValue == 0x0301) {
len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_config_des),
- wLength));
- data_buf = root_hub_config_des; OK(len);
- case (0x03): /* string descriptors */
- if(wValue==0x0300) {
- len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_str_index0),
- wLength));
- data_buf = root_hub_str_index0;
- OK(len);
- }
- if(wValue==0x0301) {
- len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_str_index1),
- wLength));
- data_buf = root_hub_str_index1;
- OK(len);
+ leni,
+ min_t(unsigned int,
+ sizeof(root_hub_str_index1),
+ wLength));
+ data_buf = root_hub_str_index1;
+ OK(len);
}
- default:
- stat = USB_ST_STALLED;
+ default:
+ stat = USB_ST_STALLED;
}
break;
case RH_GET_DESCRIPTOR | RH_CLASS:
- {
- __u32 temp = roothub_a (&gohci);
-
- data_buf [0] = 9; /* min length; */
- data_buf [1] = 0x29;
- data_buf [2] = temp & RH_A_NDP;
- data_buf [3] = 0;
- if (temp & RH_A_PSM) /* per-port power switching? */
- data_buf [3] |= 0x1;
- if (temp & RH_A_NOCP) /* no overcurrent reporting? */
- data_buf [3] |= 0x10;
- else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
- data_buf [3] |= 0x8;
-
- /* corresponds to data_buf[4-7] */
- datab [1] = 0;
- data_buf [5] = (temp & RH_A_POTPGT) >> 24;
- temp = roothub_b (&gohci);
- data_buf [7] = temp & RH_B_DR;
- if (data_buf [2] < 7) {
- data_buf [8] = 0xff;
- } else {
- data_buf [0] += 2;
- data_buf [8] = (temp & RH_B_DR) >> 8;
- data_buf [10] = data_buf [9] = 0xff;
- }
-
- len = min_t(unsigned int, leni,
- min_t(unsigned int, data_buf [0], wLength));
- OK (len);
+ {
+ __u32 temp = roothub_a(&gohci);
+
+ data_buf[0] = 9; /* min length; */
+ data_buf[1] = 0x29;
+ data_buf[2] = temp & RH_A_NDP;
+ data_buf[3] = 0;
+ if (temp & RH_A_PSM)
+ /* per-port power switching? */
+ data_buf[3] |= 0x1;
+ if (temp & RH_A_NOCP)
+ /* no overcurrent reporting? */
+ data_buf[3] |= 0x10;
+ else if (temp & RH_A_OCPM)
+ /* per-port overcurrent reporting? */
+ data_buf[3] |= 0x8;
+
+ /* corresponds to data_buf[4-7] */
+ datab[1] = 0;
+ data_buf[5] = (temp & RH_A_POTPGT) >> 24;
+ temp = roothub_b(&gohci);
+ data_buf[7] = temp & RH_B_DR;
+ if (data_buf[2] < 7) {
+ data_buf[8] = 0xff;
+ } else {
+ data_buf[0] += 2;
+ data_buf[8] = (temp & RH_B_DR) >> 8;
+ data_buf[10] = data_buf[9] = 0xff;
+ }
+
+ len = min_t(unsigned int, leni,
+ min_t(unsigned int, data_buf[0], wLength));
+ OK(len);
}
- case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
+ case RH_GET_CONFIGURATION:
+ *(__u8 *) data_buf = 0x01;
+ OK(1);
- case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
+ case RH_SET_CONFIGURATION:
+ WR_RH_STAT(0x10000);
+ OK(0);
default:
- dbg ("unsupported root hub command");
+ dbg("unsupported root hub command");
stat = USB_ST_STALLED;
}
#ifdef DEBUG
- ohci_dump_roothub (&gohci, 1);
+ ohci_dump_roothub(&gohci, 1);
#else
wait_ms(1);
#endif
len = min_t(int, len, leni);
if (data != data_buf)
- memcpy (data, data_buf, len);
+ memcpy(data, data_buf, len);
dev->act_len = len;
dev->status = stat;
#ifdef DEBUG
if (transfer_len)
urb_priv.actual_length = transfer_len;
- pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
+ pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
+ 0 /*usb_pipein(pipe) */);
#else
wait_ms(1);
#endif
@@ -1223,7 +1281,7 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
/* common code for handling submit messages - used for all but root hub */
/* accesses. */
int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup, int interval)
+ int transfer_len, struct devrequest *setup, int interval)
{
int stat = 0;
int maxsize = usb_maxpacket(dev, pipe);
@@ -1234,20 +1292,21 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
dev->status = USB_ST_CRC_ERR;
return 0;
}
-
#ifdef DEBUG
urb_priv.actual_length = 0;
- pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
+ pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
+ usb_pipein(pipe));
#else
wait_ms(1);
#endif
if (!maxsize) {
err("submit_common_message: pipesize for pipe %lx is zero",
- pipe);
+ pipe);
return -1;
}
- if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
+ if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
+ 0) {
err("sohci_submit_job failed");
return -1;
}
@@ -1256,7 +1315,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* ohci_dump_status(&gohci); */
/* allow more time for a BULK device to react - some are slow */
-#define BULK_TO 5000 /* timeout in milliseconds */
+#define BULK_TO 5000 /* timeout in milliseconds */
if (usb_pipebulk(pipe))
timeout = BULK_TO;
else
@@ -1304,13 +1363,14 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* we got an Root Hub Status Change interrupt */
if (got_rhsc) {
#ifdef DEBUG
- ohci_dump_roothub (&gohci, 1);
+ ohci_dump_roothub(&gohci, 1);
#endif
got_rhsc = 0;
/* abuse timeout */
timeout = rh_check_port_status(&gohci);
if (timeout >= 0) {
-#if 0 /* this does nothing useful, but leave it here in case that changes */
+#if 0 /* this does nothing useful, but leave it here
+ in case that changes */
/* the called routine adds 1 to the passed value */
usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
#endif
@@ -1328,53 +1388,55 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
dev->act_len = transfer_len;
#ifdef DEBUG
- pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
+ pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
+ usb_pipein(pipe));
#else
wait_ms(1);
#endif
/* free TDs in urb_priv */
- urb_free_priv (&urb_priv);
+ urb_free_priv(&urb_priv);
return 0;
}
/* submit routines called from usb.c */
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len)
+ int transfer_len)
{
info("submit_bulk_msg");
return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
}
int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup)
+ int transfer_len, struct devrequest *setup)
{
int maxsize = usb_maxpacket(dev, pipe);
info("submit_control_msg");
#ifdef DEBUG
urb_priv.actual_length = 0;
- pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
+ pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
+ usb_pipein(pipe));
#else
wait_ms(1);
#endif
if (!maxsize) {
err("submit_control_message: pipesize for pipe %lx is zero",
- pipe);
+ pipe);
return -1;
}
if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
gohci.rh.dev = dev;
/* root hub - redirect */
return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
- setup);
+ setup);
}
return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
}
int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, int interval)
+ int transfer_len, int interval)
{
info("submit_int_msg");
return -1;
@@ -1386,16 +1448,17 @@ int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* reset the HC and BUS */
-static int hc_reset (ohci_t *ohci)
+static int hc_reset(ohci_t *ohci)
{
int timeout = 30;
- int smm_timeout = 50; /* 0,5 sec */
+ int smm_timeout = 50; /* 0,5 sec */
- if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
- writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
+ if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
+ /* SMM owns the HC - request ownership */
+ writel(OHCI_OCR, &ohci->regs->cmdstatus);
info("USB HC TakeOver from SMM");
- while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
- wait_ms (10);
+ while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
+ wait_ms(10);
if (--smm_timeout == 0) {
err("USB HC TakeOver failed!");
return -1;
@@ -1404,23 +1467,22 @@ static int hc_reset (ohci_t *ohci)
}
/* Disable HC interrupts */
- writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
+ writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
- ohci->slot_name,
- readl (&ohci->regs->control));
+ ohci->slot_name, readl(&ohci->regs->control));
/* Reset USB (needed by some controllers) */
- writel (0, &ohci->regs->control);
+ writel(0, &ohci->regs->control);
/* HC Reset requires max 10 us delay */
- writel (OHCI_HCR, &ohci->regs->cmdstatus);
- while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
+ writel(OHCI_HCR, &ohci->regs->cmdstatus);
+ while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
if (--timeout == 0) {
err("USB HC reset timed out!");
return -1;
}
- udelay (1);
+ udelay(1);
}
return 0;
}
@@ -1431,7 +1493,7 @@ static int hc_reset (ohci_t *ohci)
* enable interrupts
* connect the virtual root hub */
-static int hc_start (ohci_t * ohci)
+static int hc_start(ohci_t *ohci)
{
__u32 mask;
unsigned int fminterval;
@@ -1441,44 +1503,45 @@ static int hc_start (ohci_t * ohci)
/* Tell the controller where the control and bulk lists are
* The lists are empty now. */
- writel (0, &ohci->regs->ed_controlhead);
- writel (0, &ohci->regs->ed_bulkhead);
+ writel(0, &ohci->regs->ed_controlhead);
+ writel(0, &ohci->regs->ed_bulkhead);
- writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
+ /* a reset clears this */
+ writel((__u32) ohci->hcca, &ohci->regs->hcca);
fminterval = 0x2edf;
- writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
+ writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
- writel (fminterval, &ohci->regs->fminterval);
- writel (0x628, &ohci->regs->lsthresh);
+ writel(fminterval, &ohci->regs->fminterval);
+ writel(0x628, &ohci->regs->lsthresh);
/* start controller operations */
ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
ohci->disabled = 0;
- writel (ohci->hc_control, &ohci->regs->control);
+ writel(ohci->hc_control, &ohci->regs->control);
/* disable all interrupts */
mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
- OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
- OHCI_INTR_OC | OHCI_INTR_MIE);
- writel (mask, &ohci->regs->intrdisable);
+ OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
+ OHCI_INTR_OC | OHCI_INTR_MIE);
+ writel(mask, &ohci->regs->intrdisable);
/* clear all interrupts */
mask &= ~OHCI_INTR_MIE;
- writel (mask, &ohci->regs->intrstatus);
+ writel(mask, &ohci->regs->intrstatus);
/* Choose the interrupts we care about now - but w/o MIE */
mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
- writel (mask, &ohci->regs->intrenable);
+ writel(mask, &ohci->regs->intrenable);
#ifdef OHCI_USE_NPS
/* required for AMD-756 and some Mac platforms */
- writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
- &ohci->regs->roothub.a);
- writel (RH_HS_LPSC, &ohci->regs->roothub.status);
-#endif /* OHCI_USE_NPS */
+ writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
+ &ohci->regs->roothub.a);
+ writel(RH_HS_LPSC, &ohci->regs->roothub.status);
+#endif /* OHCI_USE_NPS */
#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
/* POTPGT delay is bits 24-31, in 2 ms units. */
- mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
+ mdelay((roothub_a(ohci) >> 23) & 0x1fe);
/* connect the virtual root hub */
ohci->rh.devnum = 0;
@@ -1490,8 +1553,7 @@ static int hc_start (ohci_t * ohci)
/* an interrupt happens */
-static int
-hc_interrupt (void)
+static int hc_interrupt(void)
{
ohci_t *ohci = &gohci;
struct ohci_regs *regs = ohci->regs;
@@ -1499,21 +1561,26 @@ hc_interrupt (void)
int stat = -1;
if ((ohci->hcca->done_head != 0) &&
- !(m32_swap (ohci->hcca->done_head) & 0x01)) {
+ !(m32_swap(ohci->hcca->done_head) & 0x01)) {
- ints = OHCI_INTR_WDH;
+ ints = OHCI_INTR_WDH;
- } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
- ohci->disabled++;
- err ("%s device removed!", ohci->slot_name);
- return -1;
-
- } else if ((ints &= readl (®s->intrenable)) == 0) {
- dbg("hc_interrupt: returning..\n");
- return 0xff;
+ } else {
+ ints = readl(®s->intrstatus);
+ if (ints == ~(u32) 0) {
+ ohci->disabled++;
+ err("%s device removed!", ohci->slot_name);
+ return -1;
+ }
+ ints &= readl(®s->intrenable);
+ if (ints == 0) {
+ dbg("hc_interrupt: returning..\n");
+ return 0xff;
+ }
}
- /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
+ /* dbg("Interrupt: %x frame: %x", ints,
+ le16_to_cpu(ohci->hcca->frame_no)); */
if (ints & OHCI_INTR_RHSC) {
got_rhsc = 1;
@@ -1522,48 +1589,48 @@ hc_interrupt (void)
if (ints & OHCI_INTR_UE) {
ohci->disabled++;
- err ("OHCI Unrecoverable Error, controller usb-%s disabled",
- ohci->slot_name);
+ err("OHCI Unrecoverable Error, controller usb-%s disabled",
+ ohci->slot_name);
/* e.g. due to PCI Master/Target Abort */
#ifdef DEBUG
- ohci_dump (ohci, 1);
+ ohci_dump(ohci, 1);
#else
- wait_ms(1);
+ wait_ms(1);
#endif
/* FIXME: be optimistic, hope that bug won't repeat often. */
/* Make some non-interrupt context restart the controller. */
/* Count and limit the retries though; either hardware or */
/* software errors can go forever... */
- hc_reset (ohci);
+ hc_reset(ohci);
return -1;
}
if (ints & OHCI_INTR_WDH) {
wait_ms(1);
- writel (OHCI_INTR_WDH, ®s->intrdisable);
- stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
- writel (OHCI_INTR_WDH, ®s->intrenable);
+ writel(OHCI_INTR_WDH, ®s->intrdisable);
+ stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
+ writel(OHCI_INTR_WDH, ®s->intrenable);
}
if (ints & OHCI_INTR_SO) {
dbg("USB Schedule overrun\n");
- writel (OHCI_INTR_SO, ®s->intrenable);
+ writel(OHCI_INTR_SO, ®s->intrenable);
stat = -1;
}
/* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
if (ints & OHCI_INTR_SF) {
- unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
+ unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
wait_ms(1);
- writel (OHCI_INTR_SF, ®s->intrdisable);
+ writel(OHCI_INTR_SF, ®s->intrdisable);
if (ohci->ed_rm_list[frame] != NULL)
- writel (OHCI_INTR_SF, ®s->intrenable);
+ writel(OHCI_INTR_SF, ®s->intrenable);
stat = 0xff;
}
- writel (ints, ®s->intrstatus);
+ writel(ints, ®s->intrstatus);
return stat;
}
@@ -1573,12 +1640,12 @@ hc_interrupt (void)
/* De-allocate all resources.. */
-static void hc_release_ohci (ohci_t *ohci)
+static void hc_release_ohci(ohci_t *ohci)
{
- dbg ("USB HC release ohci usb-%s", ohci->slot_name);
+ dbg("USB HC release ohci usb-%s", ohci->slot_name);
if (!ohci->disabled)
- hc_reset (ohci);
+ hc_reset(ohci);
}
/*-------------------------------------------------------------------------*/
@@ -1590,44 +1657,44 @@ static char ohci_inited = 0;
int usb_lowlevel_init(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_gpio *gpio = S3C24X0_GetBase_GPIO();
/*
* Set the 48 MHz UPLL clocking. Values are taken from
* "PLL value selection guide", 6-23, s3c2400_UM.pdf.
*/
clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
- gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
+ gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
/*
* Enable USB host clock.
*/
clk_power->CLKCON |= (1 << 4);
- memset (&gohci, 0, sizeof (ohci_t));
- memset (&urb_priv, 0, sizeof (urb_priv_t));
+ memset(&gohci, 0, sizeof(ohci_t));
+ memset(&urb_priv, 0, sizeof(urb_priv_t));
/* align the storage */
- if ((__u32)&ghcca[0] & 0xff) {
+ if ((__u32) &ghcca[0] & 0xff) {
err("HCCA not aligned!!");
return -1;
}
phcca = &ghcca[0];
info("aligned ghcca %p", phcca);
memset(&ohci_dev, 0, sizeof(struct ohci_device));
- if ((__u32)&ohci_dev.ed[0] & 0x7) {
+ if ((__u32) &ohci_dev.ed[0] & 0x7) {
err("EDs not aligned!!");
return -1;
}
memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
- if ((__u32)gtd & 0x7) {
+ if ((__u32) gtd & 0x7) {
err("TDs not aligned!!");
return -1;
}
ptd = gtd;
gohci.hcca = phcca;
- memset (phcca, 0, sizeof (struct ohci_hcca));
+ memset(phcca, 0, sizeof(struct ohci_hcca));
gohci.disabled = 1;
gohci.sleeping = 0;
@@ -1637,8 +1704,8 @@ int usb_lowlevel_init(void)
gohci.flags = 0;
gohci.slot_name = "s3c2400";
- if (hc_reset (&gohci) < 0) {
- hc_release_ohci (&gohci);
+ if (hc_reset(&gohci) < 0) {
+ hc_release_ohci(&gohci);
/* Initialization failed */
clk_power->CLKCON &= ~(1 << 4);
return -1;
@@ -1646,19 +1713,18 @@ int usb_lowlevel_init(void)
/* FIXME this is a second HC reset; why?? */
gohci.hc_control = OHCI_USB_RESET;
- writel (gohci.hc_control, &gohci.regs->control);
- wait_ms (10);
+ writel(gohci.hc_control, &gohci.regs->control);
+ wait_ms(10);
- if (hc_start (&gohci) < 0) {
- err ("can't start usb-%s", gohci.slot_name);
- hc_release_ohci (&gohci);
+ if (hc_start(&gohci) < 0) {
+ err("can't start usb-%s", gohci.slot_name);
+ hc_release_ohci(&gohci);
/* Initialization failed */
clk_power->CLKCON &= ~(1 << 4);
return -1;
}
-
#ifdef DEBUG
- ohci_dump (&gohci, 1);
+ ohci_dump(&gohci, 1);
#else
wait_ms(1);
#endif
@@ -1670,7 +1736,7 @@ int usb_lowlevel_init(void)
int usb_lowlevel_stop(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_clock_power *clk_power = S3C24X0_GetBase_CLOCK_POWER();
/* this gets called really early - before the controller has */
/* even been initialized! */
@@ -1678,7 +1744,7 @@ int usb_lowlevel_stop(void)
return 0;
/* TODO release any interrupts, etc. */
/* call hc_release_ohci() here ? */
- hc_reset (&gohci);
+ hc_reset(&gohci);
/* may not want to do this */
clk_power->CLKCON &= ~(1 << 4);
return 0;
diff --git a/cpu/arm920t/s3c24x0/usb_ohci.h b/cpu/arm920t/s3c24x0/usb_ohci.h
index 8e093fb..6ae1716 100644
--- a/cpu/arm920t/s3c24x0/usb_ohci.h
+++ b/cpu/arm920t/s3c24x0/usb_ohci.h
@@ -11,22 +11,22 @@
static int cc_to_error[16] = {
/* mapping of the OHCI CC status to error codes */
- /* No Error */ 0,
- /* CRC Error */ USB_ST_CRC_ERR,
- /* Bit Stuff */ USB_ST_BIT_ERR,
- /* Data Togg */ USB_ST_CRC_ERR,
- /* Stall */ USB_ST_STALLED,
- /* DevNotResp */ -1,
- /* PIDCheck */ USB_ST_BIT_ERR,
- /* UnExpPID */ USB_ST_BIT_ERR,
- /* DataOver */ USB_ST_BUF_ERR,
- /* DataUnder */ USB_ST_BUF_ERR,
- /* reservd */ -1,
- /* reservd */ -1,
- /* BufferOver */ USB_ST_BUF_ERR,
- /* BuffUnder */ USB_ST_BUF_ERR,
- /* Not Access */ -1,
- /* Not Access */ -1
+ /* No Error */ 0,
+ /* CRC Error */ USB_ST_CRC_ERR,
+ /* Bit Stuff */ USB_ST_BIT_ERR,
+ /* Data Togg */ USB_ST_CRC_ERR,
+ /* Stall */ USB_ST_STALLED,
+ /* DevNotResp */ -1,
+ /* PIDCheck */ USB_ST_BIT_ERR,
+ /* UnExpPID */ USB_ST_BIT_ERR,
+ /* DataOver */ USB_ST_BUF_ERR,
+ /* DataUnder */ USB_ST_BUF_ERR,
+ /* reservd */ -1,
+ /* reservd */ -1,
+ /* BufferOver */ USB_ST_BUF_ERR,
+ /* BuffUnder */ USB_ST_BUF_ERR,
+ /* Not Access */ -1,
+ /* Not Access */ -1
};
/* ED States */
@@ -55,14 +55,14 @@ struct ed {
struct usb_device *usb_dev;
__u32 unused[3];
-} __attribute__((aligned(16)));
+} __attribute__ ((aligned(16)));
typedef struct ed ed_t;
-
/* TD info field */
#define TD_CC 0xf0000000
-#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
-#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
+#define TD_CC_GET(td_p) (((td_p) >> 28) & 0x0f)
+#define TD_CC_SET(td_p, cc) \
+ {(td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)}
#define TD_EC 0x0C000000
#define TD_T 0x03000000
#define TD_T_DATA0 0x02000000
@@ -112,7 +112,7 @@ struct td {
__u32 data;
__u32 unused2[2];
-} __attribute__((aligned(32)));
+} __attribute__ ((aligned(32)));
typedef struct td td_t;
#define OHCI_ED_SKIP (1 << 14)
@@ -123,15 +123,14 @@ typedef struct td td_t;
* told the base address of. It must be 256-byte aligned.
*/
-#define NUM_INTS 32 /* part of the OHCI standard */
+#define NUM_INTS 32 /* part of the OHCI standard */
struct ohci_hcca {
- __u32 int_table[NUM_INTS]; /* Interrupt ED table */
- __u16 frame_no; /* current frame number */
- __u16 pad1; /* set to 0 on each frame_no change */
- __u32 done_head; /* info returned for an interrupt */
- u8 reserved_for_hc[116];
-} __attribute__((aligned(256)));
-
+ __u32 int_table[NUM_INTS]; /* Interrupt ED table */
+ __u16 frame_no; /* current frame number */
+ __u16 pad1; /* set to 0 on each frame_no change */
+ __u32 done_head; /* info returned for an interrupt */
+ u8 reserved_for_hc[116];
+} __attribute__ ((aligned(256)));
/*
* Maximum number of root hub ports.
@@ -145,35 +144,34 @@ struct ohci_hcca {
*/
struct ohci_regs {
/* control and status registers */
- __u32 revision;
- __u32 control;
- __u32 cmdstatus;
- __u32 intrstatus;
- __u32 intrenable;
- __u32 intrdisable;
+ __u32 revision;
+ __u32 control;
+ __u32 cmdstatus;
+ __u32 intrstatus;
+ __u32 intrenable;
+ __u32 intrdisable;
/* memory pointers */
- __u32 hcca;
- __u32 ed_periodcurrent;
- __u32 ed_controlhead;
- __u32 ed_controlcurrent;
- __u32 ed_bulkhead;
- __u32 ed_bulkcurrent;
- __u32 donehead;
+ __u32 hcca;
+ __u32 ed_periodcurrent;
+ __u32 ed_controlhead;
+ __u32 ed_controlcurrent;
+ __u32 ed_bulkhead;
+ __u32 ed_bulkcurrent;
+ __u32 donehead;
/* frame counters */
- __u32 fminterval;
- __u32 fmremaining;
- __u32 fmnumber;
- __u32 periodicstart;
- __u32 lsthresh;
+ __u32 fminterval;
+ __u32 fmremaining;
+ __u32 fmnumber;
+ __u32 periodicstart;
+ __u32 lsthresh;
/* Root hub ports */
- struct ohci_roothub_regs {
- __u32 a;
- __u32 b;
- __u32 status;
- __u32 portstatus[MAX_ROOT_PORTS];
+ struct ohci_roothub_regs {
+ __u32 a;
+ __u32 b;
+ __u32 status;
+ __u32 portstatus[MAX_ROOT_PORTS];
} roothub;
-} __attribute__((aligned(32)));
-
+} __attribute__ ((aligned(32)));
/* OHCI CONTROL AND STATUS REGISTER MASKS */
@@ -221,11 +219,10 @@ struct ohci_regs {
#define OHCI_INTR_OC (1 << 30) /* ownership change */
#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
-
/* Virtual Root HUB */
struct virt_root_hub {
- int devnum; /* Address of Root Hub endpoint */
- void *dev; /* was urb */
+ int devnum; /* Address of Root Hub endpoint */
+ void *dev; /* was urb */
void *int_addr;
int send;
int interval;
@@ -288,51 +285,51 @@ struct virt_root_hub {
/* OHCI ROOT HUB REGISTER MASKS */
/* roothub.portstatus [i] bits */
-#define RH_PS_CCS 0x00000001 /* current connect status */
-#define RH_PS_PES 0x00000002 /* port enable status*/
-#define RH_PS_PSS 0x00000004 /* port suspend status */
-#define RH_PS_POCI 0x00000008 /* port over current indicator */
-#define RH_PS_PRS 0x00000010 /* port reset status */
-#define RH_PS_PPS 0x00000100 /* port power status */
-#define RH_PS_LSDA 0x00000200 /* low speed device attached */
-#define RH_PS_CSC 0x00010000 /* connect status change */
-#define RH_PS_PESC 0x00020000 /* port enable status change */
-#define RH_PS_PSSC 0x00040000 /* port suspend status change */
-#define RH_PS_OCIC 0x00080000 /* over current indicator change */
-#define RH_PS_PRSC 0x00100000 /* port reset status change */
+#define RH_PS_CCS 0x00000001 /* current connect status */
+#define RH_PS_PES 0x00000002 /* port enable status */
+#define RH_PS_PSS 0x00000004 /* port suspend status */
+#define RH_PS_POCI 0x00000008 /* port over current indicator */
+#define RH_PS_PRS 0x00000010 /* port reset status */
+#define RH_PS_PPS 0x00000100 /* port power status */
+#define RH_PS_LSDA 0x00000200 /* low speed device attached */
+#define RH_PS_CSC 0x00010000 /* connect status change */
+#define RH_PS_PESC 0x00020000 /* port enable status change */
+#define RH_PS_PSSC 0x00040000 /* port suspend status change */
+#define RH_PS_OCIC 0x00080000 /* over current indicator change */
+#define RH_PS_PRSC 0x00100000 /* port reset status change */
/* roothub.status bits */
-#define RH_HS_LPS 0x00000001 /* local power status */
-#define RH_HS_OCI 0x00000002 /* over current indicator */
-#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
-#define RH_HS_LPSC 0x00010000 /* local power status change */
-#define RH_HS_OCIC 0x00020000 /* over current indicator change */
-#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
+#define RH_HS_LPS 0x00000001 /* local power status */
+#define RH_HS_OCI 0x00000002 /* over current indicator */
+#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
+#define RH_HS_LPSC 0x00010000 /* local power status change */
+#define RH_HS_OCIC 0x00020000 /* over current indicator change */
+#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
/* roothub.b masks */
-#define RH_B_DR 0x0000ffff /* device removable flags */
-#define RH_B_PPCM 0xffff0000 /* port power control mask */
+#define RH_B_DR 0x0000ffff /* device removable flags */
+#define RH_B_PPCM 0xffff0000 /* port power control mask */
/* roothub.a masks */
-#define RH_A_NDP (0xff << 0) /* number of downstream ports */
-#define RH_A_PSM (1 << 8) /* power switching mode */
-#define RH_A_NPS (1 << 9) /* no power switching */
-#define RH_A_DT (1 << 10) /* device type (mbz) */
-#define RH_A_OCPM (1 << 11) /* over current protection mode */
-#define RH_A_NOCP (1 << 12) /* no over current protection */
-#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
+#define RH_A_NDP (0xff << 0) /* number of downstream ports */
+#define RH_A_PSM (1 << 8) /* power switching mode */
+#define RH_A_NPS (1 << 9) /* no power switching */
+#define RH_A_DT (1 << 10) /* device type (mbz) */
+#define RH_A_OCPM (1 << 11) /* over current protection mode */
+#define RH_A_NOCP (1 << 12) /* no over current protection */
+#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
/* urb */
#define N_URB_TD 48
-typedef struct
-{
+typedef struct {
ed_t *ed;
- __u16 length; /* number of tds associated with this request */
- __u16 td_cnt; /* number of tds already serviced */
- int state;
+ __u16 length; /* number of tds associated with this request */
+ __u16 td_cnt; /* number of tds already serviced */
+ int state;
unsigned long pipe;
int actual_length;
- td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
+ td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs
+ associated with this request */
} urb_priv_t;
#define URB_DEL 1
@@ -375,9 +372,9 @@ struct ohci_device {
/* hcd */
/* endpoint */
-static int ep_link (ohci_t * ohci, ed_t * ed);
-static int ep_unlink (ohci_t * ohci, ed_t * ed);
-static ed_t *ep_add_ed (struct usb_device *usb_dev, unsigned long pipe);
+static int ep_link(ohci_t *ohci, ed_t *ed);
+static int ep_unlink(ohci_t *ohci, ed_t *ed);
+static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe);
/*-------------------------------------------------------------------------*/
@@ -391,7 +388,7 @@ td_t gtd[NUM_TD + 1];
td_t *ptd;
/* TDs ... */
-static inline struct td *td_alloc (struct usb_device *usb_dev)
+static inline struct td *td_alloc(struct usb_device *usb_dev)
{
int i;
struct td *td;
@@ -408,7 +405,7 @@ static inline struct td *td_alloc (struct usb_device *usb_dev)
return td;
}
-static inline void ed_free (struct ed *ed)
+static inline void ed_free(struct ed *ed)
{
ed->usb_dev = NULL;
}
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 475cdaf..c19df61 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -38,7 +38,7 @@
.globl _start
-_start: b start_code
+_start: b start_code
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
@@ -110,13 +110,13 @@ start_code:
/*
* set the cpu to SVC32 mode
*/
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
+ mrs r0, cpsr
+ bic r0, r0, #0x1f
+ orr r0, r0, #0xd3
+ msr cpsr, r0
- bl coloured_LED_init
- bl red_LED_on
+ bl coloured_LED_init
+ bl red_LED_on
#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
/*
@@ -136,19 +136,19 @@ copyex:
/* turn off the watchdog */
# if defined(CONFIG_S3C2400)
-# define pWTCON 0x15300000
-# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
+# define pWTCON 0x15300000
+# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
-# define pWTCON 0x53000000
-# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
+# define pWTCON 0x53000000
+# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif
- ldr r0, =pWTCON
- mov r1, #0x0
- str r1, [r0]
+ ldr r0, =pWTCON
+ mov r1, #0x0
+ str r1, [r0]
/*
* mask all IRQs by setting all bits in the INTMR - default
@@ -181,8 +181,8 @@ copyex:
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
+ cmp r0, r1 /* don't reloc during debug */
+ beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
@@ -199,8 +199,8 @@ copy_loop:
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
+ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
+ sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -298,8 +298,8 @@ cpu_init_crit:
#define S_R1 4
#define S_R0 0
-#define MODE_SVC 0x13
-#define I_BIT 0x80
+#define MODE_SVC 0x13
+#define I_BIT 0x80
/*
* use bad_save_user_regs for abort/prefetch/undef/swi ...
@@ -312,7 +312,8 @@ cpu_init_crit:
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE)
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
+ /* set base 2 words into abort stack */
+ sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -325,12 +326,12 @@ cpu_init_crit:
.macro irq_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
- add r7, sp, #S_PC
- stmdb r7, {sp, lr}^ @ Calling SP, LR
- str lr, [r7, #0] @ Save calling PC
- mrs r6, spsr
- str r6, [r7, #4] @ Save CPSR
- str r0, [r7, #8] @ Save OLD_R0
+ add r7, sp, #S_PC
+ stmdb r7, {sp, lr}^ @ Calling SP, LR
+ str lr, [r7, #0] @ Save calling PC
+ mrs r6, spsr
+ str r6, [r7, #4] @ Save CPSR
+ str r0, [r7, #8] @ Save OLD_R0
mov r0, sp
.endm
@@ -339,18 +340,20 @@ cpu_init_crit:
mov r0, r0
ldr lr, [sp, #S_PC] @ Get PC
add sp, sp, #S_FRAME_SIZE
- subs pc, lr, #4 @ return & move spsr_svc into cpsr
+ /* return & move spsr_svc into cpsr */
+ subs pc, lr, #4
.endm
.macro get_bad_stack
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE)
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
+ /* reserve a couple spots in abort stack */
+ sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8)
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
- str lr, [r13, #4]
+ str lr, [r13, #4]
mov r13, #MODE_SVC @ prepare SVC-Mode
@ msr spsr_c, r13
--
1.6.1.2
3
4

[U-Boot] [PATCH] envcrc: extract default environment from target ELF files
by Mike Frysinger 11 Jul '09
by Mike Frysinger 11 Jul '09
11 Jul '09
Rather than rely on dirty hacks to compile the environment on the host and
extract the CRC from that, have envcrc extract the environment straight
from the ELF object that will be linked into u-boot itself. This makes
the envcrc code a bit more complicated, but it simplifies the build
process and host requirements because we don't have to try and recreate
the environment that the target will be seeing on the host. This avoids
some issues that crop up from time to time where the preprocessor defines
on the host don't expand in the same way as for the target -- in case the
target uses those defines to customize the environment, or the host
defines conflicts with some of the target values.
Signed-off-by: Mike Frysinger <vapier(a)gentoo.org>
---
common/Makefile | 4 +-
common/env_embedded.c | 30 +---------
tools/Makefile | 3 +-
tools/envcrc.c | 156 ++++++++++++++++++++++++++++++++++++++++++-------
diff --git a/common/Makefile b/common/Makefile
index c8e5d26..02bc71b 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -173,9 +173,9 @@ all: $(LIB) $(AOBJS)
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
-$(obj)env_embedded.o: $(src)env_embedded.c $(obj)../tools/envcrc
+$(obj)env_embedded.o: $(src)env_embedded.c $(obj)env_common.o $(obj)../tools/envcrc
$(CC) $(AFLAGS) -Wa,--no-warn \
- -DENV_CRC=$(shell $(obj)../tools/envcrc) \
+ -DENV_CRC=$(shell $(obj)../tools/envcrc $(obj)env_common.o) \
-c -o $@ $(src)env_embedded.c
$(obj)../tools/envcrc:
diff --git a/common/env_embedded.c b/common/env_embedded.c
index ae6cac4..60736c7 100644
--- a/common/env_embedded.c
+++ b/common/env_embedded.c
@@ -21,26 +21,10 @@
* MA 02111-1307 USA
*/
-#ifndef __ASSEMBLY__
-#define __ASSEMBLY__ /* Dirty trick to get only #defines */
-#endif
-#define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */
#include <config.h>
-#undef __ASSEMBLY__
#include <environment.h>
/*
- * Handle HOSTS that have prepended
- * crap on symbol names, not TARGETS.
- */
-#if defined(__APPLE__)
-/* Leading underscore on symbols */
-# define SYM_CHAR "_"
-#else /* No leading character on symbols */
-# define SYM_CHAR
-#endif
-
-/*
* Generate embedded environment table
* inside U-Boot image, if needed.
*/
@@ -75,7 +59,7 @@
#else
# define GEN_SET_VALUE(name, value) asm (GEN_SYMNAME(name) " = " GEN_VALUE(value))
#endif
-#define GEN_SYMNAME(str) SYM_CHAR #str
+#define GEN_SYMNAME(str) #str
#define GEN_VALUE(str) #str
#define GEN_ABS(name, value) \
asm (".globl " GEN_SYMNAME(name)); \
@@ -197,17 +181,7 @@ env_t redundand_environment __PPCENV__ = {
#endif /* CONFIG_ENV_ADDR_REDUND */
/*
- * These will end up in the .text section
- * if the environment strings are embedded
- * in the image. When this is used for
- * tools/envcrc, they are placed in the
- * .data/.sdata section.
- *
- */
-unsigned long env_size __PPCTEXT__ = sizeof(env_t);
-
-/*
- * Add in absolutes.
+ * Add in absolutes. This symbol is only referenced from linker scripts.
*/
GEN_ABS(env_offset, CONFIG_ENV_OFFSET);
diff --git a/tools/Makefile b/tools/Makefile
index 43c284c..982d65a 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -80,7 +80,6 @@ BIN_FILES-$(CONFIG_INCA_IP) += inca-swap-bytes$(SFX)
BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
# Source files which exist outside the tools directory
-EXT_OBJ_FILES-y += common/env_embedded.o
EXT_OBJ_FILES-y += lib_generic/crc32.o
EXT_OBJ_FILES-y += lib_generic/md5.o
EXT_OBJ_FILES-y += lib_generic/sha1.o
@@ -156,7 +155,7 @@ MAKEDEPEND = makedepend
all: $(obj).depend $(BINS) $(LOGO-y) subdirs
-$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)env_embedded.o $(obj)sha1.o
+$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)sha1.o
$(CC) $(CFLAGS) -o $@ $^
$(obj)ubsha1$(SFX): $(obj)ubsha1.o $(obj)sha1.o $(obj)os_support.o
diff --git a/tools/envcrc.c b/tools/envcrc.c
index 5b0f7cd..87453e5 100644
--- a/tools/envcrc.c
+++ b/tools/envcrc.c
@@ -21,11 +21,15 @@
* MA 02111-1307 USA
*/
+#include "compiler.h"
+#include <errno.h>
+#include <stdbool.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
+#include "elf.h"
#ifndef __ASSEMBLY__
#define __ASSEMBLY__ /* Dirty trick to get only #defines */
@@ -67,48 +71,156 @@
#define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)
+unsigned char host_endian(void)
+{
+ struct {
+ union {
+ uint16_t sint;
+ unsigned char str[2];
+ } u;
+ } data;
+ data.u.sint = 0xBBAA;
+ return data.u.str[0] == 0xBB ? ELFDATA2MSB : ELFDATA2LSB;
+}
+bool swapit;
+#define EGET(val) ( \
+ !swapit ? (val) : \
+ sizeof(val) == 1 ? (val) : \
+ sizeof(val) == 2 ? uswap_16(val) : \
+ sizeof(val) == 4 ? uswap_32(val) : \
+ sizeof(val) == 8 ? uswap_64(val) : \
+ 1 \
+)
extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int);
-#ifdef ENV_IS_EMBEDDED
-extern unsigned int env_size;
-extern unsigned char environment;
-#endif /* ENV_IS_EMBEDDED */
+static bool elfread(FILE *fp, long offset, void *ptr, size_t size, size_t nmemb)
+{
+ if (fseek(fp, offset, SEEK_SET))
+ return false;
+ if (fread(ptr, size, nmemb, fp) != nmemb)
+ return false;
+ return true;
+}
+
+/* Avoid using elf.h since not all systems have it */
+unsigned char environment[CONFIG_ENV_SIZE];
+bool read_env_from_elf(const char *elf_file)
+{
+ const char env_symbol[] = "default_environment";
+ char buf[256];
+ FILE *fp;
+ bool ret = false;
+ int i;
+
+ Elf32_Ehdr ehdr;
+ Elf32_Shdr shdr, strtab, symtab;
+ Elf32_Sym sym;
+
+ fp = fopen(elf_file, "r");
+ if (!fp)
+ return false;
+
+ /* Make sure this is a valid ELF */
+ if (!elfread(fp, 0, &ehdr, sizeof(ehdr), 1))
+ goto done;
+ if (memcmp(ehdr.e_ident, ELFMAG, SELFMAG)) {
+ errno = EINVAL;
+ goto done;
+ }
+ if (ehdr.e_ident[EI_CLASS] != ELFCLASS32) {
+ errno = EINVAL;
+ goto done;
+ }
+ swapit = host_endian() == ehdr.e_ident[EI_DATA] ? false : true;
+
+ /* Find the string & symbol table */
+ memset(&strtab, 0, sizeof(strtab)); /* shut gcc the hell up */
+ memset(&symtab, 0, sizeof(symtab)); /* shut gcc the hell up */
+ strtab.sh_type = SHT_NULL;
+ symtab.sh_type = SHT_NULL;
+ for (i = 0; i < EGET(ehdr.e_shnum); ++i) {
+ long off = EGET(ehdr.e_shoff) + i * EGET(ehdr.e_shentsize);
+ if (!elfread(fp, off, &shdr, sizeof(shdr), 1))
+ goto done;
+ if (EGET(shdr.sh_type) == SHT_STRTAB)
+ strtab = shdr;
+ else if (EGET(shdr.sh_type) == SHT_SYMTAB)
+ symtab = shdr;
+ }
+ if (strtab.sh_type == SHT_NULL || symtab.sh_type == SHT_NULL) {
+ errno = EINVAL;
+ goto done;
+ }
+
+ /* Find the environment symbol */
+ for (i = 0; i < EGET(symtab.sh_size) / EGET(symtab.sh_entsize); ++i) {
+ char *tbuf;
+ long off = EGET(symtab.sh_offset) + i * sizeof(sym);
+ if (!elfread(fp, off, &sym, sizeof(sym), 1))
+ goto done;
+ off = EGET(strtab.sh_offset) + EGET(sym.st_name);
+ tbuf = buf;
+ if (!elfread(fp, off, tbuf, 1, sizeof(env_symbol)))
+ goto done;
+ /* handle ABI prefixed symbols automatically */
+ if (tbuf[0] == '_') {
+ tbuf[sizeof(env_symbol)] = '\0';
+ ++tbuf;
+ }
+ if (!strcmp(tbuf, env_symbol)) {
+ off = EGET(ehdr.e_shoff) + EGET(sym.st_shndx) * EGET(ehdr.e_shentsize);
+ if (!elfread(fp, off, &shdr, sizeof(shdr), 1))
+ goto done;
+ off = EGET(shdr.sh_offset) + EGET(sym.st_value);
+ if (!elfread(fp, off, environment + ENV_HEADER_SIZE, 1, EGET(sym.st_size)))
+ goto done;
+ ret = true;
+ break;
+ }
+ }
+
+ done:
+ fclose(fp);
+ return ret;
+}
int main (int argc, char **argv)
{
-#ifdef ENV_IS_EMBEDDED
+#ifdef ENV_IS_EMBEDDED
unsigned char pad = 0x00;
uint32_t crc;
- unsigned char *envptr = &environment,
+ unsigned char *envptr = environment,
*dataptr = envptr + ENV_HEADER_SIZE;
unsigned int datasize = ENV_SIZE;
- unsigned int eoe;
+ const char *env_file;
- if (argv[1] && !strncmp(argv[1], "--binary", 8)) {
+ if (argc < 2) {
+ puts("Usage: envcrc <environment object> [--binary [le]]");
+ return 1;
+ }
+ env_file = argv[1];
+
+ if (argv[2] && !strncmp(argv[2], "--binary", 8)) {
int ipad = 0xff;
- if (argv[1][8] == '=')
- sscanf(argv[1] + 9, "%i", &ipad);
+ if (argv[2][8] == '=')
+ sscanf(argv[2] + 9, "%i", &ipad);
pad = ipad;
}
+ memset(dataptr, pad, datasize);
- if (pad) {
- /* find the end of env */
- for (eoe = 0; eoe < datasize - 1; ++eoe)
- if (!dataptr[eoe] && !dataptr[eoe+1]) {
- eoe += 2;
- break;
- }
- if (eoe < datasize - 1)
- memset(dataptr + eoe, pad, datasize - eoe);
+ if (!read_env_from_elf(env_file)) {
+ fprintf(stderr, "unable to read environment from %s: %s\n",
+ env_file, strerror(errno));
+ return 1;
}
crc = crc32 (0, dataptr, datasize);
/* Check if verbose mode is activated passing a parameter to the program */
- if (argc > 1) {
- if (!strncmp(argv[1], "--binary", 8)) {
- int le = (argc > 2 ? !strcmp(argv[2], "le") : 1);
+ if (argc > 2) {
+ if (!strncmp(argv[2], "--binary", 8)) {
+ int le = (argc > 3 ? !strcmp(argv[3], "le") : 1);
size_t i, start, end, step;
if (le) {
start = 0;
--
1.6.3.1
2
4