June 2009 - U-Boot

[U-Boot] [PATCH] This patch adds support for Fujitsu MB86R01 'JADE' SOC
by Matthias Weisser 19 Jul '09

19 Jul '09

Signed-off-by: Matthias Weisser <matthias.weisser(a)graf-syteco.de> --- cpu/arm926ejs/jade/Makefile | 47 +++++++++ cpu/arm926ejs/jade/timer.c | 129 ++++++++++++++++++++++++ include/asm-arm/arch-jade/hardware.h | 31 ++++++ include/asm-arm/arch-jade/jade.h | 182 ++++++++++++++++++++++++++++++++++ 4 files changed, 389 insertions(+), 0 deletions(-) create mode 100755 cpu/arm926ejs/jade/Makefile create mode 100755 cpu/arm926ejs/jade/timer.c create mode 100755 include/asm-arm/arch-jade/hardware.h create mode 100755 include/asm-arm/arch-jade/jade.h diff --git a/cpu/arm926ejs/jade/Makefile b/cpu/arm926ejs/jade/Makefile new file mode 100755 index 0000000..7da9f40 --- /dev/null +++ b/cpu/arm926ejs/jade/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = timer.o +SOBJS = + +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm926ejs/jade/timer.c b/cpu/arm926ejs/jade/timer.c new file mode 100755 index 0000000..59bef84 --- /dev/null +++ b/cpu/arm926ejs/jade/timer.c @@ -0,0 +1,129 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * Matthias Weisser <matthias.weisser(a)graf-syteco.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <div64.h> + +#define TIMER_LOAD_VAL 0xffffffff +#define TIMER_BASE 0xfffe0000 + +#define READ_TIMER (*(volatile ulong *)(TIMER_BASE+4)) +#define TIMER_FREQ (CONFIG_JADE_IOCLK / 16) + +static ulong timestamp; +static ulong lastdec; + +static inline unsigned long long tick_to_time(unsigned long long tick) +{ + tick *= CONFIG_SYS_HZ; + do_div(tick, TIMER_FREQ); + + return tick; +} + +static inline unsigned long long usec_to_tick(unsigned long long usec) +{ + usec *= TIMER_FREQ; + do_div(usec, 1000000); + + return usec; +} + +/* nothing really to do with interrupts, just starts up a counter. */ +int timer_init(void) +{ + *(volatile ulong *)(TIMER_BASE + 0) = TIMER_LOAD_VAL; + *(volatile ulong *)(TIMER_BASE + 8) = 0x86; + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ +unsigned long long get_ticks(void) +{ + ulong now = READ_TIMER; + + if (now <= lastdec) /* normal mode (non roll) */ + /* move stamp forward with absolut diff ticks */ + timestamp += (lastdec - now); + else /* we have rollover of incrementer */ + timestamp += lastdec + TIMER_LOAD_VAL - now; + lastdec = now; + return timestamp; +} + +void reset_timer_masked(void) +{ + /* reset time */ + lastdec = READ_TIMER; /* capture current decrement value time */ + timestamp = 0; /* start "advancing" time stamp from 0 */ +} + +ulong get_timer_masked(void) +{ + return tick_to_time(get_ticks()); +} + +void udelay(unsigned long usec) +{ + unsigned long long tmp; + ulong tmo; + + tmo = usec_to_tick(usec); + tmp = get_ticks() + tmo; /* get current timestamp */ + + while (get_ticks() < tmp) /* loop till event */ + /*NOP*/; +} + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return get_timer_masked () - base; +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + ulong tbclk; + + tbclk = CONFIG_SYS_HZ; + return tbclk; +} + + + diff --git a/include/asm-arm/arch-jade/hardware.h b/include/asm-arm/arch-jade/hardware.h new file mode 100755 index 0000000..8546216 --- /dev/null +++ b/include/asm-arm/arch-jade/hardware.h @@ -0,0 +1,31 @@ +/* + * (C) Copyright 2007 + * + * Author : Carsten Schneider, mycable GmbH + * <cs(a)mycable.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <asm/sizes.h> +#include <asm/arch/jade.h> + +#endif diff --git a/include/asm-arm/arch-jade/jade.h b/include/asm-arm/arch-jade/jade.h new file mode 100755 index 0000000..0ab96e1 --- /dev/null +++ b/include/asm-arm/arch-jade/jade.h @@ -0,0 +1,182 @@ +/* + * (C) Copyright 2007 + * + * jade definitions + * + * Author : Carsten Schneider, mycable GmbH + * <cs(a)mycable.de> + * + * (c) 2009 Graf-Syteco, Matthias Weisser + * <matthias.weisser(a)graf-syteco.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef JADE_H +#define JADE_H + +typedef volatile unsigned int JREG; /* Hardware register definition */ + +/* + * Physical Address Defines + */ +#define JADE_GDC_PHYS_BASE 0xf1fc0000 /* GDC phys */ +#define JADE_GDC_PHYS_DISP_BASE 0xf1fd0000 /* GDC DisplayBase phys */ +#define JADE_CCNT_PHYS_BASE 0xfff42000 /* Chip Control Module */ +#define JADE_CAN0_PHYS_BASE 0xfff54000 /* CAN 0 phys */ +#define JADE_CAN1_PHYS_BASE 0xfff55000 /* CAN 1 phys */ +#define JADE_I2C0_PHYS_BASE 0xfff56000 /* I2C 0 phys */ +#define JADE_I2C1_PHYS_BASE 0xfff57000 /* I2C 1 phys */ +#define JADE_EHCI_PHYS_BASE 0xfff80000 /* EHCI phys */ +#define JADE_OHCI_PHYS_BASE 0xfff81000 /* OHCI phys */ +#define JADE_IRC1_PHYS_BASE 0xfffb0000 /* Jade cascaded Interrupt Controller phys */ +#define JADE_TIMER_PHYS_BASE 0xfffe0000 /* Counter/Timers JADE phys */ +#define JADE_UART0_PHYS_BASE 0xfffe1000 /* UART 0 phys */ +#define JADE_UART1_PHYS_BASE 0xfffe2000 /* UART 1 phys */ +#define JADE_IRCE_PHYS_BASE 0xfffe4000 /* Extended Interrupt Controller */ +#define JADE_CRG_PHYS_BASE 0xfffe7000 /* Clock Reset Generator */ +#define JADE_IRC0_PHYS_BASE 0xfffe8000 /* Jade Interrupt Controller phys */ +#define JADE_GPIO_PHYS_BASE 0xfffe9000 /* GPIO phys */ + + +/* -------- DRAMC_DRIC : (DRAMC Offset: 0x0) DRAM Controller Mode Register -------- */ + +/******************************************************************************** + * REGISTER ADDRESS DEFINITION FOR DRAMC PERIPHERAL * + ********************************************************************************/ +#define JREGC_DRAMC_DRIC ((JREG *) 0xF3000000) /* DRAM Controller Initialization control register */ +#define JREGC_DRAMC_DRIC1 ((JREG *) 0xF3000002) /* DRAM Controller Init control command register 1 */ +#define JREGC_DRAMC_DRIC2 ((JREG *) 0xF3000004) /* DRAM Controller Init control command register 2 */ +#define JREGC_DRAMC_DRCA ((JREG *) 0xF3000006) /* DRAM Controller Address control register */ +#define JREGC_DRAMC_DRCM ((JREG *) 0xF3000008) /* DRAM Controller Modal control register */ +#define JREGC_DRAMC_DRCST1 ((JREG *) 0xF300000A) /* DRAM Controller Timing setting register 1 */ +#define JREGC_DRAMC_DRCST2 ((JREG *) 0xF300000C) /* DRAM Controller Timing setting register 2 */ +#define JREGC_DRAMC_DRCR ((JREG *) 0xF300000E) /* DRAM Controller Refresh control register */ +#define JREGC_DRAMC_DRCS ((JREG *) 0xF3000020) /* DRAM Controller Status control register */ +#define JREGC_DRAMC_DRASR ((JREG *) 0xF3000030) /* DRAM Controller AXI operation setting register */ +#define JREGC_DRAMC_DRIMS1 ((JREG *) 0xF3000042) /* DRAM Controller IF control register 1 */ +#define JREGC_DRAMC_DRIMS2A1 ((JREG *) 0xF3000044) /* DRAM Controller IF control register 2 */ +#define JREGC_DRAMC_DRIMS3A2 ((JREG *) 0xF3000046) /* DRAM Controller IF control register 3 */ +#define JREGC_DRAMC_DRIMS4 ((JREG *) 0xF3000048) /* DRAM Controller IF control register 4 */ +#define JREGC_DRAMC_DRIMS5 ((JREG *) 0xF300004A) /* DRAM Controller IF control register 5 */ +#define JREGC_DRAMC_DRIMS6 ((JREG *) 0xF300004C) /* DRAM Controller IF control register 6 */ +#define JREGC_DRAMC_DRIMS7D1 ((JREG *) 0xF300004E) /* DRAM Controller IF control register 7 */ +#define JREGC_DRAMC_DRIMS8D2 ((JREG *) 0xF3000050) /* DRAM Controller IF control register 8 */ +#define JREGC_DRAMC_DRIMS9T1 ((JREG *) 0xF3000052) /* DRAM Controller IF control register 9 */ +#define JREGC_DRAMC_DRIMSS10T2 ((JREG *) 0xF3000054) /* DRAM Controller IF control register 10 */ +#define JREGC_DRAMC_DROS ((JREG *) 0xF3000060) /* DRAM Controller ODT setting register */ +#define JREGC_DRAMC_DRIBSLI ((JREG *) 0xF3000062) /* DRAM Controller IO LOOPBACK setting register */ +#define JREGC_DRAMC_DRIBSODT1 ((JREG *) 0xF3000064) /* DRAM Controller IO ODT1 setting register */ +#define JREGC_DRAMC_DRIBSOCD ((JREG *) 0xF3000066) /* DRAM Controller IO OCD setting register */ +#define JREGC_DRAMC_DRIBSOCD2 ((JREG *) 0xF3000068) /* DRAM Controller IO OCD2 setting register */ +#define JREGC_DRAMC_DROABA ((JREG *) 0xF3000070) /* DRAM Controller ODT bias self adjustment register */ +#define JREGC_DRAMC_DROBV ((JREG *) 0xF3000080) /* DRAM Controller ODT bias value register */ +#define JREGC_DRAMC_DROBS ((JREG *) 0xF3000084) /* DRAM Controller ODT bias selection register */ +#define JREGC_DRAMC_DROBSR1 ((JREG *) 0xF3000086) /* DRAM Controller ODT bias setting register 1 */ +#define JREGC_DRAMC_DROBSR2 ((JREG *) 0xF3000088) /* DRAM Controller ODT bias setting register 2 */ +#define JREGC_DRAMC_DROBSR3 ((JREG *) 0xF300008A) /* DRAM Controller ODT bias setting register 3 */ +#define JREGC_DRAMC_DROBSR4 ((JREG *) 0xF300008C) /* DRAM Controller ODT bias setting register 4 */ +#define JREGC_DRAMC_DRIMR1 ((JREG *) 0xF3000090) /* DRAM Controller IO monitor register 1 */ +#define JREGC_DRAMC_DRIMR2 ((JREG *) 0xF3000092) /* DRAM Controller IO monitor register 2 */ +#define JREGC_DRAMC_DRIMR3 ((JREG *) 0xF3000094) /* DRAM Controller IO monitor register 3 */ +#define JREGC_DRAMC_DRIMR4 ((JREG *) 0xF3000096) /* DRAM Controller IO monitor register 4 */ +#define JREGC_DRAMC_DROISR1 ((JREG *) 0xF3000098) /* DRAM Controller OCD impedance setting register 1 */ +#define JREGC_DRAMC_DROISR2 ((JREG *) 0xF300009A) /* DRAM Controller OCD impedance setting register 2 */ + + + +/****************************************************************************** + * REGISTER ADDRESS DEFINITION FOR GPIO PERIPHERAL * + ******************************************************************************/ +/* GPIO Port data register */ +#define GPIO_PORT_DATA 0x00 +/* GPIO Data Direction */ +#define GPIO_DIRECTION 0x10 + +/* GPIO Block Defines */ +#define GPIO_BLOCK_0 0x00 +#define GPIO_BLOCK_1 0x04 +#define GPIO_BLOCK_2 0x08 + +/* ------------------------------------------------------------------------ + * JADE Chip Control Module + * ------------------------------------------------------------------------ + */ + +#define CCNT_CGPIO_IST 0x18 /* GPIO interrupt status register */ +#define CCNT_CGPIO_ISTM 0x1c /* GPIO interrupt status mask register */ +#define CCNT_CGPIO_IP 0x20 /* GPIO interrupt polarity setting register */ +#define CCNT_CGPIO_IM 0x24 /* GPIO interrupt mode setting register */ +#define CCNT_CMUX_MD 0x30 /* MultiplexMode setting register */ + +/******************************************************************************** + * REGISTER ADDRESS DEFINITION FOR UART0 PERIPHERAL * + ********************************************************************************/ +#define JREGC_UART0_URT0RFR ((JREG *) 0xFFFE1000) /* UART0 Reception FIFO register */ +#define JREGC_UART0_URT0TFR ((JREG *) 0xFFFE1000) /* UART0 Transmission register */ +#define JREGC_UART0_URT0DLL ((JREG *) 0xFFFE1000) /* UART0 Dividing value */ +#define JREGC_UART0_URT0IER ((JREG *) 0xFFFE1004) /* UART0 DLAB=0: Interrupt enable register */ +#define JREGC_UART0_URT0DLM ((JREG *) 0xFFFE1004) /* UART0 DLAB=1: Dividing value (upper byte) */ +#define JREGC_UART0_URT0IIR ((JREG *) 0xFFFE1008) /* UART0 Interrupt ID register (read only) */ +#define JREGC_UART0_URT0FCR ((JREG *) 0xFFFE1008) /* UART0 FIFO control register (write only) */ +#define JREGC_UART0_URT0LCR ((JREG *) 0xFFFE100C) /* UART0 Line control register */ +#define JREGC_UART0_URT0MCR ((JREG *) 0xFFFE1010) /* UART0 Modem control register */ +#define JREGC_UART0_URT0LSR ((JREG *) 0xFFFE1014) /* UART0 Line status register */ +#define JREGC_UART0_URT0MSR ((JREG *) 0xFFFE1018) /* UART0 Modem status register */ +#define JREGC_UART0_URT0SCR ((JREG *) 0xFFFE101C) /* UART0 Scratch register (At DLAB=0) */ + +/******************************************************************************** + * REGISTER ADDRESS DEFINITION FOR UART1 PERIPHERAL * + ********************************************************************************/ +#define JREGC_UART1_URT1RFR ((JREG *) 0xFFFE2000) /* UART1 Reception FIFO register */ +#define JREGC_UART1_URT1TFR ((JREG *) 0xFFFE2000) /* UART1 Transmission register */ +#define JREGC_UART1_URT1DLL ((JREG *) 0xFFFE2000) /* UART1 Dividing value */ +#define JREGC_UART1_URT1IER ((JREG *) 0xFFFE2004) /* UART1 DLAB=0: Interrupt enable register */ +#define JREGC_UART1_URT1DLM ((JREG *) 0xFFFE2004) /* UART1 DLAB=1: Dividing value (upper byte) */ +#define JREGC_UART1_URT1IIR ((JREG *) 0xFFFE2008) /* UART1 Interrupt ID register (read only) */ +#define JREGC_UART1_URT1FCR ((JREG *) 0xFFFE2008) /* UART1 FIFO control register (write only) */ +#define JREGC_UART1_URT1LCR ((JREG *) 0xFFFE200C) /* UART1 Line control register */ +#define JREGC_UART1_URT1MCR ((JREG *) 0xFFFE2010) /* UART1 Modem control register */ +#define JREGC_UART1_URT1LSR ((JREG *) 0xFFFE2014) /* UART1 Line status register */ +#define JREGC_UART1_URT1MSR ((JREG *) 0xFFFE2018) /* UART1 Modem status register */ +#define JREGC_UART1_URT1SCR ((JREG *) 0xFFFE201C) /* UART1 Scratch register (At DLAB=0) */ + +/******************************************************************************** + * REGISTER ADDRESS DEFINITION FOR CLOCK/RESET INTERFACE * + ********************************************************************************/ +#define JREGC_CRG_CRPR ((JREG *) 0xFFFE7000) /* CRG PLL control register */ +#define JREGC_CRG_CRWR ((JREG *) 0xFFFE7008) /* CRG Watchdog timer control register */ +#define JREGC_CRG_CRSR ((JREG *) 0xFFFE700C) /* CRG Reset/standby control register */ +#define JREGC_CRG_CRDA ((JREG *) 0xFFFE7010) /* CRG Clock divider control register A */ +#define JREGC_CRG_CRDB ((JREG *) 0xFFFE7014) /* CRG Clock divider control register B */ +#define JREGC_CRG_CRHA ((JREG *) 0xFFFE7018) /* CRG (AHB(A) bus) bus clock gate control register */ +#define JREGC_CRG_CRPA ((JREG *) 0xFFFE701C) /* CRG (APB(A) bus) bus clock gate control register */ +#define JREGC_CRG_CRPB ((JREG *) 0xFFFE7020) /* CRG (APB(B) bus) bus clock gate control register */ +#define JREGC_CRG_CRHB ((JREG *) 0xFFFE7024) /* CRG (AHB(B) bus) bus clock gate control register */ +#define JREGC_CRG_CRAM ((JREG *) 0xFFFE7028) /* CRG ARM core clock gate control register */ + +/******************************************************************************** + * REGISTER BASE ADDRESS DEFINITION FOR PERIPHERAL * + ********************************************************************************/ +#define JREGC_BASE_DRAM ((JREGPS_DRAMC) 0xF3000000) /* (DRAMC) Base Address */ +#define JREGC_BASE_GPIO ((JREGPS_GPIO) 0xFFFE9000) /* (GPIO) Base Address */ +#define JREGC_BASE_UART0 ((JREGPS_UART0) 0xFFFE1000) /* (UART0) Base Address */ +#define JREGC_BASE_UART1 ((JREGPS_UART1) 0xFFFE2000) /* (UART1) Base Address */ + +#endif /* jade_H */ -- 1.5.6.3

4 10

[U-Boot] [PATCH] mmc: set bus width to 1 and clock to minimum early during initialization
by Ilya Yanok 19 Jul '09

19 Jul '09

We need to switch back to 1-bit before initialization or SD 2.0 cards will fail to send SCR if we've switched to 4-bit already. Signed-off-by: Ilya Yanok <yanok(a)emcraft.com> --- drivers/mmc/mmc.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 8c736ce..b69ce15 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -859,6 +859,9 @@ int mmc_init(struct mmc *mmc) if (err) return err; + mmc_set_bus_width(mmc, 1); + mmc_set_clock(mmc, 1); + /* Reset the Card */ err = mmc_go_idle(mmc); -- 1.6.0.6

2 1

[U-Boot] [PATCH 3/6] S5PC100: serial driver for SMDKC100 support
by HeungJun Kim 19 Jul '09

19 Jul '09

This patch is the serial driver for S5PC100 & SMDKC100. Signed-off-by: HeungJun, Kim <riverful.kim(a)samsung.com> --- drivers/serial/Makefile | 1 + drivers/serial/serial_s5pc100.c | 179 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 180 insertions(+), 0 deletions(-) create mode 100644 drivers/serial/serial_s5pc100.c diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 64882a2..3334442 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -49,6 +49,7 @@ COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o +COBJS-$(CONFIG_S5PC100_SERIAL) += serial_s5pc100.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/serial_s5pc100.c b/drivers/serial/serial_s5pc100.c new file mode 100644 index 0000000..9394e77 --- /dev/null +++ b/drivers/serial/serial_s5pc100.c @@ -0,0 +1,179 @@ +/* + * (C) Copyright 2009 + * Inki Dae, SAMSUNG Electronics, <inki.dae(a)samsung.com> + * Heungjun Kim, SAMSUNG Electronics, <riverful.kim(a)samsung.com> + * Minkyu Kang, SAMSUNG Electronics, <mk7.kang(a)samsung.com> + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, <lg(a)denx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> + +#ifdef CONFIG_SERIAL0 +#define UART_NR S5PC1XX_UART0 +#elif defined(CONFIG_SERIAL1) +#define UART_NR S5PC1XX_UART1 +#elif defined(CONFIG_SERIAL2) +#define UART_NR S5PC1XX_UART2 +#elif defined(CONFIG_SERIAL3) +#define UART_NR S5PC1XX_UART3 +#else +#error "Bad: you didn't configure serial ..." +#endif + +#define barrier() asm volatile("" ::: "memory") + +static inline s5pc1xx_uart_t *s5pc1xx_get_base_uart(enum s5pc1xx_uarts_nr nr) +{ + return (s5pc1xx_uart_t *)(S5P_UART_BASE + (nr * 0x400)); +} + +/* + * The coefficient, used to calculate the baudrate on S5PC1XX UARTs is + * calculated as + * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT + * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1, + * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants: + */ +static const int udivslot[] = { + 0, + 0x0080, + 0x0808, + 0x0888, + 0x2222, + 0x4924, + 0x4a52, + 0x54aa, + 0x5555, + 0xd555, + 0xd5d5, + 0xddd5, + 0xdddd, + 0xdfdd, + 0xdfdf, + 0xffdf, +}; + +void serial_setbrg(void) +{ + DECLARE_GLOBAL_DATA_PTR; + s5pc1xx_uart_t *const uart = s5pc1xx_get_base_uart(UART_NR); + u32 pclk = get_PCLK(); + u32 baudrate = gd->baudrate; + int i; + + i = (pclk / baudrate) % 16; + + uart->UBRDIV = pclk / baudrate / 16 - 1; + uart->UDIVSLOT = udivslot[i]; + + for (i = 0; i < 100; i++); + barrier(); +} + +/* + * Initialise the serial port with the given baudrate. The settings + * are always 8 data bits, no parity, 1 stop bit, no start bits. + */ +int serial_init(void) +{ + s5pc1xx_uart_t *const uart = s5pc1xx_get_base_uart(UART_NR); + + /* reset and enable FIFOs, set triggers to the maximum */ + uart->UFCON = 0; + uart->UMCON = 0; + /* 8N1 */ + uart->ULCON = 0x3; + /* No interrupts, no DMA, pure polling */ + uart->UCON = 0x245; + + serial_setbrg(); + + return 0; +} + +/* + * Read a single byte from the serial port. Returns 1 on success, 0 + * otherwise. When the function is succesfull, the character read is + * written into its argument c. + */ +int serial_getc(void) +{ + s5pc1xx_uart_t *const uart = s5pc1xx_get_base_uart(UART_NR); + + /* wait for character to arrive */ + while (!(uart->UTRSTAT & 0x1)); + + return uart->URXH & 0xff; +} + +#ifdef CONFIG_MODEM_SUPPORT +static int be_quiet; +void disable_putc(void) +{ + be_quiet = 1; +} + +void enable_putc(void) +{ + be_quiet = 0; +} +#endif + + +/* + * Output a single byte to the serial port. + */ +void serial_putc(const char c) +{ + s5pc1xx_uart_t *const uart = s5pc1xx_get_base_uart(UART_NR); + +#ifdef CONFIG_MODEM_SUPPORT + if (be_quiet) + return; +#endif + + /* wait for room in the tx FIFO */ + while (!(uart->UTRSTAT & 0x2)); + + uart->UTXH = c; + + /* If \n, also do \r */ + if (c == '\n') + serial_putc('\r'); +} + +/* + * Test whether a character is in the RX buffer + */ +int serial_tstc(void) +{ + s5pc1xx_uart_t *const uart = s5pc1xx_get_base_uart(UART_NR); + + return uart->UTRSTAT & 0x1; +} + +void serial_puts(const char *s) +{ + while (*s) + serial_putc(*s++); +} -- 1.5.6.3

2 1

[U-Boot] [PATCH] config.mk: Remove unused HPATH
by Shinya Kuribayashi 19 Jul '09

19 Jul '09

This variable is not unused anywhere. Signed-off-by: Shinya Kuribayashi <skuribay(a)pobox.com> --- config.mk | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/config.mk b/config.mk index f2c2c6c..a9973a4 100644 --- a/config.mk +++ b/config.mk @@ -196,7 +196,7 @@ endif ######################################################################### -export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \ +export HOSTCC HOSTCFLAGS CROSS_COMPILE \ AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS

3 3

[U-Boot] [PATCH] add support for C5000 thermostimulator
by Giulio Benetti 19 Jul '09

19 Jul '09

Based on at91sam9263. It is a thermostimulator for hair styling. Subsection of Software is based on at91sam9263ek one. Signed-off-by: giulio.benetti(a)micronovasrl.com diff -urpN b/board/micronova/c5000/c5000.c a/board/micronova/c5000/c5000.c --- b/board/micronova/c5000/c5000.c 1970-01-01 01:00:00.000000000 +0100 +++ a/board/micronova/c5000/c5000.c 2009-06-18 12:57:52.000000000 +0200 @@ -0,0 +1,194 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * Giulio Benetti <giulio.benetti(a)micronovasrl.com> + * Micronova srl <info(a)micronovasrl.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/sizes.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#include <lcd.h> +#include <atmel_lcdc.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +static void c5000_serial_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +} + +static void c5000_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + at91_sys_write(AT91_MATRIX_EBI0CSA, + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | + AT91_SMC_DBW_8 | + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOCDE); + + /* Configure RDY/BSY */ + at91_set_gpio_input(AT91_PIN_PA22, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(AT91_PIN_PD15, 1); +} + +#ifdef CONFIG_HAS_DATAFLASH +static void c5000_spi_hw_init(void) +{ + at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ + + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); +} +#endif + +vidinfo_t panel_info = { + vl_col: 640, + vl_row: 480, + vl_clk: 25000000, + vl_sync: ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED, + vl_bpix: 3, + vl_tft: 1, + vl_hsync_len: 4, + vl_left_margin: 16, + vl_right_margin:8, + vl_vsync_len: 1, + vl_upper_margin:8, + vl_lower_margin:5, + mmio: AT91SAM9263_LCDC_BASE, +}; + +void lcd_enable(void) +{ + at91_set_gpio_value(AT91_PIN_PA30, 1); /* power up */ +} + +void lcd_disable(void) +{ + at91_set_gpio_value(AT91_PIN_PA30, 0); /* power down */ +} + +static void c5000_lcd_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ + at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ + at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ + at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC); + + gd->fb_base = PHYS_SDRAM + 0x3FB5000; /* mapped into sdram @ 0x20000000 + (64 MByte - (640x480) 8bpp) */ +} + +static void c5000_set_rst(void) +{ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0E << 8)) | + AT91_RSTC_URSTEN); +} + +int board_init(void) +{ + c5000_set_rst(); + + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of C5000-Board */ + gd->bd->bi_arch_number = MACH_TYPE_C5000; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + c5000_serial_hw_init(); + c5000_nand_hw_init(); +#ifdef CONFIG_HAS_DATAFLASH + c5000_spi_hw_init(); +#endif + c5000_lcd_hw_init(); + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} diff -urpN b/board/micronova/c5000/config.mk a/board/micronova/c5000/config.mk --- b/board/micronova/c5000/config.mk 1970-01-01 01:00:00.000000000 +0100 +++ a/board/micronova/c5000/config.mk 2009-06-18 12:55:19.000000000 +0200 @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff -urpN b/board/micronova/c5000/Makefile a/board/micronova/c5000/Makefile --- b/board/micronova/c5000/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ a/board/micronova/c5000/Makefile 2009-06-18 12:55:19.000000000 +0200 @@ -0,0 +1,56 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop(a)leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += c5000.o +COBJS-y += partition.o +COBJS-$(CONFIG_CMD_NAND) += nand.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -urpN b/board/micronova/c5000/nand.c a/board/micronova/c5000/nand.c --- b/board/micronova/c5000/nand.c 1970-01-01 01:00:00.000000000 +0100 +++ a/board/micronova/c5000/nand.c 2009-06-18 16:49:04.000000000 +0200 @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +static void c5000_nand_hwcontrol(struct mtd_info *mtd, + int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + IO_ADDR_W &= ~(MASK_ALE | MASK_CLE); + + if (ctrl & NAND_CLE) + IO_ADDR_W |= MASK_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= MASK_ALE; + + at91_set_gpio_value(AT91_PIN_PD15, !(ctrl & NAND_NCE)); + this->IO_ADDR_W = (void *) IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +static int c5000_nand_ready(struct mtd_info *mtd) +{ + return at91_get_gpio_value(AT91_PIN_PA22); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = c5000_nand_hwcontrol; + nand->dev_ready = c5000_nand_ready; + nand->chip_delay = 20; + + return 0; +} diff -urpN b/board/micronova/c5000/partition.c a/board/micronova/c5000/partition.c --- b/board/micronova/c5000/partition.c 1970-01-01 01:00:00.000000000 +0100 +++ a/board/micronova/c5000/partition.c 2009-06-18 16:50:06.000000000 +0200 @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf(a)atmel.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, +}; diff -urpN b/include/configs/c5000.h a/include/configs/c5000.h --- b/include/configs/c5000.h 1970-01-01 01:00:00.000000000 +0100 +++ a/include/configs/c5000.h 2009-06-18 17:06:07.000000000 +0200 @@ -0,0 +1,156 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop(a)leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * Giulio Benetti <giulio.benetti(a)micronovasrl.com> + * Micronova srl <info(a)micronovasrl.com> + * + * Configuation settings for the C5000 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* ARM asynchronous clock */ +#define AT91_CPU_NAME "AT91SAM9263" +#define AT91_MAIN_CLOCK 20000000 /* 20.000 MHz crystal */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC */ +#define CONFIG_ARCH_CPU_INIT + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +/* + * Hardware drivers + */ +#define CONFIG_ATMEL_USART 1 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +/* LCD */ +#define CONFIG_LCD 1 +#define LCD_BPP LCD_COLOR8 +#define CONFIG_SYS_WHITE_ON_BLACK 1 +#define CONFIG_ATMEL_LCD 1 +#define CONFIG_ATMEL_LCD_RGB555 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +#define CONFIG_BOOTDELAY 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE + +#define CONFIG_CMD_NAND 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ + +/* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* NOR flash, not populated */ +#define CONFIG_SYS_NO_FLASH 1 + +/* NAND flash */ +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 + +/* Ethernet */ +#define CONFIG_NET_MULTI + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x23e00000 + +#ifdef CONFIG_USE_DATAFLASH + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 + +#else /* CONFIG_USE_NANDFLASH */ + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ + +#endif + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_HW_WATCHDOG + +#endif diff -urpN b/Makefile a/Makefile --- b/Makefile 2009-06-14 21:30:39.000000000 +0200 +++ a/Makefile 2009-06-18 12:55:19.000000000 +0200 @@ -2752,6 +2752,9 @@ at91sam9rlek_config : unconfig pm9263_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91 +c5000_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs c5000 micronova at91 + ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ -- Giulio Benetti R&D Micronova srl

2 1

[U-Boot] [PATCH] digsy mtc: Enable command line history.
by Grzegorz Bernacki 19 Jul '09

19 Jul '09

Signed-off-by: Grzegorz Bernacki <gjb(a)semihalf.com> --- include/configs/digsy_mtc.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 558010f..6ccebfa 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -272,6 +272,7 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_AUTO_COMPLETE 1 +#define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -- 1.6.0.6

2 1

[U-Boot] [PATCH] compiler.h: unify system ifdef cruft here
by Mike Frysinger 19 Jul '09

19 Jul '09

Shove a lot of the HOSTCC and related #ifdef checking crap into the new compiler.h header so that we can keep all other headers nice and clean. Also introduce custom uswap functions so we don't have to rely on the non standard implementations that a host may (or may not in the case of OS X) provide. This allows mkimage to finally build cleanly on an OS X system. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- include/compiler.h | 118 +++++++++++++++++++++++++++++++++++++++++++++++++ include/elf.h | 10 +---- include/environment.h | 6 +-- include/image.h | 9 +--- include/libfdt_env.h | 53 ++-------------------- tools/bmp_logo.c | 13 +----- tools/img2srec.c | 3 +- tools/mkimage.c | 14 ++---- tools/mkimage.h | 33 -------------- tools/os_support.h | 2 + tools/ubsha1.c | 13 ----- 11 files changed, 136 insertions(+), 138 deletions(-) create mode 100644 include/compiler.h diff --git a/include/compiler.h b/include/compiler.h new file mode 100644 index 0000000..c6be410 --- /dev/null +++ b/include/compiler.h @@ -0,0 +1,118 @@ +/* + * Keep all the ugly #ifdef for system stuff here + */ + +#ifndef __COMPILER_H__ +#define __COMPILER_H__ + +#include <stddef.h> + +#ifdef USE_HOSTCC + +#if defined(__BEOS__) || \ + defined(__NetBSD__) || \ + defined(__FreeBSD__) || \ + defined(__sun__) || \ + defined(__APPLE__) +# include <inttypes.h> +#elif defined(__linux__) || defined(__WIN32__) || defined(__MINGW32__) +# include <stdint.h> +#endif + +#include <errno.h> +#include <stdlib.h> +#include <stdint.h> +#include <stdio.h> +#include <string.h> + +extern int errno; + +#if !defined(__WIN32__) && !defined(__MINGW32__) +# include <sys/mman.h> +#endif + +#ifndef MAP_FAILED +#define MAP_FAILED (-1) +#endif + +#include <fcntl.h> +#ifndef O_BINARY /* should be define'd on __WIN32__ */ +#define O_BINARY 0 +#endif + +#ifdef __linux__ +# include <endian.h> +# include <byteswap.h> +#elif defined(__MACH__) +# include <machine/endian.h> +typedef unsigned long ulong; +typedef unsigned int uint; +#endif + +#else /* !USE_HOSTCC */ + +#include <linux/string.h> +#include <linux/types.h> +#include <asm/byteorder.h> + +/* Types for `void *' pointers. */ +#if __WORDSIZE == 64 +typedef unsigned long int uintptr_t; +#else +typedef unsigned int uintptr_t; +#endif + +#endif + +#define uswap_16(x) \ + ((((x) & 0xff00) >> 8) | \ + (((x) & 0x00ff) << 8)) +#define uswap_32(x) \ + ((((x) & 0xff000000) >> 24) | \ + (((x) & 0x00ff0000) >> 8) | \ + (((x) & 0x0000ff00) << 8) | \ + (((x) & 0x000000ff) << 24)) +#define _uswap_64(x, sfx) \ + ((((x) & 0xff00000000000000##sfx) >> 56) | \ + (((x) & 0x00ff000000000000##sfx) >> 40) | \ + (((x) & 0x0000ff0000000000##sfx) >> 24) | \ + (((x) & 0x000000ff00000000##sfx) >> 8) | \ + (((x) & 0x00000000ff000000##sfx) << 8) | \ + (((x) & 0x0000000000ff0000##sfx) << 24) | \ + (((x) & 0x000000000000ff00##sfx) << 40) | \ + (((x) & 0x00000000000000ff##sfx) << 56)) +#if defined(__GNUC__) +# define uswap_64(x) _uswap_64(x, ull) +#else +# define uswap_64(x) _uswap_64(x, ) +#endif + +#if __BYTE_ORDER == __LITTLE_ENDIAN +# define cpu_to_le16(x) (x) +# define cpu_to_le32(x) (x) +# define cpu_to_le64(x) (x) +# define le16_to_cpu(x) (x) +# define le32_to_cpu(x) (x) +# define le64_to_cpu(x) (x) +# define cpu_to_be16(x) uswap_16(x) +# define cpu_to_be32(x) uswap_32(x) +# define cpu_to_be64(x) uswap_64(x) +# define be16_to_cpu(x) uswap_16(x) +# define be32_to_cpu(x) uswap_32(x) +# define be64_to_cpu(x) uswap_64(x) +#else +# define cpu_to_le16(x) uswap_16(x) +# define cpu_to_le32(x) uswap_32(x) +# define cpu_to_le64(x) uswap_64(x) +# define le16_to_cpu(x) uswap_16(x) +# define le32_to_cpu(x) uswap_32(x) +# define le64_to_cpu(x) uswap_64(x) +# define cpu_to_be16(x) (x) +# define cpu_to_be32(x) (x) +# define cpu_to_be64(x) (x) +# define be16_to_cpu(x) (x) +# define be32_to_cpu(x) (x) +# define be64_to_cpu(x) (x) +#endif + +#endif diff --git a/include/elf.h b/include/elf.h index f640388..29f276d 100644 --- a/include/elf.h +++ b/include/elf.h @@ -33,15 +33,7 @@ #ifndef _ELF_H #define _ELF_H -#if defined(__BEOS__) || \ - defined(__NetBSD__) || \ - defined(__FreeBSD__) || \ - defined(__sun__) || \ - defined(__APPLE__) -#include <inttypes.h> -#elif (defined(__linux__) && defined(USE_HOSTCC)) || defined(__WIN32__) -#include <stdint.h> -#endif +#include "compiler.h" /* * This version doesn't work for 64-bit ABIs - Erik. diff --git a/include/environment.h b/include/environment.h index 507e832..5bed32f 100644 --- a/include/environment.h +++ b/include/environment.h @@ -96,11 +96,7 @@ # endif #endif /* CONFIG_ENV_IS_IN_MG_DISK */ -#ifdef USE_HOSTCC -# include <stdint.h> -#else -# include <linux/types.h> -#endif +#include "compiler.h" #ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT # define ENV_HEADER_SIZE (sizeof(uint32_t) + 1) diff --git a/include/image.h b/include/image.h index f183757..0e6e82d 100644 --- a/include/image.h +++ b/include/image.h @@ -33,10 +33,9 @@ #ifndef __IMAGE_H__ #define __IMAGE_H__ -#if USE_HOSTCC -#ifndef __MINGW32__ -#include <endian.h> -#endif +#include "compiler.h" + +#ifdef USE_HOSTCC /* new uImage format support enabled on host */ #define CONFIG_FIT 1 @@ -46,9 +45,7 @@ #else #include <lmb.h> -#include <linux/string.h> #include <asm/u-boot.h> -#include <asm/byteorder.h> #endif /* USE_HOSTCC */ diff --git a/include/libfdt_env.h b/include/libfdt_env.h index 1c67015..bf63583 100644 --- a/include/libfdt_env.h +++ b/include/libfdt_env.h @@ -21,56 +21,13 @@ #ifndef _LIBFDT_ENV_H #define _LIBFDT_ENV_H -#ifdef USE_HOSTCC -#include <stdint.h> -#include <string.h> -#ifdef __MINGW32__ -#include <linux/types.h> -#include <linux/byteorder/swab.h> -#else -#include <endian.h> -#include <byteswap.h> -#endif /* __MINGW32__ */ -#else -#include <linux/string.h> -#include <linux/types.h> -#include <asm/byteorder.h> -#endif /* USE_HOSTCC */ +#include "compiler.h" -#include <stddef.h> extern struct fdt_header *working_fdt; /* Pointer to the working fdt */ -#if __BYTE_ORDER == __LITTLE_ENDIAN -#ifdef __MINGW32__ -#define fdt32_to_cpu(x) ___swab32(x) -#define cpu_to_fdt32(x) ___swab32(x) -#define fdt64_to_cpu(x) ___swab64(x) -#define cpu_to_fdt64(x) ___swab64(x) -#else -#define fdt32_to_cpu(x) bswap_32(x) -#define cpu_to_fdt32(x) bswap_32(x) -#define fdt64_to_cpu(x) bswap_64(x) -#define cpu_to_fdt64(x) bswap_64(x) -#endif -#else -#define fdt32_to_cpu(x) (x) -#define cpu_to_fdt32(x) (x) -#define fdt64_to_cpu(x) (x) -#define cpu_to_fdt64(x) (x) -#endif - -#ifndef USE_HOSTCC -/* - * Types for `void *' pointers. - * - * Note: libfdt uses this definition from /usr/include/stdint.h. - * Define it here rather than pulling in all of stdint.h. - */ -#if __WORDSIZE == 64 -typedef unsigned long int uintptr_t; -#else -typedef unsigned int uintptr_t; -#endif -#endif /* not USE_HOSTCC */ +#define fdt32_to_cpu(x) be32_to_cpu(x) +#define cpu_to_fdt32(x) cpu_to_be32(x) +#define fdt64_to_cpu(x) be64_to_cpu(x) +#define cpu_to_fdt64(x) cpu_to_be64(x) #endif /* _LIBFDT_ENV_H */ diff --git a/tools/bmp_logo.c b/tools/bmp_logo.c index e8dd8c8..47228d2 100644 --- a/tools/bmp_logo.c +++ b/tools/bmp_logo.c @@ -1,15 +1,4 @@ -#include <stdio.h> -#include <stdlib.h> - -#if defined(__linux__) -#include <stdint.h> -#else -#ifdef __CYGWIN__ -#include "elf.h" -#else -#include <inttypes.h> -#endif -#endif +#include "compiler.h" typedef struct bitmap_s { /* bitmap description */ uint16_t width; diff --git a/tools/img2srec.c b/tools/img2srec.c index b04abbd..f10379f 100644 --- a/tools/img2srec.c +++ b/tools/img2srec.c @@ -52,6 +52,7 @@ | INCLUDES |*************************************************************************/ +#include "os_support.h" #include <stddef.h> #include <stdio.h> #include <stdlib.h> @@ -61,8 +62,6 @@ #include <unistd.h> #include <errno.h> -extern int errno; - /************************************************************************* | DEFINES |*************************************************************************/ diff --git a/tools/mkimage.c b/tools/mkimage.c index 967fe9a..02cdb95 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -25,12 +25,6 @@ #include "mkimage.h" #include <image.h> -extern int errno; - -#ifndef MAP_FAILED -#define MAP_FAILED (void *)(-1) -#endif - extern unsigned long crc32 (unsigned long crc, const char *buf, unsigned int len); static void copy_file (int, const char *, int); static void usage (void); @@ -502,7 +496,7 @@ image_verify_header (char *ptr, int image_size) */ memcpy (hdr, ptr, sizeof(image_header_t)); - if (ntohl(hdr->ih_magic) != IH_MAGIC) { + if (be32_to_cpu(hdr->ih_magic) != IH_MAGIC) { fprintf (stderr, "%s: Bad Magic Number: \"%s\" is no valid image\n", cmdname, imagefile); @@ -512,8 +506,8 @@ image_verify_header (char *ptr, int image_size) data = (char *)hdr; len = sizeof(image_header_t); - checksum = ntohl(hdr->ih_hcrc); - hdr->ih_hcrc = htonl(0); /* clear for re-calculation */ + checksum = be32_to_cpu(hdr->ih_hcrc); + hdr->ih_hcrc = cpu_to_be32(0); /* clear for re-calculation */ if (crc32 (0, data, len) != checksum) { fprintf (stderr, @@ -525,7 +519,7 @@ image_verify_header (char *ptr, int image_size) data = ptr + sizeof(image_header_t); len = image_size - sizeof(image_header_t) ; - if (crc32 (0, data, len) != ntohl(hdr->ih_dcrc)) { + if (crc32 (0, data, len) != be32_to_cpu(hdr->ih_dcrc)) { fprintf (stderr, "%s: ERROR: \"%s\" has corrupted data!\n", cmdname, imagefile); diff --git a/tools/mkimage.h b/tools/mkimage.h index c8df6e1..70c53ad 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -26,14 +26,6 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#ifndef __WIN32__ -#include <netinet/in.h> /* for host / network byte order conversions */ -#endif -#ifdef __MINGW32__ -#include <stdint.h> -#else -#include <sys/mman.h> -#endif #include <sys/stat.h> #include <time.h> #include <unistd.h> @@ -53,28 +45,3 @@ #define MKIMAGE_DEFAULT_DTC_OPTIONS "-I dts -O dtb -p 500" #define MKIMAGE_MAX_DTC_CMDLINE_LEN 512 #define MKIMAGE_DTC "dtc" /* assume dtc is in $PATH */ - -#if defined(__BEOS__) || defined(__NetBSD__) || defined(__APPLE__) -#include <inttypes.h> -#endif - -#ifdef __WIN32__ -typedef unsigned int __u32; - -#define SWAP_LONG(x) \ - ((__u32)( \ - (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ - (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ - (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ - (((__u32)(x) & (__u32)0xff000000UL) >> 24) )) -typedef unsigned char uint8_t; -typedef unsigned short uint16_t; -typedef unsigned int uint32_t; - -#define ntohl(a) SWAP_LONG(a) -#define htonl(a) SWAP_LONG(a) -#endif /* __WIN32__ */ - -#ifndef O_BINARY /* should be define'd on __WIN32__ */ -#define O_BINARY 0 -#endif diff --git a/tools/os_support.h b/tools/os_support.h index f6f86b0..7bf930e 100644 --- a/tools/os_support.h +++ b/tools/os_support.h @@ -19,6 +19,8 @@ #ifndef __OS_SUPPORT_H_ #define __OS_SUPPORT_H_ +#include "compiler.h" + /* * Include additional files required for supporting different operating systems */ diff --git a/tools/ubsha1.c b/tools/ubsha1.c index c4203ed..9774eea 100644 --- a/tools/ubsha1.c +++ b/tools/ubsha1.c @@ -28,9 +28,6 @@ #include <fcntl.h> #include <errno.h> #include <string.h> -#ifndef __MINGW32__ -#include <sys/mman.h> -#endif #include <sys/stat.h> #include "sha1.h" @@ -40,16 +37,6 @@ #include <config.h> #undef __ASSEMBLY__ -#ifndef O_BINARY /* should be define'd on __WIN32__ */ -#define O_BINARY 0 -#endif - -#ifndef MAP_FAILED -#define MAP_FAILED (-1) -#endif - -extern int errno; - extern void sha1_csum (unsigned char *input, int ilen, unsigned char output[20]); int main (int argc, char **argv) -- 1.6.3.1

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[U-Boot] [PATCH] common: fix 'dummy' is used uninitialized in this function warning
by Kim Phillips 19 Jul '09

19 Jul '09

fix this gcc 4.4 warning: xyzModem.c: In function 'xyzModem_stream_open': xyzModem.c:564: warning: 'dummy' is used uninitialized in this function Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- common/xyzModem.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/xyzModem.c b/common/xyzModem.c index a209dfa..7a46805 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -544,7 +544,7 @@ xyzModem_stream_open (connection_info_t * info, int *err) xyzModem_CHAR_TIMEOUT); #else /* TODO: CHECK ! */ - int dummy; + int dummy = 0; xyz.__chan = &dummy; #endif xyz.len = 0; -- 1.6.3.2

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[U-Boot] [PATCH] push CROSS_COMPILE out to $(ARCH)_config.mk
by Mike Frysinger 19 Jul '09

19 Jul '09

Each arch should handle setting a proper default CROSS_COMPILE value in their own config.mk file rather than having to maintain a large ugly list in the Makefile. By using conditional assignment, we don't have to worry about the variable already being set (env/cmdline/etc...). The common config.mk file takes care of exporting CROSS_COMPILE already, and while a few variables (toolchain ones) utilize CROSS_COMPILE before including the arch config.mk, they do so with deferred assignment. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- Makefile | 44 ++------------------------------------------ arm_config.mk | 2 ++ avr32_config.mk | 2 ++ blackfin_config.mk | 2 ++ i386_config.mk | 2 ++ m68k_config.mk | 2 ++ microblaze_config.mk | 2 ++ mips_config.mk | 2 ++ nios2_config.mk | 2 ++ nios_config.mk | 2 ++ ppc_config.mk | 2 ++ sh_config.mk | 2 ++ sparc_config.mk | 2 ++ 13 files changed, 26 insertions(+), 42 deletions(-) diff --git a/Makefile b/Makefile index acec1a0..4d058b1 100644 --- a/Makefile +++ b/Makefile @@ -151,50 +151,10 @@ ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk)) include $(obj)include/config.mk export ARCH CPU BOARD VENDOR SOC -ifndef CROSS_COMPILE +# set default to nothing for native builds ifeq ($(HOSTARCH),$(ARCH)) -CROSS_COMPILE = -else -ifeq ($(ARCH),ppc) -CROSS_COMPILE = ppc_8xx- -endif -ifeq ($(ARCH),arm) -CROSS_COMPILE = arm-linux- -endif -ifeq ($(ARCH),i386) -CROSS_COMPILE = i386-linux- -endif -ifeq ($(ARCH),mips) -CROSS_COMPILE = mips_4KC- -endif -ifeq ($(ARCH),nios) -CROSS_COMPILE = nios-elf- -endif -ifeq ($(ARCH),nios2) -CROSS_COMPILE = nios2-elf- -endif -ifeq ($(ARCH),m68k) -CROSS_COMPILE = m68k-elf- +CROSS_COMPILE ?= endif -ifeq ($(ARCH),microblaze) -CROSS_COMPILE = mb- -endif -ifeq ($(ARCH),blackfin) -CROSS_COMPILE = bfin-uclinux- -endif -ifeq ($(ARCH),avr32) -CROSS_COMPILE = avr32-linux- -endif -ifeq ($(ARCH),sh) -CROSS_COMPILE = sh4-linux- -endif -ifeq ($(ARCH),sparc) -CROSS_COMPILE = sparc-elf- -endif # sparc -endif # HOSTARCH,ARCH -endif # CROSS_COMPILE - -export CROSS_COMPILE # load other configuration include $(TOPDIR)/config.mk diff --git a/arm_config.mk b/arm_config.mk index c4cf99d..a13603e 100644 --- a/arm_config.mk +++ b/arm_config.mk @@ -21,6 +21,8 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= arm-linux- + PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds diff --git a/avr32_config.mk b/avr32_config.mk index 441caa4..c258b4b 100644 --- a/avr32_config.mk +++ b/avr32_config.mk @@ -21,5 +21,7 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= avr32-linux- + PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got -mrelax PLATFORM_LDFLAGS += --relax diff --git a/blackfin_config.mk b/blackfin_config.mk index 989e976..9357e20 100644 --- a/blackfin_config.mk +++ b/blackfin_config.mk @@ -21,6 +21,8 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= bfin-uclinux- + CONFIG_BFIN_CPU := $(strip $(subst ",,$(CONFIG_BFIN_CPU))) CONFIG_BFIN_BOOT_MODE := $(strip $(subst ",,$(CONFIG_BFIN_BOOT_MODE))) CONFIG_ENV_OFFSET := $(strip $(subst ",,$(CONFIG_ENV_OFFSET))) diff --git a/i386_config.mk b/i386_config.mk index 9e6d37d..5fe36d5 100644 --- a/i386_config.mk +++ b/i386_config.mk @@ -21,4 +21,6 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= i386-linux- + PLATFORM_CPPFLAGS += -DCONFIG_I386 -D__I386__ diff --git a/m68k_config.mk b/m68k_config.mk index 12bd27c..f41d1b3 100644 --- a/m68k_config.mk +++ b/m68k_config.mk @@ -21,5 +21,7 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= m68k-elf- + PLATFORM_CPPFLAGS += -DCONFIG_M68K -D__M68K__ PLATFORM_LDFLAGS += -n diff --git a/microblaze_config.mk b/microblaze_config.mk index e44c79e..68e7e21 100644 --- a/microblaze_config.mk +++ b/microblaze_config.mk @@ -24,4 +24,6 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= mb- + PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__ diff --git a/mips_config.mk b/mips_config.mk index 05eb05d..c785677 100644 --- a/mips_config.mk +++ b/mips_config.mk @@ -21,6 +21,8 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= mips_4KC- + PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__ # diff --git a/nios2_config.mk b/nios2_config.mk index 3f23b56..59931c2 100644 --- a/nios2_config.mk +++ b/nios2_config.mk @@ -22,5 +22,7 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= nios2-elf- + PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ PLATFORM_CPPFLAGS += -ffixed-r15 -G0 diff --git a/nios_config.mk b/nios_config.mk index 1cf0f32..3ed7170 100644 --- a/nios_config.mk +++ b/nios_config.mk @@ -22,4 +22,6 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= nios-elf- + PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -D__NIOS__ -ffixed-g7 -gstabs diff --git a/ppc_config.mk b/ppc_config.mk index c95b3b1..d91ef7f 100644 --- a/ppc_config.mk +++ b/ppc_config.mk @@ -21,6 +21,8 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= ppc_8xx- + PLATFORM_CPPFLAGS += -DCONFIG_PPC -D__powerpc__ PLATFORM_LDFLAGS += -n diff --git a/sh_config.mk b/sh_config.mk index 49d50f7..306cb59 100644 --- a/sh_config.mk +++ b/sh_config.mk @@ -21,4 +21,6 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= sh4-linux- + PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__ diff --git a/sparc_config.mk b/sparc_config.mk index 87f745f..07b528c 100644 --- a/sparc_config.mk +++ b/sparc_config.mk @@ -21,4 +21,6 @@ # MA 02111-1307 USA # +CROSS_COMPILE ?= sparc-elf- + PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__ -- 1.6.3.1

2 2

[U-Boot] [PATCH 1/1] malloc.h: protect it against multiple include
by Jean-Christophe PLAGNIOL-VILLARD 19 Jul '09

19 Jul '09

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj(a)jcrosoft.com> --- include/malloc.h | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/include/malloc.h b/include/malloc.h index 47154b0..a38464e 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -216,7 +216,8 @@ */ - +#ifndef __MALLOC_H__ +#define __MALLOC_H__ /* Preliminaries */ @@ -940,3 +941,5 @@ struct mallinfo mALLINFo(); #ifdef __cplusplus }; /* end of extern "C" */ #endif + +#endif /* __MALLOC_H__ */ -- 1.6.3.1

2 1