November 2009 - U-Boot

[U-Boot] s5pc1xx: serial: fix the error check logic
by Minkyu Kang 13 Nov '09

13 Nov '09

Because of Frame error, Parity error and Overrun error are occured only receive operation, need to masking when error checking. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> --- drivers/serial/serial_s5pc1xx.c | 24 +++++++++++++++++------- 1 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/serial/serial_s5pc1xx.c b/drivers/serial/serial_s5pc1xx.c index 68c06a9..e06234d 100644 --- a/drivers/serial/serial_s5pc1xx.c +++ b/drivers/serial/serial_s5pc1xx.c @@ -98,14 +98,24 @@ int serial_init_dev(const int dev_index) return 0; } -static int serial_err_check(const int dev_index) +static int serial_err_check(const int dev_index, int op) { struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + unsigned int mask; + + /* + * UERSTAT + * Break Detect [3] + * Frame Err [2] : receive operation + * Parity Err [1] : receive operation + * Overrun Err [0] : receive operation + */ + if (op) + mask = 0x8; + else + mask = 0xf; - if (readl(&uart->uerstat) & 0xf) - return 1; - - return 0; + return readl(&uart->uerstat) & mask; } /* @@ -119,7 +129,7 @@ int serial_getc_dev(const int dev_index) /* wait for character to arrive */ while (!(readl(&uart->utrstat) & 0x1)) { - if (serial_err_check(dev_index)) + if (serial_err_check(dev_index, 0)) return 0; } @@ -135,7 +145,7 @@ void serial_putc_dev(const char c, const int dev_index) /* wait for room in the tx FIFO */ while (!(readl(&uart->utrstat) & 0x2)) { - if (serial_err_check(dev_index)) + if (serial_err_check(dev_index, 1)) return; } -- 1.5.4.3

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[U-Boot] [PATCH 1/3] DA830: Add pinmux for USB0_DRVVBUS
by Ajay Kumar Gupta 13 Nov '09

13 Nov '09

USB0_DRVVBUS pinmux configuration is required for USB functinality in uboot. Signed-off-by: Ajay Kumar Gupta <ajay.gupta(a)ti.com> Signed-off-by: Swaminathan S <swami.iyer(a)ti.com> --- This patch set is created against Nick Thompson's latest patch set (v5) on DA8xx support and another patch from him on Davinci pinmux. [Davinci: add a pin multiplexer configuration API] board/davinci/da830evm/da830evm.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c index bb8cc3c..7cf6013 100644 --- a/board/davinci/da830evm/da830evm.c +++ b/board/davinci/da830evm/da830evm.c @@ -65,6 +65,11 @@ const struct pinmux_config i2c_pins[] = { { pinmux[9], 2, 4 } }; +/* USB0_DRVVBUS pin muxer settings */ +const struct pinmux_config usb_pins[] = { + { pinmux[9], 1, 1 } +}; + int board_init(void) { #ifndef CONFIG_USE_IRQ @@ -118,6 +123,9 @@ int board_init(void) if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0) return 1; + if (davinci_configure_pin_mux(usb_pins, ARRAY_SIZE(usb_pins)) != 0) + return 1; + /* enable the console UART */ writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | DAVINCI_UART_PWREMU_MGMT_UTRST), -- 1.6.2.4

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[U-Boot] Loam Program
by ©Nationwide Loan 13 Nov '09

13 Nov '09

Dear Customer, NationWide Loans to help you change the way you live. Arranging a loan with us is simple and straightforward,loans from £10,000 to £5,000,000 over 5 to 35 years we make the process convenient and fast. Please if interested in getting a loan from our bank do get back to us as soon as possible for more information. Kind Regards, Mr James Whitehead Manager Nationwide Loan Company UK.

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[U-Boot] Loam Program
by ©Nationwide Loan 13 Nov '09

13 Nov '09

Dear Customer, NationWide Loans to help you change the way you live. Arranging a loan with us is simple and straightforward,loans from £10,000 to £5,000,000 over 5 to 35 years we make the process convenient and fast. Please if interested in getting a loan from our bank do get back to us as soon as possible for more information. Kind Regards, Mr James Whitehead Manager Nationwide Loan Company UK.

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[U-Boot] [PATCH 0/2] OMAP3:DDR timing cleanup series
by Nishanth Menon 12 Nov '09

12 Nov '09

Hi, in continuation of the discussion on: http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y the following patch set should introduce DDR timing changes for MICRON and INFINEON DDRs and allow both classes of boards to live happily together Tested ON: SDP3430 - type INFENINION BeagleBoard - type MICRON tested with mtest 0x82000000 0x83000000 1 from u-boot prompt Nishanth Menon (2): OMAP3:SDRC: Cleanup references to SDP OMAP3:SDRC: introduce DDR types cpu/arm_cortexa8/omap3/mem.c | 2 +- cpu/arm_cortexa8/omap3/sys_info.c | 2 +- include/asm-arm/arch-omap3/mem.h | 97 +++++++++++++++++++++++++++---------- include/configs/devkit8000.h | 3 + include/configs/omap3_beagle.h | 3 + include/configs/omap3_evm.h | 3 + include/configs/omap3_overo.h | 3 + include/configs/omap3_pandora.h | 3 + include/configs/omap3_sdp3430.h | 3 + include/configs/omap3_zoom1.h | 3 + include/configs/omap3_zoom2.h | 3 + 11 files changed, 97 insertions(+), 28 deletions(-)

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[U-Boot] [PATCH V5 4/4] add TI DA8xx support: Integrate DA830 EVM support into U-Boot
by Nick Thompson 12 Nov '09

12 Nov '09

From: Sekhar Nori <nsekhar(a)ti.com> Integrate DA830 EVM support into U-Boot. Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum Digital EVM board. See http://www.spectrumdigital.com/ Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + include/common.h | 3 + include/configs/da830evm.h | 243 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 254 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..5ca45a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -712,6 +712,10 @@ Andrea Scian <andrea.scian(a)dave-tech.it> B2 ARM7TDMI (S3C44B0X) +Nick Thompson <nick.thompson(a)gefanuc.com> + + da830evm ARM926EJS (DA830/OMAP-L137) + Albin Tonnerre <albin.tonnerre(a)free-electrons.com> sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC) diff --git a/MAKEALL b/MAKEALL index d63c5c2..a61e40c 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,6 +548,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \ + da830evm \ imx27lite \ lpd7a400 \ mv88f6281gtw_ge \ diff --git a/Makefile b/Makefile index a69e6d5..bf6081b 100644 --- a/Makefile +++ b/Makefile @@ -2927,6 +2927,9 @@ cp922_XA10_config \ cp1026_config: unconfig @board/armltd/integrator/split_by_variant.sh cp $@ +da830evm_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs da830evm davinci davinci + davinci_dvevm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci diff --git a/include/common.h b/include/common.h index 7df9afa..7fb107c 100644 --- a/include/common.h +++ b/include/common.h @@ -107,6 +107,9 @@ typedef volatile unsigned char vu_char; #ifdef CONFIG_BLACKFIN #include <asm/blackfin.h> #endif +#ifdef CONFIG_SOC_DA8XX +#include <asm/arch/hardware.h> +#endif #include <part.h> #include <flash.h> diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h new file mode 100644 index 0000000..38e2ce1 --- /dev/null +++ b/include/configs/da830evm.h @@ -0,0 +1,243 @@ +/* + * Copyright (C) 2008 Texas Instruments, Inc <www.ti.com> + * + * Based on davinci_dvevm.h. Original Copyrights follow: + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Board + */ + +/* + * SoC Configuration + */ +#define CONFIG_MACH_DAVINCI_DA830_EVM +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) +#define CONFIG_SYS_OSCIN_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ +#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ +#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ + +/* + * Serial Driver info + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * I2C Configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_DRIVER_DAVINCI_I2C +#define CONFIG_SYS_I2C_SPEED 25000 /* 100Kbps won't work, H/W bug */ +#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ + +/* + * I2C EEPROM definitions for catalyst 24W256 EEPROM chip + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 + +/* + * Network & Ethernet Configuration + */ +#ifdef CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#endif + +/* + * Flash & Environment + */ +#ifdef CONFIG_USE_NAND +#undef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ +#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_CS 3 +#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CONFIG_SYS_CLE_MASK 0x10 +#define CONFIG_SYS_ALE_MASK 0x8 +#define CONFIG_SYS_NAND_HW_ECC +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define NAND_MAX_CHIPS 1 +#define DEF_BOOTM "" +#endif + +#ifdef CONFIG_USE_NOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CONFIG_SYS_FLASH_SECT_SZ (64 << 10) /* 64KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3) +#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define PHYS_FLASH_SIZE (32 << 20) /* Flash size 32MB */ +#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) +#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ +#define CONFIG_SYS_FLASH_SPL_ACCESS +#endif + +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#define CONFIG_ENV_OFFSET (256 << 10) +#define CONFIG_ENV_SECT_SIZE 4096 +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE +#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_SYS_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + + +/* + * U-Boot general configuration + */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#undef CONFIG_MISC_INIT_R +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_PROMPT "DA830-evm > " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp" +#define CONFIG_BOOTCOMMAND "" +#define CONFIG_BOOTDELAY 3 + +/* + * U-Boot commands + */ +#include <config_cmd_default.h> +#define CONFIG_CMD_ENV +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_MEMORY +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR +#define CONFIG_CMD_EEPROM + +#ifndef CONFIG_DRIVER_TI_EMAC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#endif + +#ifdef CONFIG_USE_NAND +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#endif + +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SAVEENV +#endif + +#if !defined(CONFIG_USE_NAND) && \ + !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_USE_SPIFLASH) +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_ENV +#endif + +#ifdef CONFIG_USB_DA8XX +#define CONFIG_CMD_USB /* include support for usb */ +#define CONFIG_CMD_STORAGE /* include support for usb */ +#define CONFIG_CMD_FAT /* include support for FAT/storage*/ +#define CONFIG_DOS_PARTITION /* include support for FAT/storage*/ +#endif + +#endif /* __CONFIG_H */

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[U-Boot] [PATCH V5 3/4] add TI DA8xx support: Add new directory for da830evm board
by Nick Thompson 12 Nov '09

12 Nov '09

From: Sekhar Nori <nsekhar(a)ti.com> Add new directory for da830evm board Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum Digital EVM board. See http://www.spectrumdigital.com/ Provides: Initial boot and configuration. Support for i2c. UART support (console). Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti board/davinci/da830evm/Makefile | 51 +++++++++++++++ board/davinci/da830evm/config.mk | 43 +++++++++++++ board/davinci/da830evm/da830evm.c | 127 +++++++++++++++++++++++++++++++++++++ 3 files changed, 221 insertions(+), 0 deletions(-) diff --git a/board/davinci/da830evm/Makefile b/board/davinci/da830evm/Makefile new file mode 100644 index 0000000..02636fa --- /dev/null +++ b/board/davinci/da830evm/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := da830evm.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak *~ .depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/da830evm/config.mk b/board/davinci/da830evm/config.mk new file mode 100644 index 0000000..6da29a9 --- /dev/null +++ b/board/davinci/da830evm/config.mk @@ -0,0 +1,43 @@ +# +# (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> +# David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# Texas Instruments DA8xx EVM board (ARM925EJS) cpu +# see http://www.ti.com/ for more information on Texas Instruments +# +# DA8xx EVM has 1 bank of 64 MB SDRAM (2 16Meg x16 chips). +# Physical Address: +# C000'0000 to C400'0000 +# +# Linux-Kernel is expected to be at C000'8000, entry C000'8000 +# (mem base + reserved) +# +# we load ourself to C108 '0000 + + +#Provide at least 16MB spacing between us and the Linux Kernel image +TEXT_BASE = 0xC1080000 diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c new file mode 100644 index 0000000..bb8cc3c --- /dev/null +++ b/board/davinci/da830evm/da830evm.c @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson(a)gefanuc.com> + * + * Base on code from TI. Original Notices follow: + * + * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ + * + * Modified for DA8xx EVM. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * ----------------------------------------------------------------- + * + * Copyright (C) 2004 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/io.h> +#include "../common/misc.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define pinmux &davinci_syscfg_regs->pinmux + +#ifdef CONFIG_SPI_FLASH +/* SPI0 pin muxer settings */ +const struct pinmux_config spi0_pins[] = { + { pinmux[7], 1, 3 }, + { pinmux[7], 1, 4 }, + { pinmux[7], 1, 5 }, + { pinmux[7], 1, 6 }, + { pinmux[7], 1, 7 } +}; +#endif + +/* UART pin muxer settings */ +const struct pinmux_config uart_pins[] = { + { pinmux[8], 2, 7 }, + { pinmux[9], 2, 0 } +}; + +/* I2C pin muxer settings */ +const struct pinmux_config i2c_pins[] = { + { pinmux[9], 2, 3 }, + { pinmux[9], 2, 4 } +}; + +int board_init(void) +{ +#ifndef CONFIG_USE_IRQ + /* + * Mask all IRQs by clearing the global enable and setting + * the enable clear for all the 90 interrupts. + */ + + writel(0, &davinci_aintc_regs->ger); + + writel(0, &davinci_aintc_regs->hier); + + writel(0xffffffff, &davinci_aintc_regs->ecr1); + writel(0xffffffff, &davinci_aintc_regs->ecr2); + writel(0xffffffff, &davinci_aintc_regs->ecr3); +#endif + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */ + lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */ + lpsc_on(DAVINCI_LPSC_EMAC); /* image download */ + lpsc_on(DAVINCI_LPSC_UART2); /* console */ + lpsc_on(DAVINCI_LPSC_GPIO); + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&davinci_syscfg_regs->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART2), + &davinci_syscfg_regs->suspsrc); + +#ifdef CONFIG_SPI_FLASH + if (davinci_configure_pin_mux(spi0_pins, ARRAY_SIZE(spi0_pins)) != 0) + return 1; +#endif + + if (davinci_configure_pin_mux(uart_pins, ARRAY_SIZE(uart_pins)) != 0) + return 1; + + if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0) + return 1; + + /* enable the console UART */ + writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | + DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart2_ctrl_regs->pwremu_mgmt); + + return(0); +}

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[U-Boot] [PATCH V5 2/4] add TI DA8xx support: Add DA8xx cpu functions
by Nick Thompson 12 Nov '09

12 Nov '09

From: Sekhar Nori <nsekhar(a)ti.com> Provides initial support for TI OMAP-L1x/DA8xx SoC devices. See http://www.ti.com Provides: Low level initialisation. System clock API. Timer control. Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti cpu/arm926ejs/davinci/cpu.c | 50 ++++++++++++++++++++++++++++++++++++++++++- cpu/arm926ejs/davinci/psc.c | 43 +++++++++++++++++++++++++++++------- 2 files changed, 83 insertions(+), 10 deletions(-) diff --git a/cpu/arm926ejs/davinci/cpu.c b/cpu/arm926ejs/davinci/cpu.c index 390cab8..fc3551c 100644 --- a/cpu/arm926ejs/davinci/cpu.c +++ b/cpu/arm926ejs/davinci/cpu.c @@ -23,7 +23,7 @@ #include <common.h> #include <netdev.h> #include <asm/arch/hardware.h> - +#include <asm/io.h> /* offsets from PLL controller base */ #define PLLC_PLLCTL 0x100 @@ -60,6 +60,54 @@ #define DDR_PLLDIV PLLC_PLLDIV1 #endif +#ifdef CONFIG_SOC_DA8XX +const dv_reg * const sysdiv[7] = { + &davinci_pllc_regs->plldiv1, &davinci_pllc_regs->plldiv2, + &davinci_pllc_regs->plldiv3, &davinci_pllc_regs->plldiv4, + &davinci_pllc_regs->plldiv5, &davinci_pllc_regs->plldiv6, + &davinci_pllc_regs->plldiv7 +}; + +int clk_get(enum davinci_clk_ids id) +{ + int pre_div; + int pllm; + int post_div; + int pll_out; + + pll_out = CONFIG_SYS_OSCIN_FREQ; + + if (id == DAVINCI_AUXCLK_CLKID) + goto out; + + /* + * Lets keep this simple. Combining operations can result in + * unexpected approximations + */ + pre_div = (readl(&davinci_pllc_regs->prediv) & + DAVINCI_PLLC_DIV_MASK) + 1; + pllm = readl(&davinci_pllc_regs->pllm) + 1; + + pll_out /= pre_div; + pll_out *= pllm; + + if (id == DAVINCI_PLLM_CLKID) + goto out; + + post_div = (readl(&davinci_pllc_regs->postdiv) & + DAVINCI_PLLC_DIV_MASK) + 1; + + pll_out /= post_div; + + if (id == DAVINCI_PLLC_CLKID) + goto out; + + pll_out /= (readl(sysdiv[id - 1]) & DAVINCI_PLLC_DIV_MASK) + 1; + +out: + return pll_out; +} +#endif /* CONFIG_SOC_DA8XX */ #ifdef CONFIG_DISPLAY_CPUINFO diff --git a/cpu/arm926ejs/davinci/psc.c b/cpu/arm926ejs/davinci/psc.c index 5bb972f..8273a7f 100644 --- a/cpu/arm926ejs/davinci/psc.c +++ b/cpu/arm926ejs/davinci/psc.c @@ -25,6 +25,7 @@ #include <common.h> #include <asm/arch/hardware.h> +#include <asm/io.h> /* * The PSC manages three inputs to a "module" which may be a peripheral or @@ -47,21 +48,45 @@ /* Works on Always On power domain only (no PD argument) */ void lpsc_on(unsigned int id) { - dv_reg_p mdstat, mdctl; + dv_reg_p mdstat, mdctl, ptstat, ptcmd; +#ifdef CONFIG_SOC_DA8XX + struct davinci_psc_regs *psc_regs; +#endif +#ifndef CONFIG_SOC_DA8XX if (id >= DAVINCI_LPSC_GEM) return; /* Don't work on DSP Power Domain */ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + ptstat = REG_P(PSC_PTSTAT); + ptcmd = REG_P(PSC_PTCMD); +#else + if (id < DAVINCI_LPSC_PSC1_BASE) { + if (id >= PSC_PSC0_MODULE_ID_CNT) + return; + psc_regs = davinci_psc0_regs; + mdstat = &psc_regs->psc0.mdstat[id]; + mdctl = &psc_regs->psc0.mdctl[id]; + } else { + id -= DAVINCI_LPSC_PSC1_BASE; + if (id >= PSC_PSC1_MODULE_ID_CNT) + return; + psc_regs = davinci_psc1_regs; + mdstat = &psc_regs->psc1.mdstat[id]; + mdctl = &psc_regs->psc1.mdctl[id]; + } + ptstat = &psc_regs->ptstat; + ptcmd = &psc_regs->ptcmd; +#endif - while (REG(PSC_PTSTAT) & 0x01) + while (readl(ptstat) & 0x01) continue; - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ + if ((readl(mdstat) & 0x1f) == 0x03) + return; /* Already on and enabled */ - *mdctl |= 0x03; + writel(readl(mdctl) | 0x03, mdctl); switch (id) { #ifdef CONFIG_SOC_DM644X @@ -80,16 +105,16 @@ void lpsc_on(unsigned int id) case DAVINCI_LPSC_MEMSTICK: case DAVINCI_LPSC_McBSP: case DAVINCI_LPSC_GPIO: - *mdctl |= 0x200; + writel(readl(mdctl) | 0x200, mdctl); break; #endif } - REG(PSC_PTCMD) = 0x01; + writel(0x01, ptcmd); - while (REG(PSC_PTSTAT) & 0x03) + while (readl(ptstat) & 0x01) continue; - while ((*mdstat & 0x1f) != 0x03) /* Probably an overkill... */ + while ((readl(mdstat) & 0x1f) != 0x03) continue; }

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[U-Boot] [PATCH V4] Davinci: add a pin multiplexer configuration API
by Nick Thompson 12 Nov '09

12 Nov '09

Davinci: add a pin multiplexer configuration API. Creates a method allowing pin settings to be logically grouped into data structure arrays and provides an API to configure the pinmux settings to enable the relevant pin functions. Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to: u-boot-ti Changes from last patch: Make example match current usage (in DA8xx code, to follow) Error check all pin settings before applying any changes Type correction The number of mux fields per register and the width of the fields needs to be set per SoC. The initial settings are appropriate for at least DA8xx devices. These should be modified in misc.h to support other devices as required. board/davinci/common/misc.c | 48 ++++++++++++++++++++++++++++++++++++++++++- board/davinci/common/misc.h | 12 ++++++++++ 2 files changed, 59 insertions(+), 1 deletions(-) diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index ffdc20b..9fab76f 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -1,6 +1,7 @@ /* * Miscelaneous DaVinci functions. * + * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson(a)gefanuc.com> * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> * Copyright (C) 2008 Lyrtech <www.lyrtech.com> * Copyright (C) 2004 Texas Instruments. @@ -27,7 +28,8 @@ #include <i2c.h> #include <net.h> #include <asm/arch/hardware.h> - +#include <asm/io.h> +#include "misc.h" DECLARE_GLOBAL_DATA_PTR; @@ -109,3 +111,47 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr) } #endif /* DAVINCI_EMAC */ + +/* + * Change the setting of a pin multiplexer field. + * + * Takes an array of pinmux settings similar to: + * + * struct pinmux_config uart_pins[] = { + * { &davinci_syscfg_regs->pinmux[8], 2, 7 }, + * { &davinci_syscfg_regs->pinmux[9], 2, 0 } + * }; + * + * Stepping through the array, each pinmux[n] register has the given value + * set in the pin mux field specified. + * + * The number of pins in the array must be passed (ARRAY_SIZE can provide + * this value conveniently). + * + * Returns 0 if all field numbers and values are in the correct range, + * else returns -1. + */ +int davinci_configure_pin_mux(const struct pinmux_config *pins, + const int n_pins) +{ + int i; + + /* check for invalid pinmux values */ + for (i = 0; i < n_pins; i++) { + if (pins[i].field >= PIN_MUX_NUM_FIELDS || + (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) + return -1; + } + + /* configure the pinmuxes */ + for (i = 0; i < n_pins; i++) { + const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; + const unsigned int value = pins[i].value << offset; + const unsigned int mask = PIN_MUX_FIELD_MASK << offset; + const dv_reg *mux = pins[i].mux; + + writel(value | (readl(mux) & (~mask)), mux); + } + + return 0; +} diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h index dc3cc41..f6d8b1b 100644 --- a/board/davinci/common/misc.h +++ b/board/davinci/common/misc.h @@ -22,8 +22,20 @@ #ifndef __MISC_H #define __MISC_H +/* pin muxer definitions */ +#define PIN_MUX_NUM_FIELDS 8 /* Per register */ +#define PIN_MUX_FIELD_SIZE 4 /* n in bits */ +#define PIN_MUX_FIELD_MASK ((1 << PIN_MUX_FIELD_SIZE) - 1) + +/* pin definition */ +struct pinmux_config { + dv_reg *mux; /* Address of mux register */ + unsigned char value; /* Value to set in field */ + unsigned char field; /* field number */ +}; int dvevm_read_mac_address(uint8_t *buf); void dv_configure_mac_address(uint8_t *rom_enetaddr); +int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins); #endif /* __MISC_H */

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[U-Boot] [PATCH v3] davinci timer.c: Remove volatiles and memory mapped structures
by Nick Thompson 12 Nov '09

12 Nov '09

Remove volatiles and memory mapped structure accesses and replace with readl and writel macro usage. Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- This patch was originally part of the da830 support patch, but this effort is now being integrated into davinci. As a result, these changes would be have been lost, as no change is required for da830. The changes where request to be kept available however, so here they are. cpu/arm926ejs/davinci/timer.c | 28 +++++++++++++++------------- 1 files changed, 15 insertions(+), 13 deletions(-) diff --git a/cpu/arm926ejs/davinci/timer.c b/cpu/arm926ejs/davinci/timer.c index 80751ad..7c2c208 100644 --- a/cpu/arm926ejs/davinci/timer.c +++ b/cpu/arm926ejs/davinci/timer.c @@ -38,8 +38,9 @@ */ #include <common.h> +#include <asm/io.h> -typedef volatile struct { +struct davinci_timer { u_int32_t pid12; u_int32_t emumgt; u_int32_t na1; @@ -51,9 +52,10 @@ typedef volatile struct { u_int32_t tcr; u_int32_t tgcr; u_int32_t wdtcr; -} davinci_timer; +}; -davinci_timer *timer = (davinci_timer *)CONFIG_SYS_TIMERBASE; +static struct davinci_timer * const timer = + (struct davinci_timer *)CONFIG_SYS_TIMERBASE; #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) #define TIM_CLK_DIV 16 @@ -64,30 +66,30 @@ static ulong lastinc; int timer_init(void) { /* We are using timer34 in unchained 32-bit mode, full speed */ - timer->tcr = 0x0; - timer->tgcr = 0x0; - timer->tgcr = 0x06 | ((TIM_CLK_DIV - 1) << 8); - timer->tim34 = 0x0; - timer->prd34 = TIMER_LOAD_VAL; + writel(0x0, &timer->tcr); + writel(0x0, &timer->tgcr); + writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr); + writel(0x0, &timer->tim34); + writel(TIMER_LOAD_VAL, &timer->prd34); lastinc = 0; timestamp = 0; - timer->tcr = 2 << 22; + writel(2 << 22, &timer->tcr); return(0); } void reset_timer(void) { - timer->tcr = 0x0; - timer->tim34 = 0; + writel(0x0, &timer->tcr); + writel(0x0, &timer->tim34); lastinc = 0; timestamp = 0; - timer->tcr = 2 << 22; + writel(2 << 22, &timer->tcr); } static ulong get_timer_raw(void) { - ulong now = timer->tim34; + ulong now = readl(&timer->tim34); if (now >= lastinc) { /* normal mode */

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