October 2009 - U-Boot

[U-Boot] [PATCH] mpc85xx: Fix booting on various boards
by Anton Vorontsov 16 Oct '09

16 Oct '09

commit 0e870980a64584a591af775bb9c9fe9450124df9 ("8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx") breaks U-Boot on various boards, namely the ones that call get_sys_info() from board_early_init_f(). get_sys_info() calls cpu_numcores(), which depends on probecpu() being called before. But probecpu() is called after board_early_init_f(), and so cpu_numcores() returns random values, which in turn crashes get_sys_info(). To fix the issue we place probecpu() before board_early_init_f() in an initialization sequence. Booting on the following boards should be revived now: mpc8540ads mpc8541cds mpc8548cds mpc8555cds mpc8560ads mpc8568mds mpc8569mds and maybe more. Signed-off-by: Anton Vorontsov <avorontsov(a)ru.mvista.com> --- lib_ppc/board.c | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 8b8ddb5..37f0db9 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -251,14 +251,12 @@ static int init_func_watchdog_reset (void) */ init_fnc_t *init_sequence[] = { - -#if defined(CONFIG_BOARD_EARLY_INIT_F) - board_early_init_f, -#endif - #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) probecpu, #endif +#if defined(CONFIG_BOARD_EARLY_INIT_F) + board_early_init_f, +#endif #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) get_clocks, /* get CPU and bus clocks (etc.) */ #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ -- 1.6.3.3

2 1

[U-Boot] Booting automatically a binary image
by Ivan Llopard 16 Oct '09

16 Oct '09

Hi list, I'd like to know how to configure u-boot in order to boot automatically a binary image, so when i reset my board i can get my program running. Regards, Ivan Llopard.

2 2

[U-Boot] Regarding NAND flash support in IMX31
by R Arun Kumar 16 Oct '09

16 Oct '09

Hai, After rechecking all the nand related code, I found that the register address definition is not proper in imx31_regs.h (there is one #if 0, which needs to be made #if 1) and found that the *addpart *and *nand -a *and *erase *are been working. But the file copy been not working, Any help The log *============================================ U-Boot 2.0.0-rc9 (Oct 16 2009 - 15:30:39) Board: Phytec phyCORE-i.MX31 NAND device: Manufacturer ID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB 3,3V 8-bi t) Scanning device for bad blocks got MAC address from EEPROM: 00:08:EE:01:86:71 mx31 cpu clock: 513MHz ipg clock : 64133247Hz Malloc space: 0x87b00000 -> 0x87f00000 (size 4 MB) Stack space : 0x87af8000 -> 0x87b00000 (size 32 kB) envfs: wrong magic on /dev/env0 no valid environment found on /dev/env0. Using default environment running /env/bin/init... Hit any key to stop autoboot: 5 type update_kernel nand|nor [<imagename>] to update kernel into flash type update_root nand|nor [<imagename>] to update rootfs into flash uboot:/ uboot:/ devinfo devices: |----cs0 |----mem |----nor0 | |----self0 | `----env0 |----nand0 | |----nand0.uboot | | `----nand0.uboot.bb | |----nand0.ubootenv | | `----nand0.ubootenv.bb | |----nand0.kernel | | `----nand0.kernel.bb | `----nand0.root | | `----nand0.root.bb |----eth0 |----phy0 |----ram0 |----defaultenv |----filesystem: / |----filesystem: /dev drivers: imx_serial partition smc911x miiphy nand_device imx_nand cfi_flash mem ram rom nand_bb ramfs devfs uboot:/ erase /dev/nand0.kernel.bb uboot:/ tftp uImage /dev/nand0.kernel.bb phy0: Link is up - 100/Full TFTP from server 192.168.50.247; our IP address is 192.168.50.182 Filename 'uImage'. Loading: #write: No space left on device uboot:/ ============================================ * R Arun Kumar

1 0

Re: [U-Boot] [PATCH 1/5] add TI da8xx support: new cpu directory
by Thompson, Nick (GE EntSol, Intelligent Platforms) 16 Oct '09

16 Oct '09

Resent due to wrapping in patch 1 (unwrapped patch 2 to follow, 3, 4 an 5 seem okay) Create initial contents of the cpu/arm926ejs/da8xx directory: Low level initilisation. Support for SoC clock, timer and reset functions. Signed-off-by: Nick Thompson <nick.thompson(a)gefanuc.com> --- Applies to u-boot-ti cpu/arm926ejs/da8xx/Makefile | 53 +++++++++++++ cpu/arm926ejs/da8xx/clock.c | 58 ++++++++++++++ cpu/arm926ejs/da8xx/lowlevel_init.S | 73 +++++++++++++++++ cpu/arm926ejs/da8xx/reset.S | 77 ++++++++++++++++++ cpu/arm926ejs/da8xx/timer.c | 148 +++++++++++++++++++++++++++++++++++ 5 files changed, 409 insertions(+), 0 deletions(-) diff --git a/cpu/arm926ejs/da8xx/Makefile b/cpu/arm926ejs/da8xx/Makefile new file mode 100644 index 0000000..76fb7b8 --- /dev/null +++ b/cpu/arm926ejs/da8xx/Makefile @@ -0,0 +1,53 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = timer.o clock.o +SOBJS = reset.o + +ifndef CONFIG_SKIP_LOWLEVEL_INIT +SOBJS += lowlevel_init.o +endif + +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +####################################################################### ## + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +####################################################################### ## diff --git a/cpu/arm926ejs/da8xx/clock.c b/cpu/arm926ejs/da8xx/clock.c new file mode 100644 index 0000000..25cf4df --- /dev/null +++ b/cpu/arm926ejs/da8xx/clock.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> + * + * DA8xx clock module + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ------------------------------------------------------------------------ ---- + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +dv_reg_p sysdiv[9] = { + REG_P(PLL0_DIV1), REG_P(PLL0_DIV2), REG_P(PLL0_DIV3), REG_P(PLL0_DIV4), + REG_P(PLL0_DIV5), REG_P(PLL0_DIV6), REG_P(PLL0_DIV7), REG_P(PLL0_DIV8), + REG_P(PLL0_DIV9) }; + +int clk_get(unsigned int id) +{ + int pre_div = (REG(PLL0_PREDIV) & 0xff) + 1; + int pllm = REG(PLL0_PLLM) + 1; + int post_div = (REG(PLL0_POSTDIV) & 0xff) + 1; + int pll_out = CONFIG_SYS_OSCIN_FREQ; + + if(id == DAVINCI_AUXCLK_CLKID) + goto out; + + /* Lets keep this simple. Combining operations can result in + * unexpected approximations + */ + pll_out /= pre_div; + pll_out *= pllm; + + if(id == DAVINCI_PLLM_CLKID) + goto out; + + pll_out /= post_div; + + if(id == DAVINCI_PLLC_CLKID) + goto out; + + pll_out /= (REG(sysdiv[id - 1]) & 0xff) + 1; + +out: + return pll_out; +} diff --git a/cpu/arm926ejs/da8xx/lowlevel_init.S b/cpu/arm926ejs/da8xx/lowlevel_init.S new file mode 100644 index 0000000..53f801a --- /dev/null +++ b/cpu/arm926ejs/da8xx/lowlevel_init.S @@ -0,0 +1,73 @@ +/* + * Low-level board setup code for TI DA8xx SoC based boards. + * + * Copyright (C) 2008 Texas Instruments, Inc <www.ti.com> + * Sekhar Nori <nsekhar(a)ti.com> + * + * Based on TI DaVinci low level init code. Original copyrights follow. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Partially based on TI sources, original copyrights follow: + */ + +/* + * Board specific setup info + * + * (C) Copyright 2003 + * Texas Instruments, <www.ti.com> + * Kshitij Gupta <Kshitij(a)ti.com> + * + * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004 + * + * Modified for OMAP 5912 OSK board by Rishi Bhattacharya, Apr 2004 + * See file CREDITS for list of people who contributed to this + * project. + * + * Modified for DV-EVM board by Rishi Bhattacharya, Apr 2005 + * See file CREDITS for list of people who contributed to this + * project. + * + * Modified for DV-EVM board by Swaminathan S, Nov 2005 + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/arch/hardware.h> + +.globl lowlevel_init +lowlevel_init: + + /* + * Call board-specific lowlevel init. + * That MUST be present and THAT returns + * back to arch calling code with "mov pc, lr." + */ + b dv_board_init + nop + +.ltorg + +INTC_GLB_EN_ADDR: + .word INTC_GLB_EN +INTC_EN_CLR0_ADDR: + .word INTC_EN_CLR0 +INTC_HINT_EN_ADDR: + .word INTC_HINT_EN + diff --git a/cpu/arm926ejs/da8xx/reset.S b/cpu/arm926ejs/da8xx/reset.S new file mode 100644 index 0000000..a687d44 --- /dev/null +++ b/cpu/arm926ejs/da8xx/reset.S @@ -0,0 +1,77 @@ +/* + * Processor reset using WDT for TI TMS320DM644x SoC. + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * ----------------------------------------------------- + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.globl reset_cpu +reset_cpu: + ldr r0, WDT_TGCR + mov r1, $0x08 + str r1, [r0] + ldr r1, [r0] + orr r1, r1, $0x03 + str r1, [r0] + mov r1, $0 + ldr r0, WDT_TIM12 + str r1, [r0] + ldr r0, WDT_TIM34 + str r1, [r0] + ldr r0, WDT_PRD12 + str r1, [r0] + ldr r0, WDT_PRD34 + str r1, [r0] + ldr r0, WDT_TCR + ldr r1, [r0] + orr r1, r1, $0x40 + str r1, [r0] + ldr r0, WDT_WDTCR + ldr r1, [r0] + orr r1, r1, $0x4000 + str r1, [r0] + ldr r1, WDTCR_VAL1 + str r1, [r0] + ldr r1, WDTCR_VAL2 + str r1, [r0] + nop + nop + nop + nop +reset_cpu_loop: + b reset_cpu_loop + +WDT_TGCR: + .word 0x01c21c24 +WDT_TIM12: + .word 0x01c21c10 +WDT_TIM34: + .word 0x01c21c14 +WDT_PRD12: + .word 0x01c21c18 +WDT_PRD34: + .word 0x01c21c1c +WDT_TCR: + .word 0x01c21c20 +WDT_WDTCR: + .word 0x01c21c28 +WDTCR_VAL1: + .word 0xa5c64000 +WDTCR_VAL2: + .word 0xda7e4000 diff --git a/cpu/arm926ejs/da8xx/timer.c b/cpu/arm926ejs/da8xx/timer.c new file mode 100644 index 0000000..728167a --- /dev/null +++ b/cpu/arm926ejs/da8xx/timer.c @@ -0,0 +1,148 @@ +/* + * (C) Copyright 2003 + * Texas Instruments <www.ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger(a)sysgo.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu(a)sysgo.de> + * + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> + * + * (C) Copyright 2004 + * Philippe Robin, ARM Ltd. <philippe.robin(a)arm.com> + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +/* #include <arm926ejs.h> */ + +typedef volatile struct { + u_int32_t pid12; + u_int32_t emumgt; + u_int32_t na1; + u_int32_t na2; + u_int32_t tim12; + u_int32_t tim34; + u_int32_t prd12; + u_int32_t prd34; + u_int32_t tcr; + u_int32_t tgcr; + u_int32_t wdtcr; +} davinci_timer; + +davinci_timer *timer = (davinci_timer *)CONFIG_SYS_TIMERBASE; + +#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) +#define TIM_CLK_DIV 16 + +static ulong timestamp; +static ulong lastinc; + +int timer_init(void) +{ + /* We are using timer34 in unchained 32-bit mode, full speed */ + timer->tcr = 0x0; + timer->tgcr = 0x0; + timer->tgcr = 0x06 | ((TIM_CLK_DIV - 1) << 8); + timer->tim34 = 0x0; + timer->prd34 = TIMER_LOAD_VAL; + lastinc = 0; + timestamp = 0; + timer->tcr = 2 << 22; + + return(0); +} + +void reset_timer(void) +{ + timer->tcr = 0x0; + timer->tim34 = 0; + lastinc = 0; + timestamp = 0; + timer->tcr = 2 << 22; +} + +static ulong get_timer_raw(void) +{ + ulong now = timer->tim34; + + if (now >= lastinc) { + /* normal mode */ + timestamp += now - lastinc; + } else { + /* overflow ... */ + timestamp += now + TIMER_LOAD_VAL - lastinc; + } + lastinc = now; + return timestamp; +} + +ulong get_timer(ulong base) +{ + return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base); +} + +void set_timer(ulong t) +{ + timestamp = t; +} + +void udelay(unsigned long usec) +{ + ulong tmo; + ulong endtime; + signed long diff; + + tmo = CONFIG_SYS_HZ_CLOCK / 1000; + tmo *= usec; + tmo /= (1000 * TIM_CLK_DIV); + + endtime = get_timer_raw() + tmo; + + do { + ulong now = get_timer_raw(); + diff = endtime - now; + } while (diff >= 0); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return(get_timer(0)); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +}

1 0

[U-Boot] [PATCH] ppc4xx: Update flash size in reg property of the NOR flash node
by Stefan Roese 16 Oct '09

16 Oct '09

Till now only the ranges in the ebc node are updated with the values currently configured in the PPC4xx EBC controller. With this patch now the NOR flash size is updated in the device tree blob as well. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Wolfgang Denk <wd(a)denx.de> --- cpu/ppc4xx/fdt.c | 33 ++++++++++++++++++++++++++++++--- 1 files changed, 30 insertions(+), 3 deletions(-) diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index 496e028..adf9d87 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -43,9 +43,19 @@ void __ft_board_setup(void *blob, bd_t *bd) u32 ranges[EBC_NUM_BANKS * 4]; u32 *p = ranges; char *ebc_path = "/plb/opb/ebc"; + char nor_path[16]; + char path[32]; + u32 *reg; + int offset; + int len; + struct fdt_property *prop; ft_cpu_setup(blob, bd); + /* Some 405 PPC's have EBC as direct PLB child in the dts */ + if (fdt_path_offset(blob, ebc_path) < 0) + strcpy(ebc_path, "/plb/ebc"); + /* * Read 4xx EBC bus bridge registers to get mappings of the * peripheral banks into the OPB/PLB address space @@ -59,12 +69,29 @@ void __ft_board_setup(void *blob, bd_t *bd) *p++ = 0; *p++ = bxcr & EBC_BXCR_BAS_MASK; *p++ = EBC_BXCR_BANK_SIZE(bxcr); + + /* Try to update reg property in nor flash node too */ + strcpy(path, ebc_path); + sprintf(nor_path, "/nor_flash@%d,0", i); + strcat(path, nor_path); + offset = fdt_path_offset(blob, path); + prop = fdt_get_property_w(blob, offset, "reg", &len); + /* if prop == NULL then this is no NOR FLASH node */ + if (prop == NULL) + continue; + + reg = (u32 *)&prop->data[0]; + reg[2] = EBC_BXCR_BANK_SIZE(bxcr); + rc = fdt_find_and_setprop(blob, path, "reg", reg, + 3 * sizeof(u32), 1); + if (rc) { + printf("Unable to update property NOR mappings" + ", err=%s\n", fdt_strerror(rc)); + continue; + } } } - /* Some 405 PPC's have EBC as direct PLB child in the dts */ - if (fdt_path_offset(blob, "/plb/opb/ebc") < 0) - strcpy(ebc_path, "/plb/ebc"); rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges, (p - ranges) * sizeof(u32), 1); if (rc) { -- 1.6.4.4

1 0

[U-Boot] [PATCH] sh: r7780mp: Update config
by Nobuhiro Iwamatsu 16 Oct '09

16 Oct '09

Enabled CONFIG_NET_MULTI. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> --- include/configs/r7780mp.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 71c570e..0701fa3 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -150,8 +150,8 @@ #endif /* CONFIG_CMD_PCI */ #if defined(CONFIG_CMD_NET) -/* #define CONFIG_NET_MULTI +/* #define CONFIG_RTL8169 */ /* AX88796L Support(NE2000 base chip) */ -- 1.6.4.3

2 2

[U-Boot] [PATCH] Add mkimage manual
by Nobuhiro Iwamatsu 16 Oct '09

16 Oct '09

As for some distribution, a mkimage command is made a package. However, there was not manual of mkimage. This provides manual of mkimage. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- tools/mkimage.1 | 124 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 124 insertions(+), 0 deletions(-) create mode 100644 tools/mkimage.1 diff --git a/tools/mkimage.1 b/tools/mkimage.1 new file mode 100644 index 0000000..7b540c0 --- /dev/null +++ b/tools/mkimage.1 @@ -0,0 +1,124 @@ +.TH MKIMAGE 1 "2009-02-06" + +.SH NAME +mkimage \- generate kernel image for U-Boot +.SH SYNOPSIS +.B mkimage +.RB [\fIoptions\fP] +.SH "DESCRIPTION" +.B mkimage +can also be used to create ramdisk images for use with U-Boot, either +separated from the Linux kernel image, or combined into one file. +mkimage encapsulates the images with a 64 byte header containing information +about target architecture, operating system, image type, compression method, +entry points, time stamp, CRC32 checksums, etc. + +.SH "MKIMAGE OPTIONS" + +.TP +.BI "\-l [" "uimage file name" "]" +mkimage lists the information contained in the header of an existing U-Boot image. + +.TP +.BI "\-A [" "architecture" "]" +Set architecture. +You can set the following architecture. +.br +\fBalpha\fR, +\fBarm\fR, +\fBx86\fR, +\fBia64\fR, +\fBm68k\fR, +\fBmicroblaze\fR, +\fBmips\fR, +\fBmips64\fR, +\fBppc\fR, +\fBs390\fR, +\fBsh\fR, +\fBsparc\fR, +\fBsparc64\fR. + +.TP +.BI "\-O [" "os" "]" +Set operating system. bootm command of u-boot changes boot method by os type. +.br +You can set the following OS. +.br +\fB4_4bsd\fR, +\fBartos\fR, +\fBdell\fR, +\fBesix\fR, +\fBfreebsd\fR, +\fBirix\fR, +\fBlinux\fR, +\fBlynxos\fR, +\fBncr\fR, +\fBnetbsd\fR, +\fBopenbsd\fR, +\fBpsos\fR, +\fBqnx\fR, +\fBrtems\fR, +\fBsco\fR, +\fBsolaris\fR, +\fBsvr4\fR, +\fBuboot\fR, +\fBvxworks\fR. +.br + +.TP +.BI "\-T [" "image type" "]" +Set image type. +.br +You can set the following type. +.br +bootm and autoscr command of u-boot check this type. +.br +\fBfilesystem\fR, +\fBfirmware\fR, +\fBkernel\fR, +\fBmulti\fR, +\fBramdisk\fR, +\fBscript\fR, +\fBstandalone\fR. +.br + +.TP +.BI "\-C [" "compression type" "]" +Set compression type. +.br +You can set the following type. +.br +\fBnone\fR, +\fBbzip2\fR, +\fBgzip\fR. + +.TP +.BI "\-a [" "load addess" "]" +Set load address by hex digit. + +.TP +.BI "\-e [" "entry point" "]" +Set entry point by hex digit. + +.TP +.BI "\-n [" "image name" "]" +Set image name. + +.TP +.BI "\-d [" "image data file" "]" +See image data file. + +.TP +.BI "\-x" +Set XIP (execute in place) flag. + +.SH HOMEPAGE +http://www.denx.de/wiki/U-Boot/WebHome +.PP +.SH AUTHOR +This manual page was written by Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org>, +for the Debian GNU/Linux system (but may be used by others). + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU General Public License, Version 2 any later +version published by the Free Software Foundation. -- 1.6.4.3

2 2

[U-Boot] Regarding NAND flash support in IMX31
by R Arun Kumar 16 Oct '09

16 Oct '09

Hai I am trying to port U-boot 2.0.0 for my custom imx31 board and I am able to boot and load linux etc successfully. I want to add NAND flash support and it is observed that the NAND flash is been detected but with lot of "Bad erase block messages" Please help Arun ========================================= U-Boot 2.0.0-rc9 (Oct 14 2009 - 12:03:04) Board: Phytec phyCORE-i.MX31 *NAND device: Manufacturer ID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB 3,3V 8-bi t)* Scanning device for bad blocks *Bad erase block at .... Bad erase block at .... Bad erase block at .... Bad erase block at .... Bad erase block at .... Bad erase block at .... Bad erase block at .... * got MAC address from EEPROM: 00:08:EE:01:86:71 mx31 cpu clock: 513MHz ipg clock : 64133247Hz Malloc space: 0x87b00000 -> 0x87f00000 (size 4 MB) Stack space : 0x87af8000 -> 0x87b00000 (size 32 kB) Open /dev/env0 No such file or directory no valid environment found on /dev/env0. Using default environment running /env/bin/init... Hit any key to stop autoboot: 5 type update_kernel nand|nor [<imagename>] to update kernel into flash type update_root nand|nor [<imagename>] to update rootfs into flash uboot:/ =======================================================

2 4

[U-Boot] [PATCH] Remove malloc_bin_reloc from lib_sh, lib_nios2 and lib_nios.
by Nobuhiro Iwamatsu 16 Oct '09

16 Oct '09

By "arm/microblaze/nios/nios2/sh: Remove relocation fixups" (commit: 0630535e2d062dd73c1ceca5c6125c86d1127a49", doesn't need malloc_bin_reloc function. This commit remove this. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- lib_nios/board.c | 2 -- lib_nios2/board.c | 2 -- lib_sh/board.c | 2 -- 3 files changed, 0 insertions(+), 6 deletions(-) diff --git a/lib_nios/board.c b/lib_nios/board.c index 72713a8..5d2fb2e 100644 --- a/lib_nios/board.c +++ b/lib_nios/board.c @@ -49,7 +49,6 @@ DECLARE_GLOBAL_DATA_PTR; */ -extern void malloc_bin_reloc (void); typedef int (init_fnc_t) (void); @@ -115,7 +114,6 @@ void board_init (void) /* The Malloc area is immediately below the monitor copy in RAM */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - malloc_bin_reloc(); WATCHDOG_RESET (); bd->bi_flashsize = flash_init(); diff --git a/lib_nios2/board.c b/lib_nios2/board.c index c6b36f4..008f04f 100644 --- a/lib_nios2/board.c +++ b/lib_nios2/board.c @@ -52,7 +52,6 @@ DECLARE_GLOBAL_DATA_PTR; */ -extern void malloc_bin_reloc (void); typedef int (init_fnc_t) (void); @@ -121,7 +120,6 @@ void board_init (void) /* The Malloc area is immediately below the monitor copy in RAM */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - malloc_bin_reloc(); WATCHDOG_RESET (); bd->bi_flashsize = flash_init(); diff --git a/lib_sh/board.c b/lib_sh/board.c index 5ed40e9..c97e20c 100644 --- a/lib_sh/board.c +++ b/lib_sh/board.c @@ -32,7 +32,6 @@ #include <miiphy.h> #endif -extern void malloc_bin_reloc (void); extern int cpu_init(void); extern int board_init(void); extern int dram_init(void); @@ -92,7 +91,6 @@ static int sh_mem_env_init(void) { mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16); - malloc_bin_reloc(); env_relocate(); jumptable_init(); return 0; -- 1.6.4.3

1 0

[U-Boot] [PATCH] sh: Remove malloc_bin_reloc from SH
by Nobuhiro Iwamatsu 16 Oct '09

16 Oct '09

By "arm/microblaze/nios/nios2/sh: Remove relocation fixups" (commit: 0630535e2d062dd73c1ceca5c6125c86d1127a49", doesn't need malloc_bin_reloc function. This commit remove this. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com> --- lib_sh/board.c | 2 -- lib_sh/config.mk | 2 +- 2 files changed, 1 insertions(+), 3 deletions(-) diff --git a/lib_sh/board.c b/lib_sh/board.c index 5ed40e9..c97e20c 100644 --- a/lib_sh/board.c +++ b/lib_sh/board.c @@ -32,7 +32,6 @@ #include <miiphy.h> #endif -extern void malloc_bin_reloc (void); extern int cpu_init(void); extern int board_init(void); extern int dram_init(void); @@ -92,7 +91,6 @@ static int sh_mem_env_init(void) { mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16); - malloc_bin_reloc(); env_relocate(); jumptable_init(); return 0; -- 1.6.4.3

2 2