August 2008 - U-Boot

[U-Boot] [PATCH][for 1.3.4] Fix fallout from autostart revert
by Kumar Gala 12 Aug '08

12 Aug '08

The autostart revert caused a bit of duplicated code as well as code that was using images->autostart that needs to get removed so we can build again. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- common/cmd_bootm.c | 5 ++--- common/image.c | 17 ----------------- lib_arm/bootm.c | 6 +----- lib_avr32/bootm.c | 6 +----- lib_blackfin/bootm.c | 6 +----- lib_i386/bootm.c | 6 +----- lib_m68k/bootm.c | 5 +---- lib_microblaze/bootm.c | 6 +----- lib_mips/bootm.c | 6 +----- lib_nios2/bootm.c | 6 +----- lib_ppc/bootm.c | 5 +---- lib_sh/bootm.c | 6 +----- lib_sparc/bootm.c | 6 +----- 13 files changed, 13 insertions(+), 73 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 2dffdfa..5295969 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -361,10 +361,9 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) show_boot_progress (-9); #ifdef DEBUG puts ("\n## Control returned to monitor - resetting...\n"); - if (images.autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); #endif - if (!images.autostart && iflag) + if (iflag) enable_interrupts(); return 1; diff --git a/common/image.c b/common/image.c index 1807348..6d2ce32 100644 --- a/common/image.c +++ b/common/image.c @@ -189,23 +189,6 @@ int image_check_dcrc (image_header_t *hdr) return (dcrc == image_get_dcrc (hdr)); } -void memmove_wd (void *to, void *from, size_t len, ulong chunksz) -{ -#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) - while (len > 0) { - size_t tail = (len > chunksz) ? chunksz : len; - WATCHDOG_RESET (); - memmove (to, from, tail); - to += tail; - from += tail; - len -= tail; - } -#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */ - memmove (to, from, len); -#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */ -} -#endif /* USE_HOSTCC */ - /** * image_multi_count - get component (sub-image) count * @hdr: pointer to the header of the multi component image diff --git a/lib_arm/bootm.c b/lib_arm/bootm.c index b838c37..955a1ae 100644 --- a/lib_arm/bootm.c +++ b/lib_arm/bootm.c @@ -137,9 +137,6 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], setup_end_tag (bd); #endif - if (!images->autostart) - return ; - /* we assume that the kernel is in place */ printf ("\nStarting kernel ...\n\n"); @@ -157,8 +154,7 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_avr32/bootm.c b/lib_avr32/bootm.c index 5ff8c79..60e6b36 100644 --- a/lib_avr32/bootm.c +++ b/lib_avr32/bootm.c @@ -221,9 +221,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], params = setup_ethernet_tags(params); setup_end_tag(params); - if (!images->autostart) - return ; - printf("\nStarting kernel at %p (params at %p)...\n\n", theKernel, params_start); @@ -234,7 +231,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_blackfin/bootm.c b/lib_blackfin/bootm.c index ef4b112..54f69a9 100644 --- a/lib_blackfin/bootm.c +++ b/lib_blackfin/bootm.c @@ -40,9 +40,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], char *cmdline; ulong ep = 0; - if (!images->autostart) - return; - #ifdef SHARED_RESOURCES swap_to(FLASH); #endif @@ -74,6 +71,5 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); } diff --git a/lib_i386/bootm.c b/lib_i386/bootm.c index d959107..452eef7 100644 --- a/lib_i386/bootm.c +++ b/lib_i386/bootm.c @@ -84,9 +84,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], } - if (!images->autostart) - return ; - #ifdef DEBUG printf ("## Transferring control to Linux (at address %08x) ...\n", (u32)base_ptr); @@ -100,7 +97,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_m68k/bootm.c b/lib_m68k/bootm.c index 61f1a36..b45203d 100644 --- a/lib_m68k/bootm.c +++ b/lib_m68k/bootm.c @@ -129,8 +129,6 @@ void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, show_boot_progress (15); - if (!images->autostart) - return; /* * Linux Kernel Parameters (passing board info data): * r3: ptr to board info data @@ -144,8 +142,7 @@ void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, return ; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return ; } diff --git a/lib_microblaze/bootm.c b/lib_microblaze/bootm.c index 30a03ef..68edcdb 100644 --- a/lib_microblaze/bootm.c +++ b/lib_microblaze/bootm.c @@ -67,15 +67,11 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], (ulong) theKernel); #endif - if (!images->autostart) - return ; - theKernel (commandline); /* does not return */ return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_mips/bootm.c b/lib_mips/bootm.c index 5c46a5a..53e8e19 100644 --- a/lib_mips/bootm.c +++ b/lib_mips/bootm.c @@ -120,9 +120,6 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], linux_env_set("eth1addr", cp); } - if (!images->autostart) - return ; - /* we assume that the kernel is in place */ printf ("\nStarting kernel ...\n\n"); @@ -131,8 +128,7 @@ void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_nios2/bootm.c b/lib_nios2/bootm.c index 01f4e87..18cf773 100644 --- a/lib_nios2/bootm.c +++ b/lib_nios2/bootm.c @@ -50,9 +50,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], } void (*kernel)(void) = (void (*)(void))ep; - if (!images->autostart) - return ; - /* For now we assume the Microtronix linux ... which only * needs to be called ;-) */ @@ -61,7 +58,6 @@ void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c index 81803dd..cbe5592 100644 --- a/lib_ppc/bootm.c +++ b/lib_ppc/bootm.c @@ -277,8 +277,6 @@ do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], #if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) unlock_ram_in_cache(); #endif - if (!images->autostart) - return ; #if defined(CONFIG_OF_LIBFDT) if (of_flat_tree) { /* device tree; boot new style */ @@ -311,8 +309,7 @@ do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return ; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return ; } diff --git a/lib_sh/bootm.c b/lib_sh/bootm.c index dd32a3e..4ee7ff3 100644 --- a/lib_sh/bootm.c +++ b/lib_sh/bootm.c @@ -83,9 +83,6 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], } void (*kernel) (void) = (void (*)(void))ep; - if (!images->autostart) - return ; - /* Setup parameters */ memset(PARAM, 0, 0x1000); /* Clear zero page */ strcpy(COMMAND_LINE, bootargs); @@ -95,7 +92,6 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], return; error: - if (images->autostart) - do_reset (cmdtp, flag, argc, argv); + do_reset (cmdtp, flag, argc, argv); return; } diff --git a/lib_sparc/bootm.c b/lib_sparc/bootm.c index 8900b2e..b1a3d98 100644 --- a/lib_sparc/bootm.c +++ b/lib_sparc/bootm.c @@ -204,9 +204,6 @@ void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], bootargs = getenv("bootargs"); prepare_bootargs(bootargs); - if (!images->autostart) - return; - /* turn on mmu & setup context table & page table for process 0 (kernel) */ srmmu_init_cpu((unsigned int)kernel); @@ -220,7 +217,6 @@ void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], while (1) ; error: - if (images->autostart) - do_reset(cmdtp, flag, argc, argv); + do_reset(cmdtp, flag, argc, argv); return; } -- 1.5.5.1

2 1

[U-Boot] [PATCH][for 1.3.4] Fix compile error related to r8a66597-hcd & usb
by Kumar Gala 12 Aug '08

12 Aug '08

When building the 8544DS board we get this error: In file included from r8a66597-hcd.c:22: u-boot/include/usb.h:190:2: error: #error USB Lowlevel not defined make[1]: *** [r8a66597-hcd.o] Error 1 The cleanest fix is to only build r8a66597-hcd.c if CONFIG_USB_R8A66597_HCD is set. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- drivers/usb/Makefile | 3 ++- drivers/usb/r8a66597-hcd.c | 5 ----- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index 2bdbb59..c67a490 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -25,10 +25,11 @@ include $(TOPDIR)/config.mk LIB := $(obj)libusb.a +COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o + COBJS-y += isp116x-hcd.o COBJS-y += sl811_usb.o COBJS-y += usb_ohci.o -COBJS-y += r8a66597-hcd.o COBJS-y += usbdcore.o COBJS-y += usbdcore_ep0.o COBJS-y += usbdcore_mpc8xx.o diff --git a/drivers/usb/r8a66597-hcd.c b/drivers/usb/r8a66597-hcd.c index 3eb4cb0..0d3931e 100644 --- a/drivers/usb/r8a66597-hcd.c +++ b/drivers/usb/r8a66597-hcd.c @@ -24,8 +24,6 @@ #include "r8a66597.h" -#if defined(CONFIG_USB_R8A66597_HCD) - #ifdef R8A66597_DEBUG #define R8A66597_DPRINT printf #else @@ -919,6 +917,3 @@ int usb_lowlevel_stop(void) return 0; } - -#endif /* CONFIG_USB_R8A66597_HCD */ - -- 1.5.5.1

2 1

[U-Boot-Users] [PATCH 1/3] ppc: Report back the location we put the device tree if we dont boot
by Kumar Gala 11 Aug '08

11 Aug '08

Its useful to know where the device tree is if we have set 'autostart' to 'no. We come back to the prompt after a boot command and we can than post process the device tree but we need to know where it was put report this back via the env variable 'bootm_fdtaddr'. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- lib_ppc/bootm.c | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c index 81803dd..a872d31 100644 --- a/lib_ppc/bootm.c +++ b/lib_ppc/bootm.c @@ -277,8 +277,17 @@ do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], #if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) unlock_ram_in_cache(); #endif - if (!images->autostart) + if (!images->autostart) { +#if defined(CONFIG_OF_LIBFDT) + if (of_flat_tree) { + char buf[32]; + + sprintf (buf, "%llx", (u64)(u32)of_flat_tree); + setenv("bootm_fdtaddr", buf); + } +#endif return ; + } #if defined(CONFIG_OF_LIBFDT) if (of_flat_tree) { /* device tree; boot new style */ -- 1.5.5.1

3 11

[U-Boot-Users] [PATCH v2 1/2] i.MX31: Fix IOMUX related typos
by Magnus Lilja 11 Aug '08

11 Aug '08

Correct the names of some IOMUX macros. Signed-off-by: Magnus Lilja <lilja.magnus(a)gmail.com> --- No changes from first version. board/imx31_litekit/imx31_litekit.c | 2 +- board/imx31_phycore/imx31_phycore.c | 4 ++-- board/mx31ads/mx31ads.c | 2 +- include/asm-arm/arch-mx31/mx31-regs.h | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/imx31_litekit/imx31_litekit.c b/board/imx31_litekit/imx31_litekit.c index 263dd9f..8cbc26e 100644 --- a/board/imx31_litekit/imx31_litekit.c +++ b/board/imx31_litekit/imx31_litekit.c @@ -50,7 +50,7 @@ int board_init (void) mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); /* SPI2 */ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2); diff --git a/board/imx31_phycore/imx31_phycore.c b/board/imx31_phycore/imx31_phycore.c index 42ecb1e..ae93444 100644 --- a/board/imx31_phycore/imx31_phycore.c +++ b/board/imx31_phycore/imx31_phycore.c @@ -54,11 +54,11 @@ int board_init (void) mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); /* setup pins for I2C2 (for EEPROM, RTC) */ mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL); - mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SCL); + mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SDA); gd->bd->bi_arch_number = 447; /* board id for linux */ gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */ diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c index dd0e150..b6928fc 100644 --- a/board/mx31ads/mx31ads.c +++ b/board/mx31ads/mx31ads.c @@ -55,7 +55,7 @@ int board_init (void) mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); /* SPI2 */ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2); diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index 02b7dcb..abe61f0 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -133,10 +133,10 @@ #define MUX_RXD1__UART1_RXD_MUX ((MUX_CTL_FUNC << 8) | MUX_CTL_RXD1) #define MUX_TXD1__UART1_TXD_MUX ((MUX_CTL_FUNC << 8) | MUX_CTL_TXD1) #define MUX_RTS1__UART1_RTS_B ((MUX_CTL_FUNC << 8) | MUX_CTL_RTS1) -#define MUX_RTS1__UART1_CTS_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CTS1) +#define MUX_CTS1__UART1_CTS_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CTS1) #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI) -#define MUX_CSPI2_MISO__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO) +#define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO) /* * Memory regions and CS

2 1

[U-Boot-Users] [PATCH] Fill in remaining MTD driver data for OneNAND (take #2)
by Fathi BOUDRA 11 Aug '08

11 Aug '08

Fill in remaining MTD driver data for OneNAND. Review onenand_print_device_info(): - Return device info to fill mtd device name. - Remove verbose parameter as it become useless. Since last comments: - Include malloc.h - Initialize dev_info pointer. Signed-off-by: Fathi Boudra <fabo(a)debian.org> --- diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c index ce99a38..c9a0627 100644 --- a/common/cmd_onenand.c +++ b/common/cmd_onenand.c @@ -38,7 +38,7 @@ int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) onenand_init(); return 0; } - onenand_print_device_info(onenand_chip.device_id, 1); + printf("%s\n", onenand_mtd.name); return 0; default: diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index d32e382..8d76724 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -19,6 +19,7 @@ #include <asm/io.h> #include <asm/errno.h> +#include <malloc.h> /* It should access 16-bit instead of 8-bit */ static inline void *memcpy_16(void *dst, const void *src, unsigned int len) @@ -1112,21 +1113,21 @@ int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) * * Print device ID */ -void onenand_print_device_info(int device, int verbose) +char * onenand_print_device_info(int device) { int vcc, demuxed, ddp, density; - - if (!verbose) - return; + char *dev_info = (char *)malloc(80); vcc = device & ONENAND_DEVICE_VCC_MASK; demuxed = device & ONENAND_DEVICE_IS_DEMUX; ddp = device & ONENAND_DEVICE_IS_DDP; density = device >> ONENAND_DEVICE_DENSITY_SHIFT; - printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", + sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)", demuxed ? "" : "Muxed ", ddp ? "(DDP)" : "", (16 << density), vcc ? "2.65/3.3" : "1.8", device); + + return dev_info; } static const struct onenand_manufacturers onenand_manuf_ids[] = { @@ -1205,7 +1206,7 @@ static int onenand_probe(struct mtd_info *mtd) } /* Flash device information */ - onenand_print_device_info(dev_id, 0); + mtd->name = onenand_print_device_info(dev_id); this->device_id = dev_id; density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; @@ -1241,6 +1242,18 @@ static int onenand_probe(struct mtd_info *mtd) this->options |= ONENAND_CONT_LOCK; } + /* Fill in remaining MTD driver data */ + mtd->erase = onenand_erase; + mtd->read = onenand_read; + mtd->write = onenand_write; + mtd->read_ecc = onenand_read_ecc; + mtd->write_ecc = onenand_write_ecc; + mtd->read_oob = onenand_read_oob; + mtd->write_oob = onenand_write_oob; + mtd->sync = onenand_sync; + mtd->block_isbad = onenand_block_isbad; + mtd->block_markbad = onenand_block_markbad; + return 0; } diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h index 4449f98..cb7914d 100644 --- a/include/onenand_uboot.h +++ b/include/onenand_uboot.h @@ -39,6 +39,6 @@ extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr); extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); -extern void onenand_print_device_info(int device, int verbose); +extern char * onenand_print_device_info(int device); #endif /* __UBOOT_ONENAND_H */

3 3

[U-Boot] [PATCH] OneNAND: Remove unused parameters to onenand_verify_page
by dirk.behme＠googlemail.com 11 Aug '08

11 Aug '08

From: Steve Sakoman <steve(a)sakoman.com> The block and page parameters of onenand_verify_page() are not used. This causes a compiler error when CONFIG_MTD_ONENAND_VERIFY_WRITE is enabled. Signed-off-by: Steve Sakoman <steve(a)sakoman.com> Signed-off-by: Dirk Behme <dirk.behme(a)gmail.com> --- Index: foo/drivers/mtd/onenand/onenand_base.c =================================================================== --- foo.orig/drivers/mtd/onenand/onenand_base.c +++ foo/drivers/mtd/onenand/onenand_base.c @@ -680,13 +680,11 @@ int onenand_read_oob(struct mtd_info *mt * onenand_verify_page - [GENERIC] verify the chip contents after a write * @param mtd MTD device structure * @param buf the databuffer to verify - * @param block block address - * @param page page address * * Check DataRAM area directly */ static int onenand_verify_page(struct mtd_info *mtd, u_char * buf, - loff_t addr, int block, int page) + loff_t addr) { struct onenand_chip *this = mtd->priv; void __iomem *dataram0, *dataram1; @@ -783,7 +781,7 @@ static int onenand_write_ecc(struct mtd_ written += thislen; /* Only check verify write turn on */ - ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page); + ret = onenand_verify_page(mtd, (u_char *) buf, to); if (ret) { MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);

2 1

[U-Boot] __attribute__((__packed__)) switching to byte-access on ARM
by Guennadi Liakhovetski 11 Aug '08

11 Aug '08

Hi As I remarked in the opening email to the SMDK6400 patch-series, I've got a strange problem, I cannot understand. Here're the c-code: typedef struct { volatile u32 TCNTB; volatile u32 TCMPB; volatile u32 TCNTO; } s3c64xx_timer; typedef struct { volatile u32 TCFG0; volatile u32 TCFG1; volatile u32 TCON; s3c64xx_timer ch[4]; volatile u32 TCNTB4; volatile u32 TCNTO4; } s3c64xx_timers; static s3c64xx_timers *s3c64xx_get_base_timers(void) { return (s3c64xx_timers *)ELFIN_TIMER_BASE; } /* macro to read the 16 bit timer */ static inline ulong read_timer(void) { s3c64xx_timers *const timers = s3c64xx_get_base_timers(); return timers->TCNTO4; } The respective assembly code is quite simple: 00000000 <read_timer>: 0: e59f3004 ldr r3, [pc, #4] ; c <timer_load_val> 4: e5930040 ldr r0, [r3, #64] 8: e12fff1e bx lr c: 7f006000 swivc 0x00006000 Perfect. Now, if I make the two structs above packed, I get this assembly: 00000000 <read_timer>: 0: e59f301c ldr r3, [pc, #28] ; 24 <.text+0x24> 4: e5d30040 ldrb r0, [r3, #64] 8: e5d32041 ldrb r2, [r3, #65] c: e5d31042 ldrb r1, [r3, #66] 10: e1800402 orr r0, r0, r2, lsl #8 14: e5d33043 ldrb r3, [r3, #67] 18: e1800801 orr r0, r0, r1, lsl #16 1c: e1800c03 orr r0, r0, r3, lsl #24 20: e12fff1e bx lr 24: 7f006000 swivc 0x00006000 which converts all accesses to the structure to 8-bit... Ideas? Toolchain eldk-4.1. U-Boot from nand/testing git with the patches I just sent to the list, configured for smdk6400_config. Thanks Guennadi --- Guennadi Liakhovetski, Ph.D. DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de

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[U-Boot] [PATCH] PPC4xx: PLB4 Arbiter and Memory Queue Optimizations
by Prodyut Hazarika 11 Aug '08

11 Aug '08

PLB4 Crossbar Arbiter core is instantiated on 405EX/ 440EP/ 440EPx/ 440GR/ 440GRx/ 440SP/ 440SPe/ 460EX/ 460GT For optimal performance, the read pipeline depth must be set to 4. The current code enables it only for bamboo, sequoia and yosemite boards. Better approach is to define CONFIG_PLB4_CROSSBAR_ARBITER_CORE for the above PPC4xx families, and to remove the duplicated code from board specfic files. Also, added register definitions for MemoryQueue related registers, and enabled Memory Queue optimizatios for 460EX/GT. Signed-off-by: Prodyut Hazarika <phazarika(a)amcc.com> --- board/amcc/bamboo/bamboo.c | 17 ----------- board/amcc/sequoia/sequoia.c | 17 ----------- board/amcc/yosemite/yosemite.c | 17 ----------- cpu/ppc4xx/44x_spd_ddr2.c | 34 ++++++++++++++++------ cpu/ppc4xx/cpu_init.c | 15 ++++++++++ include/asm-ppc/ppc4xx-sdram.h | 16 ++++++++++ include/ppc440.h | 49 +-------------------------------- include/ppc4xx.h | 60 ++++++++++++++++++++++++++++++++++++++++ 8 files changed, 116 insertions(+), 109 deletions(-) diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c index f415701..761e418 100644 --- a/board/amcc/bamboo/bamboo.c +++ b/board/amcc/bamboo/bamboo.c @@ -500,23 +500,6 @@ int pci_pre_init(struct pci_controller *hose) addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */ mtdcr(plb4_acr, addr); - /*-------------------------------------------------------------------------+ - | Set Nebula PLB4 arbiter to fair mode. - +-------------------------------------------------------------------------*/ - /* Segment0 */ - addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair; - addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled; - addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep; - addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep; - mtdcr(plb0_acr, addr); - - /* Segment1 */ - addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair; - addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled; - addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep; - addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep; - mtdcr(plb1_acr, addr); - return 1; } #endif /* defined(CONFIG_PCI) */ diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index b833092..639db09 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -372,23 +372,6 @@ int pci_pre_init(struct pci_controller *hose) addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */ mtdcr(plb4_acr, addr); - /* - * Set Nebula PLB4 arbiter to fair mode. - */ - /* Segment0 */ - addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair; - addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled; - addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep; - addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep; - mtdcr(plb0_acr, addr); - - /* Segment1 */ - addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair; - addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled; - addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep; - addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep; - mtdcr(plb1_acr, addr); - #ifdef CONFIG_PCI_PNP hose->fixup_irq = sequoia_pci_fixup_irq; #endif diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 05be40a..b18637d 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -366,23 +366,6 @@ int pci_pre_init(struct pci_controller *hose) addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */ mtdcr(plb4_acr, addr); - /*-------------------------------------------------------------------------+ - | Set Nebula PLB4 arbiter to fair mode. - +-------------------------------------------------------------------------*/ - /* Segment0 */ - addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair; - addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled; - addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep; - addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep; - mtdcr(plb0_acr, addr); - - /* Segment1 */ - addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair; - addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled; - addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep; - addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep; - mtdcr(plb1_acr, addr); - return 1; } #endif /* defined(CONFIG_PCI) */ diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index e9940e8..042ad1f 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -2241,16 +2241,30 @@ static void program_memory_queue(unsigned long *dimm_populated, } #if defined(CONFIG_460EX) || defined(CONFIG_460GT) - /* - * Enable high bandwidth access on 460EX/GT. - * This should/could probably be done on other - * PPC's too, like 440SPe. - * This is currently not used, but with this setup - * it is possible to use it later on in e.g. the Linux - * EMAC driver for performance gain. - */ - mtdcr(SDRAM_PLBADDULL, 0x00000000); /* MQ0_BAUL */ - mtdcr(SDRAM_PLBADDUHB, 0x00000008); /* MQ0_BAUH */ + { + /* + * Enable high bandwidth access on 460EX/GT. + * This should/could probably be done on other + * PPC's too, like 440SPe. + * This is currently not used, but with this setup + * it is possible to use it later on in e.g. the Linux + * EMAC driver for performance gain. + */ + + unsigned long val; + + mtdcr(SDRAM_PLBADDULL, 0x00000000); /* MQ0_BAUL */ + mtdcr(SDRAM_PLBADDUHB, 0x00000008); /* MQ0_BAUH */ + + val = (mfdcr(SDRAM_CONF1HB) | SDRAM_CONF1HB_AAFR | SDRAM_CONF1HB_RPEN | SDRAM_CONF1HB_RFTE); + mtdcr(SDRAM_CONF1HB, val); + + val = (mfdcr(SDRAM_CONF1LL) | SDRAM_CONF1LL_AAFR | SDRAM_CONF1LL_RPEN | SDRAM_CONF1LL_RFTE); + mtdcr(SDRAM_CONF1LL, val); + + val = (mfdcr(SDRAM_CONFPATHB) | SDRAM_CONFPATHB_TPEN); + mtdcr(SDRAM_CONFPATHB, val); + } #endif } diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index ac64279..f7c9200 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -288,6 +288,21 @@ cpu_init_f (void) val |= 0x400; mtsdr(SDR0_USB2HOST_CFG, val); #endif /* CONFIG_460EX */ + +#ifdef CONFIG_PLB4_CROSSBAR_ARBITER_CORE + /* Segment0 */ + mtdcr(plb0_acr, plb0_acr_ppm_fair | + plb0_acr_hbu_enabled | + plb0_acr_rdp_4deep | + plb0_acr_wrp_2deep); + + /* Segment1 */ + mtdcr(plb1_acr, plb1_acr_ppm_fair | + plb1_acr_hbu_enabled | + plb1_acr_rdp_4deep | + plb1_acr_wrp_2deep); +#endif + } /* diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index e151f0c..1abff94 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -266,15 +266,31 @@ #define SDRAM_R2BAS (SDRAMQ_DCR_BASE+0x2) /* rank 2 base address & size */ #define SDRAM_R3BAS (SDRAMQ_DCR_BASE+0x3) /* rank 3 base address & size */ #define SDRAM_CONF1HB (SDRAMQ_DCR_BASE+0x5) /* configuration 1 HB */ +#define SDRAM_CONF1HB_AAFR 0x80000000 /* Address Ack on First Request - Bit 0 */ +#define SDRAM_CONF1HB_PRPD 0x00080000 /* PLB Read pipeline Disable - Bit 12 */ +#define SDRAM_CONF1HB_PWPD 0x00040000 /* PLB Write pipeline Disable - Bit 13 */ +#define SDRAM_CONF1HB_PRW 0x00020000 /* PLB Read Wait - Bit 14 */ +#define SDRAM_CONF1HB_RPEN 0x00000800 /* Read Passing Enable - Bit 20 */ +#define SDRAM_CONF1HB_RFTE 0x00000400 /* Read Flow Through Enable - Bit 21 */ + #define SDRAM_ERRSTATHB (SDRAMQ_DCR_BASE+0x7) /* error status HB */ #define SDRAM_ERRADDUHB (SDRAMQ_DCR_BASE+0x8) /* error address upper 32 HB */ #define SDRAM_ERRADDLHB (SDRAMQ_DCR_BASE+0x9) /* error address lower 32 HB */ #define SDRAM_PLBADDULL (SDRAMQ_DCR_BASE+0xA) /* PLB base address upper 32 LL */ #define SDRAM_CONF1LL (SDRAMQ_DCR_BASE+0xB) /* configuration 1 LL */ +#define SDRAM_CONF1LL_AAFR 0x80000000 /* Address Ack on First Request - Bit 0 */ +#define SDRAM_CONF1LL_PRPD 0x00080000 /* PLB Read pipeline Disable - Bit 12 */ +#define SDRAM_CONF1LL_PWPD 0x00040000 /* PLB Write pipeline Disable - Bit 13 */ +#define SDRAM_CONF1LL_PRW 0x00020000 /* PLB Read Wait - Bit 14 */ +#define SDRAM_CONF1LL_RPEN 0x00000800 /* Read Passing Enable - Bit 20 */ +#define SDRAM_CONF1LL_RFTE 0x00000400 /* Read Flow Through Enable - Bit 21 */ + #define SDRAM_ERRSTATLL (SDRAMQ_DCR_BASE+0xC) /* error status LL */ #define SDRAM_ERRADDULL (SDRAMQ_DCR_BASE+0xD) /* error address upper 32 LL */ #define SDRAM_ERRADDLLL (SDRAMQ_DCR_BASE+0xE) /* error address lower 32 LL */ #define SDRAM_CONFPATHB (SDRAMQ_DCR_BASE+0xF) /* configuration between paths */ +#define SDRAM_CONFPATHB_TPEN 0x08000000 /* Transaction Passing Enable - Bit 4 */ + #define SDRAM_PLBADDUHB (SDRAMQ_DCR_BASE+0x10) /* PLB base address upper 32 LL */ #if !defined(CONFIG_405EX) diff --git a/include/ppc440.h b/include/ppc440.h index c581f1b..8d3a7e3 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -422,53 +422,6 @@ #define PLB4_ACR_WRP (0x80000000 >> 7) -/* Nebula PLB4 Arbiter - PowerPC440EP */ -#define PLB_ARBITER_BASE 0x80 - -#define plb0_revid (PLB_ARBITER_BASE+ 0x00) -#define plb0_acr (PLB_ARBITER_BASE+ 0x01) -#define plb0_acr_ppm_mask 0xF0000000 -#define plb0_acr_ppm_fixed 0x00000000 -#define plb0_acr_ppm_fair 0xD0000000 -#define plb0_acr_hbu_mask 0x08000000 -#define plb0_acr_hbu_disabled 0x00000000 -#define plb0_acr_hbu_enabled 0x08000000 -#define plb0_acr_rdp_mask 0x06000000 -#define plb0_acr_rdp_disabled 0x00000000 -#define plb0_acr_rdp_2deep 0x02000000 -#define plb0_acr_rdp_3deep 0x04000000 -#define plb0_acr_rdp_4deep 0x06000000 -#define plb0_acr_wrp_mask 0x01000000 -#define plb0_acr_wrp_disabled 0x00000000 -#define plb0_acr_wrp_2deep 0x01000000 - -#define plb0_besrl (PLB_ARBITER_BASE+ 0x02) -#define plb0_besrh (PLB_ARBITER_BASE+ 0x03) -#define plb0_bearl (PLB_ARBITER_BASE+ 0x04) -#define plb0_bearh (PLB_ARBITER_BASE+ 0x05) -#define plb0_ccr (PLB_ARBITER_BASE+ 0x08) - -#define plb1_acr (PLB_ARBITER_BASE+ 0x09) -#define plb1_acr_ppm_mask 0xF0000000 -#define plb1_acr_ppm_fixed 0x00000000 -#define plb1_acr_ppm_fair 0xD0000000 -#define plb1_acr_hbu_mask 0x08000000 -#define plb1_acr_hbu_disabled 0x00000000 -#define plb1_acr_hbu_enabled 0x08000000 -#define plb1_acr_rdp_mask 0x06000000 -#define plb1_acr_rdp_disabled 0x00000000 -#define plb1_acr_rdp_2deep 0x02000000 -#define plb1_acr_rdp_3deep 0x04000000 -#define plb1_acr_rdp_4deep 0x06000000 -#define plb1_acr_wrp_mask 0x01000000 -#define plb1_acr_wrp_disabled 0x00000000 -#define plb1_acr_wrp_2deep 0x01000000 - -#define plb1_besrl (PLB_ARBITER_BASE+ 0x0A) -#define plb1_besrh (PLB_ARBITER_BASE+ 0x0B) -#define plb1_bearl (PLB_ARBITER_BASE+ 0x0C) -#define plb1_bearh (PLB_ARBITER_BASE+ 0x0D) - /* Pin Function Control Register 1 */ #define SDR0_PFC1 0x4101 #define SDR0_PFC1_U1ME_MASK 0x02000000 /* UART1 Mode Enable */ @@ -742,7 +695,7 @@ #define SDR0_PFC1_PLB_PME_PLB4_SEL 0x00001000 /* PLB3 Performance Monitor Enable */ #define SDR0_PFC1_GFGGI_MASK 0x0000000F /* GPT Frequency Generation Gated In */ -#endif /* 440EP || 440GR || 440EPX || 440GRX */ +#endif /* 440EP || 440GR || 440EPX || 440GRX */ /*----------------------------------------------------------------------------- | L2 Cache diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 1d06da8..9dabeee 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -45,6 +45,66 @@ #define CONFIG_SDRAM_PPC4xx_IBM_DDR2 /* IBM DDR(2) controller */ #endif +/* PLB4 CrossBar Arbiter Core supported across PPC4xx families */ +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ + defined(CONFIG_405EX) +#define CONFIG_PLB4_CROSSBAR_ARBITER_CORE /*PLB4 CrossBar Arbiter Core */ +#endif + +#ifdef CONFIG_PLB4_CROSSBAR_ARBITER_CORE + +#define PLB_ARBITER_BASE 0x80 + +#define plb0_revid (PLB_ARBITER_BASE+ 0x00) +#define plb0_acr (PLB_ARBITER_BASE+ 0x01) +#define plb0_acr_ppm_mask 0xF0000000 +#define plb0_acr_ppm_fixed 0x00000000 +#define plb0_acr_ppm_fair 0xD0000000 +#define plb0_acr_hbu_mask 0x08000000 +#define plb0_acr_hbu_disabled 0x00000000 +#define plb0_acr_hbu_enabled 0x08000000 +#define plb0_acr_rdp_mask 0x06000000 +#define plb0_acr_rdp_disabled 0x00000000 +#define plb0_acr_rdp_2deep 0x02000000 +#define plb0_acr_rdp_3deep 0x04000000 +#define plb0_acr_rdp_4deep 0x06000000 +#define plb0_acr_wrp_mask 0x01000000 +#define plb0_acr_wrp_disabled 0x00000000 +#define plb0_acr_wrp_2deep 0x01000000 + +#define plb0_besrl (PLB_ARBITER_BASE+ 0x02) +#define plb0_besrh (PLB_ARBITER_BASE+ 0x03) +#define plb0_bearl (PLB_ARBITER_BASE+ 0x04) +#define plb0_bearh (PLB_ARBITER_BASE+ 0x05) +#define plb0_ccr (PLB_ARBITER_BASE+ 0x08) + +#define plb1_acr (PLB_ARBITER_BASE+ 0x09) +#define plb1_acr_ppm_mask 0xF0000000 +#define plb1_acr_ppm_fixed 0x00000000 +#define plb1_acr_ppm_fair 0xD0000000 +#define plb1_acr_hbu_mask 0x08000000 +#define plb1_acr_hbu_disabled 0x00000000 +#define plb1_acr_hbu_enabled 0x08000000 +#define plb1_acr_rdp_mask 0x06000000 +#define plb1_acr_rdp_disabled 0x00000000 +#define plb1_acr_rdp_2deep 0x02000000 +#define plb1_acr_rdp_3deep 0x04000000 +#define plb1_acr_rdp_4deep 0x06000000 +#define plb1_acr_wrp_mask 0x01000000 +#define plb1_acr_wrp_disabled 0x00000000 +#define plb1_acr_wrp_2deep 0x01000000 + +#define plb1_besrl (PLB_ARBITER_BASE+ 0x0A) +#define plb1_besrh (PLB_ARBITER_BASE+ 0x0B) +#define plb1_bearl (PLB_ARBITER_BASE+ 0x0C) +#define plb1_bearh (PLB_ARBITER_BASE+ 0x0D) + +#endif /* CONFIG_PLB4_CROSSBAR_ARBITER_CORE */ + + #if defined(CONFIG_440) /* * Enable long long (%ll ...) printf format on 440 PPC's since most of -------------------------------------------------------- CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and contains information that is confidential and proprietary to Applied Micro Circuits Corporation or its subsidiaries. It is to be used solely for the purpose of furthering the parties' business relationship. All unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message.

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[U-Boot] NAND auto-width detection and usage
by Darrik Spaude 11 Aug '08

11 Aug '08

I have noticed that u-boot 1.3.3 (and older) compare the detected NAND bus width with how u-boot was compiled (CFG_NAND_DBW_16 defined or undefined) and if they do not match then the NAND is ignored. Is there a reason for detecting and comparing to the build specification or is it possible to detect the NAND bus width and then address it as detected (like on-the-fly bus configuration rather than a "hard" configuration)? I noticed that the Linux kernel appears to work the same way. It would be nice to be able to just drop in a x16 or x8 NAND on boards that support both and not have to have multiple versions of u-boot and the Linux kernel. Thanks, Darrik

2 1

[U-Boot] [PATCH] Fix compile breakage in recent git
by dirk.behme＠googlemail.com 11 Aug '08

11 Aug '08

From: Steve Sakoman <steve(a)sakoman.com> Fix compile breakage from commit 0bf202ec586d4466c900e987720fa635c594d689 image.c:207:2: error: #endif without #if Signed-off-by: Steve Sakoman <steve(a)sakoman.com> Signed-off-by: Dirk Behme <dirk.behme(a)gmail.com> --- Index: foo/common/image.c =================================================================== --- foo.orig/common/image.c +++ foo/common/image.c @@ -204,7 +204,6 @@ void memmove_wd (void *to, void *from, s memmove (to, from, len); #endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */ } -#endif /* USE_HOSTCC */ /** * image_multi_count - get component (sub-image) count

3 2