July 2008 - U-Boot

[U-Boot-Users] Pull request: nand-flash
by Scott Wood 10 Jul '08

10 Jul '08

The following changes since commit c956717ab25c962ef49d49064dfc73f4edcba1fb: Wolfgang Denk (1): Merge branch 'master' of /home/wd/git/u-boot/custodians are available in the git repository at: git://www.denx.de/git/u-boot-nand-flash.git master Marcel Ziswiler (1): NAND: Fix warning due to missing env_ptr casts to u_char * in env_nand.c. Scott Wood (2): NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution. NAND: ifdef-protect most of nand.h when using legacy NAND. common/env_nand.c | 8 ++-- cpu/arm926ejs/davinci/nand.c | 10 +++- drivers/mtd/nand/nand_base.c | 103 +++++++++++++++++++++++------------ drivers/mtd/nand/nand_bbt.c | 4 +- drivers/mtd/onenand/onenand_base.c | 95 +++++++++++++++++---------------- drivers/mtd/onenand/onenand_bbt.c | 6 +- include/linux/mtd/mtd.h | 4 +- include/nand.h | 5 ++- 8 files changed, 140 insertions(+), 95 deletions(-)

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[U-Boot-Users] [PATCH] e1000: add support for 82545GM 64bit PCI-X copper variant
by Paul Gortmaker 10 Jul '08

10 Jul '08

This PCI-X e1000 variant works by just adding in the correct PCI IDs in the appropriate places. Signed-off-by: Paul Gortmaker <paul.gortmaker(a)windriver.com> --- drivers/net/e1000.c | 2 ++ drivers/net/e1000.h | 3 ++- include/pci_ids.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index c31029a..060b518 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -75,6 +75,7 @@ static struct pci_device_id supported[] = { {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82544GC_LOM}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82540EM}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82545EM_COPPER}, + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82545GM_COPPER}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82546EB_COPPER}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82545EM_FIBER}, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82546EB_FIBER}, @@ -636,6 +637,7 @@ e1000_set_mac_type(struct e1000_hw *hw) hw->mac_type = e1000_82540; break; case E1000_DEV_ID_82545EM_COPPER: + case E1000_DEV_ID_82545GM_COPPER: case E1000_DEV_ID_82545EM_FIBER: hw->mac_type = e1000_82545; break; diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index 23b2eb9..c258bc2 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -217,13 +217,14 @@ struct e1000_phy_stats { #define E1000_DEV_ID_82544GC_LOM 0x100D #define E1000_DEV_ID_82540EM 0x100E #define E1000_DEV_ID_82540EM_LOM 0x1015 +#define E1000_DEV_ID_82545GM_COPPER 0x1026 #define E1000_DEV_ID_82545EM_COPPER 0x100F #define E1000_DEV_ID_82545EM_FIBER 0x1011 #define E1000_DEV_ID_82546EB_COPPER 0x1010 #define E1000_DEV_ID_82546EB_FIBER 0x1012 #define E1000_DEV_ID_82541ER 0x1078 #define E1000_DEV_ID_82541GI_LF 0x107C -#define NUM_DEV_IDS 15 +#define NUM_DEV_IDS 16 #define NODE_ADDRESS_SIZE 6 #define ETH_LENGTH_OF_ADDRESS 6 diff --git a/include/pci_ids.h b/include/pci_ids.h index d061017..165456b 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -1827,6 +1827,7 @@ #define PCI_DEVICE_ID_INTEL_82545EM_FIBER 0x1011 #define PCI_DEVICE_ID_INTEL_82546EB_FIBER 0x1012 #define PCI_DEVICE_ID_INTEL_82540EM_LOM 0x1015 +#define PCI_DEVICE_ID_INTEL_82545GM_COPPER 0x1026 #define PCI_DEVICE_ID_INTEL_82559 0x1030 #define PCI_DEVICE_ID_INTEL_82562ET 0x1031 -- 1.5.6.2

3 2

[U-Boot-Users] [PATCH] SPARC: Build error fix, introduced by commit 391fd93ab23e15ab3dd58a54f5b609024009c378
by Daniel Hellstrom 10 Jul '08

10 Jul '08

This patch makes SPARC targets build again. It is caused by phys_addr_t and phys_size_t being defined in the wrong header file. include/lmb.h need those typedefs to build. However, I will be away for holidays starting tomorrow... Best Regards, Daniel Hellstrom Signed-off-by: Daniel Hellstrom <daniel(a)gaisler.com> --- include/asm-sparc/io.h | 1 - include/asm-sparc/types.h | 3 +++ 2 files changed, 3 insertions(+), 1 deletions(-) diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h index 2a27d06..ede0b1a 100644 --- a/include/asm-sparc/io.h +++ b/include/asm-sparc/io.h @@ -70,7 +70,6 @@ * that can be used to access the memory range with the caching * properties specified by "flags". */ -typedef unsigned long phys_addr_t; #define MAP_NOCACHE (0) #define MAP_WRCOMBINE (0) diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h index 69f93d6..2cf974a 100644 --- a/include/asm-sparc/types.h +++ b/include/asm-sparc/types.h @@ -65,6 +65,9 @@ typedef unsigned long long u64; /* DMA addresses are 32-bits wide */ typedef u32 dma_addr_t; +typedef unsigned long phys_addr_t; +typedef unsigned long phys_size_t; + #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ -- 1.5.4

2 1

[U-Boot-Users] [PATCH] NAND: ifdef-protect most of nand.h when using legacy NAND.
by Scott Wood 10 Jul '08

10 Jul '08

Some macros such as NAND_CTL_SETALE conflict between current and legacy NAND, being defined by the subsystem in the former case and the board config file in the latter. Signed-off-by: Scott Wood <scottwood(a)freescale.com> --- Applied to u-boot-nand-flash. include/nand.h | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/include/nand.h b/include/nand.h index 247d346..e1285cd 100644 --- a/include/nand.h +++ b/include/nand.h @@ -24,6 +24,9 @@ #ifndef _NAND_H_ #define _NAND_H_ +extern void nand_init(void); + +#ifndef CFG_NAND_LEGACY #include <linux/mtd/compat.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -32,7 +35,6 @@ typedef struct mtd_info nand_info_t; extern int nand_curr_device; extern nand_info_t nand_info[]; -extern void nand_init(void); static inline int nand_read(nand_info_t *info, off_t ofs, size_t *len, u_char *buf) { @@ -122,4 +124,5 @@ int nand_get_lock_status(nand_info_t *meminfo, ulong offset); void board_nand_select_device(struct nand_chip *nand, int chip); #endif +#endif /* !CFG_NAND_LEGACY */ #endif -- 1.5.6.rc1.6.gc53ad

1 0

[U-Boot-Users] [PATCH] Many spelling fixes in README.
by Marcel Ziswiler 10 Jul '08

10 Jul '08

Signed-off-by: Marcel Ziswiler <marcel(a)ziswiler.com> --- README | 141 ++++++++++++++++++++++++++++++++-------------------------------- 1 files changed, 71 insertions(+), 70 deletions(-) diff --git a/README b/README index 62cdfd0..0cd01bc 100644 --- a/README +++ b/README @@ -74,7 +74,7 @@ git://www.denx.de/git/u-boot.git ; you can browse it online at http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary The "snapshot" links on this page allow you to download tarballs of -any version you might be interested in. Ofifcial releases are also +any version you might be interested in. Official releases are also available for FTP download from the ftp://ftp.denx.de/pub/u-boot/ directory. @@ -94,7 +94,7 @@ Where we come from: * Provide extended interface to Linux boot loader * S-Record download * network boot - * PCMCIA / CompactFLash / ATA disk / SCSI ... boot + * PCMCIA / CompactFlash / ATA disk / SCSI ... boot - create ARMBoot project (http://sourceforge.net/projects/armboot) - add other CPU families (starting with ARM) - create U-Boot project (http://sourceforge.net/projects/u-boot) @@ -230,7 +230,7 @@ Example: For a TQM823L module type: cd u-boot make TQM823L_config -For the Cogent platform, you need to specify the cpu type as well; +For the Cogent platform, you need to specify the CPU type as well; e.g. "make cogent_mpc8xx_config". And also configure the cogent directory according to the instructions in cogent/README. @@ -278,7 +278,7 @@ The following options need to be configured: - Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined) Define one or more of CONFIG_LCD_HEARTBEAT - update a character position on - the lcd display every second with + the LCD display every second with a "rotator" |\-/|\-/ - Board flavour: (if CONFIG_MPC8260ADS is defined) @@ -293,7 +293,7 @@ The following options need to be configured: Define exactly one of CONFIG_MPC8240, CONFIG_MPC8245 -- 8xx CPU Options: (if using an MPC8xx cpu) +- 8xx CPU Options: (if using an MPC8xx CPU) CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if get_gclk_freq() cannot work e.g. if there is no 32KHz @@ -346,7 +346,7 @@ The following options need to be configured: CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] - When transfering memsize parameter to linux, some versions + When transferring memsize parameter to linux, some versions expect it to be in bytes, others in MB. Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. @@ -366,7 +366,8 @@ The following options need to be configured: OF_TBCLK - The timebase frequency. OF_STDOUT_PATH - The path to the console device - boards with QUICC Engines require OF_QE to set UCC mac addresses + boards with QUICC Engines require OF_QE to set UCC MAC + addresses CONFIG_OF_BOARD_SETUP @@ -375,7 +376,7 @@ The following options need to be configured: CONFIG_OF_BOOT_CPU - This define fills in the correct boot cpu in the boot + This define fills in the correct boot CPU in the boot param header, the default value is zero if undefined. - Serial Ports: @@ -445,7 +446,7 @@ The following options need to be configured: linux_logo.h for logo. Requires CONFIG_VIDEO_LOGO CONFIG_CONSOLE_EXTRA_INFO - addional board info beside + additional board info beside the logo When CONFIG_CFB_CONSOLE is defined, video console is @@ -515,7 +516,7 @@ The following options need to be configured: The value of these goes into the environment as "ramboot" and "nfsboot" respectively, and can be used as a convenience, when switching between booting from - ram and nfs. + RAM and NFS. - Pre-Boot Commands: CONFIG_PREBOOT @@ -735,11 +736,11 @@ The following options need to be configured: Support for Intel 8254x gigabit chips. CONFIG_E1000_FALLBACK_MAC - default MAC for empty eeprom after production. + default MAC for empty EEPROM after production. CONFIG_EEPRO100 Support for Intel 82557/82559/82559ER chips. - Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom + Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM write routine for first time initialisation. CONFIG_TULIP @@ -818,7 +819,7 @@ The following options need to be configured: Define the below if you wish to use the USB console. Once firmware is rebuilt from a serial console issue the command "setenv stdin usbtty; setenv stdout usbtty" and - attach your usb cable. The Unix command "dmesg" should print + attach your USB cable. The Unix command "dmesg" should print it has found a new device. The environment variable usbtty can be set to gserial or cdc_acm to enable your device to appear to a USB host as a Linux gserial device or a @@ -932,7 +933,7 @@ The following options need to be configured: assumed. For the CT69000 and SMI_LYNXEM drivers, videomode is - selected via environment 'videomode'. Two diferent ways + selected via environment 'videomode'. Two different ways are possible: - "videomode=num" 'num' is a standard LiLo mode numbers. Following standard modes are supported (* is default): @@ -1055,7 +1056,7 @@ The following options need to be configured: CONFIG_PHY_GIGE If this option is set, support for speed/duplex - detection of Gigabit PHY is included. + detection of gigabit PHY is included. CONFIG_PHY_RESET_DELAY @@ -1074,21 +1075,21 @@ The following options need to be configured: CONFIG_ETH2ADDR CONFIG_ETH3ADDR - Define a default value for ethernet address to use - for the respective ethernet interface, in case this + Define a default value for Ethernet address to use + for the respective Ethernet interface, in case this is not determined automatically. - IP address: CONFIG_IPADDR Define a default value for the IP address to use for - the default ethernet interface, in case this is not + the default Ethernet interface, in case this is not determined through e.g. bootp. - Server IP address: CONFIG_SERVERIP - Defines a default value for theIP address of a TFTP + Defines a default value for the IP address of a TFTP server to contact when using the "tftboot" command. - Multicast TFTP Mode: @@ -1096,7 +1097,7 @@ The following options need to be configured: Defines whether you want to support multicast TFTP as per rfc-2090; for example to work with atftp. Lets lots of targets - tftp down the same boot image concurrently. Note: the ethernet + tftp down the same boot image concurrently. Note: the Ethernet driver in use must provide a function: mcast() to join/leave a multicast group. @@ -1184,7 +1185,7 @@ The following options need to be configured: A printf format string which contains the ascii name of the port. Normally is set to "eth%d" which sets - eth0 for the first ethernet, eth1 for the second etc. + eth0 for the first Ethernet, eth1 for the second etc. CONFIG_CDP_CAPABILITIES @@ -1233,7 +1234,7 @@ The following options need to be configured: These enable I2C serial bus commands. Defining either of (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will - include the appropriate I2C driver for the selected cpu. + include the appropriate I2C driver for the selected CPU. This will allow you to use i2c commands at the u-boot command line (as long as you set CONFIG_CMD_I2C in @@ -1258,10 +1259,10 @@ The following options need to be configured: In both cases you will need to define CFG_I2C_SPEED to be the frequency (in Hz) at which you wish your i2c bus to run and CFG_I2C_SLAVE to be the address of this node (ie - the cpu's i2c node address). + the CPU's i2c node address). Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c) - sets the cpu up as a master node and so its address should + sets the CPU up as a master node and so its address should therefore be cleared to 0 (See, eg, MPC823e User's Manual p.16-473). So, set CFG_I2C_SLAVE to 0. @@ -1480,17 +1481,17 @@ The following options need to be configured: Maximum time to wait for the INIT_B line to deassert after PROB_B has been deasserted during a Virtex II FPGA configuration sequence. The default time is 500 - mS. + ms. CFG_FPGA_WAIT_BUSY Maximum time to wait for BUSY to deassert during - Virtex II FPGA configuration. The default is 5 mS. + Virtex II FPGA configuration. The default is 5 ms. CFG_FPGA_WAIT_CONFIG Time to wait after FPGA configuration. The default is - 200 mS. + 200 ms. - Configuration Management: CONFIG_IDENT_STRING @@ -1507,7 +1508,7 @@ The following options need to be configured: protects these variables from casual modification by the user. Once set, these variables are read-only, and write or delete attempts are rejected. You can - change this behviour: + change this behaviour: If CONFIG_ENV_OVERWRITE is #defined in your config file, the write protection for vendor parameters is @@ -1516,7 +1517,7 @@ The following options need to be configured: Alternatively, if you #define _both_ CONFIG_ETHADDR _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default - ethernet address is installed in the environment, + Ethernet address is installed in the environment, which can be changed exactly ONCE by the user. [The serial# is unaffected by this, i. e. it remains read-only.] @@ -1560,7 +1561,7 @@ The following options need to be configured: Define this variable to stop the system in case of a fatal error, so that you have to reset it manually. This is probably NOT a good idea for an embedded - system where you want to system to reboot + system where you want the system to reboot automatically as fast as possible, but it may be useful during development since you can try to debug the conditions that lead to the situation. @@ -1627,7 +1628,7 @@ The following options need to be configured: - Commandline Editing and History: CONFIG_CMDLINE_EDITING - Enable editiong and History functions for interactive + Enable editing and History functions for interactive commandline input operations - Default Environment: @@ -1668,7 +1669,7 @@ The following options need to be configured: Adding this option adds support for Xilinx SystemACE chips attached via some sort of local bus. The address - of the chip must alsh be defined in the + of the chip must also be defined in the CFG_SYSTEMACE_BASE macro. For example: #define CONFIG_SYSTEMACE @@ -1734,7 +1735,7 @@ Legacy uImage format: -12 common/image.c Ramdisk data has bad checksum 11 common/image.c Ramdisk data has correct checksum 12 common/image.c Ramdisk verification complete, start loading - -13 common/image.c Wrong Image Type (not PPC Linux Ramdisk) + -13 common/image.c Wrong Image Type (not PPC Linux ramdisk) 13 common/image.c Start multifile image verification 14 common/image.c No initial ramdisk, no multifile, continue. @@ -1794,13 +1795,13 @@ Legacy uImage format: -60 common/env_common.c Environment has a bad CRC, using default - 64 net/eth.c starting with Ethernetconfiguration. + 64 net/eth.c starting with Ethernet configuration. -64 net/eth.c no Ethernet found. 65 net/eth.c Ethernet found. -80 common/cmd_net.c usage wrong 80 common/cmd_net.c before calling NetLoop() - -81 common/cmd_net.c some error in NetLoop() occured + -81 common/cmd_net.c some error in NetLoop() occurred 81 common/cmd_net.c NetLoop() back without error -82 common/cmd_net.c size == 0 (File with size 0 loaded) 82 common/cmd_net.c trying automatic boot @@ -1823,8 +1824,8 @@ FIT uImage format: 105 common/cmd_bootm.c Kernel subimage hash verification OK -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture 106 common/cmd_bootm.c Architecture check OK - -106 common/cmd_bootm.c Kernel subimage has wrong typea - 107 common/cmd_bootm.c Kernel subimge type OK + -106 common/cmd_bootm.c Kernel subimage has wrong type + 107 common/cmd_bootm.c Kernel subimage type OK -107 common/cmd_bootm.c Can't get kernel subimage data/size 108 common/cmd_bootm.c Got kernel subimage data/size -108 common/cmd_bootm.c Wrong image type (not legacy, FIT) @@ -1837,7 +1838,7 @@ FIT uImage format: 120 common/image.c Start initial ramdisk verification -120 common/image.c Ramdisk FIT image has incorrect format 121 common/image.c Ramdisk FIT image has correct format - 122 common/image.c No Ramdisk subimage unit name, using configuration + 122 common/image.c No ramdisk subimage unit name, using configuration -122 common/image.c Can't get configuration for ramdisk subimage 123 common/image.c Ramdisk unit name specified -124 common/image.c Can't get ramdisk subimage node offset @@ -1851,13 +1852,13 @@ FIT uImage format: 129 common/image.c Can't get ramdisk load address -129 common/image.c Got ramdisk load address - -130 common/cmd_doc.c Icorrect FIT image format + -130 common/cmd_doc.c Incorrect FIT image format 131 common/cmd_doc.c FIT image format OK - -140 common/cmd_ide.c Icorrect FIT image format + -140 common/cmd_ide.c Incorrect FIT image format 141 common/cmd_ide.c FIT image format OK - -150 common/cmd_nand.c Icorrect FIT image format + -150 common/cmd_nand.c Incorrect FIT image format 151 common/cmd_nand.c FIT image format OK @@ -1866,7 +1867,7 @@ Modem Support: [so far only for SMDK2400 and TRAB boards] -- Modem support endable: +- Modem support enable: CONFIG_MODEM_SUPPORT - RTS/CTS Flow control enable: @@ -1882,11 +1883,11 @@ Modem Support: There are common interrupt_init() and timer_interrupt() for all PPC archs. interrupt_init() calls interrupt_init_cpu() - for cpu specific initialization. interrupt_init_cpu() + for CPU specific initialization. interrupt_init_cpu() should set decrementer_count to appropriate value. If - cpu resets decrementer automatically after interrupt + CPU resets decrementer automatically after interrupt (ppc4xx) it should set decrementer_count to zero. - timer_interrupt() calls timer_interrupt_cpu() for cpu + timer_interrupt() calls timer_interrupt_cpu() for CPU specific handling. If board has watchdog / status_led / other_activity_monitor it works automatically from general timer_interrupt(). @@ -1896,7 +1897,7 @@ Modem Support: In the target system modem support is enabled when a specific key (key combination) is pressed during power-on. Otherwise U-Boot will boot normally - (autoboot). The key_pressed() fuction is called from + (autoboot). The key_pressed() function is called from board_init(). Currently key_pressed() is a dummy function, returning 1 and thus enabling modem initialization. @@ -1904,7 +1905,7 @@ Modem Support: If there are no modem init strings in the environment, U-Boot proceed to autoboot; the previous output (banner, info printfs) will be - supressed, though. + suppressed, though. See also: doc/README.Modem @@ -1960,7 +1961,7 @@ Configuration Settings: - CFG_MEM_TOP_HIDE (PPC only): If CFG_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top - (end) of ram and won't get "touched" at all by U-Boot. By + (end) of RAM and won't get "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel should gets passed the now "corrected" memory size and won't touch it either. This should work for arch/ppc and arch/powerpc. Only Linux @@ -2055,8 +2056,8 @@ Configuration Settings: The two-step approach is usually more reliable, since you can check if the download worked before you erase - the flash, but in some situations (when sytem RAM is - too limited to allow for a tempory copy of the + the flash, but in some situations (when system RAM is + too limited to allow for a temporary copy of the downloaded image) this option may be very useful. - CFG_FLASH_CFI: @@ -2086,11 +2087,11 @@ Configuration Settings: column displays, 15 (3..1) for 40 column displays. - CFG_RX_ETH_BUFFER: - Defines the number of ethernet receive buffers. On some - ethernet controllers it is recommended to set this value + Defines the number of Ethernet receive buffers. On some + Ethernet controllers it is recommended to set this value to 8 or even higher (EEPRO100 or 405 EMAC), since all buffers can be full shortly after enabling the interface - on high ethernet traffic. + on high Ethernet traffic. Defaults to 4 if not defined. The following definitions that deal with the placement and management @@ -2158,7 +2159,7 @@ following configurations: CFG_ENV_SIZE_REDUND These settings describe a second storage area used to hold - a redundand copy of the environment data, so that there is + a redundant copy of the environment data, so that there is a valid backup copy in case there is a power failure during a "saveenv" operation. @@ -2176,14 +2177,14 @@ accordingly! - CFG_ENV_ADDR: - CFG_ENV_SIZE: - These two #defines are used to determin the memory area you + These two #defines are used to determine the memory area you want to use for environment. It is assumed that this memory can just be read and written to, without any special provision. BE CAREFUL! The first access to the environment happens quite early in U-Boot initalization (when we try to get the setting of for the -console baudrate). You *MUST* have mappend your NVRAM area then, or +console baudrate). You *MUST* have mapped your NVRAM area then, or U-Boot will hang. Please note that even with NVRAM we still use a copy of the @@ -2332,14 +2333,14 @@ Low Level (hardware related) configuration options: CFG_ISA_IO_STRIDE - defines the spacing between fdc chipset registers + defines the spacing between FDC chipset registers (default value 1) CFG_ISA_IO_OFFSET defines the offset of register from address. It depends on which part of the data bus is connected to - the fdc chipset. (default value 0) + the FDC chipset. (default value 0) If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and CFG_FDC_DRIVE_NUMBER are undefined, they take their @@ -2535,7 +2536,7 @@ Low Level (hardware related) configuration options: Normally these variables MUST NOT be defined. The only exception is when U-Boot is loaded (to RAM) by some other boot loader or by a debugger which - performs these intializations itself. + performs these initializations itself. Building the Software: @@ -2570,7 +2571,7 @@ Note: for some board special configuration names may exist; check if additional information is available from the board vendor; for instance, the TQM823L systems are available without (standard) or with LCD support. You can select such additional "features" - when chosing the configuration, i. e. + when choosing the configuration, i. e. make TQM823L_config - will configure for a plain TQM823L, i. e. no LCD support @@ -2773,7 +2774,7 @@ Some configuration options can be set using Environment Variables: for use by the bootm command. See also "bootm_size" environment variable. Address defined by "bootm_low" is also the base of the initial memory mapping for the Linux - kernel -- see the descripton of CFG_BOOTMAPSZ. + kernel -- see the description of CFG_BOOTMAPSZ. bootm_size - Memory range available for image processing in the bootm command can be restricted. This variable is given as @@ -2880,7 +2881,7 @@ Some configuration options can be set using Environment Variables: themselves. npe_ucode - see CONFIG_IXP4XX_NPE_EXT_UCOD - if set load address for the npe microcode + if set load address for the NPE microcode tftpsrcport - If this is set, the value is used for TFTP's UDP source port. @@ -2889,7 +2890,7 @@ Some configuration options can be set using Environment Variables: destination port instead of the Well Know Port 69. vlan - When set to a value < 4095 the traffic over - ethernet is encapsulated/received over 802.1q + Ethernet is encapsulated/received over 802.1q VLAN tagged frames. The following environment variables may be used and automatically @@ -2967,14 +2968,14 @@ General rules: executed anyway. (2) If you execute several variables with one call to run (i. e. - calling run with a list af variables as arguments), any failing + calling run with a list of variables as arguments), any failing command will cause "run" to terminate, i. e. the remaining variables are not executed. Note for Redundant Ethernet Interfaces: ======================================= -Some boards come with redundant ethernet interfaces; U-Boot supports +Some boards come with redundant Ethernet interfaces; U-Boot supports such configurations and is capable of automatic selection of a "working" interface when needed. MAC assignment works as follows: @@ -3315,7 +3316,7 @@ parameters. You can check and modify this variable using the Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000] ... -If you want to boot a Linux kernel with initial ram disk, you pass +If you want to boot a Linux kernel with initial RAM disk, you pass the memory addresses of both the kernel and the initrd image (PPBCOOT format!) to the "bootm" command: @@ -3625,13 +3626,13 @@ locked as (mis-) used as memory, etc. require any physical RAM backing up the cache. The cleverness is that the cache is being used as a temporary supply of necessary storage before the SDRAM controller is setup. It's - beyond the scope of this list to expain the details, but you + beyond the scope of this list to explain the details, but you can see how this works by studying the cache architecture and operation in the architecture and processor-specific manuals. OCM is On Chip Memory, which I believe the 405GP has 4K. It is another option for the system designer to use as an - initial stack/ram area prior to SDRAM being available. Either + initial stack/RAM area prior to SDRAM being available. Either option should work for you. Using CS 4 should be fine if your board designers haven't used it for something that would cause you grief during the initial boot! It is frequently not @@ -3656,7 +3657,7 @@ code for the initialization procedures: * Initialized global data (data segment) is read-only. Do not attempt to write it. -* Do not use any unitialized global data (or implicitely initialized +* Do not use any uninitialized global data (or implicitely initialized as zero data - BSS segment) at all - this is undefined, initiali- zation is performed later (when relocating to RAM). @@ -3768,7 +3769,7 @@ System Initialization: ---------------------- In the reset configuration, U-Boot starts at the reset entry point -(on most PowerPC systens at address 0x00000100). Because of the reset +(on most PowerPC systems at address 0x00000100). Because of the reset configuration for CS0# this is a mirror of the onboard Flash memory. To be able to re-map memory U-Boot then jumps to its link address. To be able to implement the initialization code in C, a (small!) -- 1.5.4.1

2 1

[U-Boot-Users] [PATCH] Minor spelling fix in comment.
by Marcel Ziswiler 10 Jul '08

10 Jul '08

Signed-off-by: Marcel Ziswiler <marcel(a)ziswiler.com> --- cpu/pxa/start.S | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 1cdb709..23005e2 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -128,7 +128,7 @@ relocate: /* relocate U-Boot to RAM */ copy_loop: ldmia r0!, {r3-r10} /* copy from source address [r0] */ stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end addreee [r2] */ + cmp r0, r2 /* until source end address [r2] */ ble copy_loop #endif /* !CONFIG_SKIP_RELOCATE_UBOOT */ -- 1.5.4.1

2 1

[U-Boot-Users] [PATCH] ARM: Fix for wrong patch version applied for Lyrtech SFF-SDR board (ARM926EJS)
by Hugo Villeneuve 10 Jul '08

10 Jul '08

ARM: Fix for incorrect version of patch applied when adding support for the Lyrtech SFF-SDR board. Signed-off-by: Hugo Villeneuve <hugo.villeneuve(a)lyrtech.com> Signed-off-by: Philip Balister, OpenSDR <philip(a)opensdr.com> --- CREDITS | 5 + board/davinci/sffsdr/Makefile | 2 +- board/davinci/sffsdr/config.mk | 11 +- board/davinci/sffsdr/dv_board.c | 212 -------------------------- board/davinci/sffsdr/sffsdr.c | 310 ++++++++++++++++++++++++++++++++++++++ include/configs/davinci_sffsdr.h | 69 +++------ 6 files changed, 342 insertions(+), 267 deletions(-) diff --git a/CREDITS b/CREDITS index aa57682..3b6e57d 100644 --- a/CREDITS +++ b/CREDITS @@ -537,3 +537,8 @@ N: Timo Tuunainen E: timo.tuunainen(a)sysart.fi D: Support for Artila M-501 starter kit W: http://www.sysart.fi/ + +N: Philip Balister +E: philip(a)opensdr.com +D: Port to Lyrtech SFFSDR development board. +W: www.opensdr.com diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile index 579efe2..fb31ee4 100644 --- a/board/davinci/sffsdr/Makefile +++ b/board/davinci/sffsdr/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := dv_board.o +COBJS := $(BOARD).o SOBJS := board_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk index e8a329c..f3b23d1 100644 --- a/board/davinci/sffsdr/config.mk +++ b/board/davinci/sffsdr/config.mk @@ -3,8 +3,10 @@ # Gary Jennejohn, DENX Software Engineering, <gj(a)denx.de> # David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> # +# Copyright (C) 2008 Lyrtech <www.lyrtech.com> +# Copyright (C) 2008 Philip Balister, OpenSDR <philip(a)opensdr.com> +# # Lyrtech SFF SDR board (ARM926EJS) cpu -# see http://www.lyrtech.com/ for more information on Lyrtech # # SFF SDR board has 1 bank of 128 MB DDR RAM # Physical Address: @@ -16,9 +18,6 @@ # Integrity kernel is expected to be at 8000'0000, entry 8000'00D0, # up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc). # -# we load ourself to 8400'0000 -# -# - -# Provide at least 32MB spacing between us and the Integrity kernel image +# we load ourself to 8400'0000 to provide at least 32MB spacing +# between us and the Integrity kernel image TEXT_BASE = 0x84000000 diff --git a/board/davinci/sffsdr/dv_board.c b/board/davinci/sffsdr/dv_board.c deleted file mode 100644 index 0771b5b..0000000 --- a/board/davinci/sffsdr/dv_board.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> - -DECLARE_GLOBAL_DATA_PTR; - -extern void timer_init(void); -extern int eth_hw_init(void); -extern phy_t phy; - - -/* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) -{ - dv_reg_p mdstat, mdctl; - - if (id >= DAVINCI_LPSC_GEM) - return; /* Don't work on DSP Power Domain */ - - mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); - mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); - - while (REG(PSC_PTSTAT) & 0x01); - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - /* Special treatment for some modules as for sprue14 p.7.4.2 */ - if ((id == DAVINCI_LPSC_VPSSSLV) || - (id == DAVINCI_LPSC_EMAC) || - (id == DAVINCI_LPSC_EMAC_WRAPPER) || - (id == DAVINCI_LPSC_MDIO) || - (id == DAVINCI_LPSC_USB) || - (id == DAVINCI_LPSC_ATA) || - (id == DAVINCI_LPSC_VLYNQ) || - (id == DAVINCI_LPSC_UHPI) || - (id == DAVINCI_LPSC_DDR_EMIF) || - (id == DAVINCI_LPSC_AEMIF) || - (id == DAVINCI_LPSC_MMC_SD) || - (id == DAVINCI_LPSC_MEMSTICK) || - (id == DAVINCI_LPSC_McBSP) || - (id == DAVINCI_LPSC_GPIO)) - * mdctl |= 0x200; - - REG(PSC_PTCMD) = 0x01; - - while (REG(PSC_PTSTAT) & 0x03); - while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ -} - -void dsp_on(void) -{ - int i; - - if (REG(PSC_PDSTAT1) & 0x1f) - return; /* Already on */ - - REG(PSC_GBLCTL) |= 0x01; - REG(PSC_PDCTL1) |= 0x01; - REG(PSC_PDCTL1) &= ~0x100; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; - REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; - REG(PSC_PTCMD) = 0x02; - - for (i = 0; i < 100; i++) { - if (REG(PSC_EPCPR) & 0x02) - break; - } - - REG(PSC_CHP_SHRTSW) = 0x01; - REG(PSC_PDCTL1) |= 0x100; - REG(PSC_EPCCR) = 0x02; - - for (i = 0; i < 100; i++) { - if (!(REG(PSC_PTSTAT) & 0x02)) - break; - } - - REG(PSC_GBLCTL) &= ~0x1f; -} - - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_SFFSDR; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; - - /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); - lpsc_on(DAVINCI_LPSC_GPIO); - - /* Powerup the DSP */ - dsp_on(); - - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; - - timer_init(); - - return(0); -} - -int misc_init_r(void) -{ - u_int8_t tmp[20], buf[10]; - int i = 0; - int clk = 0; - - clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); - - printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); - printf("DDR Clock: %dMHz\n", (clk / 2)); - - /* Configure I2C switch (PCA9543) to enable channel 0. */ - tmp[0] = CFG_I2C_PCA9543_ENABLE_CH0; - if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, - CFG_I2C_PCA9543_ADDR_LEN, tmp, 1)) - printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); - - /* Set Ethernet MAC address from EEPROM. - * We must read 8 bytes because data is stored in little-endian. */ - if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x05A8, - CFG_I2C_EEPROM_ADDR_LEN, buf, 8)) { - printf("Read from EEPROM @ 0x%02x failed\n", - CFG_I2C_EEPROM_ADDR); - } else { - tmp[0] = 0xff; - for (i = 0; i < 6; i++) - tmp[0] &= buf[i]; - - if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) { - sprintf((char *)&tmp[0], - "%02x:%02x:%02x:%02x:%02x:%02x", - buf[3], buf[2], buf[1], buf[0], - buf[7], buf[6]); - setenv("ethaddr", (char *)&tmp[0]); - } - } - - if (!eth_hw_init()) { - printf("Ethernet init failed\n"); - } else { - printf("ETH PHY: %s\n", phy.name); - } - - return(0); -} - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return(0); -} diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c new file mode 100644 index 0000000..b73484a --- /dev/null +++ b/board/davinci/sffsdr/sffsdr.c @@ -0,0 +1,310 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2008 Philip Balister, OpenSDR <philip(a)opensdr.com> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ +#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */ + +#define INTEGRITY_SYSCFG_OFFSET 0x7E8 +#define INTEGRITY_CHECKWORD_OFFSET 0x7F8 +#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF + +DECLARE_GLOBAL_DATA_PTR; + +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01); + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + switch (id) { + case DAVINCI_LPSC_VPSSSLV: + case DAVINCI_LPSC_EMAC: + case DAVINCI_LPSC_EMAC_WRAPPER: + case DAVINCI_LPSC_MDIO: + case DAVINCI_LPSC_USB: + case DAVINCI_LPSC_ATA: + case DAVINCI_LPSC_VLYNQ: + case DAVINCI_LPSC_UHPI: + case DAVINCI_LPSC_DDR_EMIF: + case DAVINCI_LPSC_AEMIF: + case DAVINCI_LPSC_MMC_SD: + case DAVINCI_LPSC_MEMSTICK: + case DAVINCI_LPSC_McBSP: + case DAVINCI_LPSC_GPIO: + *mdctl |= 0x200; + break; + } + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03); + while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ +} + +#if !defined(CFG_USE_DSPLINK) +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} +#endif /* CFG_USE_DSPLINK */ + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SFFSDR; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + +#if !defined(CFG_USE_DSPLINK) + /* Powerup the DSP */ + dsp_on(); +#endif /* CFG_USE_DSPLINK */ + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +/* Read ethernet MAC address from Integrity data structure inside EEPROM. */ +int read_mac_address(uint8_t *buf) +{ + u_int32_t value, mac[2], address; + + /* Read Integrity data structure checkword. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + if (value != INTEGRITY_CHECKWORD_VALUE) + return 1; + + /* Read SYSCFG structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + address = 0x800 + (int) value; /* Address of SYSCFG structure. */ + + /* Read NET CONFIG structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + address = 0x800 + (int) value; /* Address of NET CONFIG structure. */ + address += 12; /* Address of NET INTERFACE CONFIG structure. */ + + /* Read NET INTERFACE CONFIG 2 structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + address = 0x800 + 16 + (int) value; /* Address of NET INTERFACE + * CONFIG 2 structure. */ + + /* Read MAC address. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8)) + goto err; + + buf[0] = mac[0] >> 24; + buf[1] = mac[0] >> 16; + buf[2] = mac[0] >> 8; + buf[3] = mac[0]; + buf[4] = mac[1] >> 24; + buf[5] = mac[1] >> 16; + + return 0; + +err: + printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR); + return 1; +} + +/* Platform dependent initialisation. */ +int misc_init_r(void) +{ + int i; + u_int8_t i2cbuf; + u_int8_t env_enetaddr[6], eeprom_enetaddr[6]; + char *tmp = getenv("ethaddr"); + char *end; + int clk; + + /* EMIF-A CS3 configuration for FPGA. */ + REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); + printf("DDR Clock: %dMHz\n", (clk / 2)); + + /* Configure I2C switch (PCA9543) to enable channel 0. */ + i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0; + if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, + CFG_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) { + printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); + return 1; + } + + /* Read Ethernet MAC address from the U-Boot environment. */ + for (i = 0; i < 6; i++) { + env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; + if (tmp) + tmp = (*end) ? end+1 : end; + } + + /* Read Ethernet MAC address from EEPROM. */ + if (read_mac_address(eeprom_enetaddr) == 0) { + if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && + memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) { + printf("\nWarning: MAC addresses don't match:\n"); + printf("\tHW MAC address: " + "%02X:%02X:%02X:%02X:%02X:%02X\n", + eeprom_enetaddr[0], eeprom_enetaddr[1], + eeprom_enetaddr[2], eeprom_enetaddr[3], + eeprom_enetaddr[4], eeprom_enetaddr[5]); + printf("\t\"ethaddr\" value: " + "%02X:%02X:%02X:%02X:%02X:%02X\n", + env_enetaddr[0], env_enetaddr[1], + env_enetaddr[2], env_enetaddr[3], + env_enetaddr[4], env_enetaddr[5]) ; + debug("### Set MAC addr from environment\n"); + memcpy(eeprom_enetaddr, env_enetaddr, 6); + } + if (!tmp) { + char ethaddr[20]; + + sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", + eeprom_enetaddr[0], eeprom_enetaddr[1], + eeprom_enetaddr[2], eeprom_enetaddr[3], + eeprom_enetaddr[4], eeprom_enetaddr[5]) ; + debug("### Set environment from HW MAC addr = \"%s\"\n", + ethaddr); + setenv("ethaddr", ethaddr); + } + } + + if (!eth_hw_init()) { + printf("Ethernet init failed\n"); + } else { + printf("ETH PHY: %s\n", phy.name); + } + + /* On this platform, U-Boot is copied in RAM by the UBL, + * so we are always in the relocated state. */ + gd->flags |= GD_FLG_RELOC; + + return(0); +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 41a6763..0e49e6c 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -1,6 +1,9 @@ /* * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> * + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2008 Philip Balister, OpenSDR <philip(a)opensdr.com> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of @@ -21,30 +24,24 @@ #define __CONFIG_H #include <asm/sizes.h> -/*=======*/ /* Board */ -/*=======*/ #define SFFSDR #define CFG_NAND_LARGEPAGE #define CFG_USE_NAND -/*===================*/ +#define CFG_USE_DSPLINK /* This is to prevent U-Boot from + * powering ON the DSP. */ /* SoC Configuration */ -/*===================*/ #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ #define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ #define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CFG_HZ 1000 -/*==================================================*/ -/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ -/*==================================================*/ +/* EEPROM definitions for Atmel 24LC64 EEPROM chip */ #define CFG_I2C_EEPROM_ADDR_LEN 2 #define CFG_I2C_EEPROM_ADDR 0x50 #define CFG_EEPROM_PAGE_WRITE_BITS 5 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 -/*=============*/ /* Memory Info */ -/*=============*/ #define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ #define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */ #define CFG_MEMTEST_START 0x80000000 /* memtest start address */ @@ -54,9 +51,7 @@ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ -/*====================*/ /* Serial Driver info */ -/*====================*/ #define CFG_NS16550 #define CFG_NS16550_SERIAL #define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */ @@ -65,16 +60,12 @@ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -/*===================*/ /* I2C Configuration */ -/*===================*/ #define CONFIG_HARD_I2C #define CONFIG_DRIVER_DAVINCI_I2C #define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ #define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ -/*==================================*/ /* Network & Ethernet Configuration */ -/*==================================*/ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT @@ -83,9 +74,7 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE -/*=====================*/ /* Flash & Environment */ -/*=====================*/ #undef CFG_ENV_IS_IN_FLASH #define CFG_NO_FLASH #define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ @@ -98,28 +87,19 @@ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_MAX_CHIPS 1 #define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -/*=====================*/ -/* Board related stuff */ -/*=====================*/ -/*==========================================*/ -/* I2C switch definitions for PCA9543 chip */ -/* on Lyrtech SFF SDR board. */ -/* This chip has a single register. */ -/*==========================================*/ +/* I2C switch definitions for PCA9543 chip */ #define CFG_I2C_PCA9543_ADDR 0x70 -#define CFG_I2C_PCA9543_ADDR_LEN 0 +#define CFG_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ #define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ -/*==============================*/ /* U-Boot general configuration */ -/*==============================*/ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R -#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ -/* Print buffer size */ -#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_PBSIZE \ + (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print buffer size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel @@ -133,25 +113,20 @@ #define CFG_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC -/* - * Define this to load an Integrity kernel. - * -#define CONFIG_CMD_ELF - */ - -/*===================*/ /* Linux Information */ -/*===================*/ #define LINUX_BOOT_PARAM_ADDR 0x80000100 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTARGS \ - "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" -#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" - -/*=================*/ +#define CONFIG_BOOTARGS \ + "mem=56M " \ + "console=ttyS0,115200n8 " \ + "root=/dev/nfs rw noinitrd ip=dhcp " \ + "nfsroot=${serverip}:/nfsroot/sffsdr " \ + "eth0=${ethaddr}" +#define CONFIG_BOOTCOMMAND \ + "nand read 87A00000 100000 300000;" \ + "bootelf 87A00000" /* U-Boot commands */ -/*=================*/ #include <config_cmd_default.h> #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP @@ -167,9 +142,7 @@ #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS -/*=======================*/ /* KGDB support (if any) */ -/*=======================*/ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */

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[U-Boot-Users] [PATCH] Remove useless print message at apollon
by Kyungmin Park 10 Jul '08

10 Jul '08

Remove useless print message at apollon Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/board/apollon/apollon.c b/board/apollon/apollon.c index 7e39817..8efa703 100644 --- a/board/apollon/apollon.c +++ b/board/apollon/apollon.c @@ -153,10 +153,8 @@ void ether_init(void) do { __raw_writew(0x1, LAN_RESET_REGISTER); udelay(100); - if (cnt == 0) { - printf("1. eth reset err\n"); + if (cnt == 0) goto eth_reset_err_out; - } --cnt; } while (__raw_readw(LAN_RESET_REGISTER) != 0x1); @@ -165,10 +163,8 @@ void ether_init(void) do { __raw_writew(0x0, LAN_RESET_REGISTER); udelay(100); - if (cnt == 0) { - printf("2. eth reset err\n"); + if (cnt == 0) goto eth_reset_err_out; - } --cnt; } while (__raw_readw(LAN_RESET_REGISTER) != 0x0000); udelay(1000);

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[U-Boot-Users] [PATCH] Fix LMB type issues
by Andy Fleming 10 Jul '08

10 Jul '08

The LMB code now uses phys_addr_t and phys_size_t. Also, there were a couple of casting problems in the bootm code that called the LMB functions. Signed-off-by: Andy Fleming <afleming(a)freescale.com> --- include/lmb.h | 2 +- lib_generic/lmb.c | 6 +++--- lib_ppc/bootm.c | 5 +++-- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/include/lmb.h b/include/lmb.h index 0283075..14e8727 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -43,7 +43,7 @@ extern phys_addr_t lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align extern phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align, phys_addr_t max_addr); extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr); -extern long lmb_free(struct lmb *lmb, u64 base, u64 size); +extern long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size); extern void lmb_dump_all(struct lmb *lmb); diff --git a/lib_generic/lmb.c b/lib_generic/lmb.c index 93264c1..6b46fa8 100644 --- a/lib_generic/lmb.c +++ b/lib_generic/lmb.c @@ -181,11 +181,11 @@ long lmb_add(struct lmb *lmb, phys_addr_t base, phys_size_t size) return lmb_add_region(_rgn, base, size); } -long lmb_free(struct lmb *lmb, u64 base, u64 size) +long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size) { struct lmb_region *rgn = &(lmb->reserved); - u64 rgnbegin, rgnend; - u64 end = base + size; + phys_addr_t rgnbegin, rgnend; + phys_addr_t end = base + size; int i; rgnbegin = rgnend = 0; /* supress gcc warnings */ diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c index 3c1c18b..677ec62 100644 --- a/lib_ppc/bootm.c +++ b/lib_ppc/bootm.c @@ -205,14 +205,15 @@ do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], for (j = 0; j < total; j++) { fdt_get_mem_rsv(of_flat_tree, j, &addr, &size); - if (addr == (uint64_t)of_flat_tree) { + if (addr == (uint64_t)(ulong)of_flat_tree) { fdt_del_mem_rsv(of_flat_tree, j); break; } } /* Delete the old LMB reservation */ - lmb_free(lmb, (uint64_t)of_flat_tree, fdt_totalsize(of_flat_tree)); + lmb_free(lmb, (phys_addr_t)(ulong)of_flat_tree, + (phys_size_t)fdt_totalsize(of_flat_tree)); /* Calculate the actual size of the fdt */ actualsize = fdt_off_dt_strings(of_flat_tree) + -- 1.5.4.GIT

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[U-Boot-Users] [PATCH] Fix compiler warnings
by Kumar Gala 10 Jul '08

10 Jul '08

gcc-4.3.x generates the following: bootm.c: In function 'do_bootm_linux': bootm.c:208: warning: cast from pointer to integer of different size bootm.c:215: warning: cast from pointer to integer of different size Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- lib_ppc/bootm.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c index 3c1c18b..1d8be4a 100644 --- a/lib_ppc/bootm.c +++ b/lib_ppc/bootm.c @@ -205,14 +205,14 @@ do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], for (j = 0; j < total; j++) { fdt_get_mem_rsv(of_flat_tree, j, &addr, &size); - if (addr == (uint64_t)of_flat_tree) { + if (addr == (uint64_t)(u32)of_flat_tree) { fdt_del_mem_rsv(of_flat_tree, j); break; } } /* Delete the old LMB reservation */ - lmb_free(lmb, (uint64_t)of_flat_tree, fdt_totalsize(of_flat_tree)); + lmb_free(lmb, (uint64_t)(u32)of_flat_tree, fdt_totalsize(of_flat_tree)); /* Calculate the actual size of the fdt */ actualsize = fdt_off_dt_strings(of_flat_tree) + -- 1.5.5.1

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