July 2008 - U-Boot

[U-Boot-Users] [PATCH] add 'license' command to u-boot commandline
by Harald Welte 10 Jul '08

10 Jul '08

[PATCH] add 'license' command to u-boot command line The 'license' command includes the u-boot license (GPLv2) into the actual bootloader binary. The license text can be shown interactively at the u-boot commandline. For products where the commandline can actually be accessed by the end user, this helps to prevent inadvertent GPL violations, since the GPLv2 license text can no longer be 'forgotten' to be included into the product. The 'license' command can be enabled by CONFIG_CMD_LICENSE. Signed-off-by: Harald Welte <laforge(a)gnumonks.org> diff --git a/common/Makefile b/common/Makefile index 265cce7..27c3933 100644 --- a/common/Makefile +++ b/common/Makefile @@ -72,6 +72,7 @@ COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o +COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o COBJS-y += cmd_load.o COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o COBJS-y += cmd_mem.o diff --git a/common/cmd_license.c b/common/cmd_license.c new file mode 100644 index 0000000..540c820 --- /dev/null +++ b/common/cmd_license.c @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2007 by OpenMoko, Inc. + * Author: Harald Welte <laforge(a)openmoko.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CONFIG_CMD_LICENSE) + +#define LICENSE_MAX 20480 +#include <command.h> +#include <malloc.h> +#include <license.h> +int gunzip(void *, int, unsigned char *, unsigned long *); + +int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *tok, *dst = malloc(LICENSE_MAX); + unsigned long len = LICENSE_MAX; + + if (!dst) + return -1; + + if (gunzip(dst, LICENSE_MAX, gpl_gz, &len) != 0) { + printf("Error uncompressing license text\n"); + free(dst); + return -1; + } + puts(dst); + free(dst); + + return 0; +} + +U_BOOT_CMD(license, 1, 1, do_license, + "license - print GPL license text\n", + NULL); + +#endif /* CONFIG_CMD_LICENSE */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 69276a3..70914bc 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -49,6 +49,7 @@ #define CONFIG_CMD_ITEST /* Integer (and string) test */ #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ #define CONFIG_CMD_KGDB /* kgdb */ +#define CONFIG_CMD_LICENSE /* console license display */ #define CONFIG_CMD_LOADB /* loadb */ #define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */ diff --git a/include/license.h b/include/license.h new file mode 100644 index 0000000..7a638eb --- /dev/null +++ b/include/license.h @@ -0,0 +1,583 @@ +/* bin2header converting 'gpl.gz' */ +unsigned char gpl_gz[] = { + 0x1f, 0x8b, 0x08, 0x08, 0xb2, 0x10, 0x0d, 0x46, 0x00, 0x03, + 0x67, 0x70, 0x6c, 0x00, 0x9d, 0x5b, 0x5d, 0x77, 0xdb, 0x46, + 0x92, 0x7d, 0x4e, 0xff, 0x8a, 0x3e, 0x7e, 0x89, 0x74, 0x0e, + 0xc3, 0xc4, 0x9e, 0x9d, 0xdd, 0x49, 0xfc, 0x44, 0x49, 0x94, + 0xcd, 0x1d, 0x99, 0x52, 0x48, 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(ETSI EN 300 175-7 Ch. A6)

9 20

[U-Boot-Users] u-boot, powerpc with device tree, initrd problem
by John Linn 10 Jul '08

10 Jul '08

I realize this could be posted to the linuxppc-dev also, but my kernel is running fine so I think it's a u-boot to kernel interface problem. I am able to pass a device tree to the kernel and get it to boot fine, and using NFS root also. I can't get it to find my initrd ramdisk is my problem. A kernel image, zImage.initrd, works with the ramdisk image, so I think everything is setup ok with the kernel. I'm using a uImage and using mkimage on my ramdisk also for u-boot. I realize it could be that I'm just loading the images in the RAM such that when the kernel gets uncompressed it stomps on the ram disk. I have tried moving to other addresses without any luck. When I look in memory where the ram disk was loaded by uboot, I can see the image fine after the kernel has paniced because it didn't find the root file system. Is there something basic that I'm missing? Thanks, appreciate any help, John => bootm 0x1c00000 0x1800000 0x1000000 ## Booting image at 01c00000 ... Image Name: Linux-2.6.26-rc8 Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size: 1536987 Bytes = 1.5 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Loading RAMDisk Image at 01800000 ... Image Name: Image Type: PowerPC Linux RAMDisk Image (gzip compressed) Data Size: 1507104 Bytes = 1.4 MB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Booting using the fdt at 0x1000000 Loading Ramdisk to 0fd35000, end 0fea4f20 ... OK Loading Device Tree to 007fc000, end 007fefff ... OK Loading Device Tree to 007fa000, end 007fcfff ... OK Using Xilinx Virtex machine description Linux version 2.6.26-rc8 (linnj@wolfgang-pc) (gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) #4 PREEMPT Tue Jul 8 14 :45:07 PDT 2008 Zone PFN ranges: DMA 0 -> 131072 Normal 131072 -> 131072 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0 -> 131072 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048 Kernel command line: console=ttyS0 ip=on root=/dev/ram Xilinx intc at 0xD0020200 mapped to 0xfdfff200 PID hash table entries: 2048 (order: 11, 8192 bytes) clocksource: timebase mult[c800000] shift[22] registered Console: colour dummy device 80x25 Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) Memory: 514432k/524288k available (3024k kernel code, 9332k reserved, 128k data, 149k bss, 156k init) Mount-cache hash table entries: 512 device-tree: Duplicate name in /, renamed to "chosen#1" net_namespace: 624 bytes NET: Registered protocol family 16 PCI: Probing PCI hardware NET: Registered protocol family 2 IP route cache hash table entries: 16384 (order: 4, 65536 bytes) TCP established hash table entries: 65536 (order: 7, 524288 bytes) TCP bind hash table entries: 65536 (order: 6, 262144 bytes) TCP: Hash tables configured (established 65536 bind 65536) TCP reno registered NET: Registered protocol family 1 Installing knfsd (copyright (C) 1996 okir(a)monad.swb.de). msgmni has been set to 1005 io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered io scheduler cfq registered (default) Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled d0000000.serial: ttyS0 at MMIO 0xd0000003 (irq = 16) is a 16550A console [ttyS0] enabled brd: module loaded loop: module loaded Device Tree Probing 'ethernet' xilinx_lltemac 91200000.ethernet: MAC address is now 2: 0: 0: 0: 0: 0 xilinx_lltemac 91200000.ethernet: XLlTemac: using DMA mode. XLlTemac: DCR address: 0x80 XLlTemac: buffer descriptor size: 32768 (0x8000) XLlTemac: Allocating DMA descriptors with kmalloc<6>XLlTemac: (buffer_descriptor_init) phy: 0x1fa08000, virt: 0xdfa08000, size: 0x8000 XTemac: PHY detected at address 7. eth0: Dropping NETIF_F_SG since no checksum feature. xilinx_lltemac 91200000.ethernet: eth0: Xilinx TEMAC at 0x91200000 mapped to 0xE100E000, irq=17 mice: PS/2 mouse device common for all mice i2c /dev entries driver Device Tree Probing 'i2c' d0020000.i2c #0 at 0xD0020000 mapped to 0xE1010000, irq=20 TCP cubic registered NET: Registered protocol family 17 RPC: Registered udp transport module. RPC: Registered tcp transport module. eth0: XLlTemac: Options: 0x3fa eth0: XLlTemac: allocating interrupt 19 for dma mode tx. eth0: XLlTemac: allocating interrupt 18 for dma mode rx. eth0: XLlTemac: speed set to 100Mb/s eth0: XLlTemac: Send Threshold = 24, Receive Threshold = 4 eth0: XLlTemac: Send Wait bound = 254, Receive Wait bound = 254 Sending DHCP requests .., OK IP-Config: Got DHCP answer from 149.199.109.235, my address is 172.16.40.12 IP-Config: Complete: device=eth0, addr=172.16.40.12, mask=255.255.255.0, gw=172.16.40.254, host=172.16.40.12, domain=xilinx.com public.xilinx.com xlnx.xilinx.com public.xsj.xilinx., nis-domain=xil inx.com, bootserver=149.199.109.235, rootserver=149.199.109.235, rootpath=/tmp List of all partitions: No filesystem could mount root, tried: ext2 cramfs msdos vfat romfs Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(1,0) Rebooting in 180 seconds.. This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

2 6

[U-Boot-Users] Undelivered Mail Returned to Sender
by MAILER-DAEMON＠efw-budpar.budpar.go.id 10 Jul '08

10 Jul '08

This is the mail system at host efw-budpar.budpar.go.id. I'm sorry to have to inform you that your message could not be delivered to one or more recipients. It's attached below. For further assistance, please send mail to <postmaster> If you do so, please include this problem report. You can delete your own text from the attached returned message. The mail system <leo(a)yahoo.co.id>: host mx1.mail.sg1.yahoo.com[124.108.116.72] said: 554 delivery error: dd This user doesn't have a yahoo.co.id account (leo(a)yahoo.co.id) [-5] - mta131.mail.sg1.yahoo.com (in reply to end of DATA command)

1 0

[U-Boot-Users] Tftp command !!
by Amit Kumar 10 Jul '08

10 Jul '08

Hello, I downloaded code from ftp://ftp.denx.de/pub/u-boot/u-boot-1.3.3.tar.bz2 In this code, I have made only two changes: 1) #define CFG_MAX_FLASH_SECT 259 (include/configs/pxa255_idp.h) 2) #define CFG_FLASH_PROTECTION 1 (include/configs/pxa255_idp.h) On my board (pxa255), there is one Ethernet controller LAN91C111-Nu (10/100 Base T). I am trying TFTP command on hyper terminal. I am getting following messages: $ Tftp 400000 \tftpboot\example.img Using MAC Address 4C:BB:22:F1:0C:00 TFTP from server 10.152.119.115; our IP address is 10.152.119.151 Filename '/tftpboot/example.img' Load address: 0x400000 Loading: T T T T....................... When I looked into the code, I saw that "Loading: T T T" is in TFTPtimeout function. (File Path : net/tftp.c Function Name : static void TftpTimeout (void) Kindly note that in pxa255_idp.h #define CFG_HZ 3686400 Any idea why file transfer is not happening. I have already followed step 4.6 of DULG-tqm8xxl.pdf Regards, Amit P.S: Please ignore the disclaimer as I cannot remove it. **************** CAUTION - Disclaimer ***************** This e-mail contains PRIVILEGED AND CONFIDENTIAL INFORMATION intended solely for the use of the addressee(s). If you are not the intended recipient, please notify the sender by e-mail and delete the original message. Further, you are not to copy, disclose, or distribute this e-mail or its contents to any other person and any such actions are unlawful. This e-mail may contain viruses. Infosys has taken every reasonable precaution to minimize this risk, but is not liable for any damage you may sustain as a result of any virus in this e-mail. You should carry out your own virus checks before opening the e-mail or attachment. Infosys reserves the right to monitor and review the content of all messages sent to or from this e-mail address. Messages sent to or from this e-mail address may be stored on the Infosys e-mail system. ***INFOSYS******** End of Disclaimer ********INFOSYS***

3 5

[U-Boot-Users] [PATCH] cfi_flash: fix flash on Big Endian machines.
by Sebastian Siewior 10 Jul '08

10 Jul '08

This got broken by commits 93c56f212c [cfi_flash: support of long cmd in U-boot.] That command seems to be access in a little endian way so wrappers are required. Long is the wrong type because it will behave differently on 64bit machnines in a way that is probably not expected. int should be enough. Cc: Alexey Korolev <akorolev(a)infradead.org> Cc: Vasiliy Leonenko <vasiliy.leonenko(a)mail.ru> Signed-off-by: Sebastian Siewior <bigeasy(a)linutronix.de> --- drivers/mtd/cfi_flash.c | 14 ++++++++------ 1 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index c0ea97b..6770496 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -301,24 +301,26 @@ static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, /*----------------------------------------------------------------------- * make a proper sized command based on the port and chip widths */ -static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf) +static void flash_make_cmd (flash_info_t * info, uint cmd, void *cmdbuf) { int i; int cword_offset; int cp_offset; + int cmd_le; uchar val; uchar *cp = (uchar *) cmdbuf; + cmd_le = cpu_to_le32(cmd); for (i = info->portwidth; i > 0; i--){ cword_offset = (info->portwidth-i)%info->chipwidth; #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) cp_offset = info->portwidth - i; - val = *((uchar*)&cmd + cword_offset); + val = *((uchar*)&cmd_le + cword_offset); #else cp_offset = i - 1; - val = *((uchar*)&cmd + sizeof(ulong) - cword_offset - 1); + val = *((uchar*)&cmd_le + sizeof(uint) - cword_offset - 1); #endif - cp[cp_offset] = (cword_offset >= sizeof(ulong)) ? 0x00 : val; + cp[cp_offset] = (cword_offset >= sizeof(uint)) ? 0x00 : val; } } @@ -329,7 +331,7 @@ static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf) static void print_longlong (char *str, unsigned long long data) { int i; - char *cp; + unsigned char *cp; cp = (unsigned char *) &data; for (i = 0; i < 8; i++) @@ -433,7 +435,7 @@ static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, * Write a proper sized command to the correct address */ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, - uint offset, ulong cmd) + uint offset, uint cmd) { void *addr; -- 1.5.5.2

1 0

[U-Boot-Users] Release status - things to be done
by Wolfgang Denk 10 Jul '08

10 Jul '08

Hi everybody, here is a summary of the current state of my processing of patches that have been submitted for the upcoming 1.3.4 release. As you might have noticed, I've been on vacation for the last two weeks, and I spent this time (intentionally) completely offline. So please apologize if parts of the following comments / questions have been obsoleted by recent events - I will try to catch up as soon as possible, but I think it is better to send out this summary now, i. e. _before_ I start reading he backlog of the last two weeks. Here is a list of patches I had marked as open in my list, with comments about their state, including comments who I consider to be responsible for further progress: Open question: * Are CFG_64BIT_LBA and CONFIG_LBA48 kind of redundant? At least it seems that CONFIG_LBA48 requires CFG_64BIT_LBA to be set or we will have problems due to insufficient size of the data types. * We have incompatible definitions of the CPU_TYPE_ENTRY for MPC83xx systems: In "include/asm-ppc/processor.h": 973 #define CPU_TYPE_ENTRY(n, v) \ 974 { .name = #n, .soc_ver = SVR_##v, } But in "cpu/mpc83xx/cpu.c": 47 #define CPU_TYPE_ENTRY(x) {#x, SPR_##x} This causes ``"CPU_TYPE_ENTRY" redefined'' warnings that need to get fixed. -> for MPC83xx custodian * Current NAND code (the "Constants for hardware specific CLE/ALE/NCE functions" in "include/linux/mtd/nand.h", lines 75ff, break building on some boards like NETPHONE, NETTA, NETTA2, NETTA_ISDN, NETVIA_V2, SXNI855T (which have different definitions with the same names in their board config files) with error messages like these: In file included from /home/wd/git/u-boot/work/include/nand.h:29, from board.c:94: /home/wd/git/u-boot/work/include/linux/mtd/nand.h:82:1: warning: "NAND_CTL_SETCLE" redefin ed In file included from /home/wd/git/u-boot/work/include/config.h:4, from /home/wd/git/u-boot/work/include/common.h:35, from board.c:24: /home/wd/git/u-boot/work/include/configs/NETPHONE.h:547:1: warning: this is the location o f the previous definition In file included from /home/wd/git/u-boot/work/include/nand.h:29, from board.c:94: /home/wd/git/u-boot/work/include/linux/mtd/nand.h:84:1: warning: "NAND_CTL_CLRCLE" redefin ed In file included from /home/wd/git/u-boot/work/include/config.h:4, from /home/wd/git/u-boot/work/include/common.h:35, from board.c:24: etc. --> for NAND custodian. * "include/linux/mtd/mtd.h" contains a definition of the DEBUG macro which conflicts with normal use like adding '-DDEBUG' on the command line. Also, I think we whould get rid of all the printk() stuff. --> for NAND custodian. * U-Boot mailing list traffic: 1116 04/24 michael [U-Boot-Users] [PATCH ARM 0/2] Ide support 1117 04/24 michael [U-Boot-Users] [PATCH ARM 1/2] Ide support io function 1118 04/24 michael [U-Boot-Users] [PATCH ARM 2/2] Ide support. Ide registration -> for ARM Custodian 1785 05/06 Martha Marx [U-Boot-Users] [PATCH] Adds configurable IO Pin init for ADS5121 2972 05/29 Martha Marx [U-Boot-Users] [PATCH] Configuration changes for ADS5121 Rev 3 3882 06/16 "Grant Likely" Re: [U-Boot-Users] [PATCH] Configuration changes for ADS5121 Rev 3 2973 05/29 Martha Marx [U-Boot-Users] [PATCH] Changes ADS5121 splash screen from hard-coded bmp to flash bmp 3884 06/16 "Grant Likely" Re: [U-Boot-Users] [PATCH] Changes ADS5121 splash screen from hard-coded bmp to flash bmp 2976 05/29 Martha Marx [U-Boot-Users] [PATCH] Consolidates ADS5121 IO Pin configuration 2979 05/29 Kenneth Johansson Re: [U-Boot-Users] [PATCH] Consolidates ADS5121 IO Pin configuration 3883 06/16 "Grant Likely" Re: [U-Boot-Users] [PATCH] Consolidates ADS5121 IO Pin configuration -> We have a big problem here. The thing is that we need a MPC521x custodian. Grant Likely (custodian for MPC52xx) cannot / does not want to take this responsibility; I would like to help but I cannot as I don't have access to latest hardware. I think that John Rigby is probably in the best position for this role. John, are you (or anybody else) voluteering? 2147 05/13 Jason Jin [PATCH] Feed the watchdog in u-boot for 8610 board. -> for 86xx custodian 2378 05/18 Jean-Christophe P [U-Boot-Users] [PATCH 08/17] marabun_pcmcia: Move compile condition to the Makefile 2379 05/18 Jean-Christophe P [U-Boot-Users] [PATCH 09/17] pxa_pcmcia: Move compile condition to the Makefile 2380 05/18 Jean-Christophe P [U-Boot-Users] [PATCH 10/17] pcmcia/ti_pci1410a: Move compile condition to the Makefile 2447 05/19 Haavard Skinnemoe [PATCH RESEND] Conditionally add -fno-stack-protector to CFLAGS -> applied 2482 05/19 "Daniel Allred" [U-Boot-Users] [PATCH]:arm926ejs: Regression to remove inappropriate LED control code from arch 2490 05/19 Hebbar Re: [U-Boot-Users] [PATCH]:arm926ejs: Regression to remove inappropriate LED control code from -> asked submitter for fixes / cleanup 2514 05/20 Jason McMullan [U-Boot-Users] [PATCH] mips: Use 'CFG_MIPS_CLOCK' to compute the MIPS tick timebase 2528 05/20 Jason McMullan [U-Boot-Users] [PATCH] mips: Support to set CFG_HZ to 1000, consistent with other architectures 2529 05/20 Jason McMullan [U-Boot-Users] [PATCH] [resend] mips: Support to set CFG_HZ to 1000, consistent with other arch 2571 05/21 Shinya Kuribayash Re: [U-Boot-Users] [PATCH] [resend] mips: Support to set CFG_HZ to 1000, consistent with other 2594 05/21 Scott Wood Re: [U-Boot-Users] [PATCH] [resend] mips: Support to set CFG_HZ to 1000, consistent with other -> already handled by MIPS custodian 2536 05/20 Sergey Lapin [U-Boot-Users] [PATCH] DataFlash AT45DB021 support 2618 05/21 "Sergey Lapin" Re: [U-Boot-Users] [PATCH] DataFlash AT45DB021 support 2836 05/26 Sergey Lapin [U-Boot-Users] [AT91] Re: [PATCH] DataFlash AT45DB021 support 2840 05/26 "Matt Gessner" Re: [U-Boot-Users] [AT91] Re: [PATCH] DataFlash AT45DB021 support 2945 05/29 Sergey Lapin Re: [U-Boot-Users] [AT91] Re: [PATCH] DataFlash AT45DB021 support 3371 06/05 Sergey Lapin [U-Boot-Users] [PATCH][AT91][Re-submit] DataFlash AT45DB021 support 3923 06/17 Sergey Lapin Re: [U-Boot-Users] [PATCH][AT91][Re-submit] DataFlash AT45DB021 support -> for AT91 custodian 2547 05/20 Andy Fleming [PATCH 1/4] Add ALIGN() macro 2548 05/20 Andy Fleming [PATCH 2/4] Add lmb_free 2549 05/20 Andy Fleming [PATCH 3/4] Fix an underflow bug in __lmb_alloc_base 2550 05/20 Andy Fleming [PATCH 4/4] Resize device tree to allow space for board changes and the chosen node -> obsoleted by rebased version: 3890 06/16 Andy Fleming [PATCH v3 4/4] Resize device tree to allow space for board changes and the chosen node 3891 06/16 Andy Fleming [PATCH v3 3/4] Fix an underflow bug in __lmb_alloc_base 3892 06/16 Andy Fleming [PATCH v3 1/4] Add ALIGN() macro 3893 06/16 Andy Fleming [PATCH v3 2/4] Add lmb_free 2572 05/21 Kyungmin Park [U-Boot-Users] [PATCH] Use the better ethernet timing at apollon -> applied 2582 05/21 Haavard Skinnemoe [PATCH] MMC: Consolidate MMC/SD command definitions -> Rejected, needs to be rebased 2584 05/21 Haavard Skinnemoe [PATCH] Remove kharris(a)nexus-tech.net from MAINTAINERS -> asked submitter for fixes / cleanup 2620 05/21 Hugo Villeneuve [U-Boot-Users] [PATCH] ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS) 3486 06/06 Hugo Villeneuve [U-Boot-Users] [PATCH V8] ARM: Add support for Lyrtech SFF-SDR board (ARM926EJS) 3966 06/18 "Hugo Villeneuve" Re: [U-Boot-Users] [PATCH V8] ARM: Add support for Lyrtech SFF-SDRboard (ARM926EJS) -> applied 2625 05/21 "Christian Eggers [U-Boot-Users] Fix endianess conversion in usb_ohci.c -> asked USB custodian for feedback. 2629 05/21 "Christian Eggers [U-Boot-Users] [Patch] Configure SMC for a second flash device if required -> for AT91 custodian 2643 05/21 Jason McMullan [U-Boot-Users] [PATCH] mips: If CONFIG_CMD_SPI is defined, call spi_init() 2673 05/23 Shinya Kuribayash Re: [U-Boot-Users] [PATCH] mips: If CONFIG_CMD_SPI is defined, call spi_init() -> already handled by MIPS custodian 2649 05/22 Stelian Pop [U-Boot-Users] [PATCH] Fix boot from NOR due to incorrect reset delay. -> for AT91 custodian 2660 05/22 Haavard Skinnemoe [PATCH v2] MMC: Consolidate MMC/SD command definitions -> applied 2663 05/22 Haavard Skinnemoe [U-Boot-Users] [PATCH] avr32: Fix wrong error flags in atmel_mci driver -> already applied 2664 05/22 Sergey Lapin [U-Boot-Users] [PATCH][Re-Submit] DataFlash AT45DB021 support -> for AT91 custodian 2688 05/22 Jean-Christophe P Re: [U-Boot-Users] [PATCH 18/26] Make nand_init() return the detected NAND size 2694 05/22 Scott Wood Re: [U-Boot-Users] [PATCH 18/26] Make nand_init() return the detected NAND size -> for AT91 custodian 2711 05/22 Scott Wood [U-Boot-Users] [PATCH 1/2] fsl_elbc_nand: workaround for hangs during nand write 2712 05/22 Scott Wood [U-Boot-Users] [PATCH 2/2] fsl_elbc_nand: Hard-code the FBAR/FPAR split. -> for NAND custodian / not for mainline! 2717 05/22 Andy Fleming [PATCH 1/4 v2] Add ALIGN() macro -> obsoleted by 3892 06/16 Andy Fleming [PATCH v3 1/4] Add ALIGN() macro 2735 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 00/18] avr32 patches for 1.3.4 2736 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 01/18] avr32: stk1002 and ngw100 convergence 2737 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 02/18] avr32: Disable the AP7000 internal watchdog on startup 2738 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 03/18] avr32: Use correct condition around macb clock accessors 2739 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 04/18] avr32: Remove unneeded .flashprog section from NGW100 ldscript 2740 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 05/18] avr32: Get rid of the .flashprog section 2741 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 06/18] avr32: Add support for the ATSTK1006 board 2742 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 07/18] avr32: Clean up the HMATRIX code 2743 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 08/18] avr32: Remove unused file cpu/at32ap/pm.c 2744 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 09/18] avr32: Use new-style Makefile for the at32ap platform 2745 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 10/18] avr32: Rename pm_init() as clk_init() and make SoC-specific 2746 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 11/18] avr32: Put memset in its own section 2747 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 12/18] avr32: Use the same entry point for reset and exception handling 2748 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 13/18] avr32: Do stricter stack checking in the exception handler 2750 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 14/18] avr32: Rework SDRAM initialization code 2752 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 16/18] avr32: Fix two warnings in atmel_mci.c 2753 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 17/18] avr32: Fix wrong error flags in atmel_mci driver 2754 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 18/18] avr32: Compile atmel_mci.o conditionally -> already applied 2751 05/23 Haavard Skinnemoe [U-Boot-Users] [PATCH 15/18] atmel_usart: Support fractional baud rate dividers -> dropped by author 2786 05/24 Jean-Christophe P [U-Boot-Users] [PATCH] MAKEALL: add at91 list -> asked submitter for fixes / cleanup 2802 05/24 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH 06/18] avr32: Add support for the ATSTK1006 board 2803 05/24 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH 05/18] avr32: Get rid of the .flashprog section 2831 05/26 Haavard Skinnemoe [U-Boot-Users] [PATCH] avr32: Fix theoretical race in udelay() 2833 05/26 Haavard Skinnemoe [PATCH v4 1/3] Move definition of container_of() to common.h 2834 05/26 Haavard Skinnemoe [PATCH v4 2/3] SPI API improvements 2835 05/26 Haavard Skinnemoe [PATCH v4 3/3] atmel_spi: Driver for the Atmel SPI controller -> already applied 2853 05/27 Jean-Christophe P [U-Boot-Users] [PATCH] [AT91SAM9] Fix NAND FLASH timings -> for AT91 custodian 2858 05/27 wangjiankun820624 [U-Boot-Users] MIPS: about the function of the octeon_twsi_set_addr8 -> for MIPS custodian 2866 05/27 Jason McMullan [U-Boot-Users] [PATCH] mips: Add an 'include/asm/errno.h', like all other architectures 3056 05/31 Shinya Kuribayash Re: [U-Boot-Users] [PATCH] mips: Add an 'include/asm/errno.h', like all other architectures -> already applied 2868 05/27 Anton Vorontsov [U-Boot-Users] [PATCH] 86xx: mpc8610_hpcd: add support for NAND 2886 05/28 Anton Vorontsov [U-Boot-Users] [PATCH 2/2] 86xx: mpc8610_hpcd: add support for NAND 2887 05/28 Kumar Gala Re: [U-Boot-Users] [PATCH] 86xx: mpc8610_hpcd: add support for NAND -> obsoleted by 2885+ 05/28 Anton Vorontsov [U-Boot-Users] [PATCH 1/2] 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h etc. 2936 05/28 "Russell McGuire" Re: [U-Boot-Users] Latest U-Boot MD5 compile error?? 2940 05/28 "Russell McGuire" RE: [U-Boot-Users] Latest U-Boot MD5 compile error?? 2941 05/28 "Russell McGuire" Re: [U-Boot-Users] Latest U-Boot MD5 compile error?? 2985 05/29 "Russell McGuire" RE: [U-Boot-Users] Latest U-Boot MD5 compile error?? -> cannot reproduce the problem, asked submitter for proper patch 2948 05/29 Kumar Gala [U-Boot-Users] [PATCH] 85xx: extended cpu identification -> asked submitter about state: resubmit cleaned up version? 2949 05/29 Tor Krill [U-Boot-Users] [PATCH] Add sata sil3114 support (V2) 3922 06/17 "Tor Krill" Re: [U-Boot-Users] [PATCH] Add sata sil3114 support (V2) -> applied 2950 05/29 Tor Krill [U-Boot-Users] [PATCH] Fix incorrect switch for IF_TYPE in part.c -> already applied. 2971 05/29 Kumar Gala [U-Boot-Users] [PATCH] Allow per file CFLAGS and AFLAGS -> asked submitter why needed. Tend to reject. 2981 05/29 Hugo Villeneuve [U-Boot-Users] [PATCH] Remove duplicate code introduced by commit 597f6c26a18b389903a64692bacbf -> does not apply; asked submitter for rebase/resubmit 2982 05/29 "Tsi-Chung.Liew" [PATCH] ColdFire: Fix UART baudrate formula 2989 05/29 "Tsi-Chung.Liew" [PATCH] ColdFire: Fix UART baudrate formula -> for ColdFire custodian 2994 05/30 sascha.laue@liebh [U-Boot-Users] [PATCH] Change GPIO to control the LSB transmitter on lwmon5 board. -> for ppc_4xx custodian 2995 05/30 sascha.laue@liebh [U-Boot-Users] [PATCH] configure dsp POST and add watchdog reset to the diag cmd. -> applied 3009 05/30 Matthias Fuchs [U-Boot-Users] [PATCH] 4xx: Cleanup CPCI405 variant's config file -> already applied 3046 05/31 Shinya Kuribayash Re: [U-Boot-Users] [MIPS] Convert CPU type name into CONFIG_CPU_* -> asked submitter about state: resubmit cleaned up version? 3128 06/02 Tor Krill [U-Boot-Users] [PATCH] Add missing define to mpc83xx.h -> already applied 3138 06/02 Scott Wood Re: [U-Boot-Users] Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeed 3164 06/02 Grant Erickson Re: [U-Boot-Users] Loading from NAND using 'nboot' Periodically Fails Where 'nand read' Succeed 3165 06/02 Scott Wood [U-Boot-Users] Non-block-skipping NAND commands (was: Loading from NAND using 'nboot' Periodica 3176 06/02 "Stuart Wood" Re: [U-Boot-Users] Non-block-skipping NAND commands (was: Loading from NAND using 'nboot' Perio 3184 06/03 Stefan Roese Re: [U-Boot-Users] Non-block-skipping NAND commands (was: Loading from NAND using 'nboot' Perio 3272 06/04 Matthias Fuchs Re: [U-Boot-Users] Non-block-skipping NAND commands (was: Loading from NAND using 'nboot' Perio 3282 06/04 Detlev Zundel Re: [U-Boot-Users] Non-block-skipping NAND commands -> to be taken care of by NAND custodian 3160 06/02 "Stuart Wood" [U-Boot-Users] [PATCH]jffs2_1pass.c - Adding watchdog support 3161 06/02 "Stuart Wood" [U-Boot-Users] [PATCH]serial_pl010.c - Add watchdog support -> applied 3187 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 02/17] U-Boot-V2:Common:Clock Handle case of clock rollover for get_t 3196 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 02/17] U-Boot-V2:Common:Clock Handle case of clockrollover for get_ti 3206 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 02/17] U-Boot-V2:Common:Clock Handle case of clockrollover for get_ti 3207 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 02/17] U-Boot-V2:Common:Clock Handle case ofclockrollover for get_tim 3211 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 02/17] U-Boot-V2:Common:Clock Handle case ofclockrollover for get_tim 3218 06/03 "Menon, Nishanth" [U-Boot-Users] [Patch 02/17 Try 2] U-Boot-V2:Common:Clock Handle caseofclockrollover for get_ti 3188 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 05/17] U-Boot-V2:ARM: Introduce capability to have different stack/ma 3208 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 05/17] U-Boot-V2:ARM: Introduce capability to havedifferent stack/mal 3212 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 05/17] U-Boot-V2:ARM: Introduce capability to havedifferent stack/mal 3260 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 05/17 Try 2] U-Boot-V2:ARM: Introduce capability tohavedifferent stack/ma 3283 06/04 Sascha Hauer Re: [U-Boot-Users] [Patch 05/17 Try 2] U-Boot-V2:ARM: Introduce capability tohavedifferent stac 3189 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 08/17] U-Boot-V2:Commands: Unbreak loadb support 3210 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 08/17] U-Boot-V2:Commands: Unbreak loadb support 3190 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 09/17] U-Boot-V2:Serial: Add support for NS16550 Driver.` 3213 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 09/17] U-Boot-V2:Serial: Add support for NS16550Driver.` 3223 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 09/17] U-Boot-V2:Serial: Add support for NS16550Driver.` 3263 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 09/17 Try 2] U-Boot-V2:Serial: Add support for NS16550 Driver 3191 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 10/17] U-Boot-V2:ARM:OMAP3: Add support for OMAP and Cortex A8 3193 06/03 "Laurent Desnogue Re: [U-Boot-Users] [Patch 10/17] U-Boot-V2:ARM:OMAP3: Add support for OMAP and Cortex A8 3215 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 10/17] U-Boot-V2:ARM:OMAP3: Add support for OMAP and Cortex A8 3264 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 10/17 Try 2] U-Boot-V2:ARM:OMAP3: Add support for OMAP and Cortex A8 3192 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 11/17 Try 2] U-Boot-V2:ARM:OMAP3: Add support for OMAP3 Silicon files 3214 06/03 "Menon, Nishanth" Re: [U-Boot-Users] [Patch 11/17 Try 2] U-Boot-V2:ARM:OMAP3: Add support for OMAP3Silicon files< 3224 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 11/17 Try 2] U-Boot-V2:ARM:OMAP3: Add support for OMAP3Silicon files< 3265 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 11/17 Try 3] U-Boot-V2:ARM:OMAP3: Add support forOMAP3Silicon files 3194 06/03 Sascha Hauer Re: [U-Boot-Users] [Patch 13/17] U-Boot-V2:ARM:OMAP3: Add generic Headers 3267 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 13/17 Try 2] U-Boot-V2:ARM:OMAP3: Add generic Headers 3259 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 04/17 Try 2] U-Boot-V2:ARM: Remove unwanted flags from Makefile 3266 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 12/17 Try 2] U-Boot-V2:ARM:OMAP3: Add support forOMAP3 Silicon files 3268 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 15/17 Try 2] U-Boot-V2:ARM:OMAP3:SDP3430: Addsupport for SDP3430 support 3269 06/04 "Menon, Nishanth" [U-Boot-Users] [Patch 16/17 Try 2] U-Boot-V2:ARM:OMAP3:SDP3430 Addsupport for SDP3430 board fil 4006 06/18 "Menon, Nishanth" [U-Boot-Users] [Patch] U-Boot-v2: general replace __KERNEL__ with __UBOOT__ -> for V2 custodian 3195 06/03 Dave Liu [U-Boot-Users] [PATCH] ata: fix the bug of signature updated -> applied 3274 06/04 Remy Bohmer [patch] Fix order for reading rx-status registers in 32bit mode of DM9000 3310 06/04 "Ben Warren" Re: [U-Boot-Users] [patch] Fix order for reading rx-status registers in 32bit mode of DM9000 -> already applied 3323 06/04 Jason McMullan [U-Boot-Users] [PATCH] mips: Bring over optimized memset() routine from Linux. 3584 06/10 Shinya Kuribayash Re: [U-Boot-Users] [PATCH] mips: Bring over optimized memset() routine from Linux. -> asked submitter about state: resubmit cleaned up version? 3370 06/04 Kumar Gala [U-Boot-Users] [PATCH] Squash warnings from pointer aliasing in dlmalloc -> asked submitter why needed. Tend to reject. 3382 06/05 Remy Bohmer [U-Boot-Users] [patch] DM9000 fix status check fail 0x6d error for trizeps board -> already applied 3438 06/06 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support 3555 06/10 Nobuhiro Iwamatsu Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support 3557 06/09 Ben Warren Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support 3644 06/11 "Nobuhiro Iwamats Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support -> author will submit new patch 3487 06/06 Marian Balakowicz [U-Boot-Users] [PATCH] [FIT] Delay FIT format check on sector based devices 3537 06/09 Scott Wood Re: [U-Boot-Users] [PATCH] [FIT] Delay FIT format check on sector based devices -> applied 3491 06/07 Dave Liu [PATCH] Remove the obsolete cfg definition -> asked submitter for fixes / cleanup 3492 06/07 Jean-Christophe P [U-Boot-Users] [PATCH] add SHA256 support -> applied 3494 06/07 "Matvejchikov Ily [U-Boot-Users] [PATCH] FDT memory and pci node fixes for MPC8260ADS 3495 06/07 "Matvejchikov Ily [U-Boot-Users] [PATCH] Some copy-n-paste fixes in printf usage -> asked submitter for fixes / cleanup 3497 06/08 Shinya Kuribayash [U-Boot-Users] drivers/net/Makefile: Conditional COBJS inclusion cleanups 3499 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 1/10] net: Conditional COBJS inclusion of bcm570x and tigon3 modules 3500 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 2/10] net: Conditional COBJS inclusion of Realtek modules 3501 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 3/10] net: Conditional COBJS inclusion of Intel modules 3502 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 4/10] net: Conditional COBJS inclusion of INCA-IP switch 3503 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 5/10] net: Conditional COBJS inclusion of National Semiconductor modules< 3504 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 6/10] net: Conditional COBJS inclusion of NET+ARM modules 3505 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 7/10] net: Conditional COBJS inclusion of TSEC and Vitesse modules 3506 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 8/10] net: Conditional COBJS inclusion of SMC modules 3507 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 9/10] net: Conditional COBJS inclusion of Freescale FEC modules 3508 06/08 Shinya Kuribayash [U-Boot-Users] [PATCH 10/10] net: Conditional COBJS inclusino of remainings 3531 06/09 "Ben Warren" Re: [U-Boot-Users] [PATCH 10/10] net: Conditional COBJS inclusino of remainings 3535 06/09 Shinya Kuribayash [U-Boot-Users] [PATCH v2] net: Conditional COBJS inclusion of network drivers -> asked submitter about state: resubmit cleaned up version? 3510 06/08 Juergen Kilb [U-Boot-Users] [PATCH] i.MX31: fixed CTRL-C detection -> applied 3512 06/08 Jason McMullan [U-Boot-Users] [PATCH] mips: When booting Linux images, add 'ethaddr' and 'eth1addr' to the env -> for MIPS custodian 3521 06/08 Ben Warren [U-Boot-Users] [PATCH v2] Move conditional compilation of MPC8XXX SPI driver to Makefile 3532 06/09 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH v2] Move conditional compilation of MPC8XXX SPI driver to Makefile -> applied 3530 06/09 Haavard Skinnemoe [PATCH RESEND #2] Conditionally add -fno-stack-protector to CFLAGS -> already applied 3543 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 0/8] Freescale DDR rewrite 3544 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 1/8] Add proper SPD definitions for DDR1/2/3 3545 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 2/8] Rewrite the FSL mpc8xxx DDR controller setup code. 3546 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 3/8] FSL DDR: Add interactive DDR config support 3547 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 4/8] FSL DDR: Provide a generic fsl_ddr_sdram_set_lawbar() 3548 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 5/8] FSL DDR: Add e500 TLB helper for DDR code 3549 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 6/8] Modify mpc8641HPCN to use the new DDR setup code. 3550 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 7/8] Modify MPC8610HPCD to use the new DDR setup code. 3551 06/09 Kumar Gala [U-Boot-Users] [RFC][FSL DDR 8/8] Modify MPC8544 DS to use the new DDR setup code. 3560 06/09 Jerry Van Baren Re: [U-Boot-Users] [RFC][FSL DDR 1/8] Add proper SPD definitions for DDR1/2/3 3561 06/09 Jon Loeliger Re: [U-Boot-Users] [RFC][FSL DDR 1/8] Add proper SPD definitions for DDR1/2/3 -> not a patch; asked submitter to be sure 3559 06/09 Magnus Lilja [U-Boot-Users] i.MX31: Cleanup comments in lowlevel_init.S. -> applied 3564 06/09 Kim Phillips [U-Boot-Users] [PATCH] fdt_support: add crypto node handling for MPC8{3, 5}xxE processors 3621 06/10 Kumar Gala Re: [U-Boot-Users] [PATCH] fdt_support: add crypto node handling for MPC8{3, 5}xxE processors 3630 06/10 Kim Phillips [PATCH v2] fdt: add crypto node handling for MPC8{3,5}xxE processors 3631 06/10 Jerry Van Baren Re: [PATCH v2] fdt: add crypto node handling for MPC8{3,5}xxE processors 3895 06/16 Kim Phillips [PATCH v3] fdt: add crypto node handling for MPC8{3,5}xxE processors 3896 06/16 Kim Phillips [PATCH v4] fdt: add crypto node handling for MPC8{3, 5}xxE processors 3925 06/17 Kumar Gala Re: [PATCH v4] fdt: add crypto node handling for MPC8{3, 5}xxE processors -> asked submitter about state: resubmit cleaned up version? 3582 06/10 Manuel Sahm [U-Boot-Users] Teridian Phy Support tr78q21x3 3618 06/10 Anatolij Gustschi Re: [U-Boot-Users] Teridian Phy Support tr78q21x3 -> asked submitter for proper patch 3592 06/10 Stefan Roese [U-Boot-Users] [PATCH] ppc4xx: Canyonlands: Disable the RTC M41T62 square wave output -> already applied 3595 06/10 Ben Warren [PATCH v2] Add mechanisms for CPU and board-specific Ethernet initialization 3602 06/10 Jon Loeliger Re: [U-Boot-Users] [PATCH v2] Add mechanisms for CPU and board-specific Ethernet initialization 3606 06/10 Ben Warren Re: [U-Boot-Users] [PATCH v2] Add mechanisms for CPU and board-specific Ethernet initialization 3598 06/11 Shinya Kuribayash Re: [U-Boot-Users] [PATCH] Add mechanisms for CPU and board-specific Ethernet initialization 3599 06/10 Stefan Roese Re: [U-Boot-Users] [PATCH] Add mechanisms for CPU and board-specific Ethernet initialization 3603 06/11 Shinya Kuribayash Re: [U-Boot-Users] [PATCH] Add mechanisms for CPU and board-specific Ethernet initialization 3607 06/10 Ben Warren Re: [U-Boot-Users] [PATCH] Add mechanisms for CPU and board-specific Ethernet initialization 3628 06/11 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH] Add mechanisms for CPU and board-specific Ethernet initialization -> obsoleted by later version, see 3812 06/13 Ben Warren [PATCH V4] Add mechanisms for CPU and board-specific Ethernet initialization 3600 06/10 Jon Loeliger Re: [U-Boot-Users] [PATCH 1/4] Change initdram() return type to phys_size_t 3601 06/10 Stefan Roese Re: [U-Boot-Users] [PATCH 1/4] Change initdram() return type to phys_size_t 3701 06/12 To:Becky Bruce Re: [U-Boot-Users] [PATCH 1/4] Change initdram() return type to phys_size_t -> already applied 3627 06/10 "mark roths" [U-Boot-Users] u-boot and CONFIG_MTD_NAND_ECC_SMC patch -> already applied 3645 06/11 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH v2] net: sh: Renesas SH7763 Ethernet device support -> for net custodian 3648 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 1/6] AT572D940HF-EB Support 3649 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 2/6] AT572D940HF-EB Support 3650 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 3/6] AT572D940HF-EB Support 3651 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 4/6] AT572D940HF-EB Support 3652 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 5/6] AT572D940HF-EB Support 3653 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 6/6] AT572D940HF-EB Support 3654 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3733 06/12 "Ulf Samuelsson" Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3735 06/12 "COSTA, Antonio" Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3737 06/12 "Ulf Samuelsson" Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3739 06/12 Jerry Van Baren Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3859 06/15 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3897 06/16 Ken.Fuchs(a)bench.c Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3899 06/17 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH 1/3] SDHC Support for AT572d940HF-EB 3740 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 1/6] AT572D940HF-EB Support v2 (board folder) 3741 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 2/2] AT572D940HF-EB Support v2 (SDHC support part 2) 3742 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 1/2] AT572D940HF-EB Support v2 (SDHC support part 1) 3743 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 3/6] AT572D940HF-EB Support v2 (include files part 1) 3744 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 5/6] AT572D940HF-EB Support v2 (ethernet files) 3745 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 4/6] AT572D940HF-EB Support v2 (include files part 2) 3747 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 2/6] AT572D940HF-EB Support v2 (cpu folder) 3748 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 6/6] AT572D940HF-EB Support v2 (configuration files) 3746 06/12 "Antonio R. Costa [U-Boot-Users] [PATCH 1/1] mmc_verbosity variable 3764 06/12 Haavard Skinnemoe Re: [U-Boot-Users] [PATCH 1/2] AT572D940HF-EB Support v2 (SDHC support part 1) -> still under discussion; who is reponsible? 3663 06/11 Kumar Gala [PATCH v3] ppc: Added fls, fls64, __ilog2_u64, and ffs64 to bitops -> applied 3725 06/12 Joakim Tjernlund Re: [U-Boot-Users] [PATCH]: Fix for bug: U-boot environment corrupt by reading uninitialized fl -> asked submitter for cleaned up version 3757 06/12 "Steven A. Falco" [U-Boot-Users] Patch to setenv() to return status -> applied 3759 06/12 "Steven A. Falco" [U-Boot-Users] Patch to clean up syntax highlighting -> applied 3760 06/12 Haavard Skinnemoe [U-Boot-Users] [PATCH 3/3] mmc: Move atmel_mci driver into drivers/mmc 3761 06/12 Haavard Skinnemoe [U-Boot-Users] [PATCH 1/3] Create drivers/mmc subdirectory 3762 06/12 Haavard Skinnemoe [U-Boot-Users] [PATCH 2/3] avr32: Use CONFIG_ATMEL_MCI to select the atmel_mci driver 3763 06/12 Haavard Skinnemoe [U-Boot-Users] [PATCH 0/3] Move atmel_mci driver into drivers/mmc -> asked submitter about state: goes in through Atmel repo, or directly? 3766 06/12 "Brian S. Park" Re: [U-Boot-Users] U-Boot and Linux on Walnut based board -> problem confirmed, to be taken care of by PPC4xx custodian. 3812 06/13 Ben Warren [PATCH V4] Add mechanisms for CPU and board-specific Ethernet initialization -> for net custodian. 3828 06/14 Larry Johnson [U-Boot-Users] [PATCH] ppc4xx: Update and add FDT to Korat board support 3829 06/14 Larry Johnson [U-Boot-Users] [PATCH] pp44xx: Remove implementation of testdram() from Korat board support -> for ppc4xx custodian 3871 06/16 Stefan Roese [U-Boot-Users] [PATCH] cfi-flash: Fix problem in flash_toggle(), busy was not detected reliably -> for CFI-Flash custodian 3873 06/16 Kenneth Johansson Re: [U-Boot-Users] U-Boot booting from NAND -> asked author to post patches 3881 06/16 Philip Balister [U-Boot-Users] [PATCH] small patch for env_nand.c 3889 06/16 Scott Wood Re: [U-Boot-Users] [PATCH] small patch for env_nand.c -> already handled by NAND custodian 3890 06/16 Andy Fleming [PATCH v3 4/4] Resize device tree to allow space for board changes and the chosen node 3891 06/16 Andy Fleming [PATCH v3 3/4] Fix an underflow bug in __lmb_alloc_base 3892 06/16 Andy Fleming [PATCH v3 1/4] Add ALIGN() macro 3893 06/16 Andy Fleming [PATCH v3 2/4] Add lmb_free -> applied. 3901 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH] net: ne2000: Move dev_addr variable from grobal to local. 3902 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH] net: ne2000: Fix compile error of NE2000 -> for net custodian 3905 06/17 "Nobuhiro Iwamats Re: [U-Boot-Users] [PATCH][RFC] pci: Remove CONFIG_PCI_SKIP_HOST_BRIDGE and Add check PCI class 3908 06/17 Nobuhiro Iwamatsu [PATCH][RFC] pci: Add check PCI bridge class (Re: [U-Boot-Users] [PATCH][RFC] pci: Remove CONFI -> asked other users (Stefan Roese) for feedback 3655 06/11 "Antonio R. Costa [U-Boot-Users] [PATCH 1/1] FAT Bare Partition Support 3909 06/17 "Antonio R. Costa Re: [U-Boot-Users] [PATCH 1/1] FAT Bare Partition Support 3921 06/17 Michal Simek Re: [U-Boot-Users] [PATCH 1/1] FAT Bare Partition Support -> do nothing; waiting for resubmit 3910 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 1/9] sh: Cleanup source code of MS7720SE 3911 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 2/9] sh: Cleanup source code of MS7722SE 3912 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 4/9] sh: Cleanup source code of R2DPlus 3913 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 3/9] sh: Cleanup source code of R7780MP 3914 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 5/9] sh: Cleanup source code of SH7763RDP 3915 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 6/9] sh: Update Hitachi MS7722SE board 3916 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 7/9] sh: Update Renesas Migo-R board 3917 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 8/9] sh: Update Renesas R7780MP board 3918 06/17 Nobuhiro Iwamatsu [U-Boot-Users] [PATCH 9/9] sh: Update Renesas R2DPlus board -> for SH custodian 3919 06/17 Nobuhiro Iwamatsu [PATCH][RFC] pci: Divided pci code of the powerpc -> RFC - waiting for comments from others 3934 06/17 Kim Phillips [PATCH 1/2] mpc85xx: use IS_E_PROCESSOR macro 3963 06/18 Kumar Gala [U-Boot-Users] [PATCH] 85xx: Cleanup L2 cache size detection 3964 06/18 Kumar Gala [U-Boot-Users] [PATCH] MPC8544DS: Report board id, board version and fpga version. -> for 85xx custodian 3935 06/17 Kim Phillips [U-Boot-Users] [PATCH 2/2] mpc83xx: move CPU_TYPE_ENTRY over to processor.h -> for 83xx custodian 3944 06/18 Esben Haabendal [U-Boot-Users] [PATCH] mpc8260: add fdt_fixup_ethernet support -> applied 3984 06/18 Hugo Villeneuve [U-Boot-Users] [PATCH 1/2] Remove duplicate definitions in include/lxt971a.h. 3985 06/18 Hugo Villeneuve [U-Boot-Users] [PATCH 2/2] Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c. -> for net custodian 4000 06/18 Magnus Lilja [U-Boot-Users] i.MX31: mx31_gpio_mux() problem -> do nothing; waiting for resubmit 4011 06/19 Kumar Gala [U-Boot-Users] [PATCH] MPC8641HPCN: Report board id, board version and fpga version. 4025 06/19 Jon Loeliger Re: [U-Boot-Users] [PATCH] MPC8641HPCN: Report board id, board version and fpga version. 4012 06/19 Kumar Gala [U-Boot-Users] [PATCH] MPC8610HPCD: Report board id, board version and fpga version. -> already taken care of by 86xx custodian 4015 06/19 Gary Jennejohn [U-Boot-Users] [PATCH] Add a logo for RRvision. 4016 06/19 Gary Jennejohn [U-Boot-Users] [PATCH] Add another logo for RRvision. -> applied 4026 06/18 Jason McMullan [U-Boot-Users] [PATCH] mtd: SPI Flash: Winbond W25X16/WX2532/WX2564 support 4027 06/19 Jason McMullan [U-Boot-Users] [PATCH] mtd: SPI Flash: Support the ST Microelectronics M25P80 and M25P40 4028 06/19 "McMullan, Jason" [U-Boot-Users] MTD Winbond and MTD STMicro SPI Flash Support -> for MTD custodian 4102 06/20 Haavard Skinnemoe [U-Boot-Users] [PATCH 2/3] avr32: Fix SPI portmux initialization 4103 06/20 Haavard Skinnemoe [U-Boot-Users] [PATCH 1/3] avr32: Add GPIO manipulation functions 4104 06/20 Haavard Skinnemoe [U-Boot-Users] [PATCH 3/3] avr32: Enable SPI flash support on ATNGW100 -> for avr32 custodian 4110 06/20 Timur Tabi [U-Boot-Users] [PATCH v2] Update Freescale sys_eeprom.c to handle CCID formats 4119 06/20 Ben Warren Re: [U-Boot-Users] [PATCH v2] Update Freescale sys_eeprom.c to handle CCID formats -> do nothing; waiting for reply to Ben's question or resubmit 4123 06/20 Detlev Zundel [U-Boot-Users] [PATCH] fdt: Fix typo in variable name. -> applied For submitters of patches: Please check if your sumissions have either been applied to the current git repository, or if they are listed here. Otherwise it is likely that I have missed your patch, so please send a reminder then. For custodians: Please check if you already have picked up the listed patches and send me a pull request, if appropriate. Thanks in advance! Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de The following statement is not true. The previous statement is true.

14 22

[U-Boot-Users] Undelivered Mail Returned to Sender
by MAILER-DAEMON＠efw-budpar.budpar.go.id 10 Jul '08

10 Jul '08

This is the mail system at host efw-budpar.budpar.go.id. I'm sorry to have to inform you that your message could not be delivered to one or more recipients. It's attached below. For further assistance, please send mail to <postmaster> If you do so, please include this problem report. You can delete your own text from the attached returned message. The mail system <bush(a)lists.debian.org>: host liszt.debian.org[82.195.75.100] said: 550 5.1.1 <bush(a)lists.debian.org>: Recipient address rejected: User unknown in virtual alias table (in reply to RCPT TO command)

1 0

[U-Boot-Users] [PATCH] sh: Renesas R0P7785LC0011RL board support
by Yoshihiro Shimoda 10 Jul '08

10 Jul '08

This board has SH7785, 512MB DDR2-SDRAM, NOR Flash, Graphic controller, Ethernet, USB, SD, and RTC. This patch supports the following functions: - 128MB DDR2-SDRAM (29-bit address mode only) - NOR Flash - USB host - Ethernet Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 5 + board/r0p7785lc0011rl/Makefile | 43 ++++ board/r0p7785lc0011rl/config.mk | 26 +++ board/r0p7785lc0011rl/lowlevel_init.S | 318 +++++++++++++++++++++++++++ board/r0p7785lc0011rl/r0p7785lc0011rl.c | 51 +++++ board/r0p7785lc0011rl/rtl8169.h | 62 ++++++ board/r0p7785lc0011rl/rtl8169_mac.c | 354 +++++++++++++++++++++++++++++++ board/r0p7785lc0011rl/selfcheck.c | 196 +++++++++++++++++ board/r0p7785lc0011rl/u-boot.lds | 97 +++++++++ include/configs/r0p7785lc0011rl.h | 173 +++++++++++++++ 12 files changed, 1327 insertions(+), 0 deletions(-) create mode 100644 board/r0p7785lc0011rl/Makefile create mode 100644 board/r0p7785lc0011rl/config.mk create mode 100644 board/r0p7785lc0011rl/lowlevel_init.S create mode 100644 board/r0p7785lc0011rl/r0p7785lc0011rl.c create mode 100644 board/r0p7785lc0011rl/rtl8169.h create mode 100644 board/r0p7785lc0011rl/rtl8169_mac.c create mode 100644 board/r0p7785lc0011rl/selfcheck.c create mode 100644 board/r0p7785lc0011rl/u-boot.lds create mode 100644 include/configs/r0p7785lc0011rl.h diff --git a/MAINTAINERS b/MAINTAINERS index a3d70b1..b6f7002 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -731,6 +731,7 @@ Mark Jonas <mark.jonas(a)de.bosch.com> Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> MS7720SE SH7720 + R0P77850011RL SH7785 Yusuke Goda <goda.yusuke(a)renesas.com> diff --git a/MAKEALL b/MAKEALL index 9f80b3d..3cb4353 100755 --- a/MAKEALL +++ b/MAKEALL @@ -753,6 +753,7 @@ LIST_sh4=" \ r7780mp \ r2dplus \ sh7763rdp \ + r0p7785lc0011rl \ " LIST_sh=" \ diff --git a/Makefile b/Makefile index ac3f98f..2ab08a4 100644 --- a/Makefile +++ b/Makefile @@ -2955,6 +2955,11 @@ sh7763rdp_config : unconfig @echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h @./mkconfig -a $(@:_config=) sh sh4 sh7763rdp +r0p7785lc0011rl_config : unconfig + @ >include/config.h + @echo "#define CONFIG_R0P7785LC0011RL 1" >> include/config.h + @./mkconfig -a $(@:_config=) sh sh4 r0p7785lc0011rl + #======================================================================== # SPARC #======================================================================== diff --git a/board/r0p7785lc0011rl/Makefile b/board/r0p7785lc0011rl/Makefile new file mode 100644 index 0000000..123a937 --- /dev/null +++ b/board/r0p7785lc0011rl/Makefile @@ -0,0 +1,43 @@ +# +# Copyright (C) 2008 +# Renesas Solutions Corp. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +COBJS := r0p7785lc0011rl.o selfcheck.o rtl8169_mac.o +SOBJS := lowlevel_init.o + +$(LIB): $(COBJS) $(SOBJS) + $(AR) crv $@ $(COBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/r0p7785lc0011rl/config.mk b/board/r0p7785lc0011rl/config.mk new file mode 100644 index 0000000..93761ee --- /dev/null +++ b/board/r0p7785lc0011rl/config.mk @@ -0,0 +1,26 @@ +# +# Copyright (C) 2007 +# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +# +# TEXT_BASE refers to image _after_ relocation. +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# +TEXT_BASE = 0x0ff80000 + diff --git a/board/r0p7785lc0011rl/lowlevel_init.S b/board/r0p7785lc0011rl/lowlevel_init.S new file mode 100644 index 0000000..8126296 --- /dev/null +++ b/board/r0p7785lc0011rl/lowlevel_init.S @@ -0,0 +1,318 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <config.h> +#include <version.h> +#include <asm/processor.h> + +.macro write32, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.l r0, @r1 +.endm + +.macro write16, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.w r0, @r1 +.endm + +.macro write8, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.b r0, @r1 +.endm + +.macro wait_timer, time + mov.l \time ,r3 +1: + nop + tst r3, r3 + bf/s 1b + dt r3 +.endm + +#include <asm/processor.h> + + .global lowlevel_init + + .text + .align 2 + +lowlevel_init: + wait_timer WAIT_200US + wait_timer WAIT_200US + + /*------- LBSC -------*/ + write32 MMSELR_A, MMSELR_D + + /*------- DBSC2 -------*/ + write32 DBSC2_DBCONF_A, DBSC2_DBCONF_D + write32 DBSC2_DBTR0_A, DBSC2_DBTR0_D + write32 DBSC2_DBTR1_A, DBSC2_DBTR1_D + write32 DBSC2_DBTR2_A, DBSC2_DBTR2_D + write32 DBSC2_DBFREQ_A, DBSC2_DBFREQ_D1 + write32 DBSC2_DBFREQ_A, DBSC2_DBFREQ_D2 + wait_timer WAIT_200US + + write32 DBSC2_DBDICODTOCD_A, DBSC2_DBDICODTOCD_D + write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_CKE_H + wait_timer WAIT_200US + write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_PALL + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_EMRS2 + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_EMRS3 + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_EMRS1_1 + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_MRS_1 + write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_PALL + write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_REF + write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_REF + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_MRS_2 + wait_timer WAIT_200US + + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_EMRS1_2 + write32 DBSC2_DBMRCNT_A, DBSC2_DBMRCNT_D_EMRS1_1 + + write32 DBSC2_DBEN_A, DBSC2_DBEN_D + write32 DBSC2_DBRFCNT1_A, DBSC2_DBRFCNT1_D + write32 DBSC2_DBRFCNT2_A, DBSC2_DBRFCNT2_D + write32 DBSC2_DBRFCNT0_A, DBSC2_DBRFCNT0_D + wait_timer WAIT_200US + + /*------- GPIO -------*/ + write16 PACR_A, PACR_D + write16 PBCR_A, PBCR_D + write16 PCCR_A, PCCR_D + write16 PDCR_A, PDCR_D + write16 PECR_A, PECR_D + write16 PFCR_A, PFCR_D + write16 PGCR_A, PGCR_D + write16 PHCR_A, PHCR_D + write16 PJCR_A, PJCR_D + write16 PKCR_A, PKCR_D + write16 PLCR_A, PLCR_D + write16 PMCR_A, PMCR_D + write16 PNCR_A, PNCR_D + write16 PPCR_A, PPCR_D + write16 PQCR_A, PQCR_D + write16 PRCR_A, PRCR_D + + write8 PEPUPR_A, PEPUPR_D + write8 PHPUPR_A, PHPUPR_D + write8 PJPUPR_A, PJPUPR_D + write8 PKPUPR_A, PKPUPR_D + write8 PLPUPR_A, PLPUPR_D + write8 PMPUPR_A, PMPUPR_D + write8 PNPUPR_A, PNPUPR_D + write16 PPUPR1_A, PPUPR1_D + write16 PPUPR2_A, PPUPR2_D + write16 P1MSELR_A, P1MSELR_D + write16 P2MSELR_A, P2MSELR_D + + /*------- LBSC -------*/ + write32 BCR_A, BCR_D + write32 CS0BCR_A, CS0BCR_D + write32 CS0WCR_A, CS0WCR_D + write32 CS1BCR_A, CS1BCR_D + write32 CS1WCR_A, CS1WCR_D + write32 CS4BCR_A, CS4BCR_D + write32 CS4WCR_A, CS4WCR_D + + mov.l PASCR_A, r0 + mov.l @r0, r2 + mov.l PASCR_32BIT_MODE, r1 + tst r1, r2 + bt lbsc_29bit + + write32 CS2BCR_A, CS_USB_BCR_D + write32 CS2WCR_A, CS_USB_WCR_D + write32 CS3BCR_A, CS_SD_BCR_D + write32 CS3WCR_A, CS_SD_WCR_D + write32 CS5BCR_A, CS_I2C_BCR_D + write32 CS5WCR_A, CS_I2C_WCR_D + write32 CS6BCR_A, CS0BCR_D + write32 CS6WCR_A, CS0WCR_D + bra lbsc_end + nop + +lbsc_29bit: + write32 CS5BCR_A, CS_USB_BCR_D + write32 CS5WCR_A, CS_USB_WCR_D + write32 CS6BCR_A, CS_SD_BCR_D + write32 CS6WCR_A, CS_SD_WCR_D + +lbsc_end: + + write32 CCR_A, CCR_D + + rts + nop + + .align 4 + +/*------- LBSC -------*/ +MMSELR_A: .long 0xfc400020 +MMSELR_D: .long 0xa5a50002 + +/*------- DBSC2 -------*/ +#define DBSC2_BASE 0xfe800000 +DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c +DBSC2_DBEN_A: .long DBSC2_BASE + 0x10 +DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14 +DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20 +DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30 +DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34 +DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38 +DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40 +DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44 +DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48 +DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c +DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50 +DBSC2_DBDICODTOCD_A: .long DBSC2_BASE + 0x54 +DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60 +DDR_DUMMY_ACCESS_A: .long 0x40000000 + +DBSC2_DBCONF_D: .long 0x00630002 +DBSC2_DBTR0_D: .long 0x050b1f04 +DBSC2_DBTR1_D: .long 0x00040204 +DBSC2_DBTR2_D: .long 0x02100308 +DBSC2_DBFREQ_D1: .long 0x00000000 +DBSC2_DBFREQ_D2: .long 0x00000100 +DBSC2_DBDICODTOCD_D: .long 0x000f0907 + +DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003 +DBSC2_DBCMDCNT_D_PALL: .long 0x00000002 +DBSC2_DBCMDCNT_D_REF: .long 0x00000004 + +DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000 +DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000 +DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006 +DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386 +DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952 +DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852 + +DBSC2_DBEN_D: .long 0x00000001 + +DBSC2_DBPDCNT0_D3: .long 0x00000080 +DBSC2_DBRFCNT1_D: .long 0x00000926 +DBSC2_DBRFCNT2_D: .long 0x00fe00fe +DBSC2_DBRFCNT0_D: .long 0x00010000 + +WAIT_200US: .long 33333 + +/*------- GPIO -------*/ +#define GPIO_BASE 0xffe70000 +PACR_A: .long GPIO_BASE + 0x00 +PBCR_A: .long GPIO_BASE + 0x02 +PCCR_A: .long GPIO_BASE + 0x04 +PDCR_A: .long GPIO_BASE + 0x06 +PECR_A: .long GPIO_BASE + 0x08 +PFCR_A: .long GPIO_BASE + 0x0a +PGCR_A: .long GPIO_BASE + 0x0c +PHCR_A: .long GPIO_BASE + 0x0e +PJCR_A: .long GPIO_BASE + 0x10 +PKCR_A: .long GPIO_BASE + 0x12 +PLCR_A: .long GPIO_BASE + 0x14 +PMCR_A: .long GPIO_BASE + 0x16 +PNCR_A: .long GPIO_BASE + 0x18 +PPCR_A: .long GPIO_BASE + 0x1a +PQCR_A: .long GPIO_BASE + 0x1c +PRCR_A: .long GPIO_BASE + 0x1e +PEPUPR_A: .long GPIO_BASE + 0x48 +PHPUPR_A: .long GPIO_BASE + 0x4e +PJPUPR_A: .long GPIO_BASE + 0x50 +PKPUPR_A: .long GPIO_BASE + 0x52 +PLPUPR_A: .long GPIO_BASE + 0x54 +PMPUPR_A: .long GPIO_BASE + 0x56 +PNPUPR_A: .long GPIO_BASE + 0x58 +PPUPR1_A: .long GPIO_BASE + 0x60 +PPUPR2_A: .long GPIO_BASE + 0x62 +P1MSELR_A: .long GPIO_BASE + 0x80 +P2MSELR_A: .long GPIO_BASE + 0x82 + +PACR_D: .long 0x0000 +PBCR_D: .long 0x0000 +PCCR_D: .long 0x0000 +PDCR_D: .long 0x0000 +PECR_D: .long 0x0000 +PFCR_D: .long 0x0000 +PGCR_D: .long 0x0000 +PHCR_D: .long 0x00c0 +PJCR_D: .long 0xc3fc +PKCR_D: .long 0x03ff +PLCR_D: .long 0x0000 +PMCR_D: .long 0xffff +PNCR_D: .long 0xf0c3 +PPCR_D: .long 0x0000 +PQCR_D: .long 0x0000 +PRCR_D: .long 0x0000 + +PEPUPR_D: .long 0xff +PHPUPR_D: .long 0x00 +PJPUPR_D: .long 0x00 +PKPUPR_D: .long 0x00 +PLPUPR_D: .long 0x00 +PMPUPR_D: .long 0xfc +PNPUPR_D: .long 0x00 +PPUPR1_D: .long 0xffbf +PPUPR2_D: .long 0xff00 +P1MSELR_D: .long 0x3780 +P2MSELR_D: .long 0x0000 + +/*------- LBSC -------*/ +PASCR_A: .long 0xff000070 +PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */ + +BCR_A: .long BCR +CS0BCR_A: .long CS0BCR +CS0WCR_A: .long CS0WCR +CS1BCR_A: .long CS1BCR +CS1WCR_A: .long CS1WCR +CS2BCR_A: .long CS2BCR +CS2WCR_A: .long CS2WCR +CS3BCR_A: .long CS3BCR +CS3WCR_A: .long CS3WCR +CS4BCR_A: .long CS4BCR +CS4WCR_A: .long CS4WCR +CS5BCR_A: .long CS5BCR +CS5WCR_A: .long CS5WCR +CS6BCR_A: .long CS6BCR +CS6WCR_A: .long CS6WCR + +BCR_D: .long 0x80000003 +CS0BCR_D: .long 0x22222340 +CS0WCR_D: .long 0x00111118 +CS1BCR_D: .long 0x11111100 +CS1WCR_D: .long 0x33333303 +CS4BCR_D: .long 0x11111300 +CS4WCR_D: .long 0x00101012 + +/* USB setting : 32bit mode = CS2, 29bit mode = CS5 */ +CS_USB_BCR_D: .long 0x11111200 +CS_USB_WCR_D: .long 0x00020004 + +/* SD setting : 32bit mode = CS3, 29bit mode = CS6 */ +CS_SD_BCR_D: .long 0x00000300 +CS_SD_WCR_D: .long 0x00030108 + +/* I2C setting : 32bit mode = CS5, 29bit mode = CS1(already setting) */ +CS_I2C_BCR_D: .long 0x11111100 +CS_I2C_WCR_D: .long 0x00000003 + +CCR_A: .long 0xff00001c +CCR_D: .long 0x0000090b + diff --git a/board/r0p7785lc0011rl/r0p7785lc0011rl.c b/board/r0p7785lc0011rl/r0p7785lc0011rl.c new file mode 100644 index 0000000..5b9c403 --- /dev/null +++ b/board/r0p7785lc0011rl/r0p7785lc0011rl.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> +#include <asm/pci.h> + +int checkboard(void) +{ + puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n"); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CFG_SDRAM_BASE; + gd->bd->bi_memsize = CFG_SDRAM_SIZE; + printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +static struct pci_controller hose; +void pci_init_board(void) +{ + pci_sh7780_init(&hose); +} + diff --git a/board/r0p7785lc0011rl/rtl8169.h b/board/r0p7785lc0011rl/rtl8169.h new file mode 100644 index 0000000..3d44153 --- /dev/null +++ b/board/r0p7785lc0011rl/rtl8169.h @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define PCIREG_8(_adr) (*(volatile unsigned char *)(_adr)) +#define PCIREG_32(_adr) (*(volatile unsigned long *)(_adr)) +#define PCI_PAR PCIREG_32(0xfe0401c0) +#define PCI_PDR PCIREG_32(0xfe040220) +#define PCI_CR PCIREG_32(0xfe040100) +#define PCI_CONF1 PCIREG_32(0xfe040004) + +#define EEPROM_ADD 0x00000050 +#define HIGH 1 +#define LOW 0 + +#define PCI_PROG 0x80 + +#define PCI_EEP_ADDRESS (unsigned short)0x0007 +#define PCI_MAC_ADDRESS_SIZE 3 + +#define TIME1 100 +#define TIME2 20000 + +#define BIT_DUMMY 0 +#define MAC_EEP_READ 1 +#define MAC_EEP_WRITE 2 +#define MAC_EEP_ERACE 3 +#define MAC_EEP_EWEN 4 +#define MAC_EEP_EWDS 5 + +#define DEBUG 0 + +/* RTL8169 */ +const unsigned short EEPROM_W_Data_8169_A[] = { + 0x8129, 0x10ec, 0x8169, 0x1154, 0x032b, + 0x4020, 0xa101 +}; +const unsigned short EEPROM_W_Data_8169_B[] = { + 0x4d15, 0xf7c2, 0x8000, 0x0000, 0x0000, 0x1300, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x2000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 +}; + diff --git a/board/r0p7785lc0011rl/rtl8169_mac.c b/board/r0p7785lc0011rl/rtl8169_mac.c new file mode 100644 index 0000000..9088cf0 --- /dev/null +++ b/board/r0p7785lc0011rl/rtl8169_mac.c @@ -0,0 +1,354 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include "rtl8169.h" + + +static unsigned int Device; +static unsigned char *PCI_MEMR; + +static void mac_delay(unsigned int cnt) +{ + udelay(cnt); +} + +static void mac_pci_setup(void) +{ + unsigned long pci_data; + + PCI_PAR = 0x00000010; + PCI_PDR = 0x00001000; + PCI_PAR = 0x00000004; + pci_data = PCI_PDR; + PCI_PDR = pci_data | 0x00000007; + PCI_PAR = 0x00000010; + + PCI_MEMR = (unsigned char *)((PCI_PDR | 0xFE240050) & 0xFFFFFFF0); +} + +static void EECS(int level) +{ + unsigned char data = *PCI_MEMR; + + if (level) + *PCI_MEMR = data | 0x08; + else + *PCI_MEMR = data & 0xf7; +} + +static void EECLK(int level) +{ + unsigned char data = *PCI_MEMR; + + if (level) + *PCI_MEMR = data | 0x04; + else + *PCI_MEMR = data & 0xfb; +} + +static void EEDI(int level) +{ + unsigned char data = *PCI_MEMR; + + if (level) + *PCI_MEMR = data | 0x02; + else + *PCI_MEMR = data & 0xfd; +} + +static inline void MacBitDtSet(unsigned short bit) +{ + if (bit) + EEDI(HIGH); + else + EEDI(LOW); + + EECLK(LOW); + mac_delay(TIME1); + EECLK(HIGH); + mac_delay(TIME1); + EEDI(LOW); +} + +static inline unsigned char MacBitDtGet(void) +{ + unsigned char bit; + + EECLK(LOW); + mac_delay(TIME1); + bit = *PCI_MEMR & 0x01; + EECLK(HIGH); + mac_delay(TIME1); + + return bit; +} + +static inline void MacEpSetCmd(unsigned char command) +{ + MacBitDtSet(BIT_DUMMY); + switch (command) { + case MAC_EEP_READ: + MacBitDtSet(1); + MacBitDtSet(1); + MacBitDtSet(0); + break; + case MAC_EEP_WRITE: + MacBitDtSet(1); + MacBitDtSet(0); + MacBitDtSet(1); + break; + case MAC_EEP_ERACE: + MacBitDtSet(1); + MacBitDtSet(1); + MacBitDtSet(1); + break; + case MAC_EEP_EWEN: + MacBitDtSet(1); + MacBitDtSet(0); + MacBitDtSet(0); + break; + case MAC_EEP_EWDS: + MacBitDtSet(1); + MacBitDtSet(0); + MacBitDtSet(0); + break; + default: + break; + } +} + +static inline unsigned short MacEpGetDt(void) +{ + unsigned short data = 0; + int i; + + MacBitDtGet(); /* DUMMY */ + for (i = 0 ; i < 16 ; i++) { + data <<= 1; + data |= MacBitDtGet(); + } + return data; +} + +static inline void MacEpSetAdd(unsigned short address) +{ + MacBitDtSet(address & 0x0020); /* A5 */ + MacBitDtSet(address & 0x0010); /* A4 */ + MacBitDtSet(address & 0x0008); /* A3 */ + MacBitDtSet(address & 0x0004); /* A2 */ + MacBitDtSet(address & 0x0002); /* A1 */ + MacBitDtSet(address & 0x0001); /* A0 */ +} + +static inline void MacEepSetData(unsigned short data) +{ + MacBitDtSet(data & 0x8000); + MacBitDtSet(data & 0x4000); + MacBitDtSet(data & 0x2000); + MacBitDtSet(data & 0x1000); + MacBitDtSet(data & 0x0800); + MacBitDtSet(data & 0x0400); + MacBitDtSet(data & 0x0200); + MacBitDtSet(data & 0x0100); + MacBitDtSet(data & 0x0080); + MacBitDtSet(data & 0x0040); + MacBitDtSet(data & 0x0020); + MacBitDtSet(data & 0x0010); + MacBitDtSet(data & 0x0008); + MacBitDtSet(data & 0x0004); + MacBitDtSet(data & 0x0002); + MacBitDtSet(data & 0x0001); +} + +static void MacDataWrite(const unsigned short *data, unsigned short address, + unsigned int count) +{ + unsigned int i; + + for (i = 0; i < count; i++) { + EECS(HIGH); + EEDI(LOW); + mac_delay(TIME1); + + MacEpSetCmd(MAC_EEP_WRITE); + MacEpSetAdd(address++); + MacEepSetData(*(data + i)); + + EECLK(LOW); + EEDI(LOW); + EECS(LOW); + mac_delay(TIME2); + } +} + +static void MacAddressErace(void) +{ + unsigned int i; + unsigned short pci_address = 7; + + for (i = 0; i < 3; i++) { + EECS(HIGH); + EEDI(LOW); + mac_delay(TIME1); + MacEpSetCmd(MAC_EEP_ERACE); + MacEpSetAdd(pci_address++); + mac_delay(TIME1); + EECLK(LOW); + EEDI(LOW); + EECS(LOW); + } + + mac_delay(TIME2); + + printf("\n\nErace End\n"); + for (i = 0; i < 10; i++) + mac_delay(TIME2); +} + +static void MacAddressWrite(unsigned short *data) +{ + MacAddressErace(); + + MacDataWrite(EEPROM_W_Data_8169_A, 0x0000, 7); + MacDataWrite(data, PCI_EEP_ADDRESS, PCI_MAC_ADDRESS_SIZE); + MacDataWrite(EEPROM_W_Data_8169_B, 0x000a, 54); +} + +void MacDtRd(unsigned char *buf, unsigned short address, unsigned int count) +{ + unsigned int i; + unsigned short wk; + + for (i = 0 ; i < count; i++) { + EECS(HIGH); + EEDI(LOW); + mac_delay(TIME1); + MacEpSetCmd(MAC_EEP_READ); + MacEpSetAdd(address++); + wk = MacEpGetDt(); + + *buf++ = (unsigned char)(wk & 0xff); + *buf++ = (unsigned char)((wk >> 8) & 0xff); + EECLK(LOW); + EEDI(LOW); + EECS(LOW); + } +} + +static void MacAdRd(unsigned char *buf) +{ + *PCI_MEMR = PCI_PROG; + + MacDtRd(buf, PCI_EEP_ADDRESS, PCI_MAC_ADDRESS_SIZE); +} + +static void MacEepEWEN(void) +{ + *PCI_MEMR = PCI_PROG; + mac_delay(TIME1); + EECS(LOW); + EECLK(LOW); + EEDI(LOW); + EECS(HIGH); + mac_delay(TIME1); + + MacEpSetCmd(MAC_EEP_EWEN); + MacBitDtSet(1); + MacBitDtSet(1); + MacBitDtSet(BIT_DUMMY); + MacBitDtSet(BIT_DUMMY); + MacBitDtSet(BIT_DUMMY); + MacBitDtSet(BIT_DUMMY); + + EECLK(LOW); + EEDI(LOW); + EECS(LOW); + mac_delay(TIME1); +} + +void mac_write(unsigned short *data) +{ + mac_pci_setup(); + MacEepEWEN(); + MacAddressWrite(data); +} + +void mac_read(void) +{ + unsigned char data[6]; + + mac_pci_setup(); + MacAdRd(data); + printf("\n\nGet Mac = %02x:%02x:%02x:%02x:%02x:%02x\n", + data[0], data[1], data[2], data[3], data[4], data[5]); +} + +int do_set_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + unsigned char mac[6]; + char *s, *e; + + if (argc != 2) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + s = argv[1]; + + for (i = 0; i < 6; i++) { + mac[i] = s ? simple_strtoul(s, &e, 16) : 0; + if (s) + s = (*e) ? e + 1 : e; + } + mac_write(mac); + + return 0; +} + +U_BOOT_CMD( + setmac, 2, 1, do_set_mac, + "setmac - write MAC address for RTL8110SCL\n", + "\n" + "setmac <mac address> - write MAC address for RTL8110SCL\n" +); + +int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + uchar mac[6]; + + if (argc != 1) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + mac_read(); + + return 0; +} + +U_BOOT_CMD( + printmac, 1, 1, do_print_mac, + "printmac - print MAC address for RTL8110\n", + "\n" + " - print MAC address for RTL8110\n" +); + diff --git a/board/r0p7785lc0011rl/selfcheck.c b/board/r0p7785lc0011rl/selfcheck.c new file mode 100644 index 0000000..90801a4 --- /dev/null +++ b/board/r0p7785lc0011rl/selfcheck.c @@ -0,0 +1,196 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> +#include <asm/pci.h> + +#if defined(CONFIG_CPU_32BIT) +#define NOCACHE_OFFSET 0x00000000 +#else +#define NOCACHE_OFFSET 0xa0000000 +#endif +#define PLD_LEDCR (0x04000008 + NOCACHE_OFFSET) +#define PLD_SWSR (0x0400000a + NOCACHE_OFFSET) +#define PLD_VERSR (0x0400000c + NOCACHE_OFFSET) + +#define SM107_DEVICEID (0x13e00060 + NOCACHE_OFFSET) + +static void wait_ms(unsigned long time) +{ + while (time--) + udelay(1000); +} + +static void test_pld(void) +{ + printf("PLD version = %04x\n", readb(PLD_VERSR)); +} + +static void test_sm107(void) +{ + printf("SM107 device ID = %04x\n", readl(SM107_DEVICEID)); +} + +static void test_led(void) +{ + printf("LED 3, 5, 7, 9 is ON\n"); + writeb(0x55, PLD_LEDCR); + wait_ms(2000); + printf("LED 4, 6, 8, 10 is ON\n"); + writeb(0xaa, PLD_LEDCR); + wait_ms(2000); + writeb(0x00, PLD_LEDCR); +} + +static void test_dipsw(void) +{ + printf("Please DIPSW set = B'0101\n"); + while (readb(PLD_SWSR) != 0x05) { + if (ctrlc()) + return; + } + printf("Please DIPSW set = B'1010\n"); + while (readb(PLD_SWSR) != 0x0A) { + if (ctrlc()) + return; + } + printf("DIPSW OK\n"); +} + +static void test_net(void) +{ + unsigned long data; + + writel(0x80000000, 0xfe0401c0); + data = readl(0xfe040220); + if (data == 0x816910ec) + printf("Ethernet OK\n"); + else + printf("Ethernet NG, data = %08x\n", data); +} + +static void test_sata(void) +{ + unsigned long data; + + writel(0x80000800, 0xfe0401c0); + data = readl(0xfe040220); + if (data == 0x35121095) + printf("SATA OK\n"); + else + printf("SATA NG, data = %08x\n", data); +} + +static void test_usb(void) +{ + printf("USB test is no implement yet...\n"); +} + +static void test_i2c(void) +{ + printf("I2C test is no implement yet...\n"); +} + +static void test_pci(void) +{ + unsigned long data; + + writel(0x80001800, 0xfe0401c0); + printf("PCI CN1 ID = %08x\n", readl(0xfe040220)); + + writel(0x80001000, 0xfe0401c0); + printf("PCI CN2 ID = %08x\n", readl(0xfe040220)); +} + +int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + char *cmd; + + if (argc != 2) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + cmd = argv[1]; + switch (cmd[0]) { + case 'a': /* all */ + test_pld(); + test_led(); + test_dipsw(); + test_sm107(); + test_usb(); + test_i2c(); + test_net(); + test_sata(); + test_pci(); + break; + case 'p': /* pld or pci */ + if (cmd[1] == 'l') + test_pld(); + else + test_pci(); + break; + case 'l': /* led */ + test_led(); + break; + case 'd': /* dipsw */ + test_dipsw(); + break; + case 's': /* sm107 or sata */ + if (cmd[1] == 'm') + test_sm107(); + else + test_sata(); + break; + case 'u': /* usb */ + test_usb(); + break; + case 'i': /* i2c */ + test_i2c(); + break; + case 'n': /* net */ + test_net(); + break; + default: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + return 0; +} + +U_BOOT_CMD( + hwtest, 2, 1, do_hw_test, + "hwtest - hardware test for R0P7785LC0011RL board\n", + "\n" + "hwtest all - test all hardware\n" + "hwtest pld - output pld version\n" + "hwtest led - test LED\n" + "hwtest dipsw - test DIPSW\n" + "hwtest sm107 - output SM107 version\n" + "hwtest usb - test R8A66597\n" + "hwtest i2c - output PCA9564 version\n" + "hwtest net - compare RTL8110 ID\n" + "hwtest sata - compare SiI3512 ID\n" + "hwtest pci - output PCI slot device ID\n" +); + diff --git a/board/r0p7785lc0011rl/u-boot.lds b/board/r0p7785lc0011rl/u-boot.lds new file mode 100644 index 0000000..f0109eb --- /dev/null +++ b/board/r0p7785lc0011rl/u-boot.lds @@ -0,0 +1,97 @@ +/* + * Copyrigth (c) 2007 + * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * Copyrigth (c) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + . = 0x08000000 + (128 * 1024 * 1024) - (512 * 1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/environment.o (.ppcenv) + . = ALIGN(8192); + common/environment.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} + diff --git a/include/configs/r0p7785lc0011rl.h b/include/configs/r0p7785lc0011rl.h new file mode 100644 index 0000000..a00692f --- /dev/null +++ b/include/configs/r0p7785lc0011rl.h @@ -0,0 +1,173 @@ +/* + * Configuation settings for the Renesas Technology R0P7785LC0011RL board + * + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __R0P7785LC0011RL_H +#define __R0P7785LC0011RL_H + +#undef DEBUG +#define CONFIG_SH 1 +#define CONFIG_SH4A 1 +#define CONFIG_CPU_SH7785 1 +#define CONFIG_R0P7785LC0011RL 1 + +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_NFS +#define CONFIG_CMD_DFL +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_RUN +#define CONFIG_CMD_ENV + +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttySC1,115200 root=/dev/nfs ip=dhcp" +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.10.100 +#define CONFIG_SERVERIP 192.168.10.77 +#define CONFIG_GATEWAYIP 192.168.10.77 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevice=0:1\0" \ + "usbload=usb reset;usbboot;usb stop;bootm\0" + +#define CONFIG_VERSION_VARIABLE +#undef CONFIG_SHOW_BOOT_PROGRESS + +/* MEMORY */ +#define R0P7785LC0011RL_SDRAM_BASE (0x08000000) +#define R0P7785LC0011RL_SDRAM_SIZE (128 * 1024 * 1024) +#define R0P7785LC0011RL_FLASH_BASE_1 (0xa0000000) +#define R0P7785LC0011RL_FLASH_BANK_SIZE (64 * 1024 * 1024) +#define R0P7785LC0011RL_USB_BASE (0xb4000000) + +#define CFG_LONGHELP +#define CFG_PROMPT "=> " +#define CFG_CBSIZE 256 +#define CFG_PBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_BARGSIZE 512 +#define CFG_BAUDRATE_TABLE { 115200 } + +/* SCIF */ +#define CFG_SCIF_CONSOLE 1 +#define CONFIG_CONS_SCIF1 1 +#define CONFIG_SCIF_EXT_CLOCK 1 +#undef CFG_CONSOLE_INFO_QUIET +#undef CFG_CONSOLE_OVERWRITE_ROUTINE +#undef CFG_CONSOLE_ENV_OVERWRITE + + +#define CFG_MEMTEST_START (R0P7785LC0011RL_SDRAM_BASE) +#define CFG_MEMTEST_END (CFG_MEMTEST_START + \ + (R0P7785LC0011RL_SDRAM_SIZE) - \ + 4 * 1024 * 1024) +#undef CFG_ALT_MEMTEST +#undef CFG_MEMTEST_SCRATCH +#undef CFG_LOADS_BAUD_CHANGE + +#define CFG_SDRAM_BASE (R0P7785LC0011RL_SDRAM_BASE) +#define CFG_SDRAM_SIZE (R0P7785LC0011RL_SDRAM_SIZE) +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 16 * 1024 * 1024) + +#define CFG_MONITOR_BASE (R0P7785LC0011RL_FLASH_BASE_1) +#define CFG_MONITOR_LEN (512 * 1024) +#define CFG_MALLOC_LEN (512 * 1024) +#define CFG_GBL_DATA_SIZE (256) +#define CFG_BOOTMAPSZ (8 * 1024 * 1024) + +/* FLASH */ +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +#undef CFG_FLASH_QUIET_TEST +#define CFG_FLASH_EMPTY_INFO +#define CFG_FLASH_BASE (R0P7785LC0011RL_FLASH_BASE_1) +#define CFG_MAX_FLASH_SECT 512 + +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE + \ + (0 * R0P7785LC0011RL_FLASH_BANK_SIZE) } + +#define CFG_FLASH_ERASE_TOUT (3 * 1000) +#define CFG_FLASH_WRITE_TOUT (3 * 1000) +#define CFG_FLASH_LOCK_TOUT (3 * 1000) +#define CFG_FLASH_UNLOCK_TOUT (3 * 1000) + +#undef CFG_FLASH_PROTECTION +#undef CFG_DIRECT_FLASH_TFTP + +/* R8A66597 */ +#define LITTLEENDIAN /* for include/usb.h */ +#define CONFIG_USB_R8A66597_HCD +#define CONFIG_R8A66597_BASE_ADDR R0P7785LC0011RL_USB_BASE +#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ +#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ +#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ + +/* PCI Controller */ +#define CONFIG_PCI +#define CONFIG_SH4_PCI +#define CONFIG_SH7780_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW 1 +#define __io +#define __mem_pci + +#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ + +#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ + +/* Network device (RTL8169) support */ +#define CONFIG_NET_MULTI +#define CONFIG_RTL8169 + +/* ENV setting */ +#define CFG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE 1 +#define CFG_ENV_SECT_SIZE (256 * 1024) +#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) +#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE) + +/* Board Clock */ +/* The SCIF used external clock. system clock only used timer. */ +#define CONFIG_SYS_CLK_FREQ 50000000 +#define TMU_CLK_DIVIDER 4 +#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) + +#endif /* __R0P7785LC0011RL_H */

3 4

[U-Boot-Users] [PATCH v2] sh: add support for SH7785
by Yoshihiro Shimoda 10 Jul '08

10 Jul '08

Renesas SH7785 has DDR2-SDRAM controller, PCI, and other. This patch supports CPU register's header file. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> --- PATCH v2 : - add Iwamatsu-san e-mail address in include/asm-sh/cpu_sh7785.h. - fix my e-mail address in same file. include/asm-sh/cpu_sh4.h | 2 + include/asm-sh/cpu_sh7785.h | 156 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 158 insertions(+), 0 deletions(-) create mode 100644 include/asm-sh/cpu_sh7785.h diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index 5a8a5a1..de6eb5a 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -39,6 +39,8 @@ # include <asm/cpu_sh7763.h> #elif defined (CONFIG_CPU_SH7780) # include <asm/cpu_sh7780.h> +#elif defined (CONFIG_CPU_SH7785) +# include <asm/cpu_sh7785.h> #else # error "Unknown SH4 variant" #endif diff --git a/include/asm-sh/cpu_sh7785.h b/include/asm-sh/cpu_sh7785.h new file mode 100644 index 0000000..4a4dfc9 --- /dev/null +++ b/include/asm-sh/cpu_sh7785.h @@ -0,0 +1,156 @@ +#ifndef _ASM_CPU_SH7785_H_ +#define _ASM_CPU_SH7785_H_ + +/* + * Copyright (c) 2007,2008 Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> + * Copyright (c) 2008 Yusuke Goda <goda.yusuke(a)renesas.com> + * Copyright (c) 2008 Yoshihiro Shimoda <shimoda.yoshihiro(a)renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#define CACHE_OC_NUM_WAYS 1 +#define CCR_CACHE_INIT 0x0000090b + +/* Exceptions */ +#define TRA 0xFF000020 +#define EXPEVT 0xFF000024 +#define INTEVT 0xFF000028 + +/* Cache Controller */ +#define CCR 0xFF00001C +#define QACR0 0xFF000038 +#define QACR1 0xFF00003C +#define RAMCR 0xFF000074 + +/* Watchdog Timer and Reset */ +#define WTCNT WDTCNT +#define WDTST 0xFFCC0000 +#define WDTCSR 0xFFCC0004 +#define WDTBST 0xFFCC0008 +#define WDTCNT 0xFFCC0010 +#define WDTBCNT 0xFFCC0018 + +/* Timer Unit */ +#define TSTR TSTR0 +#define TOCR 0xFFD80000 +#define TSTR0 0xFFD80004 +#define TCOR0 0xFFD80008 +#define TCNT0 0xFFD8000C +#define TCR0 0xFFD80010 +#define TCOR1 0xFFD80014 +#define TCNT1 0xFFD80018 +#define TCR1 0xFFD8001C +#define TCOR2 0xFFD80020 +#define TCNT2 0xFFD80024 +#define TCR2 0xFFD80028 +#define TCPR2 0xFFD8002C +#define TSTR1 0xFFDC0004 +#define TCOR3 0xFFDC0008 +#define TCNT3 0xFFDC000C +#define TCR3 0xFFDC0010 +#define TCOR4 0xFFDC0014 +#define TCNT4 0xFFDC0018 +#define TCR4 0xFFDC001C +#define TCOR5 0xFFDC0020 +#define TCNT5 0xFFDC0024 +#define TCR5 0xFFDC0028 + +/* Serial Communication Interface with FIFO */ +#define SCIF1_BASE 0xffeb0000 + +/* LBSC */ +#define MMSELR 0xfc400020 +#define LBSC_BASE 0xff800000 +#define BCR (LBSC_BASE + 0x1000) +#define CS0BCR (LBSC_BASE + 0x2000) +#define CS1BCR (LBSC_BASE + 0x2010) +#define CS2BCR (LBSC_BASE + 0x2020) +#define CS3BCR (LBSC_BASE + 0x2030) +#define CS4BCR (LBSC_BASE + 0x2040) +#define CS5BCR (LBSC_BASE + 0x2050) +#define CS6BCR (LBSC_BASE + 0x2060) +#define CS0WCR (LBSC_BASE + 0x2008) +#define CS1WCR (LBSC_BASE + 0x2018) +#define CS2WCR (LBSC_BASE + 0x2028) +#define CS3WCR (LBSC_BASE + 0x2038) +#define CS4WCR (LBSC_BASE + 0x2048) +#define CS5WCR (LBSC_BASE + 0x2058) +#define CS6WCR (LBSC_BASE + 0x2068) +#define CS5PCR (LBSC_BASE + 0x2070) +#define CS6PCR (LBSC_BASE + 0x2080) + +/* PCI Controller */ +#define SH7780_PCIECR 0xFE000008 +#define SH7780_PCIVID 0xFE040000 +#define SH7780_PCIDID 0xFE040002 +#define SH7780_PCICMD 0xFE040004 +#define SH7780_PCISTATUS 0xFE040006 +#define SH7780_PCIRID 0xFE040008 +#define SH7780_PCIPIF 0xFE040009 +#define SH7780_PCISUB 0xFE04000A +#define SH7780_PCIBCC 0xFE04000B +#define SH7780_PCICLS 0xFE04000C +#define SH7780_PCILTM 0xFE04000D +#define SH7780_PCIHDR 0xFE04000E +#define SH7780_PCIBIST 0xFE04000F +#define SH7780_PCIIBAR 0xFE040010 +#define SH7780_PCIMBAR0 0xFE040014 +#define SH7780_PCIMBAR1 0xFE040018 +#define SH7780_PCISVID 0xFE04002C +#define SH7780_PCISID 0xFE04002E +#define SH7780_PCICP 0xFE040034 +#define SH7780_PCIINTLINE 0xFE04003C +#define SH7780_PCIINTPIN 0xFE04003D +#define SH7780_PCIMINGNT 0xFE04003E +#define SH7780_PCIMAXLAT 0xFE04003F +#define SH7780_PCICID 0xFE040040 +#define SH7780_PCINIP 0xFE040041 +#define SH7780_PCIPMC 0xFE040042 +#define SH7780_PCIPMCSR 0xFE040044 +#define SH7780_PCIPMCSRBSE 0xFE040046 +#define SH7780_PCI_CDD 0xFE040047 +#define SH7780_PCICR 0xFE040100 +#define SH7780_PCILSR0 0xFE040104 +#define SH7780_PCILSR1 0xFE040108 +#define SH7780_PCILAR0 0xFE04010C +#define SH7780_PCILAR1 0xFE040110 +#define SH7780_PCIIR 0xFE040114 +#define SH7780_PCIIMR 0xFE040118 +#define SH7780_PCIAIR 0xFE04011C +#define SH7780_PCICIR 0xFE040120 +#define SH7780_PCIAINT 0xFE040130 +#define SH7780_PCIAINTM 0xFE040134 +#define SH7780_PCIBMIR 0xFE040138 +#define SH7780_PCIPAR 0xFE0401C0 +#define SH7780_PCIPINT 0xFE0401CC +#define SH7780_PCIPINTM 0xFE0401D0 +#define SH7780_PCIMBR0 0xFE0401E0 +#define SH7780_PCIMBMR0 0xFE0401E4 +#define SH7780_PCIMBR1 0xFE0401E8 +#define SH7780_PCIMBMR1 0xFE0401EC +#define SH7780_PCIMBR2 0xFE0401F0 +#define SH7780_PCIMBMR2 0xFE0401F4 +#define SH7780_PCIIOBR 0xFE0401F8 +#define SH7780_PCIIOBMR 0xFE0401FC +#define SH7780_PCICSCR0 0xFE040210 +#define SH7780_PCICSCR1 0xFE040214 +#define SH7780_PCICSAR0 0xFE040218 +#define SH7780_PCICSAR1 0xFE04021C +#define SH7780_PCIPDR 0xFE040220 + +#endif /* _ASM_CPU_SH7780_H_ */

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[U-Boot-Users] [PATCH] [PATCH] Fix "usb part" command
by Christian Eggers 10 Jul '08

10 Jul '08

From: Christian Eggers <christian(a)p2400.wgnetz.xx> Only print partition for selected device if user supplied the <dev> arg with the "usb part [dev]" command. Signed-off-by: Christian Eggers <ceggers(a)gmx.de> --- common/cmd_usb.c | 19 +++++++++++++++---- 1 files changed, 15 insertions(+), 4 deletions(-) diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 9be86b8..ed51087 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -553,13 +553,24 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, } if (strncmp(argv[1],"part",4) == 0) { - int devno, ok; - for (ok=0, devno=0; devno<USB_MAX_STOR_DEV; ++devno) { + int devno, ok = 0; + if (argc==2) { + for (devno=0; devno<USB_MAX_STOR_DEV; ++devno) { + stor_dev=usb_stor_get_dev(devno); + if (stor_dev->type!=DEV_TYPE_UNKNOWN) { + ok++; + if (devno) + printf("\n"); + printf("print_part of %x\n",devno); + print_part(stor_dev); + } + } + } + else { + devno=simple_strtoul(argv[2], NULL, 16); stor_dev=usb_stor_get_dev(devno); if (stor_dev->type!=DEV_TYPE_UNKNOWN) { ok++; - if (devno) - printf("\n"); printf("print_part of %x\n",devno); print_part(stor_dev); } -- 1.4.3.4

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