October 2008 - U-Boot

[U-Boot] [PATCH 02/19] ColdFire: Modules header files cleanup - 1
by Tsi-Chung Liew 22 Oct '08

22 Oct '08

From: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> Consolidate ATA, ePORT and QSPI structures and definitions in immap_5xxx.h to more unify modules header files. Append DSPI support for m547x_8x. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> --- include/asm-m68k/coldfire/ata.h | 79 +++++++++++++++++++++ include/asm-m68k/coldfire/dspi.h | 15 ++-- include/asm-m68k/coldfire/eport.h | 139 +++++++++++++++++++++++++++++++++++++ include/asm-m68k/coldfire/qspi.h | 111 +++++++++++++++++++++++++++++ include/asm-m68k/immap_5227x.h | 11 +--- include/asm-m68k/immap_5235.h | 19 +---- include/asm-m68k/immap_5249.h | 2 + include/asm-m68k/immap_5253.h | 54 +-------------- include/asm-m68k/immap_5271.h | 3 + include/asm-m68k/immap_5272.h | 16 ---- include/asm-m68k/immap_5275.h | 20 +----- include/asm-m68k/immap_5282.h | 3 + include/asm-m68k/immap_5329.h | 29 +------- include/asm-m68k/immap_5445x.h | 62 +---------------- include/asm-m68k/immap_547x_8x.h | 2 + include/asm-m68k/m5235.h | 91 ------------------------ include/asm-m68k/m5329.h | 51 -------------- include/asm-m68k/m5445x.h | 90 ------------------------ 18 files changed, 359 insertions(+), 438 deletions(-) create mode 100644 include/asm-m68k/coldfire/ata.h create mode 100644 include/asm-m68k/coldfire/eport.h create mode 100644 include/asm-m68k/coldfire/qspi.h diff --git a/include/asm-m68k/coldfire/ata.h b/include/asm-m68k/coldfire/ata.h new file mode 100644 index 0000000..3efd03a --- /dev/null +++ b/include/asm-m68k/coldfire/ata.h @@ -0,0 +1,79 @@ +/* + * ATA Internal Memory Map + * + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew(a)freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ATA_H__ +#define __ATA_H__ + +/* ATA */ +typedef struct atac { + /* PIO */ + u8 toff; /* 0x00 */ + u8 ton; /* 0x01 */ + u8 t1; /* 0x02 */ + u8 t2w; /* 0x03 */ + u8 t2r; /* 0x04 */ + u8 ta; /* 0x05 */ + u8 trd; /* 0x06 */ + u8 t4; /* 0x07 */ + u8 t9; /* 0x08 */ + + /* DMA */ + u8 tm; /* 0x09 */ + u8 tn; /* 0x0A */ + u8 td; /* 0x0B */ + u8 tk; /* 0x0C */ + u8 tack; /* 0x0D */ + u8 tenv; /* 0x0E */ + u8 trp; /* 0x0F */ + u8 tzah; /* 0x10 */ + u8 tmli; /* 0x11 */ + u8 tdvh; /* 0x12 */ + u8 tdzfs; /* 0x13 */ + u8 tdvs; /* 0x14 */ + u8 tcvh; /* 0x15 */ + u8 tss; /* 0x16 */ + u8 tcyc; /* 0x17 */ + + /* FIFO */ + u32 fifo32; /* 0x18 */ + u16 fifo16; /* 0x1C */ + u8 rsvd0[2]; + u8 ffill; /* 0x20 */ + u8 rsvd1[3]; + + /* ATA */ + u8 cr; /* 0x24 */ + u8 rsvd2[3]; + u8 isr; /* 0x28 */ + u8 rsvd3[3]; + u8 ier; /* 0x2C */ + u8 rsvd4[3]; + u8 icr; /* 0x30 */ + u8 rsvd5[3]; + u8 falarm; /* 0x34 */ + u8 rsvd6[106]; +} atac_t; + +#endif /* __ATA_H__ */ diff --git a/include/asm-m68k/coldfire/dspi.h b/include/asm-m68k/coldfire/dspi.h index 8327e1b..4b7d61e 100644 --- a/include/asm-m68k/coldfire/dspi.h +++ b/include/asm-m68k/coldfire/dspi.h @@ -46,15 +46,14 @@ typedef struct dspi { u32 dirsr; u32 dtfr; u32 drfr; - u32 dtfdr0; - u32 dtfdr1; - u32 dtfdr2; - u32 dtfdr3; +#ifdef CONFIG_MCF547x_8x + u32 dtfdr[4]; u8 resv1[0x30]; - u32 drfdr0; - u32 drfdr1; - u32 drfdr2; - u32 drfdr3; + u32 drfdr[4]; +#else + u32 dtfdr[16]; + u32 drfdr[16]; +#endif } dspi_t; /* Bit definitions and macros for DMCR */ diff --git a/include/asm-m68k/coldfire/eport.h b/include/asm-m68k/coldfire/eport.h new file mode 100644 index 0000000..1d1bf63 --- /dev/null +++ b/include/asm-m68k/coldfire/eport.h @@ -0,0 +1,139 @@ +/* + * Edge Port Memory Map + * + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew(a)freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __EPORT_H__ +#define __EPORT_H__ + +/* Edge Port Module (EPORT) */ +typedef struct eport { +#ifdef CONFIG_MCF547x_8x + u16 par; /* 0x00 */ + u16 res0; /* 0x02 */ + u8 ddr; /* 0x04 */ + u8 ier; /* 0x05 */ + u16 res1; /* 0x06 */ + u8 dr; /* 0x08 */ + u8 pdr; /* 0x09 */ + u16 res2; /* 0x0A */ + u8 fr; /* 0x0C */ + u8 res3[3]; /* 0x0D */ +#else + u16 par; /* 0x00 Pin Assignment */ + u8 ddr; /* 0x02 Data Direction */ + u8 ier; /* 0x03 Interrupt Enable */ + u8 dr; /* 0x04 Data */ + u8 pdr; /* 0x05 Pin Data */ + u8 fr; /* 0x06 Flag */ + u8 res0; +#endif +} eport_t; + +/* EPPAR */ +#define EPORT_PAR_EPPA1(x) (((x)&0x0003)<<2) +#define EPORT_PAR_EPPA2(x) (((x)&0x0003)<<4) +#define EPORT_PAR_EPPA3(x) (((x)&0x0003)<<6) +#define EPORT_PAR_EPPA4(x) (((x)&0x0003)<<8) +#define EPORT_PAR_EPPA5(x) (((x)&0x0003)<<10) +#define EPORT_PAR_EPPA6(x) (((x)&0x0003)<<12) +#define EPORT_PAR_EPPA7(x) (((x)&0x0003)<<14) +#define EPORT_PAR_LEVEL (0) +#define EPORT_PAR_RISING (1) +#define EPORT_PAR_FALLING (2) +#define EPORT_PAR_BOTH (3) +#define EPORT_PAR_EPPA7_LEVEL (0x0000) +#define EPORT_PAR_EPPA7_RISING (0x4000) +#define EPORT_PAR_EPPA7_FALLING (0x8000) +#define EPORT_PAR_EPPA7_BOTH (0xC000) +#define EPORT_PAR_EPPA6_LEVEL (0x0000) +#define EPORT_PAR_EPPA6_RISING (0x1000) +#define EPORT_PAR_EPPA6_FALLING (0x2000) +#define EPORT_PAR_EPPA6_BOTH (0x3000) +#define EPORT_PAR_EPPA5_LEVEL (0x0000) +#define EPORT_PAR_EPPA5_RISING (0x0400) +#define EPORT_PAR_EPPA5_FALLING (0x0800) +#define EPORT_PAR_EPPA5_BOTH (0x0C00) +#define EPORT_PAR_EPPA4_LEVEL (0x0000) +#define EPORT_PAR_EPPA4_RISING (0x0100) +#define EPORT_PAR_EPPA4_FALLING (0x0200) +#define EPORT_PAR_EPPA4_BOTH (0x0300) +#define EPORT_PAR_EPPA3_LEVEL (0x0000) +#define EPORT_PAR_EPPA3_RISING (0x0040) +#define EPORT_PAR_EPPA3_FALLING (0x0080) +#define EPORT_PAR_EPPA3_BOTH (0x00C0) +#define EPORT_PAR_EPPA2_LEVEL (0x0000) +#define EPORT_PAR_EPPA2_RISING (0x0010) +#define EPORT_PAR_EPPA2_FALLING (0x0020) +#define EPORT_PAR_EPPA2_BOTH (0x0030) +#define EPORT_PAR_EPPA1_LEVEL (0x0000) +#define EPORT_PAR_EPPA1_RISING (0x0004) +#define EPORT_PAR_EPPA1_FALLING (0x0008) +#define EPORT_PAR_EPPA1_BOTH (0x000C) + +/* EPDDR */ +#define EPORT_DDR_EPDD1 (0x02) +#define EPORT_DDR_EPDD2 (0x04) +#define EPORT_DDR_EPDD3 (0x08) +#define EPORT_DDR_EPDD4 (0x10) +#define EPORT_DDR_EPDD5 (0x20) +#define EPORT_DDR_EPDD6 (0x40) +#define EPORT_DDR_EPDD7 (0x80) + +/* EPIER */ +#define EPORT_IER_EPIE1 (0x02) +#define EPORT_IER_EPIE2 (0x04) +#define EPORT_IER_EPIE3 (0x08) +#define EPORT_IER_EPIE4 (0x10) +#define EPORT_IER_EPIE5 (0x20) +#define EPORT_IER_EPIE6 (0x40) +#define EPORT_IER_EPIE7 (0x80) + +/* EPDR */ +#define EPORT_DR_EPD1 (0x02) +#define EPORT_DR_EPD2 (0x04) +#define EPORT_DR_EPD3 (0x08) +#define EPORT_DR_EPD4 (0x10) +#define EPORT_DR_EPD5 (0x20) +#define EPORT_DR_EPD6 (0x40) +#define EPORT_DR_EPD7 (0x80) + +/* EPPDR */ +#define EPORT_PDR_EPPD1 (0x02) +#define EPORT_PDR_EPPD2 (0x04) +#define EPORT_PDR_EPPD3 (0x08) +#define EPORT_PDR_EPPD4 (0x10) +#define EPORT_PDR_EPPD5 (0x20) +#define EPORT_PDR_EPPD6 (0x40) +#define EPORT_PDR_EPPD7 (0x80) + +/* EPFR */ +#define EPORT_FR_EPF1 (0x02) +#define EPORT_FR_EPF2 (0x04) +#define EPORT_FR_EPF3 (0x08) +#define EPORT_FR_EPF4 (0x10) +#define EPORT_FR_EPF5 (0x20) +#define EPORT_FR_EPF6 (0x40) +#define EPORT_FR_EPF7 (0x80) + +#endif /* __EPORT_H__ */ diff --git a/include/asm-m68k/coldfire/qspi.h b/include/asm-m68k/coldfire/qspi.h new file mode 100644 index 0000000..8bcd2e4 --- /dev/null +++ b/include/asm-m68k/coldfire/qspi.h @@ -0,0 +1,111 @@ +/* + * Queue Serial Peripheral Interface Memory Map + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew(a)freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __QSPI_H__ +#define __QSPI_H__ + +/* QSPI module registers */ +typedef struct qspi_ctrl { + u16 mr; /* 0x00 Mode */ + u16 res1; + u16 dlyr; /* 0x04 Delay */ + u16 res2; + u16 wr; /* 0x08 Wrap */ + u16 res3; + u16 ir; /* 0x0C Interrupt */ + u16 res4; + u16 ar; /* 0x10 Address */ + u16 res5; + u16 dr; /* 0x14 Data */ + u16 res6; +} qspi_t; + +/* MR */ +#define QSPI_QMR_MSTR (0x8000) +#define QSPI_QMR_DOHIE (0x4000) +#define QSPI_QMR_BITS(x) (((x)&0x000F)<<10) +#define QSPI_QMR_BITS_MASK (0xC3FF) +#define QSPI_QMR_BITS_8 (0x2000) +#define QSPI_QMR_BITS_9 (0x2400) +#define QSPI_QMR_BITS_10 (0x2800) +#define QSPI_QMR_BITS_11 (0x2C00) +#define QSPI_QMR_BITS_12 (0x3000) +#define QSPI_QMR_BITS_13 (0x3400) +#define QSPI_QMR_BITS_14 (0x3800) +#define QSPI_QMR_BITS_15 (0x3C00) +#define QSPI_QMR_BITS_16 (0x0000) +#define QSPI_QMR_CPOL (0x0200) +#define QSPI_QMR_CPHA (0x0100) +#define QSPI_QMR_BAUD(x) ((x)&0x00FF) +#define QSPI_QMR_BAUD_MASK (0xFF00) + +/* DLYR */ +#define QSPI_QDLYR_SPE (0x8000) +#define QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) +#define QSPI_QDLYR_QCD_MASK (0x80FF) +#define QSPI_QDLYR_DTL(x) ((x)&0x00FF) +#define QSPI_QDLYR_DTL_MASK (0xFF00) + +/* WR */ +#define QSPI_QWR_HALT (0x8000) +#define QSPI_QWR_WREN (0x4000) +#define QSPI_QWR_WRTO (0x2000) +#define QSPI_QWR_CSIV (0x1000) +#define QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) +#define QSPI_QWR_ENDQP_MASK (0xF0FF) +#define QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4) +#define QSPI_QWR_CPTQP_MASK (0xFF0F) +#define QSPI_QWR_NEWQP(x) ((x)&0x000F) +#define QSPI_QWR_NEWQP_MASK (0xFFF0) + +/* IR */ +#define QSPI_QIR_WCEFB (0x8000) +#define QSPI_QIR_ABRTB (0x4000) +#define QSPI_QIR_ABRTL (0x1000) +#define QSPI_QIR_WCEFE (0x0800) +#define QSPI_QIR_ABRTE (0x0400) +#define QSPI_QIR_SPIFE (0x0100) +#define QSPI_QIR_WCEF (0x0008) +#define QSPI_QIR_ABRT (0x0004) +#define QSPI_QIR_SPIF (0x0001) + +/* AR */ +#define QSPI_QAR_ADDR(x) ((x)&0x003F) +#define QSPI_QAR_ADDR_MASK (0xFFC0) +#define QSPI_QAR_TRANS (0x0000) +#define QSPI_QAR_RECV (0x0010) +#define QSPI_QAR_CMD (0x0020) + +/* DR */ +#define QSPI_QDR_CONT (0x8000) +#define QSPI_QDR_BITSE (0x4000) +#define QSPI_QDR_DT (0x2000) +#define QSPI_QDR_DSCK (0x1000) +#define QSPI_QDR_QSPI_CS3 (0x0800) +#define QSPI_QDR_QSPI_CS2 (0x0400) +#define QSPI_QDR_QSPI_CS1 (0x0200) +#define QSPI_QDR_QSPI_CS0 (0x0100) + +#endif /* __QSPI_H__ */ diff --git a/include/asm-m68k/immap_5227x.h b/include/asm-m68k/immap_5227x.h index 83da3d5..df1ec4a 100644 --- a/include/asm-m68k/immap_5227x.h +++ b/include/asm-m68k/immap_5227x.h @@ -69,6 +69,7 @@ #include <asm/coldfire/crossbar.h> #include <asm/coldfire/dspi.h> #include <asm/coldfire/edma.h> +#include <asm/coldfire/eport.h> #include <asm/coldfire/flexbus.h> #include <asm/coldfire/lcd.h> #include <asm/coldfire/ssi.h> @@ -162,16 +163,6 @@ typedef struct iack { u8 gl7iack; } iack_t; -/* Edge Port Module (EPORT) */ -typedef struct eport { - u16 eppar; - u8 epddr; - u8 epier; - u8 epdr; - u8 eppdr; - u8 epfr; -} eport_t; - /* Reset Controller Module (RCM) */ typedef struct rcm { u8 rcr; diff --git a/include/asm-m68k/immap_5235.h b/include/asm-m68k/immap_5235.h index 3ef0321..dfab416 100644 --- a/include/asm-m68k/immap_5235.h +++ b/include/asm-m68k/immap_5235.h @@ -63,6 +63,9 @@ #define MMAP_ETPU (CONFIG_SYS_MBAR + 0x001D0000) #define MMAP_CAN2 (CONFIG_SYS_MBAR + 0x001F0000) +#include <asm/coldfire/eport.h> +#include <asm/coldfire/qspi.h> + /* System Control Module register */ typedef struct scm_ctrl { u32 ipsbar; /* 0x00 - MBAR */ @@ -155,22 +158,6 @@ typedef struct fbcs_ctrl { u16 cscr7; /* 0x5E Chip-Select Control Register 5 */ } fbcs_t; -/* QSPI module registers */ -typedef struct qspi_ctrl { - u16 qmr; /* Mode register */ - u16 res1; - u16 qdlyr; /* Delay register */ - u16 res2; - u16 qwr; /* Wrap register */ - u16 res3; - u16 qir; /* Interrupt register */ - u16 res4; - u16 qar; /* Address register */ - u16 res5; - u16 qdr; /* Data register */ - u16 res6; -} qspi_t; - /* Interrupt module registers */ typedef struct int0_ctrl { /* Interrupt Controller 0 */ diff --git a/include/asm-m68k/immap_5249.h b/include/asm-m68k/immap_5249.h index 6b57ba7..f4fedfd 100644 --- a/include/asm-m68k/immap_5249.h +++ b/include/asm-m68k/immap_5249.h @@ -32,4 +32,6 @@ #define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000200) #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000400) +#include <asm/coldfire/qspi.h> + #endif /* __IMMAP_5249__ */ diff --git a/include/asm-m68k/immap_5253.h b/include/asm-m68k/immap_5253.h index 4e3a481..fa09923 100644 --- a/include/asm-m68k/immap_5253.h +++ b/include/asm-m68k/immap_5253.h @@ -39,57 +39,7 @@ #define MMAP_I2C1 (CONFIG_SYS_MBAR2 + 0x00000440) #define MMAP_UART2 (CONFIG_SYS_MBAR2 + 0x00000C00) -/********************************************************************* -* ATA Module (ATAC) -*********************************************************************/ - -/* Register read/write struct */ -typedef struct atac { - /* PIO */ - u8 toff; /* 0x00 */ - u8 ton; /* 0x01 */ - u8 t1; /* 0x02 */ - u8 t2w; /* 0x03 */ - u8 t2r; /* 0x04 */ - u8 ta; /* 0x05 */ - u8 trd; /* 0x06 */ - u8 t4; /* 0x07 */ - u8 t9; /* 0x08 */ - - /* DMA */ - u8 tm; /* 0x09 */ - u8 tn; /* 0x0A */ - u8 td; /* 0x0B */ - u8 tk; /* 0x0C */ - u8 tack; /* 0x0D */ - u8 tenv; /* 0x0E */ - u8 trp; /* 0x0F */ - u8 tzah; /* 0x10 */ - u8 tmli; /* 0x11 */ - u8 tdvh; /* 0x12 */ - u8 tdzfs; /* 0x13 */ - u8 tdvs; /* 0x14 */ - u8 tcvh; /* 0x15 */ - u8 tss; /* 0x16 */ - u8 tcyc; /* 0x17 */ - - /* FIFO */ - u32 fifo32; /* 0x18 */ - u16 fifo16; /* 0x1C */ - u8 rsvd0[2]; - u8 ffill; /* 0x20 */ - u8 rsvd1[3]; - - /* ATA */ - u8 cr; /* 0x24 */ - u8 rsvd2[3]; - u8 isr; /* 0x28 */ - u8 rsvd3[3]; - u8 ier; /* 0x2C */ - u8 rsvd4[3]; - u8 icr; /* 0x30 */ - u8 rsvd5[3]; - u8 falarm; /* 0x34 */ -} atac_t; +#include <asm/coldfire/ata.h> +#include <asm/coldfire/qspi.h> #endif /* __IMMAP_5249__ */ diff --git a/include/asm-m68k/immap_5271.h b/include/asm-m68k/immap_5271.h index 462d5f2..8483501 100644 --- a/include/asm-m68k/immap_5271.h +++ b/include/asm-m68k/immap_5271.h @@ -63,6 +63,9 @@ #define MMAP_ETPU (CONFIG_SYS_MBAR + 0x001D0000) #define MMAP_CAN2 (CONFIG_SYS_MBAR + 0x001F0000) +#include <asm/coldfire/eport.h> +#include <asm/coldfire/qspi.h> + /* Interrupt module registers */ typedef struct int0_ctrl { /* Interrupt Controller 0 */ diff --git a/include/asm-m68k/immap_5272.h b/include/asm-m68k/immap_5272.h index b106289..d904053 100644 --- a/include/asm-m68k/immap_5272.h +++ b/include/asm-m68k/immap_5272.h @@ -104,22 +104,6 @@ typedef struct gpio_ctrl { uchar res2[4]; } gpio_t; -/* QSPI module registers */ -typedef struct qspi_ctrl { - ushort qspi_qmr; - uchar res1[2]; - ushort qspi_qdlyr; - uchar res2[2]; - ushort qspi_qwr; - uchar res3[2]; - ushort qspi_qir; - uchar res4[2]; - ushort qspi_qar; - uchar res5[2]; - ushort qspi_qdr; - uchar res6[10]; -} qspi_t; - /* PWM module registers */ typedef struct pwm_ctrl { uchar pwm_pwcr0; diff --git a/include/asm-m68k/immap_5275.h b/include/asm-m68k/immap_5275.h index 495010b..72846fc 100644 --- a/include/asm-m68k/immap_5275.h +++ b/include/asm-m68k/immap_5275.h @@ -66,6 +66,9 @@ #define MMAP_USB (CONFIG_SYS_MBAR + 0x001C0000) #define MMAP_PWM0 (CONFIG_SYS_MBAR + 0x001D0000) +#include <asm/coldfire/eport.h> +#include <asm/coldfire/qspi.h> + /* System configuration registers */ typedef struct sys_ctrl { @@ -163,23 +166,6 @@ typedef struct dma_ctrl { u32 dcr; } dma_t; -/* QSPI module registers, offset 0x340 - */ -typedef struct qspi_ctrl { - u16 qmr; - u8 res1[2]; - u16 qdlyr; - u8 res2[2]; - u16 qwr; - u8 res3[2]; - u16 qir; - u8 res4[2]; - u16 qar; - u8 res5[2]; - u16 qdr; - u8 res6[2]; -} qspi_t; - /* Interrupt module registers, offset 0xc00 */ typedef struct int_ctrl { diff --git a/include/asm-m68k/immap_5282.h b/include/asm-m68k/immap_5282.h index e96463b..417502d 100644 --- a/include/asm-m68k/immap_5282.h +++ b/include/asm-m68k/immap_5282.h @@ -62,6 +62,9 @@ #define MMAP_CFMC (CONFIG_SYS_MBAR + 0x001D0000) #define MMAP_CFMMEM (CONFIG_SYS_MBAR + 0x04000000) +#include <asm/coldfire/eport.h> +#include <asm/coldfire/qspi.h> + /* System Control Module */ typedef struct scm_ctrl { u32 ipsbar; diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h index 7678406..88f9b20 100644 --- a/include/asm-m68k/immap_5329.h +++ b/include/asm-m68k/immap_5329.h @@ -70,6 +70,8 @@ #include <asm/coldfire/crossbar.h> #include <asm/coldfire/edma.h> +#include <asm/coldfire/eport.h> +#include <asm/coldfire/qspi.h> #include <asm/coldfire/flexbus.h> #include <asm/coldfire/lcd.h> #include <asm/coldfire/ssi.h> @@ -282,22 +284,6 @@ typedef struct intgack_ctrl1 { u8 Lniack[7]; /* 0xE1 - 0xE7 Global Level 0 Interrupt Acknowledge */ } intgack_t; -/* QSPI module registers */ -typedef struct qspi_ctrl { - u16 qmr; /* Mode register */ - u16 res1; - u16 qdlyr; /* Delay register */ - u16 res2; - u16 qwr; /* Wrap register */ - u16 res3; - u16 qir; /* Interrupt register */ - u16 res4; - u16 qar; /* Address register */ - u16 res5; - u16 qdr; /* Data register */ - u16 res6; -} qspi_t; - /* PWM module registers */ typedef struct pwm_ctrl { u8 en; /* 0x00 PWM Enable Register */ @@ -338,17 +324,6 @@ typedef struct pwm_ctrl { u8 res3[3]; /* 0x25 - 0x27 */ } pwm_t; -/* Edge Port module registers */ -typedef struct eport_ctrl { - u16 par; /* 0x00 Pin Assignment Register */ - u8 ddar; /* 0x02 Data Direction Register */ - u8 ier; /* 0x03 Interrupt Enable Register */ - u8 dr; /* 0x04 Data Register */ - u8 pdr; /* 0x05 Pin Data Register */ - u8 fr; /* 0x06 Flag_Register */ - u8 res1; -} eport_t; - /* Watchdog registers */ typedef struct wdog_ctrl { u16 cr; /* 0x00 Control register */ diff --git a/include/asm-m68k/immap_5445x.h b/include/asm-m68k/immap_5445x.h index ef8930e..38b767f 100644 --- a/include/asm-m68k/immap_5445x.h +++ b/include/asm-m68k/immap_5445x.h @@ -69,62 +69,14 @@ #define MMAP_USBEHCI 0xFC0B0140 #define MMAP_USBOTG 0xFC0B01A0 +#include <asm/coldfire/ata.h> #include <asm/coldfire/crossbar.h> #include <asm/coldfire/dspi.h> #include <asm/coldfire/edma.h> +#include <asm/coldfire/eport.h> #include <asm/coldfire/flexbus.h> #include <asm/coldfire/ssi.h> -/* ATA */ -typedef struct atac { - /* PIO */ - u8 toff; /* 0x00 */ - u8 ton; /* 0x01 */ - u8 t1; /* 0x02 */ - u8 t2w; /* 0x03 */ - u8 t2r; /* 0x04 */ - u8 ta; /* 0x05 */ - u8 trd; /* 0x06 */ - u8 t4; /* 0x07 */ - u8 t9; /* 0x08 */ - - /* DMA */ - u8 tm; /* 0x09 */ - u8 tn; /* 0x0A */ - u8 td; /* 0x0B */ - u8 tk; /* 0x0C */ - u8 tack; /* 0x0D */ - u8 tenv; /* 0x0E */ - u8 trp; /* 0x0F */ - u8 tzah; /* 0x10 */ - u8 tmli; /* 0x11 */ - u8 tdvh; /* 0x12 */ - u8 tdzfs; /* 0x13 */ - u8 tdvs; /* 0x14 */ - u8 tcvh; /* 0x15 */ - u8 tss; /* 0x16 */ - u8 tcyc; /* 0x17 */ - - /* FIFO */ - u32 fifo32; /* 0x18 */ - u16 fifo16; /* 0x1C */ - u8 rsvd0[2]; - u8 ffill; /* 0x20 */ - u8 rsvd1[3]; - - /* ATA */ - u8 cr; /* 0x24 */ - u8 rsvd2[3]; - u8 isr; /* 0x28 */ - u8 rsvd3[3]; - u8 ier; /* 0x2C */ - u8 rsvd4[3]; - u8 icr; /* 0x30 */ - u8 rsvd5[3]; - u8 falarm; /* 0x34 */ - u8 rsvd6[106]; -} atac_t; - /* Interrupt Controller (INTC) */ typedef struct int0_ctrl { u32 iprh0; /* 0x00 Pending Register High */ @@ -214,16 +166,6 @@ typedef struct iack { u8 gl7iack; } iack_t; -/* Edge Port Module (EPORT) */ -typedef struct eport { - u16 eppar; - u8 epddr; - u8 epier; - u8 epdr; - u8 eppdr; - u8 epfr; -} eport_t; - /* Watchdog Timer Modules (WTM) */ typedef struct wtm { u16 wcr; diff --git a/include/asm-m68k/immap_547x_8x.h b/include/asm-m68k/immap_547x_8x.h index c221936..f11b61a 100644 --- a/include/asm-m68k/immap_547x_8x.h +++ b/include/asm-m68k/immap_547x_8x.h @@ -57,6 +57,8 @@ #define MMAP_SRAMCFG (CONFIG_SYS_MBAR + 0x0001FF00) #define MMAP_SEC (CONFIG_SYS_MBAR + 0x00020000) +#include <asm/coldfire/dspi.h> +#include <asm/coldfire/eport.h> #include <asm/coldfire/flexbus.h> typedef struct siu { diff --git a/include/asm-m68k/m5235.h b/include/asm-m68k/m5235.h index b98b452..e4880c0 100644 --- a/include/asm-m68k/m5235.h +++ b/include/asm-m68k/m5235.h @@ -203,54 +203,6 @@ #define FBCS_CSCR_SWWS(x) ((x)&0x07) /********************************************************************* -* Queued Serial Peripheral Interface (QSPI) -*********************************************************************/ -/* Bit definitions and macros for QSPI_QMR */ -#define QSPI_QMR_MSTR (0x8000) -#define QSPI_QMR_DOHIE (0x4000) -#define QSPI_QMR_BITS(x) (((x)&0x000F)<<10) -#define QSPI_QMR_CPOL (0x0200) -#define QSPI_QMR_CPHA (0x0100) -#define QSPI_QMR_BAUD(x) ((x)&0x00FF) - -/* Bit definitions and macros for QSPI_QDLYR */ -#define QSPI_QDLYR_SPE (0x8000) -#define QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define QSPI_QDLYR_DTL(x) ((x)&0x00FF) - -/* Bit definitions and macros for QSPI_QWR */ -#define QSPI_QWR_HALT (0x8000) -#define QSPI_QWR_WREN (0x4000) -#define QSPI_QWR_WRTO (0x2000) -#define QSPI_QWR_CSIV (0x1000) -#define QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define QSPI_QWR_NEWQP(x) ((x)&0x000F) - -/* Bit definitions and macros for QSPI_QIR */ -#define QSPI_QIR_WCEFB (0x8000) -#define QSPI_QIR_ABRTB (0x4000) -#define QSPI_QIR_ABRTL (0x1000) -#define QSPI_QIR_WCEFE (0x0800) -#define QSPI_QIR_ABRTE (0x0400) -#define QSPI_QIR_SPIFE (0x0100) -#define QSPI_QIR_WCEF (0x0008) -#define QSPI_QIR_ABRT (0x0004) -#define QSPI_QIR_SPIF (0x0001) - -/* Bit definitions and macros for QSPI_QAR */ -#define QSPI_QAR_ADDR(x) ((x)&0x003F) - -/* Bit definitions and macros for QSPI_QDR */ -#define QSPI_QDR_CONT (0x8000) -#define QSPI_QDR_BITSE (0x4000) -#define QSPI_QDR_DT (0x2000) -#define QSPI_QDR_DSCK (0x1000) -#define QSPI_QDR_QSPI_CS3 (0x0800) -#define QSPI_QDR_QSPI_CS2 (0x0400) -#define QSPI_QDR_QSPI_CS1 (0x0200) -#define QSPI_QDR_QSPI_CS0 (0x0100) - -/********************************************************************* * Interrupt Controller (INTC) *********************************************************************/ #define INT0_LO_RSVD0 (0) @@ -758,49 +710,6 @@ #define PLL_SYNSR_CALPASS (0x00000001) /********************************************************************* - * Edge Port -*********************************************************************/ -#define EPORT_EPPAR_EPPA7(x) (((x)&0x03)<<14) -#define EPORT_EPPAR_EPPA6(x) (((x)&0x03)<<12) -#define EPORT_EPPAR_EPPA5(x) (((x)&0x03)<<10) -#define EPORT_EPPAR_EPPA4(x) (((x)&0x03)<<8) -#define EPORT_EPPAR_EPPA3(x) (((x)&0x03)<<6) -#define EPORT_EPPAR_EPPA2(x) (((x)&0x03)<<4) -#define EPORT_EPPAR_EPPA1(x) (((x)&0x03)<<2) - -#define EPORT_EPDDR_EPDD7(x) EPORT_EPPAR_EPPA7(x) -#define EPORT_EPDDR_EPDD6(x) EPORT_EPPAR_EPPA6(x) -#define EPORT_EPDDR_EPDD5(x) EPORT_EPPAR_EPPA5(x) -#define EPORT_EPDDR_EPDD4(x) EPORT_EPPAR_EPPA4(x) -#define EPORT_EPDDR_EPDD3(x) EPORT_EPPAR_EPPA3(x) -#define EPORT_EPDDR_EPDD2(x) EPORT_EPPAR_EPPA2(x) -#define EPORT_EPDDR_EPDD1(x) EPORT_EPPAR_EPPA1(x) - -#define EPORT_EPIER_EPIE7 (0x80) -#define EPORT_EPIER_EPIE6 (0x40) -#define EPORT_EPIER_EPIE5 (0x20) -#define EPORT_EPIER_EPIE4 (0x10) -#define EPORT_EPIER_EPIE3 (0x08) -#define EPORT_EPIER_EPIE2 (0x04) -#define EPORT_EPIER_EPIE1 (0x02) - -#define EPORT_EPDR_EPDR7 EPORT_EPIER_EPIE7 -#define EPORT_EPDR_EPDR6 EPORT_EPIER_EPIE6 -#define EPORT_EPDR_EPDR5 EPORT_EPIER_EPIE5 -#define EPORT_EPDR_EPDR4 EPORT_EPIER_EPIE4 -#define EPORT_EPDR_EPDR3 EPORT_EPIER_EPIE3 -#define EPORT_EPDR_EPDR2 EPORT_EPIER_EPIE2 -#define EPORT_EPDR_EPDR1 EPORT_EPIER_EPIE1 - -#define EPORT_EPPDR_EPPDR7 EPORT_EPIER_EPIE7 -#define EPORT_EPPDR_EPPDR6 EPORT_EPIER_EPIE6 -#define EPORT_EPPDR_EPPDR5 EPORT_EPIER_EPIE5 -#define EPORT_EPPDR_EPPDR4 EPORT_EPIER_EPIE4 -#define EPORT_EPPDR_EPPDR3 EPORT_EPIER_EPIE3 -#define EPORT_EPPDR_EPPDR2 EPORT_EPIER_EPIE2 -#define EPORT_EPPDR_EPPDR1 EPORT_EPIER_EPIE1 - -/********************************************************************* * Watchdog Timer Modules (WTM) *********************************************************************/ /* Bit definitions and macros for WTM_WCR */ diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h index c1669dc..b05da52 100644 --- a/include/asm-m68k/m5329.h +++ b/include/asm-m68k/m5329.h @@ -507,57 +507,6 @@ #define INTC_ICR_IL(x) ((x)&0x07) /********************************************************************* -* Queued Serial Peripheral Interface (QSPI) -*********************************************************************/ -/* Bit definitions and macros for QSPI_QMR */ -#define QSPI_QMR_MSTR (0x8000) -#define QSPI_QMR_DOHIE (0x4000) -#define QSPI_QMR_BITS(x) (((x)&0x000F)<<10) -#define QSPI_QMR_CPOL (0x0200) -#define QSPI_QMR_CPHA (0x0100) -#define QSPI_QMR_BAUD(x) ((x)&0x00FF) - -/* Bit definitions and macros for QSPI_QDLYR */ -#define QSPI_QDLYR_SPE (0x8000) -#define QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define QSPI_QDLYR_DTL(x) ((x)&0x00FF) - -/* Bit definitions and macros for QSPI_QWR */ -#define QSPI_QWR_NEWQP(x) ((x)&0x000F) -#define QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define QSPI_QWR_CSIV (0x1000) -#define QSPI_QWR_WRTO (0x2000) -#define QSPI_QWR_WREN (0x4000) -#define QSPI_QWR_HALT (0x8000) - -/* Bit definitions and macros for QSPI_QIR */ -#define QSPI_QIR_WCEFB (0x8000) -#define QSPI_QIR_ABRTB (0x4000) -#define QSPI_QIR_ABRTL (0x1000) -#define QSPI_QIR_WCEFE (0x0800) -#define QSPI_QIR_ABRTE (0x0400) -#define QSPI_QIR_SPIFE (0x0100) -#define QSPI_QIR_WCEF (0x0008) -#define QSPI_QIR_ABRT (0x0004) -#define QSPI_QIR_SPIF (0x0001) - -/* Bit definitions and macros for QSPI_QAR */ -#define QSPI_QAR_ADDR(x) ((x)&0x003F) -#define QSPI_QAR_TRANS (0x0000) -#define QSPI_QAR_RECV (0x0010) -#define QSPI_QAR_CMD (0x0020) - -/* Bit definitions and macros for QSPI_QDR */ -#define QSPI_QDR_CONT (0x8000) -#define QSPI_QDR_BITSE (0x4000) -#define QSPI_QDR_DT (0x2000) -#define QSPI_QDR_DSCK (0x1000) -#define QSPI_QDR_QSPI_CS3 (0x0800) -#define QSPI_QDR_QSPI_CS2 (0x0400) -#define QSPI_QDR_QSPI_CS1 (0x0200) -#define QSPI_QDR_QSPI_CS0 (0x0100) - -/********************************************************************* * Pulse Width Modulation (PWM) *********************************************************************/ /* Bit definitions and macros for PWM_E */ diff --git a/include/asm-m68k/m5445x.h b/include/asm-m68k/m5445x.h index 7fcf4ef..69d4aac 100644 --- a/include/asm-m68k/m5445x.h +++ b/include/asm-m68k/m5445x.h @@ -344,96 +344,6 @@ #define INTC_ICR_IL(x) (((x)&0x07)) /********************************************************************* -* Edge Port Module (EPORT) -*********************************************************************/ - -/* Bit definitions and macros for EPPAR */ -#define EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2) -#define EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4) -#define EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6) -#define EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8) -#define EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10) -#define EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12) -#define EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14) -#define EPORT_EPPAR_LEVEL (0) -#define EPORT_EPPAR_RISING (1) -#define EPORT_EPPAR_FALLING (2) -#define EPORT_EPPAR_BOTH (3) -#define EPORT_EPPAR_EPPA7_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA7_RISING (0x4000) -#define EPORT_EPPAR_EPPA7_FALLING (0x8000) -#define EPORT_EPPAR_EPPA7_BOTH (0xC000) -#define EPORT_EPPAR_EPPA6_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA6_RISING (0x1000) -#define EPORT_EPPAR_EPPA6_FALLING (0x2000) -#define EPORT_EPPAR_EPPA6_BOTH (0x3000) -#define EPORT_EPPAR_EPPA5_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA5_RISING (0x0400) -#define EPORT_EPPAR_EPPA5_FALLING (0x0800) -#define EPORT_EPPAR_EPPA5_BOTH (0x0C00) -#define EPORT_EPPAR_EPPA4_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA4_RISING (0x0100) -#define EPORT_EPPAR_EPPA4_FALLING (0x0200) -#define EPORT_EPPAR_EPPA4_BOTH (0x0300) -#define EPORT_EPPAR_EPPA3_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA3_RISING (0x0040) -#define EPORT_EPPAR_EPPA3_FALLING (0x0080) -#define EPORT_EPPAR_EPPA3_BOTH (0x00C0) -#define EPORT_EPPAR_EPPA2_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA2_RISING (0x0010) -#define EPORT_EPPAR_EPPA2_FALLING (0x0020) -#define EPORT_EPPAR_EPPA2_BOTH (0x0030) -#define EPORT_EPPAR_EPPA1_LEVEL (0x0000) -#define EPORT_EPPAR_EPPA1_RISING (0x0004) -#define EPORT_EPPAR_EPPA1_FALLING (0x0008) -#define EPORT_EPPAR_EPPA1_BOTH (0x000C) - -/* Bit definitions and macros for EPDDR */ -#define EPORT_EPDDR_EPDD1 (0x02) -#define EPORT_EPDDR_EPDD2 (0x04) -#define EPORT_EPDDR_EPDD3 (0x08) -#define EPORT_EPDDR_EPDD4 (0x10) -#define EPORT_EPDDR_EPDD5 (0x20) -#define EPORT_EPDDR_EPDD6 (0x40) -#define EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for EPIER */ -#define EPORT_EPIER_EPIE1 (0x02) -#define EPORT_EPIER_EPIE2 (0x04) -#define EPORT_EPIER_EPIE3 (0x08) -#define EPORT_EPIER_EPIE4 (0x10) -#define EPORT_EPIER_EPIE5 (0x20) -#define EPORT_EPIER_EPIE6 (0x40) -#define EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for EPDR */ -#define EPORT_EPDR_EPD1 (0x02) -#define EPORT_EPDR_EPD2 (0x04) -#define EPORT_EPDR_EPD3 (0x08) -#define EPORT_EPDR_EPD4 (0x10) -#define EPORT_EPDR_EPD5 (0x20) -#define EPORT_EPDR_EPD6 (0x40) -#define EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for EPPDR */ -#define EPORT_EPPDR_EPPD1 (0x02) -#define EPORT_EPPDR_EPPD2 (0x04) -#define EPORT_EPPDR_EPPD3 (0x08) -#define EPORT_EPPDR_EPPD4 (0x10) -#define EPORT_EPPDR_EPPD5 (0x20) -#define EPORT_EPPDR_EPPD6 (0x40) -#define EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for EPFR */ -#define EPORT_EPFR_EPF1 (0x02) -#define EPORT_EPFR_EPF2 (0x04) -#define EPORT_EPFR_EPF3 (0x08) -#define EPORT_EPFR_EPF4 (0x10) -#define EPORT_EPFR_EPF5 (0x20) -#define EPORT_EPFR_EPF6 (0x40) -#define EPORT_EPFR_EPF7 (0x80) - -/********************************************************************* * Watchdog Timer Modules (WTM) *********************************************************************/ -- 1.5.6.4

1 0

[U-Boot] [PATCH 01/19] ColdFire: Remove linker file
by Tsi-Chung Liew 22 Oct '08

22 Oct '08

From: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> Each different build for M54455EVB and M5235EVB will create a u-boot.lds linker file. It is redundant to keep the u-boot.lds Signed-off-by: TsiChung Liew <Tsi-Chung.Liew(a)freescale.com> --- board/freescale/m5235evb/u-boot.lds | 144 ---------------------------------- board/freescale/m54455evb/u-boot.lds | 143 --------------------------------- 2 files changed, 0 insertions(+), 287 deletions(-) delete mode 100644 board/freescale/m5235evb/u-boot.lds delete mode 100644 board/freescale/m54455evb/u-boot.lds diff --git a/board/freescale/m5235evb/u-boot.lds b/board/freescale/m5235evb/u-boot.lds deleted file mode 100644 index c0611b9..0000000 --- a/board/freescale/m5235evb/u-boot.lds +++ /dev/null @@ -1,144 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(m68k) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/mcf523x/start.o (.text) - cpu/mcf523x/cpu_init.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) - common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - *(.got) - __got_end = .; - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - _end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m54455evb/u-boot.lds b/board/freescale/m54455evb/u-boot.lds deleted file mode 100644 index bcf30c3..0000000 --- a/board/freescale/m54455evb/u-boot.lds +++ /dev/null @@ -1,143 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(m68k) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/mcf5445x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) - common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - *(.got) - __got_end = .; - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - _end = . ; - PROVIDE (end = .); -} -- 1.5.6.4

1 0

[U-Boot] Linux does not boot from flash, but will from RAM
by Curran, Tom 22 Oct '08

22 Oct '08

I am using u-boot on the Avnet V5FX30T (Xilinx FPGA, PPC440) eval board to boot a Linux 2.6.27-rc4 kernel. I can use u-boot to tftp the kernel, ramdisk, and device tree blob to RAM and boot from there OK. I copied the kernel, ramdisk and blob to flash and verified those elements were programmed in flash correctly with 'iminfo', but when I try to boot from flash the boot process hangs at "Loading Ramdisk to 03d59000, end 03ec8f20 ... OK". At this point u-boot will restart (after a WDT-induced reset?) after a few minutes. Interestingly enough, I can boot from flash IF the ramdisk is already in RAM with a "bootm $(kernel_flash_addr) $(ramdisk_ram_addr) $(blob_flash_addr)". This leads me to believe something is going wrong in the copying of the ramdisk from flash to RAM. Perhaps I am doing something wrong or missed a step somewhere? I have read the FAQ, but have not found anything relevant. Perhaps someone here has had this problem too and can offer a solution? Any help is appreciated. Many thanks in advance! --Tom

3 2

[U-Boot] [PATCH v2] pci: Allow for PCI addresses to be 64-bit
by Kumar Gala 22 Oct '08

22 Oct '08

PCI bus is inherently 64-bit. While not all system require access to the full 64-bit PCI address range some do. This allows those systems to enable the full PCI address width via CONFIG_SYS_PCI_64BIT. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- Fixed up all the other bits associated with 64-bit PCI support. - k drivers/pci/pci.c | 37 ++++++++++++++++++-------- drivers/pci/pci_auto.c | 67 +++++++++++++++++++++++++++++------------------ include/pci.h | 40 +++++++++++++++++----------- 3 files changed, 91 insertions(+), 53 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 41780db..d13a57e 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -218,12 +218,12 @@ pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index) * */ -unsigned long pci_hose_phys_to_bus (struct pci_controller *hose, +pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose, phys_addr_t phys_addr, unsigned long flags) { struct pci_region *res; - unsigned long bus_addr; + pci_addr_t bus_addr; int i; if (!hose) { @@ -252,7 +252,7 @@ Done: } phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, - unsigned long bus_addr, + pci_addr_t bus_addr, unsigned long flags) { struct pci_region *res; @@ -288,15 +288,17 @@ Done: int pci_hose_config_device(struct pci_controller *hose, pci_dev_t dev, unsigned long io, - unsigned long mem, + pci_addr_t mem, unsigned long command) { - unsigned int bar_response, bar_size, bar_value, old_command; + unsigned int bar_response, old_command; + pci_addr_t bar_value; + pci_size_t bar_size; unsigned char pin; int bar, found_mem64; - debug ("PCI Config: I/O=0x%lx, Memory=0x%lx, Command=0x%lx\n", - io, mem, command); + debug ("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", + io, (u64)mem, command); pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0); @@ -319,10 +321,19 @@ int pci_hose_config_device(struct pci_controller *hose, io = io + bar_size; } else { if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == - PCI_BASE_ADDRESS_MEM_TYPE_64) - found_mem64 = 1; + PCI_BASE_ADDRESS_MEM_TYPE_64) { + u32 bar_response_upper; + u64 bar64; + pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff); + pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper); - bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1; + bar64 = ((u64)bar_response_upper << 32) | bar_response; + + bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK) + 1; + found_mem64 = 1; + } else { + bar_size = (u32)(~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1); + } /* round up region base address to multiple of size */ mem = ((mem - 1) | (bar_size - 1)) + 1; @@ -332,11 +343,15 @@ int pci_hose_config_device(struct pci_controller *hose, } /* Write it out and update our limit */ - pci_hose_write_config_dword (hose, dev, bar, bar_value); + pci_hose_write_config_dword (hose, dev, bar, (u32)bar_value); if (found_mem64) { bar += 4; +#ifdef CONFIG_SYS_PCI_64BIT + pci_hose_write_config_dword(hose, dev, bar, bar_value>>32); +#else pci_hose_write_config_dword (hose, dev, bar, 0x00000000); +#endif } } diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 3844359..c347e82 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -45,14 +45,14 @@ void pciauto_region_init(struct pci_region* res) res->bus_lower = res->bus_start ? res->bus_start : 0x1000; } -void pciauto_region_align(struct pci_region *res, unsigned long size) +void pciauto_region_align(struct pci_region *res, pci_size_t size) { res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1; } -int pciauto_region_allocate(struct pci_region* res, unsigned int size, unsigned int *bar) +int pciauto_region_allocate(struct pci_region* res, pci_size_t size, pci_addr_t *bar) { - unsigned long addr; + pci_addr_t addr; if (!res) { DEBUGF("No resource"); @@ -68,13 +68,13 @@ int pciauto_region_allocate(struct pci_region* res, unsigned int size, unsigned res->bus_lower = addr + size; - DEBUGF("address=0x%lx bus_lower=%x", addr, res->bus_lower); + DEBUGF("address=0x%llx bus_lower=%llx", (u64)addr, (u64)res->bus_lower); *bar = addr; return 0; error: - *bar = 0xffffffff; + *bar = (pci_addr_t)-1; return -1; } @@ -88,7 +88,9 @@ void pciauto_setup_device(struct pci_controller *hose, struct pci_region *prefetch, struct pci_region *io) { - unsigned int bar_value, bar_response, bar_size; + unsigned int bar_response; + pci_addr_t bar_value; + pci_size_t bar_size; unsigned int cmdstat = 0; struct pci_region *bar_res; int bar, bar_nr = 0; @@ -114,33 +116,46 @@ void pciauto_setup_device(struct pci_controller *hose, & 0xffff) + 1; bar_res = io; - DEBUGF("PCI Autoconfig: BAR %d, I/O, size=0x%x, ", bar_nr, bar_size); + DEBUGF("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", bar_nr, (u64)bar_size); } else { if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == - PCI_BASE_ADDRESS_MEM_TYPE_64) - found_mem64 = 1; + PCI_BASE_ADDRESS_MEM_TYPE_64) { + u32 bar_response_upper; + u64 bar64; + pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff); + pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper); + + bar64 = ((u64)bar_response_upper << 32) | bar_response; - bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1; + bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK) + 1; + found_mem64 = 1; + } else { + bar_size = (u32)(~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1); + } if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH)) bar_res = prefetch; else bar_res = mem; - DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%x, ", bar_nr, bar_size); + DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%llx, ", bar_nr, (u64)bar_size); } if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) { /* Write it out and update our limit */ - pci_hose_write_config_dword(hose, dev, bar, bar_value); + pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value); - /* - * If we are a 64-bit decoder then increment to the - * upper 32 bits of the bar and force it to locate - * in the lower 4GB of memory. - */ if (found_mem64) { bar += 4; +#ifdef CONFIG_SYS_PCI_64BIT + pci_hose_write_config_dword(hose, dev, bar, bar_value>>32); +#else + /* + * If we are a 64-bit decoder then increment to the + * upper 32 bits of the bar and force it to locate + * in the lower 4GB of memory. + */ pci_hose_write_config_dword(hose, dev, bar, 0x00000000); +#endif } cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ? @@ -289,10 +304,10 @@ void pciauto_config_init(struct pci_controller *hose) if (hose->pci_mem) { pciauto_region_init(hose->pci_mem); - DEBUGF("PCI Autoconfig: Bus Memory region: [%lx-%lx],\n" + DEBUGF("PCI Autoconfig: Bus Memory region: [%llx-%llx],\n" "\t\tPhysical Memory [%x-%x]\n", - hose->pci_mem->bus_start, - hose->pci_mem->bus_start + hose->pci_mem->size - 1, + (u64)hose->pci_mem->bus_start, + (u64)(hose->pci_mem->bus_start + hose->pci_mem->size - 1), hose->pci_mem->phys_start, hose->pci_mem->phys_start + hose->pci_mem->size - 1); } @@ -300,10 +315,10 @@ void pciauto_config_init(struct pci_controller *hose) if (hose->pci_prefetch) { pciauto_region_init(hose->pci_prefetch); - DEBUGF("PCI Autoconfig: Bus Prefetchable Mem: [%lx-%lx],\n" + DEBUGF("PCI Autoconfig: Bus Prefetchable Mem: [%llx-%llx],\n" "\t\tPhysical Memory [%x-%x]\n", - hose->pci_prefetch->bus_start, - hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1, + (u64)hose->pci_prefetch->bus_start, + (u64)(hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1), hose->pci_prefetch->phys_start, hose->pci_prefetch->phys_start + hose->pci_prefetch->size - 1); @@ -312,10 +327,10 @@ void pciauto_config_init(struct pci_controller *hose) if (hose->pci_io) { pciauto_region_init(hose->pci_io); - DEBUGF("PCI Autoconfig: Bus I/O region: [%lx-%lx],\n" + DEBUGF("PCI Autoconfig: Bus I/O region: [%llx-%llx],\n" "\t\tPhysical Memory: [%x-%x]\n", - hose->pci_io->bus_start, - hose->pci_io->bus_start + hose->pci_io->size - 1, + (u64)hose->pci_io->bus_start, + (u64)(hose->pci_io->bus_start + hose->pci_io->size - 1), hose->pci_io->phys_start, hose->pci_io->phys_start + hose->pci_io->size - 1); diff --git a/include/pci.h b/include/pci.h index 1c8e216..eebe8a8 100644 --- a/include/pci.h +++ b/include/pci.h @@ -101,8 +101,8 @@ #define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */ #define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */ #define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */ -#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL) -#define PCI_BASE_ADDRESS_IO_MASK (~0x03UL) +#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fULL) +#define PCI_BASE_ADDRESS_IO_MASK (~0x03ULL) /* bit 1 is reserved if address_space = 1 */ /* Header type 0 (normal devices) */ @@ -111,7 +111,7 @@ #define PCI_SUBSYSTEM_ID 0x2e #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS_ENABLE 0x01 -#define PCI_ROM_ADDRESS_MASK (~0x7ffUL) +#define PCI_ROM_ADDRESS_MASK (~0x7ffULL) #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ @@ -312,13 +312,21 @@ #include <pci_ids.h> +#ifdef CONFIG_SYS_PCI_64BIT +typedef u64 pci_addr_t; +typedef u64 pci_size_t; +#else +typedef u32 pci_addr_t; +typedef u32 pci_size_t; +#endif + struct pci_region { - unsigned long bus_start; /* Start on the bus */ - phys_addr_t phys_start; /* Start in physical address space */ - unsigned long size; /* Size */ - unsigned long flags; /* Resource flags */ + pci_addr_t bus_start; /* Start on the bus */ + phys_addr_t phys_start; /* Start in physical address space */ + pci_size_t size; /* Size */ + unsigned long flags; /* Resource flags */ - unsigned long bus_lower; + pci_addr_t bus_lower; }; #define PCI_REGION_MEM 0x00000000 /* PCI memory space */ @@ -330,9 +338,9 @@ struct pci_region { #define PCI_REGION_RO 0x00000200 /* Read-only memory */ extern __inline__ void pci_set_region(struct pci_region *reg, - unsigned long bus_start, + pci_addr_t bus_start, phys_addr_t phys_start, - unsigned long size, + pci_size_t size, unsigned long flags) { reg->bus_start = bus_start; reg->phys_start = phys_start; @@ -433,9 +441,9 @@ extern __inline__ void pci_set_ops(struct pci_controller *hose, extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, - unsigned long addr, unsigned long flags); -extern unsigned long pci_hose_phys_to_bus(struct pci_controller* hose, - phys_addr_t addr, unsigned long flags); + pci_addr_t addr, unsigned long flags); +extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose, + phys_addr_t addr, unsigned long flags); #define pci_phys_to_bus(dev, addr, flags) \ pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) @@ -483,8 +491,8 @@ extern int pci_hose_scan(struct pci_controller *hose); extern int pci_hose_scan_bus(struct pci_controller *hose, int bus); extern void pciauto_region_init(struct pci_region* res); -extern void pciauto_region_align(struct pci_region *res, unsigned long size); -extern int pciauto_region_allocate(struct pci_region* res, unsigned int size, unsigned int *bar); +extern void pciauto_region_align(struct pci_region *res, pci_size_t size); +extern int pciauto_region_allocate(struct pci_region* res, pci_size_t size, pci_addr_t *bar); extern void pciauto_setup_device(struct pci_controller *hose, pci_dev_t dev, int bars_num, struct pci_region *mem, @@ -500,7 +508,7 @@ extern pci_dev_t pci_find_class(int wanted_class, int wanted_sub_code, extern int pci_hose_config_device(struct pci_controller *hose, pci_dev_t dev, unsigned long io, - unsigned long mem, + pci_addr_t mem, unsigned long command); #ifdef CONFIG_MPC824X -- 1.5.5.1

2 2

[U-Boot] U-Boot 1.3.3 - Error: start address not on sector boundary
by jkimble＠one.net 22 Oct '08

22 Oct '08

I'm running this on a Coldfire (MCF5484) processor for Linux 2.6.25. I've got 64MB of Intel P33 flash. I have two chips that have their chip selects tied together to give me 32 bit read/write. flinfo shows: Bank # 1: CFI conformant FLASH (32 x 16) Size: 64 MB in 259 SectorsEC0000 Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x22 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes addr_first: 0xfc002000 Sector Start Addresses:0 FC000000 RO FC010000 RO FC020000 RO FC030000 RO FC040000 RO FC080000 RO FC0C0000 RO FC100000 RO FC140000 RO FC180000 RO FC1C0000 RO FC200000 FC240000 FC280000 FC2C0000 FC300000 FC340000 FC380000 FC3C0000 FC400000 etc.... Got CS0 set as: #define CFG_CS0_BASE 0xFC000000 #define CFG_CS0_MASK (((CFG_BOOTSZ << 20) - 1) & 0xFFFF0001) #define CFG_CS0_CTRL 0x00002500 This chips first four sectors are 32K (the rest are 128K). The CFG_ENV_SECT_SIZE is set to 0x2000. However if I change it to 32K I get errors. On top of that the sector boundaries look fine in flinfo. I put in some debug to see more about the error and I get: -> save Saving Environment to Flash... addr_first: 0xfc002000 info->start[0]: 0xfc000000 b_end: 0xffffffff Error: start address not on sector boundary Not sure what to do with this. Any help appreciated.

1 0

[U-Boot] [PATCH] fdt_resize(): Expand to next page boundary independent of offset
by Peter Korsgaard 22 Oct '08

22 Oct '08

fdt_resize() adjusted the fdt totalsize so the fdt would end on a page boundary in memory - E.G. the amount of padding depended on the location of the fdt (offset within page). This doesn't work very good with multi file images where the fdt is located after the kernel and hence on a more-or-less random offset within a page. Instead, simply pad fdt to the next page boundary. For the common case of fdt at offset 0 within a page, the same amount of padding as before is added. Signed-off-by: Peter Korsgaard <jacmet(a)sunsite.dk> --- common/fdt_support.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index 8ceeb0f..12aebac 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -579,9 +579,8 @@ int fdt_resize(void *blob) actualsize = fdt_off_dt_strings(blob) + fdt_size_dt_strings(blob); - /* Make it so the fdt ends on a page boundary */ + /* Expand to next page boundary */ actualsize = ALIGN(actualsize, 0x1000); - actualsize = actualsize - ((uint)blob & 0xfff); /* Change the fdt header to reflect the correct size */ fdt_set_totalsize(blob, actualsize); -- 1.5.6.5

1 0

[U-Boot] [PATCH] ppc4xx: New board avnet fx12 minimodule <v3>
by Georg Schardt 22 Oct '08

22 Oct '08

From: schardt <schardt(a)team-ctech.de> this patch adds support for the avnet fx12 minimodul it needs the "ppc4xx: Generic architecture for xilinx ppc405" patch from Ricardo <v2> rebased to ppc4xx/master <v3> files u-boot.lds and init.S removed Signed-off-by: schardt <schardt(a)team-ctech.de> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)uam.es> --- MAINTAINERS | 4 ++ MAKEALL | 1 + Makefile | 18 +++++++++ board/avnet/fx12mm/.gitignore | 1 + board/avnet/fx12mm/Makefile | 27 ++++++++++++++ board/avnet/fx12mm/config.mk | 26 ++++++++++++++ board/avnet/fx12mm/fx12mm.c | 52 +++++++++++++++++++++++++++ board/avnet/fx12mm/xparameters.h | 51 +++++++++++++++++++++++++++ include/configs/fx12mm.h | 72 ++++++++++++++++++++++++++++++++++++++ 9 files changed, 252 insertions(+), 0 deletions(-) create mode 100644 board/avnet/fx12mm/.gitignore create mode 100644 board/avnet/fx12mm/Makefile create mode 100644 board/avnet/fx12mm/config.mk create mode 100644 board/avnet/fx12mm/fx12mm.c create mode 100644 board/avnet/fx12mm/xparameters.h create mode 100644 include/configs/fx12mm.h diff --git a/MAINTAINERS b/MAINTAINERS index a5d1038..260c3e6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -366,6 +366,10 @@ Travis Sawyer (travis.sawyer(a)sandburst.com> METROBOX PPC440GX XPEDITE1K PPC440GX +Georg Schardt <schardt(a)team-ctech.de> + + fx12mm PPC405 + Heiko Schocher <hs(a)denx.de> ids8247 MPC8247 diff --git a/MAKEALL b/MAKEALL index aa602b7..1f56ac5 100755 --- a/MAKEALL +++ b/MAKEALL @@ -186,6 +186,7 @@ LIST_4xx=" \ ebony \ ERIC \ EXBITGEN \ + fx12mm \ G2000 \ glacier \ haleakala \ diff --git a/Makefile b/Makefile index 66922eb..d6abb4d 100644 --- a/Makefile +++ b/Makefile @@ -1293,6 +1293,24 @@ ERIC_config: unconfig EXBITGEN_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx exbitgen +fx12mm_flash_config: unconfig + @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic + @mkdir -p $(obj)include $(obj)board/avnet/fx12mm + @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\ + > $(obj)board/avnet/fx12mm/config.tmp + @echo "TEXT_BASE := 0xFFCB0000" \ + >> $(obj)board/avnet/fx12mm/config.tmp + @$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet + +fx12mm_config: unconfig + @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic + @mkdir -p $(obj)include $(obj)board/avnet/fx12mm + @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\ + > $(obj)board/avnet/fx12mm/config.tmp + @echo "TEXT_BASE := 0x03000000" \ + >> $(obj)board/avnet/fx12mm/config.tmp + @$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet + G2000_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000 diff --git a/board/avnet/fx12mm/.gitignore b/board/avnet/fx12mm/.gitignore new file mode 100644 index 0000000..b644f59 --- /dev/null +++ b/board/avnet/fx12mm/.gitignore @@ -0,0 +1 @@ +config.tmp diff --git a/board/avnet/fx12mm/Makefile b/board/avnet/fx12mm/Makefile new file mode 100644 index 0000000..f943781 --- /dev/null +++ b/board/avnet/fx12mm/Makefile @@ -0,0 +1,27 @@ +# +# (C) Copyright 2008 +# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda(a)uam.es +# This work has been supported by: Qtechnology http://qtec.com/ +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +COBJS += $(BOARD).o + +include $(SRCTREE)/board/xilinx/ppc405-generic/Makefile diff --git a/board/avnet/fx12mm/config.mk b/board/avnet/fx12mm/config.mk new file mode 100644 index 0000000..f5a6039 --- /dev/null +++ b/board/avnet/fx12mm/config.mk @@ -0,0 +1,26 @@ +# +# (C) Copyright 2008 +# Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda(a)uam.es +# Work supported by Qtechnology http://www.qtec.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# + +sinclude $(SRCTREE)/board/xilinx/ppc405-generic/config.mk diff --git a/board/avnet/fx12mm/fx12mm.c b/board/avnet/fx12mm/fx12mm.c new file mode 100644 index 0000000..4858645 --- /dev/null +++ b/board/avnet/fx12mm/fx12mm.c @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2008 + * + * Author: Xilinx Inc. + * + * Modified by: + * Georg Schardt <schardt(a)team-ctech.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <config.h> +#include <common.h> +#include <asm/processor.h> + +int checkboard(void) +{ + char tmp[64]; + char *s, *e; + int i = getenv_r("serial", tmp, sizeof(tmp)); + + if (i < 0) { + printf("Avnet Virtex4 FX12 with no serial #"); + } else { + for (e = tmp; *e; ++e) { + if (*e == ' ') + break; + } + printf("Avnet Virtex4 FX12 Minimodul # "); + for (s = tmp; s < e; ++s) + putc(*s); + } + putc('\n'); + return 0; +} diff --git a/board/avnet/fx12mm/xparameters.h b/board/avnet/fx12mm/xparameters.h new file mode 100644 index 0000000..f7031b3 --- /dev/null +++ b/board/avnet/fx12mm/xparameters.h @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2008 + * + * Georg Schardt <schardt(a)team-ctech.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * CAUTION: This file is based on the xparameters.h automatically + * generated by libgen. Version: Xilinx EDK 10.1.02 Build EDK_K_SP2.5 + */ + +#ifndef __XPARAMETER_H__ +#define __XPARAMETER_H__ + +/* RS232 */ +#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000 +#define XPAR_UARTNS550_0_BASEADDR 0x83E00000 + + +/* INT_C */ +#define XPAR_XPS_INTC_0_DEVICE_ID 0 +#define XPAR_XPS_INTC_0_BASEADDR 0x81800000 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 2 + +/* CPU core clock */ +#define XPAR_CORE_CLOCK_FREQ_HZ 300000000 +#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 + +/* RAM */ +#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 + +/* FLASH */ +#define XPAR_FLASH_2MX16_MEM0_BASEADDR 0xFFC00000 + +#endif diff --git a/include/configs/fx12mm.h b/include/configs/fx12mm.h new file mode 100644 index 0000000..d45e7a0 --- /dev/null +++ b/include/configs/fx12mm.h @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2008 + * + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda(a)uam.es + * This work has been supported by: QTechnology http://qtec.com + * + * Georg Schardt <schardt(a)team-ctech.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +/* + Configuration file for the Virtex4FX12 Minimodul by Avnet/Memec, + see http://www.em.avnet.com +*/ + +#ifndef __CONFIG_FX12_H +#define __CONFIG_FX12_H + +#include "../board/avnet/fx12mm/xparameters.h" + +/* cmd config */ +#define CONFIG_CMD_JFFS2 +#define CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_NET + +/* sdram */ +#define CONFIG_SYS_SDRAM_SIZE_MB 64 + +/* environment */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_SYS_ENV_OFFSET 0xA0000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_ENV_OFFSET) +#define CONFIG_ENV_OVERWRITE 1 + +/*Misc*/ +#define CONFIG_SYS_PROMPT "FX12MM:/# " /* Monitor Command Prompt */ +#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" + +/*Flash*/ +#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_2MX16_MEM0_BASEADDR +#define CONFIG_SYS_FLASH_SIZE (4*1024*1024) +#define CONFIG_SYS_MAX_FLASH_SECT 71 +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define MTDIDS_DEFAULT "nor0=fx12mm-flash" +#define MTDPARTS_DEFAULT "mtdparts=fx12mm-flash:-(user)" + + +#include "configs/xilinx-ppc405.h" + +#endif /* __CONFIG_H */ + -- 1.5.4.1

2 1

[U-Boot] [PATCH 1/2] bootm: Add subcommands
by Kumar Gala 22 Oct '08

22 Oct '08

Add the ability to break the steps of the bootm command into several subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go. This allows us to do things like manipulate device trees before they are passed to a booting kernel or setup memory for a secondary core in multicore situations. Not all OS types support all subcommands (currently only start, loados, ramdisk, fdt, and go are supported). Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- common/cmd_bootm.c | 168 +++++++++++++++++++++++++++++++++++++++++++++++- include/image.h | 20 ++++++- lib_arm/bootm.c | 3 + lib_avr32/bootm.c | 3 + lib_blackfin/bootm.c | 3 + lib_i386/bootm.c | 3 + lib_m68k/bootm.c | 3 + lib_microblaze/bootm.c | 3 + lib_mips/bootm.c | 3 + lib_nios2/bootm.c | 3 + lib_ppc/bootm.c | 3 + lib_sh/bootm.c | 3 + lib_sparc/bootm.c | 3 + 13 files changed, 219 insertions(+), 2 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 956e1a0..1b2dfc4 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -34,6 +34,7 @@ #include <bzlib.h> #include <environment.h> #include <lmb.h> +#include <linux/ctype.h> #include <asm/byteorder.h> #if defined(CONFIG_CMD_USB) @@ -296,7 +297,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } images.os.start = (ulong)os_hdr; - images.valid = 1; + images.state = BOOTM_STATE_START; return 0; } @@ -399,6 +400,121 @@ static int bootm_load_os(image_info_t os, ulong *load_end, int boot_progress) return 0; } +/* we overload the cmd field with our state machine info instead of a + * function pointer */ +cmd_tbl_t cmd_bootm_sub[] = { + U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, "", ""), + U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, "", ""), +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) + U_BOOT_CMD_MKENT(ramdisk, 0, 1, (void *)BOOTM_STATE_RAMDISK, "", ""), +#endif +#ifdef CONFIG_OF_LIBFDT + U_BOOT_CMD_MKENT(fdt, 0, 1, (void *)BOOTM_STATE_FDT, "", ""), +#endif + U_BOOT_CMD_MKENT(bdt, 0, 1, (void *)BOOTM_STATE_OS_BD_T, "", ""), + U_BOOT_CMD_MKENT(cmdline, 0, 1, (void *)BOOTM_STATE_OS_CMDLINE, "", ""), + U_BOOT_CMD_MKENT(prep, 0, 1, (void *)BOOTM_STATE_OS_PREP, "", ""), + U_BOOT_CMD_MKENT(go, 0, 1, (void *)BOOTM_STATE_OS_GO, "", ""), +}; + +int do_bootm_subcommand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int ret = 0; + int state; + cmd_tbl_t *c; + boot_os_fn *boot_fn; + + c = find_cmd_tbl(argv[1], &cmd_bootm_sub[0], ARRAY_SIZE(cmd_bootm_sub)); + + if (c) { + state = (int)c->cmd; + + /* treat start special since it resets the state machine */ + if (state == BOOTM_STATE_START) { + argc--; + argv++; + return bootm_start(cmdtp, flag, argc, argv); + } + } + /* Unrecognized command */ + else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + if (images.state >= state) { + printf ("Trying to execute a command out of order\n"); + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + images.state |= state; + boot_fn = boot_os[images.os.os]; + + switch (state) { + ulong load_end; + case BOOTM_STATE_START: + /* should never occur */ + break; + case BOOTM_STATE_LOADOS: + ret = bootm_load_os(images.os, &load_end, 0); + if (ret) + return ret; + + lmb_reserve(&images.lmb, images.os.load, + (load_end - images.os.load)); + break; +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) + case BOOTM_STATE_RAMDISK: + { + ulong rd_len = images.rd_end - images.rd_start; + char str[17]; + + ret = boot_ramdisk_high(&images.lmb, images.rd_start, + rd_len, &images.initrd_start, &images.initrd_end); + if (ret) + return ret; + + sprintf(str, "%lx", images.initrd_start); + setenv("initrd_start", str); + sprintf(str, "%lx", images.initrd_end); + setenv("initrd_end", str); + } + break; +#endif +#ifdef CONFIG_OF_LIBFDT + case BOOTM_STATE_FDT: + { + ulong bootmap_base = getenv_bootm_low(); + ret = boot_relocate_fdt(&images.lmb, bootmap_base, + &images.ft_addr, &images.ft_len); + break; + } +#endif + case BOOTM_STATE_OS_CMDLINE: + ret = boot_fn(BOOTM_STATE_OS_CMDLINE, argc, argv, &images); + if (ret) + printf ("cmdline subcommand not supported\n"); + break; + case BOOTM_STATE_OS_BD_T: + ret = boot_fn(BOOTM_STATE_OS_BD_T, argc, argv, &images); + if (ret) + printf ("bdt subcommand not supported\n"); + break; + case BOOTM_STATE_OS_PREP: + ret = boot_fn(BOOTM_STATE_OS_PREP, argc, argv, &images); + if (ret) + printf ("prep subcommand not supported\n"); + break; + case BOOTM_STATE_OS_GO: + disable_interrupts(); + boot_fn(BOOTM_STATE_OS_GO, argc, argv, &images); + break; + } + + return ret; +} + /*******************************************************************/ /* bootm - boot application image from image in memory */ /*******************************************************************/ @@ -419,6 +535,23 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) relocated = 1; } + /* determine if we have a sub command */ + if (argc > 1) { + char *endp; + + simple_strtoul(argv[1], &endp, 16); + /* endp pointing to NULL means that argv[1] was just a + * valid number, pass it along to the normal bootm processing + * + * If endp is ':' or '#' assume a FIT identifier so pass + * along for normal processing. + * + * Right now we assume the first arg should never be '-' + */ + if ((*endp != 0) && (*endp != ':') && (*endp != '#')) + return do_bootm_subcommand(cmdtp, flag, argc, argv); + } + if (bootm_start(cmdtp, flag, argc, argv)) return 1; @@ -783,6 +916,21 @@ U_BOOT_CMD( "\tUse iminfo command to get the list of existing component\n" "\timages and configurations.\n" #endif + "\nSub-commands to do part of the bootm sequence. The sub-commands " + "must be\n" + "issued in the order below (it's ok to not issue all sub-commands):\n" + "\tstart [addr [arg ...]]\n" + "\tloados - load OS image\n" +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) + "\tramdisk - relocate initrd, set env initrd_start/initrd_end\n" +#endif +#if defined(CONFIG_OF_LIBFDT) + "\tfdt - relocate flat device tree\n" +#endif + "\tbdt - OS specific bd_t processing\n" + "\tcmdline - OS specific command line processing/setup\n" + "\tprep - OS specific prep before relocation or go\n" + "\tgo - start OS\n" ); /*******************************************************************/ @@ -1022,6 +1170,9 @@ static int do_bootm_netbsd (int flag, int argc, char *argv[], char *consdev; char *cmdline; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #if defined(CONFIG_FIT) if (!images->legacy_hdr_valid) { fit_unsupported_reset ("NetBSD"); @@ -1102,6 +1253,9 @@ static int do_bootm_lynxkdi (int flag, int argc, char *argv[], { image_header_t *hdr = &images->legacy_hdr_os_copy; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #if defined(CONFIG_FIT) if (!images->legacy_hdr_valid) { fit_unsupported_reset ("Lynx"); @@ -1120,6 +1274,9 @@ static int do_bootm_rtems (int flag, int argc, char *argv[], { void (*entry_point)(bd_t *); + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #if defined(CONFIG_FIT) if (!images->legacy_hdr_valid) { fit_unsupported_reset ("RTEMS"); @@ -1149,6 +1306,9 @@ static int do_bootm_vxworks (int flag, int argc, char *argv[], { char str[80]; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #if defined(CONFIG_FIT) if (!images->legacy_hdr_valid) { fit_unsupported_reset ("VxWorks"); @@ -1169,6 +1329,9 @@ static int do_bootm_qnxelf(int flag, int argc, char *argv[], char *local_args[2]; char str[16]; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #if defined(CONFIG_FIT) if (!images->legacy_hdr_valid) { fit_unsupported_reset ("QNX"); @@ -1191,6 +1354,9 @@ static int do_bootm_integrity (int flag, int argc, char *argv[], { void (*entry_point)(void); + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #if defined(CONFIG_FIT) if (!images->legacy_hdr_valid) { fit_unsupported_reset ("INTEGRITY"); diff --git a/include/image.h b/include/image.h index 82e6345..557e72a 100644 --- a/include/image.h +++ b/include/image.h @@ -228,6 +228,7 @@ typedef struct bootm_headers { #endif #endif +#ifndef USE_HOSTCC image_info_t os; /* os image info */ ulong ep; /* entry point of OS */ @@ -238,8 +239,25 @@ typedef struct bootm_headers { #endif ulong ft_len; /* length of flat device tree */ + ulong initrd_start; + ulong initrd_end; + ulong cmdline_start; + ulong cmdline_end; + bd_t *kbd; +#endif + int verify; /* getenv("verify")[0] != 'n' */ - int valid; /* set to 1 if we've set values in the header */ + +#define BOOTM_STATE_START (0x00000001) +#define BOOTM_STATE_LOADOS (0x00000002) +#define BOOTM_STATE_RAMDISK (0x00000004) +#define BOOTM_STATE_FDT (0x00000008) +#define BOOTM_STATE_OS_CMDLINE (0x00000010) +#define BOOTM_STATE_OS_BD_T (0x00000020) +#define BOOTM_STATE_OS_PREP (0x00000040) +#define BOOTM_STATE_OS_GO (0x00000080) + int state; + #ifndef USE_HOSTCC struct lmb lmb; /* for memory mgmt */ #endif diff --git a/lib_arm/bootm.c b/lib_arm/bootm.c index 772fa7f..8e264ce 100644 --- a/lib_arm/bootm.c +++ b/lib_arm/bootm.c @@ -67,6 +67,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) char *commandline = getenv ("bootargs"); #endif + if ((flag != 0) || (flag != BOOTM_STATE_OS_GO)) + return 1; + theKernel = (void (*)(int, int, uint))images->ep; s = getenv ("machid"); diff --git a/lib_avr32/bootm.c b/lib_avr32/bootm.c index 35240e2..556e3ea 100644 --- a/lib_avr32/bootm.c +++ b/lib_avr32/bootm.c @@ -178,6 +178,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) char *commandline = getenv("bootargs"); int ret; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + theKernel = (void *)images->ep; show_boot_progress (15); diff --git a/lib_blackfin/bootm.c b/lib_blackfin/bootm.c index 9938ae5..195eb9c 100644 --- a/lib_blackfin/bootm.c +++ b/lib_blackfin/bootm.c @@ -36,6 +36,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) int (*appl) (char *cmdline); char *cmdline; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + #ifdef SHARED_RESOURCES swap_to(FLASH); #endif diff --git a/lib_i386/bootm.c b/lib_i386/bootm.c index 613e339..ea19b3d 100644 --- a/lib_i386/bootm.c +++ b/lib_i386/bootm.c @@ -40,6 +40,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) size_t len; #endif + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + if (images->legacy_hdr_valid) { hdr = images->legacy_hdr_os; if (image_check_type (hdr, IH_TYPE_MULTI)) { diff --git a/lib_m68k/bootm.c b/lib_m68k/bootm.c index c52dd2f..0798e07 100644 --- a/lib_m68k/bootm.c +++ b/lib_m68k/bootm.c @@ -76,6 +76,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) void (*kernel) (bd_t *, ulong, ulong, ulong, ulong); struct lmb *lmb = &images->lmb; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + bootmap_base = getenv_bootm_low(); /* allocate space and init command line */ diff --git a/lib_microblaze/bootm.c b/lib_microblaze/bootm.c index 52fe068..e97aae6 100644 --- a/lib_microblaze/bootm.c +++ b/lib_microblaze/bootm.c @@ -38,6 +38,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) void (*theKernel) (char *); char *commandline = getenv ("bootargs"); + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + theKernel = (void (*)(char *))images->ep; show_boot_progress (15); diff --git a/lib_mips/bootm.c b/lib_mips/bootm.c index dced28c..3db22ea 100644 --- a/lib_mips/bootm.c +++ b/lib_mips/bootm.c @@ -50,6 +50,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) char env_buf[12]; char *cp; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + /* find kernel entry point */ theKernel = (void (*)(int, char **, char **, int *))images->ep; diff --git a/lib_nios2/bootm.c b/lib_nios2/bootm.c index 34f5b8f..53fd569 100644 --- a/lib_nios2/bootm.c +++ b/lib_nios2/bootm.c @@ -29,6 +29,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) { void (*kernel)(void) = (void (*)(void))images->ep; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + /* For now we assume the Microtronix linux ... which only * needs to be called ;-) */ diff --git a/lib_ppc/bootm.c b/lib_ppc/bootm.c index 1f3501a..6c9cf9e 100644 --- a/lib_ppc/bootm.c +++ b/lib_ppc/bootm.c @@ -117,6 +117,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) char *of_flat_tree = images->ft_addr; #endif + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + kernel = (void (*)(bd_t *, ulong, ulong, ulong, ulong, ulong, ulong))images->ep; diff --git a/lib_sh/bootm.c b/lib_sh/bootm.c index 078a24d..ae1f869 100644 --- a/lib_sh/bootm.c +++ b/lib_sh/bootm.c @@ -56,6 +56,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) unsigned long size = images->ep - (unsigned long)param; char *bootargs = getenv("bootargs"); + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + /* Setup parameters */ memset(param, 0, size); /* Clear zero page */ strcpy(cmdline, bootargs); diff --git a/lib_sparc/bootm.c b/lib_sparc/bootm.c index 565b41c..4975759 100644 --- a/lib_sparc/bootm.c +++ b/lib_sparc/bootm.c @@ -102,6 +102,9 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t * images) struct lmb *lmb = &images->lmb; int ret; + if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) + return 1; + /* Get virtual address of kernel start */ linux_hdr = (void *)images->os.load; -- 1.5.5.1

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[U-Boot] [PATCH 1/3] iMX31: Reducing start.S size to let boot from NAND
by Alan Carvalho de Assis 22 Oct '08

22 Oct '08

>From eeb4a71a3565098ba43aeb83be163731065a039d Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis <alan.assis(a)freescale.com> Date: Sun, 5 Oct 2008 19:57:22 -0300 Subject: [PATCH] iMX31: Reducing start.S size to let boot from NAND iMX31 NAND Flash Controller has a 2KB RAM buffer, but the current start.S file is too much big to let NAND copy routine to fit in. This patch will reduce the start.S when booting from NAND Flash. Signed-off-by: Alan Carvalho de Assis <alan.assis(a)freescale.com> --- cpu/arm1136/start.S | 24 ++++++++++++++++++++++-- 1 files changed, 22 insertions(+), 2 deletions(-) diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index 51b664d..b24fe41 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -32,6 +32,15 @@ #include <version.h> .globl _start _start: b reset +#ifdef CONFIG_BOOT_FROM_NAND + b . /* Undefined Instruction */ + b . /* Software Interrupt */ + b . /* Prefetch Abort */ + b . /* Data Abort */ + b . /* Reserved */ + b . /* IRQ */ + b . /* FIQ */ +#else #ifdef CONFIG_ONENAND_IPL ldr pc, _hang ldr pc, _hang @@ -68,6 +77,7 @@ _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ #endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_BOOT_FROM_NAND */ .global _end_vect _end_vect: @@ -151,6 +161,7 @@ next: bl cpu_init_crit #endif +_cstartup: #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -239,12 +250,18 @@ cpu_init_crit: * Jump to board specific initialization... The Mask ROM will have already initialized * basic memory. Go here to bump up clock rate and handle wake up conditions. */ +#ifdef CONFIG_BOOT_FROM_NAND + ldr sp, =CFG_INTERNAL_SRAM_STACK /* Initial stack point in the SRAM */ + ldr r0, =_cstartup /* load the return address */ + mov lr, r0 /* set the return address after remap */ + b lowlevel_init /* relative branch enables remap */ +#endif mov ip, lr /* persevere link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ mov pc, lr /* back to my caller */ -#ifndef CONFIG_ONENAND_IPL +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_BOOT_FROM_NAND) /* ************************************************************************* * @@ -357,11 +374,12 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_ONENAND_IPL/CONFIG_BOOT_FROM_NAND */ /* * exception handlers */ +#ifndef CONFIG_BOOT_FROM_NAND #ifdef CONFIG_ONENAND_IPL .align 5 do_hang: @@ -436,3 +454,5 @@ arm1136_cache_flush: mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache mov pc, lr @ back to caller #endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_BOOT_FROM_NAND */ + -- 1.5.4.3

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[U-Boot] [PATCH] [ARM] Apollon UBI support (take #2)
by Kyungmin Park 22 Oct '08

22 Oct '08

Now you can use the UBI at apollon board Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/board/apollon/Makefile b/board/apollon/Makefile index 9bac9a6..4c3e57f 100644 --- a/board/apollon/Makefile +++ b/board/apollon/Makefile @@ -25,9 +25,11 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := apollon.o mem.o sys_info.o +COBJS-y := apollon.o mem.o sys_info.o +COBJS-$(CONFIG_CMD_UBI) += ubi.o SOBJS := lowlevel_init.o +COBJS := $(COBJS-y) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/apollon/ubi.c b/board/apollon/ubi.c new file mode 100644 index 0000000..10dd6e7 --- /dev/null +++ b/board/apollon/ubi.c @@ -0,0 +1,48 @@ +/* + * board/apollon/ubi.c + * + * Copyright (C) 2008 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <common.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <jffs2/load_kernel.h> +#include <ubi_uboot.h> + +int ubi_board_scan(void) +{ + struct mtd_device *dev; + struct part_info *part; + struct mtd_partition mtd_part; + char buffer[32]; + u8 pnum; + int err; + + if (mtdparts_init() != 0) + return 1; + + if (find_dev_and_part("onenand0,4", &dev, &pnum, &part) != 0) + return 1; + + sprintf(buffer, "mtd=%d", pnum); + mtd_part.name = buffer; + mtd_part.size = part->size; + mtd_part.offset = part->offset; + add_mtd_partitions(&onenand_mtd, &mtd_part, 1); + + err = ubi_mtd_param_parse(buffer, NULL); + if (err) + return err; + + err = ubi_init(); + if (err) + return err; + + return 0; +} diff --git a/include/configs/apollon.h b/include/configs/apollon.h index d71ed44..dff47fc 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -53,6 +53,9 @@ #define CONFIG_SYS_USE_NOR 1 #endif +/* uncommnet if you want to use UBI */ +#define CONFIG_SYS_USE_UBI + #include <asm/arch/omap2420.h> /* get chip and board defs */ #define V_SCLK 12000000 @@ -73,8 +76,9 @@ * Size of malloc() pool */ #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) +/* bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* * Hardware drivers @@ -116,6 +120,13 @@ #define CONFIG_CMD_DIAG #define CONFIG_CMD_ONENAND +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#endif + #undef CONFIG_CMD_AUTOSCRIPT #ifndef CONFIG_SYS_USE_NOR @@ -133,24 +144,39 @@ #define CONFIG_BOOTFILE "uImage" #define CONFIG_ETHADDR 00:0E:99:00:24:20 -#ifdef CONFIG_APOLLON_PLUS -# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=64M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2" +#ifdef CONFIG_APOLLON_PLUS +#define CONFIG_SYS_MEM "mem=64M" +#else +#define CONFIG_SYS_MEM "mem=128" +#endif + +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_SYS_UBI "ubi.mtd=4" #else -# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=128M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2" +#define CONFIG_SYS_UBI "" #endif +#define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \ + " console=ttyS0,115200n8" \ + " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \ + "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \ + CONFIG_SYS_UBI + #define CONFIG_EXTRA_ENV_SETTINGS \ "Image=tftp 0x80008000 Image; go 0x80008000\0" \ "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \ "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \ "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \ - "xloader=tftp 0x80180000 x-load.bin; cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ + "xloader=tftp 0x80180000 x-load.bin; " \ + " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \ "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \ "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \ - "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0"\ + "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \ "onesyncboot=run syncmode oneboot\0" \ - "updateb=tftp 0x80180000 u-boot-onenand.bin; onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ + "updateb=tftp 0x80180000 u-boot-onenand.bin; " \ + " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ + "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \ "bootcmd=run uboot\0" /* @@ -164,14 +190,15 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) * or by 32KHz clk, or from external sig. This rate is divided by a local @@ -211,13 +238,15 @@ # define CONFIG_SYS_MAX_FLASH_BANKS 1 # define CONFIG_SYS_MAX_FLASH_SECT 1024 /*----------------------------------------------------------------------- - * CFI FLASH driver setup */ -# define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ +/* Flash memory is CFI compliant */ +# define CONFIG_SYS_FLASH_CFI 1 # define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* Use buffered writes (~10x faster) */ -# define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w sector protection*/ +/* Use buffered writes (~10x faster) */ +/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ +/* Use h/w sector protection*/ +# define CONFIG_SYS_FLASH_PROTECTION 1 #else /* !CONFIG_SYS_USE_NOR */ # define CONFIG_SYS_NO_FLASH 1 @@ -228,4 +257,15 @@ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_ADDR 0x00020000 +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_JFFS2_CMDLINE +#define MTDIDS_DEFAULT "onenand0=onenand" +#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \ + "128k(params)," \ + "2m(kernel)," \ + "16m(rootfs)," \ + "32m(fs)," \ + "-(ubifs)" +#endif + #endif /* __CONFIG_H */

1 0