July 2006 - U-Boot

[U-Boot-Users] [PATCH] fix the incorrect dcbz operation of 83xx
by Liu Dave-r63238 27 Jul '06

27 Jul '06

All, The 834x Rev1.1 silicon has one bug inside. The issue is when the dcache locked with HID0[DLOCK], the dcbz instruction looks like no-op instruction. The right behavior of the dcache is when the dcache locked with HID0[DLOCK], the dcbz instruction allocates new tags in cache. The bug is only in 834x rev1.1, PVR is 0x80830011. The 834x rev2.0 and later and 8360 have not this bug inside. So, when 834x rev2.0/8360 are working with ECC, the dcbz instruction will corrupt the stack in cache, the processor will checkstop reset. However, the 834x rev1.1 can work with ECC with these code, because the sillicon has this cache bug. The dcbz will not corrupt the stack in cache. Really, it is the fault code running fault sillicon. This patch fix the incorrect dcbz operation. Instead of CPU FP writing to initialise the ECC. CHANGELOG: * fix the incorrect dcbz operation instead of CPU FP writing to initialise the ECC memory. Patch by Dave Liu, 21 July 2006 diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 48624fe..8eaa6f6 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -429,54 +429,37 @@ static __inline__ unsigned long get_tbms /* #define CONFIG_DDR_ECC_INIT_VIA_DMA */ void ddr_enable_ecc(unsigned int dram_size) { - uint *p; volatile immap_t *immap = (immap_t *)CFG_IMMRBAR; volatile ddr8349_t *ddr = &immap->ddr; unsigned long t_start, t_end; + register u64 *p; + register uint size; + unsigned int pattern[2]; #if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) uint i; #endif - - debug("Initialize a Cachline in DRAM\n"); icache_enable(); + t_start = get_tbms(); -#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) - /* Initialise DMA for direct Transfers */ - dma_init(); -#endif - - t_start = get_tbms(); + pattern[0] = 0xdeadbeef; + pattern[1] = 0xdeadbeef; #if !defined(CONFIG_DDR_ECC_INIT_VIA_DMA) - debug("DDR init: Cache flush method\n"); - for (p = 0; p < (uint *)(dram_size); p++) { - if (((unsigned int)p & 0x1f) == 0) { - ppcDcbz((unsigned long) p); - } - - /* write pattern to cache and flush */ - *p = (unsigned int)0xdeadbeef; - - if (((unsigned int)p & 0x1c) == 0x1c) { - ppcDcbf((unsigned long) p); - } + debug("DDR init: CPU FP write method\n"); + size = dram_size; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); } + __asm__ __volatile__("sync"); #else - printf("DDR init: DMA method\n"); - for (p = 0; p < (uint *)(8 * 1024); p++) { - /* zero one data cache line */ - if (((unsigned int)p & 0x1f) == 0) { - ppcDcbz((unsigned long)p); - } - - /* write pattern to it and flush */ - *p = (unsigned int)0xdeadbeef; - - if (((unsigned int)p & 0x1c) == 0x1c) { - ppcDcbf((unsigned long)p); - } + debug("DDR init: DMA method\n"); + size = 0x2000; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); } - + __asm__ __volatile__("sync"); + /* Initialise DMA for direct transfer */ + dma_init(); /* 8K */ dma_xfer((uint *)0x2000, 0x2000, (uint *)0); /* 16K */ diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index 6e02cce..a616beb 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -870,6 +870,18 @@ ppcDcbz: dcbz r0,r3 blr + .globl ppcDWstore +ppcDWstore: + lfd 1, 0(r4) + stfd 1, 0(r3) + blr + + .globl ppcDWload +ppcDWload: + lfd 1, 0(r3) + stfd 1, 0(r4) + blr + /*-------------------------------------------------------------------*/ /* diff --git a/include/common.h b/include/common.h index e4637ad..955f107 100644 --- a/include/common.h +++ b/include/common.h @@ -384,6 +384,11 @@ void ppcSync(void); void ppcDcbz(unsigned long value); #endif +#if defined (CONFIG_MPC83XX) +void ppcDWload(unsigned int *addr, unsigned int *ret); +void ppcDWstore(unsigned int *addr, unsigned int *value); +#endif + /* $(CPU)/cpu.c */ int checkcpu (void); int checkicache (void); diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h

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[U-Boot-Users] [PATCH] improve the CSB bus and DMA performance of 83xx
by Liu Dave-r63238 27 Jul '06

27 Jul '06

All, The default pipeline depth of 83xx CSB is 1 outstanding transcation. If change it to 4, the CSB performace will improve. Change the DMA transfer with cache line burst read/write The DMA performance improved 6x. CHANGELOG: * improve the coherency system bus performance and improve the DMA transfer performace. Patch by Dave Liu, 21 July 2006 diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 20bba6c..2eea221 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -257,9 +257,7 @@ int dma_xfer(void *dest, u32 count, void __asm__ __volatile__ ("isync"); /* init direct transfer, clear CS bit */ - dmamr0 = (DMA_CHANNEL_TRANSFER_MODE_DIRECT | - DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B | - DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN); + dmamr0 = DMA_CHANNEL_TRANSFER_MODE_DIRECT; dma->dmamr0 = swab32(dmamr0); diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index 6ed0992..8366cb7 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -69,7 +69,8 @@ #endif #ifdef CFG_SICRL im->sysconf.sicrl = CFG_SICRL; #endif - + /* Set CSB bus pipeline depth */ + im->arbiter.acr |= ACR_PIPE_DEP_IS_03; /* * Memory Controller: */ diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h index c2b4c5c..24191c5 100644 --- a/include/asm-ppc/immap_83xx.h +++ b/include/asm-ppc/immap_83xx.h @@ -371,6 +371,7 @@ typedef struct arbiter8349 { u32 acr; /* Arbiter Configuration Register */ #define ACR_COREDIS 0x10000000 /* Core disable. */ #define ACR_PIPE_DEP 0x00070000 /* Pipeline depth (number of outstanding transactions). */ +#define ACR_PIPE_DEP_IS_03 0x00030000 /* Pipeline depth is 4 */ #define ACR_PCI_RPTCNT 0x00007000 /* PCI repeat count. */ #define ACR_RPTCNT 0x00000700 /* Repeat count. */ #define ACR_APARK 0x00000030 /* Address parking. */

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Re: [U-Boot-Users] [DNX#2006072742000017] beiyfVjlAGRA
by U-Boot patch tracking system 27 Jul '06

27 Jul '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006072742000017]. Your U-Boot support team Powered by OTRS (http://otrs.org/)

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[U-Boot-Users] Debug kernel init code? (was: Load address and entry point for mips?)
by mitsy 27 Jul '06

27 Jul '06

Again, thank you Andrew. I believe I got those parameters correctly now! However, I tried everything I can think of, but it's still not working. I took a look at log_buf mem location and it sure it is hanging inside the kernel. What is the best way to debug kernel init code (rather than putting bunch of printk)? I know there's a how-to on how to debug kernel module but I can't find one for init code. Mitsy On 7/25/06, mitsy <mitsy12(a)gmail.com> wrote: > Hi Andrew, > > Thank you so much for your help on this. I tried my best but I > couldn't figure them out. I'll try these numbers and let you know how > it goes. > > I really appreciate your help. Thank you so much! > > Have a great day! > > Mitsy > > On 7/24/06, Andrew Dyer <amdyer(a)gmail.com> wrote: > > On 7/24/06, mitsy <mitsy12(a)gmail.com> wrote: > > > When I do the mkimage with linux bin, I'm not sure what values to use > > > for load address and entry point. In README file, it says for powerpc > > > use 0 for both, but I think for mips, it won't be the case. (SDRAM > > > base is 0x80000000.) > > > > > > > this is a snippet from the script we use: > > > > > > START=`${CROSS_COMPILE}objdump -h vmlinux |awk '$2 == ".text" {print $4;}'` > > ENTRY=`${CROSS_COMPILE}objdump -f vmlinux |awk '/start/ {print $3;}'` > > > > > > -- > > Hardware, n.: > > The parts of a computer system that can be kicked. > > >

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[U-Boot-Users] Turning on instruction address translation on an 8349 causes processor reset
by Timur Tabi 27 Jul '06

27 Jul '06

I'm working on adding support for a new 8349 board to U-Boot, and the processor resets if I turn on the IR bit in the MSR. This happens in function enable_addr_trans() in start.S. enable_addr_trans: /* enable address translation */ mfmsr r5 ori r5, r5, (MSR_IR | MSR_DR) mtmsr r5 isync blr with this code, when the "mtmsr" instruction is executed, the processor resets (or hangs - I can't tell). If I change the 4th line to: ori r5, r5, MSR_DR It works and U-Boot boots to a command prompt. Since the BATs are configured the same for data and instruction, I presume the mapping is correct, but there's something wrong with turning on instruction address translation. Anyone have any ideas? -- Timur Tabi Linux Kernel Developer @ Freescale

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[U-Boot-Users] procedure to load u-boot on arm7tdmi
by Subhransu Prusty 26 Jul '06

26 Jul '06

can you please tell me the procedure to load the u-boot loader on arm7tdmi. i have gone through the read me file and tried to download the same way it was written, still its not working. the procedure i followed. 1. i got the u-boot.bin, u-boot, u-boot.srec and u-boot by compiling the integratorap 2. applied erase command and sdram initialization command 3. loaded inittool.axf 4. loaded u-boot.bin error message: data abort exception 0x1900abc -- thanks & regards subhransu

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[U-Boot-Users] hello
by Liang He 26 Jul '06

26 Jul '06

Hello,I am a newer to u-boot and very much interested to learn it. I would be very glad to make friends with you~` Thanks！

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Re: [U-Boot-Users] [DNX#2006072542000021] [patch] Add support for Embedded Planet ep82xxm
by DENX Support System 25 Jul '06

25 Jul '06

Hello list, inside the automatic U-Boot patch tracking system a new ticket [DNX#2006072542000021] was created: <snip> > > *CHANGELOG > Added support for Embedded Planet ep82xxm boards. Board directory and > config file added; Make files mofified; No shared code was modified. > Merged into u-boot tree from an internal port by J.Mann, Embedded > Planet. > > Patch attached as gziped patch file. > > -JMann </snip> Your U-Boot support team

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Re: [U-Boot-Users] [DNX#2006072542000021] [patch] Add support [...]
by U-Boot patch tracking system 25 Jul '06

25 Jul '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006072542000021]. Your U-Boot support team Powered by OTRS (http://otrs.org/)

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[U-Boot-Users] [patch] Add support for Embedded Planet ep82xxm
by Jeff Mann 25 Jul '06

25 Jul '06

*CHANGELOG Added support for Embedded Planet ep82xxm boards. Board directory and config file added; Make files mofified; No shared code was modified. Merged into u-boot tree from an internal port by J.Mann, Embedded Planet. Patch attached as gziped patch file. -JMann

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