September 2024 - U-Boot

[PATCH v2 0/4] clk: sophgo: milkv_duo: Add and enable clock controller driver
by Kongyang Liu 09 Sep '24

09 Sep '24

This series of patches introduces the clock controller driver for the Sophgo CV1800B SoC, updates the device tree sources to use the new clock controller, and enables the clock controller in the configuration for the Milk-V Duo board. Changes in v2: - Fix compilation error - Remove unused code Kongyang Liu (4): dt-bindings: clk: import header for clock controller of sophgo CV1800B clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC configs: milkv_duo: Enable clock controller riscv: dts: sophgo: Replace device clocks with real clocks. arch/riscv/dts/cv18xx.dtsi | 40 +- configs/milkv_duo_defconfig | 9 +- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sophgo/Kconfig | 14 + drivers/clk/sophgo/Makefile | 6 + drivers/clk/sophgo/clk-common.h | 74 +++ drivers/clk/sophgo/clk-cv1800b.c | 754 ++++++++++++++++++++++ drivers/clk/sophgo/clk-cv1800b.h | 123 ++++ drivers/clk/sophgo/clk-ip.c | 594 +++++++++++++++++ drivers/clk/sophgo/clk-ip.h | 288 +++++++++ drivers/clk/sophgo/clk-pll.c | 275 ++++++++ drivers/clk/sophgo/clk-pll.h | 74 +++ include/dt-bindings/clock/sophgo,cv1800.h | 176 +++++ 14 files changed, 2401 insertions(+), 28 deletions(-) create mode 100644 drivers/clk/sophgo/Kconfig create mode 100644 drivers/clk/sophgo/Makefile create mode 100644 drivers/clk/sophgo/clk-common.h create mode 100644 drivers/clk/sophgo/clk-cv1800b.c create mode 100644 drivers/clk/sophgo/clk-cv1800b.h create mode 100644 drivers/clk/sophgo/clk-ip.c create mode 100644 drivers/clk/sophgo/clk-ip.h create mode 100644 drivers/clk/sophgo/clk-pll.c create mode 100644 drivers/clk/sophgo/clk-pll.h create mode 100644 include/dt-bindings/clock/sophgo,cv1800.h -- 2.41.0

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[PATCH 1/1] clk: sifive: avoid declaring static variables in includes
by Heinrich Schuchardt 09 Sep '24

09 Sep '24

The existing code is unnecessarily convoluted: Arrays __prci_init_clocks_fu[5|7]40 are initialized with data. In separate includes fu[5|7]40-prci.h the size of the arrays is provided as constants. By moving the structures prci_clk_fu[5|7]40 to the respective code modules we can directly use ARRAY_SIZE() to access the size of the data used for initialization. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- drivers/clk/sifive/fu540-prci.c | 7 ++++++- drivers/clk/sifive/fu540-prci.h | 22 ---------------------- drivers/clk/sifive/fu740-prci.c | 7 ++++++- drivers/clk/sifive/fu740-prci.h | 22 ---------------------- drivers/clk/sifive/sifive-prci.c | 3 +-- drivers/clk/sifive/sifive-prci.h | 4 ++++ 6 files changed, 17 insertions(+), 48 deletions(-) delete mode 100644 drivers/clk/sifive/fu540-prci.h delete mode 100644 drivers/clk/sifive/fu740-prci.h diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index ceb2c6fab0d..e55a26ab8fd 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -58,7 +58,7 @@ static const struct __prci_clock_ops sifive_fu540_prci_tlclksel_clk_ops = { }; /* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu540[] = { +static struct __prci_clock __prci_init_clocks_fu540[] = { [PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -83,3 +83,8 @@ struct __prci_clock __prci_init_clocks_fu540[] = { .ops = &sifive_fu540_prci_tlclksel_clk_ops, }, }; + +const struct prci_clk_desc prci_clk_fu540 = { + .clks = __prci_init_clocks_fu540, + .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540), +}; diff --git a/drivers/clk/sifive/fu540-prci.h b/drivers/clk/sifive/fu540-prci.h deleted file mode 100644 index 113301107da..00000000000 --- a/drivers/clk/sifive/fu540-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020-2021 SiFive, Inc. - * Zong Li - * Pragnesh Patel - */ - -#ifndef __SIFIVE_CLK_FU540_PRCI_H -#define __SIFIVE_CLK_FU540_PRCI_H - -#include "sifive-prci.h" - -#define NUM_CLOCK_FU540 4 - -extern struct __prci_clock __prci_init_clocks_fu540[NUM_CLOCK_FU540]; - -static const struct prci_clk_desc prci_clk_fu540 = { - .clks = __prci_init_clocks_fu540, - .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540), -}; - -#endif /* __SIFIVE_CLK_FU540_PRCI_H */ diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c index 5edc864e4bd..4274b215d2f 100644 --- a/drivers/clk/sifive/fu740-prci.c +++ b/drivers/clk/sifive/fu740-prci.c @@ -102,7 +102,7 @@ static const struct __prci_clock_ops sifive_fu740_prci_pcieaux_clk_ops = { }; /* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu740[] = { +static struct __prci_clock __prci_init_clocks_fu740[] = { [FU740_PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -156,3 +156,8 @@ struct __prci_clock __prci_init_clocks_fu740[] = { .pwd = &__prci_pcieaux_data, } }; + +const struct prci_clk_desc prci_clk_fu740 = { + .clks = __prci_init_clocks_fu740, + .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740), +}; diff --git a/drivers/clk/sifive/fu740-prci.h b/drivers/clk/sifive/fu740-prci.h deleted file mode 100644 index b74f0789061..00000000000 --- a/drivers/clk/sifive/fu740-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020-2021 SiFive, Inc. - * Zong Li - * Pragnesh Patel - */ - -#ifndef __SIFIVE_CLK_FU740_PRCI_H -#define __SIFIVE_CLK_FU740_PRCI_H - -#include "sifive-prci.h" - -#define NUM_CLOCK_FU740 9 - -extern struct __prci_clock __prci_init_clocks_fu740[NUM_CLOCK_FU740]; - -static const struct prci_clk_desc prci_clk_fu740 = { - .clks = __prci_init_clocks_fu740, - .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740), -}; - -#endif /* __SIFIVE_CLK_FU740_PRCI_H */ diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c index c8fb6002907..603a176d06a 100644 --- a/drivers/clk/sifive/sifive-prci.c +++ b/drivers/clk/sifive/sifive-prci.c @@ -34,8 +34,7 @@ #include <linux/math64.h> #include <dt-bindings/clock/sifive-fu740-prci.h> -#include "fu540-prci.h" -#include "fu740-prci.h" +#include "sifive-prci.h" /* * Private functions diff --git a/drivers/clk/sifive/sifive-prci.h b/drivers/clk/sifive/sifive-prci.h index 5ce33d61846..b391698081d 100644 --- a/drivers/clk/sifive/sifive-prci.h +++ b/drivers/clk/sifive/sifive-prci.h @@ -320,4 +320,8 @@ unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct __prci_clock *pc, int sifive_prci_clock_enable(struct __prci_clock *pc, bool enable); +/* Clock driver data */ +extern const struct prci_clk_desc prci_clk_fu540; +extern const struct prci_clk_desc prci_clk_fu740; + #endif /* __SIFIVE_CLK_SIFIVE_PRCI_H */ -- 2.43.0

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[PATCH v3 1/3] phy: Extend generic_setup_phy() with PHY mode and submode
by Marek Vasut 08 Sep '24

08 Sep '24

Extend generic_setup_phy() parameter list with PHY mode and submode and call generic_phy_set_mode() in generic_setup_phy(), so the generic PHY setup function can configure the PHY into correct mode before powering the PHY up. Update all call sites of generic_setup_phy() as well, all of which are USB host related, except for DM test which now behaves as a USB host test. Note that if the PHY driver does not implement the .set_mode callback, generic_phy_set_mode() call returns 0 and does not error out, so this should not break any existing systems. Reviewed-by: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Caleb Connolly <caleb.connolly(a)linaro.org> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Fabrice Gasnier <fabrice.gasnier(a)foss.st.com> Cc: Jonas Karlman <jonas(a)kwiboo.se> Cc: Mathieu Othacehe <othacehe(a)gnu.org> Cc: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> Cc: Neil Armstrong <neil.armstrong(a)linaro.org> Cc: Nishanth Menon <nm(a)ti.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Sumit Garg <sumit.garg(a)linaro.org> Cc: Tim Harvey <tharvey(a)gateworks.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Xavier Drudis Ferran <xdrudis(a)tinet.cat> Cc: u-boot-qcom(a)groups.io Cc: u-boot(a)lists.denx.de --- V2: Add failpath to return errno from generic_phy_set_mode() V3: - Rebase on u-boot/next - Add RB from Mattijs --- drivers/phy/phy-uclass.c | 13 +++++++++++-- drivers/usb/host/ehci-generic.c | 2 +- drivers/usb/host/ehci-msm.c | 2 +- drivers/usb/host/ehci-mx6.c | 2 +- drivers/usb/host/ehci-pci.c | 2 +- drivers/usb/host/ohci-generic.c | 2 +- include/generic-phy.h | 8 ++++++-- test/dm/phy.c | 8 ++++---- 8 files changed, 26 insertions(+), 13 deletions(-) diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index acdcda15b5b..777d952b041 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -508,7 +508,8 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk) return ret; } -int generic_setup_phy(struct udevice *dev, struct phy *phy, int index) +int generic_setup_phy(struct udevice *dev, struct phy *phy, int index, + enum phy_mode mode, int submode) { int ret; @@ -520,10 +521,18 @@ int generic_setup_phy(struct udevice *dev, struct phy *phy, int index) if (ret) return ret; + ret = generic_phy_set_mode(phy, mode, submode); + if (ret) + goto phys_mode_err; + ret = generic_phy_power_on(phy); if (ret) - generic_phy_exit(phy); + goto phys_mode_err; + + return 0; +phys_mode_err: + generic_phy_exit(phy); return ret; } diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 23c3ed25554..1ae3619ce25 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -94,7 +94,7 @@ static int ehci_usb_probe(struct udevice *dev) if (err) goto reset_err; - err = generic_setup_phy(dev, &priv->phy, 0); + err = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (err) goto regulator_err; diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index ff336082e3a..a759aea9db3 100644 --- a/drivers/usb/host/ehci-msm.c +++ b/drivers/usb/host/ehci-msm.c @@ -80,7 +80,7 @@ static int ehci_usb_probe(struct udevice *dev) hcor = (struct ehci_hcor *)((phys_addr_t)hccr + HC_LENGTH(ehci_readl(&(hccr)->cr_capbase))); - ret = generic_setup_phy(dev, &p->phy, 0); + ret = generic_setup_phy(dev, &p->phy, 0, PHY_MODE_USB_HOST, 0); if (ret) goto cleanup_iface; diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 31cd8a50f4a..a93fa5d5455 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -703,7 +703,7 @@ static int ehci_usb_probe(struct udevice *dev) usb_phy_enable(ehci, priv->phy_addr); #endif #else - ret = generic_setup_phy(dev, &priv->phy, 0); + ret = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (ret) goto err_regulator; #endif diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 572686580cd..8d05b14e898 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -30,7 +30,7 @@ static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr, int ret; u32 cmd; - ret = generic_setup_phy(dev, &priv->phy, 0); + ret = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (ret) return ret; diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index f1325cd4953..cc44226f5e0 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -50,7 +50,7 @@ static int ohci_usb_probe(struct udevice *dev) goto reset_err; } - err = generic_setup_phy(dev, &priv->phy, 0); + err = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (err) goto reset_err; diff --git a/include/generic-phy.h b/include/generic-phy.h index eaab7491660..ba3321f4849 100644 --- a/include/generic-phy.h +++ b/include/generic-phy.h @@ -415,10 +415,13 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk); * @dev: The consumer device. * @phy: A pointer to the PHY port * @index: The index in the list of available PHYs + * @mode: PHY mode + * @submode: PHY submode * * Return: 0 if OK, or negative error code. */ -int generic_setup_phy(struct udevice *dev, struct phy *phy, int index); +int generic_setup_phy(struct udevice *dev, struct phy *phy, int index, + enum phy_mode mode, int submode); /** * generic_shutdown_phy() - Power off and de-initialize phy. @@ -509,7 +512,8 @@ static inline int generic_phy_power_off_bulk(struct phy_bulk *bulk) return 0; } -static inline int generic_setup_phy(struct udevice *dev, struct phy *phy, int index) +static inline int generic_setup_phy(struct udevice *dev, struct phy *phy, int index, + enum phy_mode mode, int submode) { return 0; } diff --git a/test/dm/phy.c b/test/dm/phy.c index 9b4cff60e6a..8808ca3689c 100644 --- a/test/dm/phy.c +++ b/test/dm/phy.c @@ -243,20 +243,20 @@ static int dm_test_phy_setup(struct unit_test_state *uts) "gen_phy_user", &parent)); /* normal */ - ut_assertok(generic_setup_phy(parent, &phy, 0)); + ut_assertok(generic_setup_phy(parent, &phy, 0, PHY_MODE_USB_HOST, 0)); ut_assertok(generic_shutdown_phy(&phy)); /* power_off fail with -EIO */ - ut_assertok(generic_setup_phy(parent, &phy, 1)); + ut_assertok(generic_setup_phy(parent, &phy, 1, PHY_MODE_USB_HOST, 0)); ut_asserteq(-EIO, generic_shutdown_phy(&phy)); /* power_on fail with -EIO */ - ut_asserteq(-EIO, generic_setup_phy(parent, &phy, 2)); + ut_asserteq(-EIO, generic_setup_phy(parent, &phy, 2, PHY_MODE_USB_HOST, 0)); ut_assertok(generic_shutdown_phy(&phy)); /* generic_phy_get_by_index fail with -ENOENT */ ut_asserteq(-ENOENT, generic_phy_get_by_index(parent, 3, &phy)); - ut_assertok(generic_setup_phy(parent, &phy, 3)); + ut_assertok(generic_setup_phy(parent, &phy, 3, PHY_MODE_USB_HOST, 0)); ut_assertok(generic_shutdown_phy(&phy)); return 0; -- 2.45.2

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Assistance Required: U-Boot Access Issues on Amlogic A113X SoC
by Mike 07 Sep '24

07 Sep '24

Dear U-Boot Community, I am working on a project involving the Amlogic A113X SoC and have encountered an issue with U-Boot during the boot process over UART. While I am able to connect via UART and observe the boot log, the system does not allow any interaction or command input. It seems that the manufacturer may have restricted this access, potentially violating the GNU GPL license. Here are the details: - *SoC:* Amlogic A113X - *Bootloader:* U-Boot 2015.01 (Jan 13 2023 - 10:30:19) - *Issue:* The device does not respond to input during the boot process over UART (no response to Ctrl+C, Enter, etc.) - *UART Log:* AXG:BL1:d1dbf2:a4926f;FEAT:F0DC31BC:2000;POC:F;EMMC:800;NAND:0;READ:0;0.0;0.0;CHK:0; sdio debug board detected TE: 139689 BL2 Built : 10:38:43, Apr 14 2020. axg gf27ed33 - jenkins@walle02-sh set vcck to 1100 mv set vddee to 950 mv Board ID = 3 CPU clk: 1200MHz DDR low power enabled DDR3 chl: Rank0 16bit @ 912MHz bist_test rank: 0 1c 07 32 26 10 3c 1e 06 36 27 10 3f 00 00 00 00 00 00 00 00 00 00 00 00 772 - PASS Rank0: 256MB(auto)-2T-13 AddrBus test pass! NAND init Load FIP HDR from NAND, src: 0x0000c000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3x from NAND, src: 0x00010000, des: 0x01704000, size: 0x000b7c00, part: 0 NOTICE: BL31: v1.3(release):3edeb02 NOTICE: BL31: Built : 16:43:54, Apr 14 2020 NOTICE: BL31: AXG secure boot! NOTICE: BL31: BL33 decompress pass OPS=0x43 [Image: axg_v1.1.3494-9ec8345 2020-04-17 18:16:39 jenkins@walle02-sh] 25 0c 43 00 c3 ac bf b3 9f 7a e1 5b 3a 07 57 99 bl30:axg ver: 9 mode: 0 bl30:axg thermal0 [0.015883 Inits done] secure task start! high task start! low task start! ERROR: Error initializing runtime service opteed_fast U-Boot 2015.01 (Jan 13 2023 - 10:30:19) DRAM: 256 MiB Relocation Offset is: 0eeb0000 mmu cfg end: 0x20000000 mmu cfg end: 0x20000000 register usb cfg[0][1] = 000000000ff6e198 aml_i2c_init_port init regs for 2 NAND: get_sys_clk_rate_mtd() 292, clock setting 200! bus cycle0: 6,timing: 7 NAND device id: 98 da 90 15 76 16 NAND device: Manufacturer ID: 0x98, Chip ID: 0x98 (Toshiba A revision NAND 2Gib TC58NVG1S3HBAI4 ) get_sys_clk_rate_mtd() 292, clock setting 200! m3_nand_adjust_timing() sys_clk_rate 200, bus_c 6, bus_t 7 oob_fill_cnt =32 oob_size =64, bch_bytes =14 ecc mode:6 ecc_page_num=2 eep_need_oobsize=16 plane_num=1 writesize=0x800 ecc.size=0x200 bch_mode=1 oob avail size 6 Creating 1 MTD partitions on "A revision NAND 2Gib TC58NVG1S3HBAI4 ": 0x000000000000-0x000000200000 : "bootloader" A revision NAND 2Gib TC58NVG1S3HBAI4 initialized ok get_sys_clk_rate_mtd() 292, clock setting 200! bus cycle0: 6,timing: 7 NAND device id: 98 da 90 15 76 16 NAND device: Manufacturer ID: 0x98, Chip ID: 0x98 (Toshiba A revision NAND 2Gib TC58NVG1S3HBAI4 ) get_sys_clk_rate_mtd() 292, clock setting 200! m3_nand_adjust_timing() sys_clk_rate 200, bus_c 6, bus_t 7 oob_fill_cnt =32 oob_size =64, bch_bytes =14 ecc mode:6 ecc_page_num=2 eep_need_oobsize=16 PLANE change! plane_num=1 writesize=0x800 ecc.size=0x200 bch_mode=1 aml_nand_init :oobmul=1,oobfree.length=8, - oob_size=64 oob avail size 8 nbbt=20 nenv=24 nkey=32 ndtb=40 nddr=44 bbt_start=20 env_start=24 key_start=32 dtb_start=40 ddr_start=44 nbbt: info size=0x800 max_scan_blk=24, start_blk=20 nbbt : phy_blk_addr=20, ec=0, phy_page_addr=0, timestamp=1 nbbt free list: blockN=21, ec=-1, dirty_flag=0 blockN=22, ec=-1, dirty_flag=0 blockN=23, ec=-1, dirty_flag=0 aml_nand_scan_rsv_info 1134: page_num=1 aml_nand_scan_rsv_info 1137 nbbt valid addr: 280000 aml_nand_bbt_check 1258 bbt is valid, reading. aml_nand_read_rsv_info:446,read nbbt info to 280000 nenv: info size=0x10000 max_scan_blk=32, start_blk=24 nenv : phy_blk_addr=24, ec=0, phy_page_addr=0, timestamp=5 nenv free list: blockN=25, ec=0, dirty_flag=1 blockN=26, ec=-1, dirty_flag=0 blockN=27, ec=-1, dirty_flag=0 blockN=28, ec=-1, dirty_flag=0 blockN=29, ec=-1, dirty_flag=0 blockN=30, ec=-1, dirty_flag=0 blockN=31, ec=-1, dirty_flag=0 aml_nand_scan_rsv_info 1134: page_num=32 aml_nand_scan_rsv_info 1137 nenv valid addr: 310000 nkey: info size=0x8000 max_scan_blk=40, start_blk=32 nkey : phy_blk_addr=33, ec=0, phy_page_addr=0, timestamp=2 nkey free list: blockN=32, ec=0, dirty_flag=1 blockN=34, ec=-1, dirty_flag=0 blockN=35, ec=-1, dirty_flag=0 blockN=36, ec=-1, dirty_flag=0 blockN=37, ec=-1, dirty_flag=0 blockN=38, ec=-1, dirty_flag=0 blockN=39, ec=-1, dirty_flag=0 aml_nand_scan_rsv_info 1134: page_num=16 aml_nand_scan_rsv_info 1137 nkey valid addr: 430000 ndtb: info size=0x20000 max_scan_blk=44, start_blk=40 ndtb : phy_blk_addr=41, ec=0, phy_page_addr=0, timestamp=2 ndtb free list: blockN=40, ec=-1, dirty_flag=0 blockN=42, ec=-1, dirty_flag=0 blockN=43, ec=-1, dirty_flag=0 aml_nand_scan_rsv_info 1134: page_num=64 aml_nand_scan_rsv_info 1137 ndtb valid addr: 520000 nddr: info size=0x800 max_scan_blk=46, start_blk=44 nddr : phy_blk_addr=-1, ec=0, phy_page_addr=0, timestamp=0 nddr free list: blockN=44, ec=-1, dirty_flag=0 blockN=45, ec=-1, dirty_flag=0 aml_nand_scan_rsv_info 1134: page_num=1 nddr valid addr: fffffffffffe0000 aml_nand_rsv_info_check_except_bbt 1228 NO nddr exist tpl: off 8388608, size 8388608 NAND bbt detect factory Bad block at c000000 NAND bbt detect factory Bad block at c020000 Creating 7 MTD partitions on "A revision NAND 2Gib TC58NVG1S3HBAI4 ": 0x000000800000-0x000001000000 : "tpl" 0x000001000000-0x000001200000 : "misc" 0x000001200000-0x000002200000 : "boot_a" 0x000002200000-0x000003200000 : "boot_b" 0x000003200000-0x000007200000 : "system_a" 0x000007200000-0x00000b200000 : "system_b" 0x00000b200000-0x000010000000 : "data" NAND bbt detect factory Bad block at c000000 NAND bbt detect factory Bad block at c020000 A revision NAND 2Gib TC58NVG1S3HBAI4 initialized ok MMC: aml_priv->desc_buf = 0x000000000deae760 aml_priv->desc_buf = 0x000000000deb0aa0 SDIO Port B: 0, SDIO Port C: 1 uboot env amlnf_env_read : #### aml_nand_read_rsv_info:446,read nenv info to 310000 In: serial Out: serial Err: serial aml log : internal sys error! reboot_mode=cold_boot Start read misc partition datas! [burnup]Rd:Up sz 0x440 to align 0x1000 info->attemp_times = 12 info->active_slot = 0 info->slot_info[0].bootable = 1 info->slot_info[0].online = 1 info->slot_info[1].bootable = 1 info->slot_info[1].online = 0 info->attemp_times = 12 active slot = 0 cmd: imgread dtb boot_a ${dtb_mem_addr} [imgread]szTimeStamp[2024071615081273] [imgread]MTD pageShift 11, writesz 0x800 aml log : R-2048 check pass! aml log : R2048 check pass! [imgread]Enc dtb sz 0xe000 Amlogic multi-DTB tool Single DTB detected Net: sysnopsys gmac3.7 Phy 0 not found dwmac.ff3f0000amlkey_init() enter! amlnf_key_read: #### amlnf_key_read key data len too much aml_nand_read_rsv_info:446,read nkey info to 430000 [EFUSE_MSG]keynum is 4 MACADDR:*(from chipid) Start read misc partition datas! [burnup]Rd:Up sz 0x440 to align 0x1000 info->attemp_times = 12 info->active_slot = 0 info->slot_info[0].bootable = 1 info->slot_info[0].online = 1 info->slot_info[1].bootable = 1 info->slot_info[1].online = 0 info->attemp_times = 12 active slot = 0 wipe_data=successful wipe_cache=successful Setting bus to 2 i2c_set_bus_num i2c sel 2 bus aml_i2c_init_port init regs for 2 gpio: pin GPIOZ_4 (gpio 18) value is 1 recovery_status= upgrade_step=2 s_version: U-Boot 2015.01 amlkey_init() enter! amlkey_init() 71: already init! [EFUSE_MSG]keynum is 4 [KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet [KM]Error:f[key_manage_query_size]L515:key[mac] not programed yet InUsbBurn noSof CONFIG_SYSTEM_AS_ROOT: null system_mode: 0 [imgread]szTimeStamp[2024071615081273] [imgread]secureKernelImgSz=0x609800 [burnup]Rd:Up sz 0x509800 to align 0x1000 aml log : R-2048 check pass! aml log : R2048 check pass! aml log : R2048 check pass! aml log : R2048 check pass! avb2: 0 save_power_post ... avb2: 0 ## Booting Android Image at 0x01080000 ... reloc_addr =ded9810 copy done Kernel command line: init=/sbin/init rootfstype=ubifs [store]Is good fdt check header, no need decrypt! load dtb from 0x1000000 ...... Amlogic multi-DTB tool Single DTB detected Uncompressing Kernel Image ... OK kernel loaded at 0x01080000, end = 0x01a5b200 Loading Ramdisk to 0dcf0000, end 0de9d800 ... OK Loading Device Tree to 000000000dce0000, end 000000000dceffe6 ... OK fdt_fixup_memory_banks, reg:0000000000000000 Starting kernel ... uboot time: 2751820 us I understand that U-Boot has been modified by the manufacturer, which complicates the situation. I am seeking advice on the following: - Are there any known methods or workarounds to regain control over the U-Boot environment in such scenarios? - Are there any specific forums or community resources where I might find additional help or similar cases? Any guidance or suggestions would be greatly appreciated. Thank you in advance for your assistance! Best regards, Mike

1 0

[PATCH v5 00/20] labgrid: Provide an integration with Labgrid
by Simon Glass 06 Sep '24

06 Sep '24

Labgrid provides access to a hardware lab in an automated way. It is possible to boot U-Boot on boards in the lab without physically touching them. It relies on relays, USB UARTs and SD muxes, among other things. By way of background, about 4 years ago I wrong a thing called Labman[1] which allowed my lab of about 30 devices to be operated remotely, using tbot for the console and build integration. While it worked OK and I used it for many bisects, I didn't take it any further. It turns out that there was already an existing program, called Labgrid, which I did not know about at time (thank you Tom for telling me). It is more rounded than Labman and has a number of advantages: - does not need udev rules, mostly - has several existing users who rely on it - supports multiple machines exporting their devices It lacks a 'lab check' feature and a few other things, but these can be remedied. On and off over the past several weeks I have been experimenting with Labgrid. I have managed to create an initial U-Boot integration (this series) by adding various features to Labgrid[2] and the U-Boot test hooks. I hope that this might inspire others to set up boards and run tests automatically, rather than relying on infrequent, manual test. Perhaps it may even be possible to have a number of labs available. Included in the integration are a number of simple scripts which make it easy to connect to boards and run tests: ub-int <target> Build and boot on a target, starting an interactive session ub-cli <target> Build and boot on a target, ensure U-Boot starts and provide an interactive session from there ub-smoke <target> Smoke test U-Boot to check that it boots to a prompt on a target ub-bisect <target> Bisect a git tree to locate a failure on a particular target ub-pyt <target> <testspec> Run U-Boot pytests on a target Some of these help to provide the same tbot[4] workflow which I have relied on for several years, albeit much simpler versions. The goal here is to create some sort of script which can collect patches from the mailing list, apply them and test them on a selection of boards. I suspect that script already exists, so please let me know what you suggest. I hope you find this interesting and take a look! [1] https://github.com/sjg20/u-boot/tree/lab6a [2] https://github.com/labgrid-project/labgrid/pull/1411 [3] https://github.com/sjg20/uboot-test-hooks/tree/labgrid [4] https://tbot.tools/index.html Changes in v5: - Add a few more comments - Comment out the debugging, which might be useful later - Add a patch to support testing with two board-builds Changes in v4: - Expand the commit message Changes in v3: - Split out most patches into two new series and update cover letter Changes in v2: - Only disable echo if a terminal is detected - Avoid running a docker image for skipped lab tests Simon Glass (20): test: Allow signaling that U-Boot is ready test: Use a constant for the test timeout test: Pass stderr to stdout test: Release board after tests complete test: Allow connecting to a running board test: Avoid failing skipped tests test: Create a common function to get the config test: Introduce the concept of a role test: Move the receive code into a function test: Separate out the exception handling test: Detect dead connections test: Tidy up remaining exceptions test: Introduce lab mode test: Improve handling of sending commands test: Fix mulptiplex_log typo test: Avoid double echo when starting up test: Try to shut down the lab console gracefully test: Add a section for closing the connection test: Support testing with two board-builds CI: Allow running tests on sjg lab .gitlab-ci.yml | 153 +++++++++++++++++++++++++ test/py/conftest.py | 119 +++++++++++++++++--- test/py/u_boot_console_base.py | 154 ++++++++++++++++++-------- test/py/u_boot_console_exec_attach.py | 31 ++++-- test/py/u_boot_spawn.py | 120 +++++++++++++++++--- test/test-main.c | 16 ++- 6 files changed, 503 insertions(+), 90 deletions(-) -- 2.34.1

4 43

[PATCH] video: Add parentheses around VNBYTES() macro
by Dan Carpenter 06 Sep '24

06 Sep '24

The VNBYTES() macro needs to have parentheses to prevent some (harmless) macro expansion bugs. The VNBYTES() macro is used like this: VID_TO_PIXEL(x) * VNBYTES(vid_priv->bpix) The * operation is done before the / operation. It still ends up with the same results, but it's not ideal. Signed-off-by: Dan Carpenter <dan.carpenter(a)linaro.org> --- include/video.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/video.h b/include/video.h index 9729fa348aa5..b364bf91825f 100644 --- a/include/video.h +++ b/include/video.h @@ -58,7 +58,7 @@ enum video_log2_bpp { * Convert enum video_log2_bpp to bytes and bits. Note we omit the outer * brackets to allow multiplication by fractional pixels. */ -#define VNBYTES(bpix) (1 << (bpix)) / 8 +#define VNBYTES(bpix) ((1 << (bpix)) / 8) #define VNBITS(bpix) (1 << (bpix)) -- 2.39.2

4 6

[PATCH v5] mmc: Poll CD in case cyclic framework is enabled
by Marek Vasut 06 Sep '24

06 Sep '24

In case the cyclic framework is enabled, poll the card detect of already initialized cards and deinitialize them in case they are removed. Since the card initialization is a longer process and card initialization is done on first access to an uninitialized card anyway, avoid initializing newly detected uninitialized cards in the cyclic callback. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Simon Glass <sjg(a)chromium.org> --- V2: Move the cyclic registration/unregistration into mmc init/deinit V3: Replace if (CONFIG_IS_ENABLED(CYCLIC)...) with #if as the former does not work with structure members V4: Stuff the code with CONFIG_IS_ENABLED() variants to avoid #ifdefs V5: Rebase on u-boot/next --- drivers/mmc/mmc.c | 32 ++++++++++++++++++++++++++++++++ include/mmc.h | 3 +++ 2 files changed, 35 insertions(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index b18dc331f78..7cf64535b68 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -3005,6 +3005,20 @@ static int mmc_complete_init(struct mmc *mmc) return err; } +static void __maybe_unused mmc_cyclic_cd_poll(void *ctx) +{ + struct mmc *m = ctx; + + if (!m->has_init) + return; + + if (mmc_getcd(m)) + return; + + mmc_deinit(m); + m->has_init = 0; +} + int mmc_init(struct mmc *mmc) { int err = 0; @@ -3027,6 +3041,19 @@ int mmc_init(struct mmc *mmc) if (err) pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start)); + if (CONFIG_IS_ENABLED(CYCLIC, (!mmc->cyclic), (NULL))) { + /* Register cyclic function for card detect polling */ + CONFIG_IS_ENABLED(CYCLIC, + (mmc->cyclic = cyclic_register(mmc_cyclic_cd_poll, + 100 * 1000, + mmc->cfg->name, mmc))); + if (CONFIG_IS_ENABLED(CYCLIC, (!mmc->cyclic), (NULL))) { + printf("Failed to register %s CD poll function\n", + mmc->cfg->name); + err = -EINVAL; + } + } + return err; } @@ -3034,6 +3061,11 @@ int mmc_deinit(struct mmc *mmc) { u32 caps_filtered; + if (CONFIG_IS_ENABLED(CYCLIC, (mmc->cyclic), (NULL))) { + cyclic_unregister(CONFIG_IS_ENABLED(CYCLIC, (mmc->cyclic), NULL)); + CONFIG_IS_ENABLED(CYCLIC, (mmc->cyclic = NULL)); + } + if (!CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) && !CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) && !CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)) diff --git a/include/mmc.h b/include/mmc.h index 7f1900363b9..7c98ace5346 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -14,6 +14,7 @@ #include <linux/sizes.h> #include <linux/compiler.h> #include <linux/dma-direction.h> +#include <cyclic.h> #include <part.h> struct bd_info; @@ -733,6 +734,8 @@ struct mmc { bool hs400_tuning:1; enum bus_mode user_speed_mode; /* input speed mode from user */ + + CONFIG_IS_ENABLED(CYCLIC, (struct cyclic_info *cyclic)); }; #if CONFIG_IS_ENABLED(DM_MMC) -- 2.43.0

3 2

[PATCH] regulator: fixed: fix regulator-fixed-clock
by John Keeping 06 Sep '24

06 Sep '24

For regulator-fixed-clock, the device's private data is never set so in fixed_clock_regulator_set_enable() is null and the function cannot complete successfully. Rename the _plat structure to _priv to better represent its role and set this as the private data. As shown by the set_enable() function and by using the same .of_to_plat hook as regulator-fixed, the platform data is regulator_common_plat so also set .plat_auto correctly. Finally, set up the private data by adding a .probe function to look up the clock and set the member variable. Fixes: f3b5100aff3 ("regulator: fixed: add possibility to enable by clock") Signed-off-by: John Keeping <jkeeping(a)inmusicbrands.com> --- drivers/power/regulator/fixed.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c index 98c89bf2aff..996da41546a 100644 --- a/drivers/power/regulator/fixed.c +++ b/drivers/power/regulator/fixed.c @@ -17,7 +17,7 @@ #include "regulator_common.h" -struct fixed_clock_regulator_plat { +struct fixed_clock_regulator_priv { struct clk *enable_clock; unsigned int clk_enable_counter; }; @@ -83,14 +83,14 @@ static int fixed_regulator_set_enable(struct udevice *dev, bool enable) static int fixed_clock_regulator_get_enable(struct udevice *dev) { - struct fixed_clock_regulator_plat *priv = dev_get_priv(dev); + struct fixed_clock_regulator_priv *priv = dev_get_priv(dev); return priv->clk_enable_counter > 0; } static int fixed_clock_regulator_set_enable(struct udevice *dev, bool enable) { - struct fixed_clock_regulator_plat *priv = dev_get_priv(dev); + struct fixed_clock_regulator_priv *priv = dev_get_priv(dev); struct regulator_common_plat *plat = dev_get_plat(dev); int ret = 0; @@ -113,6 +113,17 @@ static int fixed_clock_regulator_set_enable(struct udevice *dev, bool enable) return ret; } +static int fixed_clock_regulator_probe(struct udevice *dev) +{ + struct fixed_clock_regulator_priv *priv = dev_get_priv(dev); + + priv->enable_clock = devm_clk_get(dev, NULL); + if (IS_ERR(priv->enable_clock)) + return PTR_ERR(priv->enable_clock); + + return 0; +} + static const struct dm_regulator_ops fixed_regulator_ops = { .get_value = fixed_regulator_get_value, .get_current = fixed_regulator_get_current, @@ -149,6 +160,8 @@ U_BOOT_DRIVER(regulator_fixed_clock) = { .id = UCLASS_REGULATOR, .ops = &fixed_clock_regulator_ops, .of_match = fixed_clock_regulator_ids, + .probe = fixed_clock_regulator_probe, .of_to_plat = fixed_regulator_of_to_plat, - .plat_auto = sizeof(struct fixed_clock_regulator_plat), + .plat_auto = sizeof(struct regulator_common_plat), + .priv_auto = sizeof(struct fixed_clock_regulator_priv), }; -- 2.45.2

3 2

[PATCH] power: regulator: tps6287x: Add driver for TPS6287x step down convertors
by Keerthy 06 Sep '24

06 Sep '24

Add driver for TPS6287x step down convertors Data sheet: https://www.ti.com/lit/ds/slvsgc5a/slvsgc5a.pdf Signed-off-by: Keerthy <j-keerthy(a)ti.com> --- drivers/power/regulator/Kconfig | 18 ++ drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps6287x_regulator.c | 172 +++++++++++++++++++ 3 files changed, 191 insertions(+) create mode 100644 drivers/power/regulator/tps6287x_regulator.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 102ec7bc5f..db4b40c35e 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -375,6 +375,15 @@ config DM_REGULATOR_TPS80031 features for TPS80031/TPS80032 PMICs. The driver implements get/set api for: value and enable. +config DM_REGULATOR_TPS6287X + bool "Enable driver for TPS6287x Power Regulator" + depends on DM_REGULATOR + help + The TPS6287X is a step down converter with a fast transient + response. This driver supports all four variants of the chip + (TPS62870, TPS62871, TPS62872, TPS62873). It implements the + get/set api for value only, as the power line is always on. + config DM_REGULATOR_STPMIC1 bool "Enable driver for STPMIC1 regulators" depends on DM_REGULATOR && PMIC_STPMIC1 @@ -394,6 +403,15 @@ config DM_REGULATOR_ANATOP regulators. It is recommended that this option be enabled on i.MX6 platform. +config SPL_DM_REGULATOR_TPS6287X + bool "Enable driver for TPS6287x Power Regulator" + depends on SPL_DM_REGULATOR + help + The TPS6287X is a step down converter with a fast transient + response. This driver supports all four variants of the chip + (TPS62870, TPS62871, TPS62872, TPS62873). It implements the + get/set api for value only, as the power line is always on. + config SPL_DM_REGULATOR_STPMIC1 bool "Enable driver for STPMIC1 regulators in SPL" depends on SPL_DM_REGULATOR && PMIC_STPMIC1 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index f79932d833..6335e5566d 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_TPS65911) += tps65911_regulator.o obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_TPS6287X) += tps6287x_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_TPS80031) += tps80031_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o obj-$(CONFIG_DM_REGULATOR_TPS65941) += tps65941_regulator.o diff --git a/drivers/power/regulator/tps6287x_regulator.c b/drivers/power/regulator/tps6287x_regulator.c new file mode 100644 index 0000000000..6d18571919 --- /dev/null +++ b/drivers/power/regulator/tps6287x_regulator.c @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/ + * Keerthy <j-keerthy(a)ti.com> + */ + +#include <dm.h> +#include <i2c.h> +#include <dm/device_compat.h> +#include <power/regulator.h> + +#define TPS6287X_REG_VSET 0x0 +#define TPS6287X_REG_CONTROL1 0x1 +#define TPS6287X_REG_CONTROL2 0x2 +#define TPS6287X_REG_CONTROL3 0x3 +#define TPS6287X_REG_STATUS 0x4 +#define TPS6287X_REG_VSET_VSET_MASK 0xff +#define TPS6287X_REG_CONTROL2_VRANGE_MASK 0xc + +struct tps6287x_regulator_config { + u32 vmin; + u32 vmax; +}; + +struct tps6287x_regulator_pdata { + u8 vsel_offset; + struct udevice *i2c; + struct tps6287x_regulator_config *config; +}; + +static struct tps6287x_regulator_config tps6287x_data = { + .vmin = 400000, + .vmax = 3350000, +}; + +static int tps6287x_regulator_set_value(struct udevice *dev, int uV) +{ + struct tps6287x_regulator_pdata *pdata = dev_get_plat(dev); + u8 regval, vset; + int ret; + + if (uV < pdata->config->vmin || uV > pdata->config->vmax) + return -EINVAL; + /* + * Based on the value of VRANGE bit field of CONTROL2 reg the range + * varies. + */ + ret = dm_i2c_read(pdata->i2c, TPS6287X_REG_CONTROL2, &regval, 1); + if (ret) { + dev_err(dev, "CTRL2 reg read failed: %d\n", ret); + return ret; + } + + regval &= TPS6287X_REG_CONTROL2_VRANGE_MASK; + regval >>= ffs(TPS6287X_REG_CONTROL2_VRANGE_MASK) - 1; + + /* + * VRANGE = 0. Increment step 1250 uV starting with 0 --> 400000 uV + * VRANGE = 1. Increment step 2500 uV starting with 0 --> 400000 uV + * VRANGE = 2. Increment step 5000 uV starting with 0 --> 400000 uV + * VRANGE = 3. Increment step 10000 uV starting with 0 --> 800000 uV + */ + switch (regval) { + case 0: + vset = (uV - 400000) / 1250; + break; + case 1: + vset = (uV - 400000) / 2500; + break; + case 2: + vset = (uV - 400000) / 5000; + break; + case 3: + vset = (uV - 800000) / 10000; + break; + default: + pr_err("%s: invalid regval %d\n", dev->name, regval); + return -EINVAL; + } + + return dm_i2c_write(pdata->i2c, TPS6287X_REG_VSET, &vset, 1); +} + +static int tps6287x_regulator_get_value(struct udevice *dev) +{ + u8 regval, vset; + int uV; + int ret; + struct tps6287x_regulator_pdata *pdata = dev_get_plat(dev); + + /* + * Based on the value of VRANGE bit field of CONTROL2 reg the range + * varies. + */ + ret = dm_i2c_read(pdata->i2c, TPS6287X_REG_CONTROL2, &regval, 1); + if (ret) { + dev_err(dev, "i2c read failed: %d\n", ret); + return ret; + } + + regval &= TPS6287X_REG_CONTROL2_VRANGE_MASK; + regval >>= ffs(TPS6287X_REG_CONTROL2_VRANGE_MASK) - 1; + + ret = dm_i2c_read(pdata->i2c, TPS6287X_REG_VSET, &vset, 1); + if (ret) { + dev_err(dev, "i2c VSET read failed: %d\n", ret); + return ret; + } + + /* + * VRANGE = 0. Increment step 1250 uV starting with 0 --> 400000 uV + * VRANGE = 1. Increment step 2500 uV starting with 0 --> 400000 uV + * VRANGE = 2. Increment step 5000 uV starting with 0 --> 400000 uV + * VRANGE = 3. Increment step 10000 uV starting with 0 --> 800000 uV + */ + switch (regval) { + case 0: + uV = 400000 + vset * 1250; + break; + case 1: + uV = 400000 + vset * 2500; + break; + case 2: + uV = 400000 + vset * 5000; + break; + case 3: + uV = 800000 + vset * 10000; + break; + default: + pr_err("%s: invalid regval %d\n", dev->name, regval); + return -EINVAL; + } + + return uV; +} + +static int tps6287x_regulator_probe(struct udevice *dev) +{ + struct tps6287x_regulator_pdata *pdata = dev_get_plat(dev); + int ret, slave_id; + + pdata->config = (void *)dev_get_driver_data(dev); + + slave_id = devfdt_get_addr_index(dev, 0); + + ret = i2c_get_chip(dev->parent, slave_id, 1, &pdata->i2c); + if (ret) { + dev_err(dev, "i2c dev get failed.\n"); + return ret; + } + + return 0; +} + +static const struct dm_regulator_ops tps6287x_regulator_ops = { + .get_value = tps6287x_regulator_get_value, + .set_value = tps6287x_regulator_set_value, +}; + +static const struct udevice_id tps6287x_regulator_ids[] = { + { .compatible = "ti,tps62873", .data = (ulong)&tps6287x_data }, + { }, +}; + +U_BOOT_DRIVER(tps6287x_regulator) = { + .name = "tps6287x_regulator", + .id = UCLASS_REGULATOR, + .ops = &tps6287x_regulator_ops, + .of_match = tps6287x_regulator_ids, + .plat_auto = sizeof(struct tps6287x_regulator_pdata), + .probe = tps6287x_regulator_probe, +}; -- 2.17.1

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[PATCH] cmd: fdt: use U-Boot's FDT by default
by Caleb Connolly 06 Sep '24

06 Sep '24

When using the FDT command to inspect an arbitrary FDT in memory, it will always be necessary to explicitly set the FDT address. However it is also quite likely that the command is being used to inspect U-Boot's own FDT. Simplify that common workflow of running "fdt addr -c" to get the control address and set it by just making $fdtcontroladdr the default FDT if there isn't one. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- cmd/fdt.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/cmd/fdt.c b/cmd/fdt.c index d16b141ce32d..8909706e2483 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@ -276,8 +276,17 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return CMD_RET_SUCCESS; } + /* Try using U-Boot's FDT by default */ + if (!working_fdt) { + struct fdt_header *addr; + + addr = (void *)env_get_hex("fdtcontroladdr", 0); + if (addr && fdt_check_header(&addr)) + set_working_fdt_addr((phys_addr_t)addr); + } + if (!working_fdt) { puts("No FDT memory address configured. Please configure\n" "the FDT address via \"fdt addr <address>\" command.\n" "Aborting!\n"); -- 2.46.0

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