June 2024 - U-Boot

[PATCH v2 1/3] configs: rockchip: reduce diff for rk3308, rk3328, rk3399, rk3568, and rk3588
by FUKAUMI Naoki 17 Jul '24

17 Jul '24

this is cosmetic change. no functional change is intended. - remove redundant white spaces - replace white spaces with tab - align position of last letter/word - sort lines in CFG_EXTRA_ENV_SETTINGS - add comment after #endif Signed-off-by: FUKAUMI Naoki <naoki(a)radxa.com> Changes in v2: - rewrite whole commit message --- include/configs/rk3308_common.h | 26 ++++++++++----------- include/configs/rk3328_common.h | 28 +++++++++++------------ include/configs/rk3399_common.h | 40 ++++++++++++++++----------------- include/configs/rk3568_common.h | 14 ++++++------ include/configs/rk3588_common.h | 12 +++++----- 5 files changed, 60 insertions(+), 60 deletions(-) diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 861154fbeb..80113220e4 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,24 +8,24 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xfff80000 +#define CFG_IRAM_BASE 0xfff80000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x03e00000\0" \ - "fdtoverlay_addr_r=0x03f00000\0" \ - "kernel_addr_r=0x00680000\0" \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x03e00000\0" \ + "fdtoverlay_addr_r=0x03f00000\0" \ + "kernel_addr_r=0x00680000\0" \ "ramdisk_addr_r=0x04000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - ENV_MEM_LAYOUT_SETTINGS \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3308_COMMON_H */ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 2c40674b22..f9e6634c5f 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -8,25 +8,25 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xff090000 +#define CFG_IRAM_BASE 0xff090000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01f00000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ "kernel_comp_size=0x2000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3328_COMMON_H */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 4e75771055..62007c8b27 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -8,36 +8,36 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xff8c0000 +#define CFG_IRAM_BASE 0xff8c0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 #ifndef CONFIG_SPL_BUILD -#define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ - "script_offset_f=0xffe000\0" \ - "script_size_f=0x2000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01f00000\0" \ - "fdtoverlay_addr_r=0x02000000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ - "kernel_comp_size=0x2000000\0" - #ifndef ROCKCHIP_DEVICE_SETTINGS #define ROCKCHIP_DEVICE_SETTINGS #endif -#define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00500000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x00600000\0" \ + "fdt_addr_r=0x01f00000\0" \ + "fdtoverlay_addr_r=0x02000000\0" \ + "kernel_addr_r=0x02080000\0" \ + "ramdisk_addr_r=0x06000000\0" \ + "kernel_comp_addr_r=0x08000000\0" \ + "kernel_comp_size=0x2000000\0" + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* CONFIG_SPL_BUILD */ -#endif +#endif /* __CONFIG_RK3399_COMMON_H */ diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 48f93083de..09b7b71c6a 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ @@ -10,7 +10,7 @@ #include "rockchip-common.h" -#define CFG_IRAM_BASE 0xfdcc0000 +#define CFG_IRAM_BASE 0xfdcc0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 @@ -28,10 +28,10 @@ "kernel_comp_size=0x8000000\0" #define CFG_EXTRA_ENV_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ROCKCHIP_DEVICE_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -#endif +#endif /* __CONFIG_RK3568_COMMON_H */ diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h index 70430612ef..e6654c275a 100644 --- a/include/configs/rk3588_common.h +++ b/include/configs/rk3588_common.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2021 Rockchip Electronics Co., Ltd * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. @@ -26,11 +26,11 @@ "ramdisk_addr_r=0x12180000\0" \ "kernel_comp_size=0x8000000\0" -#define CFG_EXTRA_ENV_SETTINGS \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ - ENV_MEM_LAYOUT_SETTINGS \ - ROCKCHIP_DEVICE_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" #endif /* __CONFIG_RK3588_COMMON_H */ -- 2.43.0

2 6

[PATCH COVER] rockchip: rk3399: fix SPI-NOR flash not found in U-Boot pre-reloc
by Quentin Schulz 17 Jul '24

17 Jul '24

From: Quentin Schulz <quentin.schulz(a)cherry.de> In commit 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC"), the spi1 bootph properties were mistakenly removed meaning, so re-add them back to fix SPI-NOR flash not being found in U-Boot pre-reloc as required for RK3399 Puma. Fixes: 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC") Signed-off-by: Quentin Schulz <quentin.schulz(a)cherry.de> --- arch/arm/dts/rk3399-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index b6b43271172..2bec139d833 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -145,6 +145,11 @@ bootph-some-ram; }; +&spi1 { + bootph-pre-ram; + bootph-some-ram; +}; + &spi1_clk { bootph-pre-ram; bootph-some-ram; --- base-commit: 2248c96ea1cf0b65377040d9f87ce7d8cf534c63 change-id: 20240617-rk3399-fix-d8c8d3ce844e Best regards, -- Quentin Schulz <quentin.schulz(a)cherry.de>

4 9

[PATCH v1 1/2] dm: exynos: Correct CONFIG_SYS_BOARD setting for Odroid XU3 boards
by Anand Moon 17 Jul '24

17 Jul '24

Fix the issue where CONFIG_SYS_BOARD was incorrectly set on Odroid XU3 boards, causing boot failure. This was resolved by correcting the SYS_BOARD entry in Kconfig to load the correct device tree source (dts) for the Odroid Exynos5422 Platforms. Fixes: f76750d11133 ("Convert CONFIG_CONS_INDEX et al to Kconfig") Signed-off-by: Anand Moon <linux.amoon(a)gmail.com> --- U-Boot 2024.07-rc5-00042-g80a111f426 (Jun 26 2024 - 15:03:09 +0530) for ODROID-XU3/XU4/HC1/HC2 CPU: Exynos5422 @ 800 MHz DRAM: 2 GiB Core: 74 devices, 12 uclasses, devicetree: separate MMC: mmc@12200000: 0, mmc@12220000: 2 Loading Environment from MMC... Reading from MMC(2)... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Odroid XU3/XU4/HC1/HC2 based on Exynos5422 Type: xu4 Boot device: MMC(2) Net: No ethernet found. Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc2 is current device Scanning mmc 2:1... Found U-Boot script /boot/boot.scr 2046 bytes read in 22 ms (90.8 KiB/s) 8104280 bytes read in 519 ms (14.9 MiB/s) Failed to load '/boot/dtbs/exynos5422-smdk5420xu4.dtb' SCRIPT FAILED: continuing... No EFI system partition No EFI system partition Failed to persist EFI variables No EFI system partition Failed to persist EFI variables No EFI system partition Failed to persist EFI variables Loading Boot0000 'mmc 2' failed EFI boot manager: Cannot load any image MMC Device 1 not found no mmc device at slot 1 --- board/samsung/smdk5420/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/samsung/smdk5420/Kconfig b/board/samsung/smdk5420/Kconfig index a9d62fffa5..37d6bbbed1 100644 --- a/board/samsung/smdk5420/Kconfig +++ b/board/samsung/smdk5420/Kconfig @@ -1,7 +1,7 @@ if TARGET_ODROID_XU3 config SYS_BOARD - default "smdk5420" + default "odroid" config SYS_VENDOR default "samsung" base-commit: c53b344475734d0d29f522b7b1d80c5b8204442d -- 2.44.0

3 6

[PATCH] arm: rockchip: using generic capsule update mechanism
by Weizhao Ouyang 17 Jul '24

17 Jul '24

Currently Rockchip's capsule update mechanism only accepts capsules in form of a mmc partition, but a generic capsule update mechanism should be used to satisfy the universal requirements. Signed-off-by: Weizhao Ouyang <o451686892(a)gmail.com> --- arch/arm/mach-rockchip/board.c | 153 ------------------ board/radxa/rockpi4-rk3399/rockpi4-rk3399.c | 166 +++++++++++++++++++- 2 files changed, 158 insertions(+), 161 deletions(-) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index cd226844b6..73fbb3f58c 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -35,155 +35,6 @@ #include <asm/arch-rockchip/periph.h> #include <power/regulator.h> -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) - -#define DFU_ALT_BUF_LEN SZ_1K - -static struct efi_fw_image *fw_images; - -static bool updatable_image(struct disk_partition *info) -{ - int i; - bool ret = false; - efi_guid_t image_type_guid; - - uuid_str_to_bin(info->type_guid, image_type_guid.b, - UUID_STR_FORMAT_GUID); - - for (i = 0; i < update_info.num_images; i++) { - if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { - ret = true; - break; - } - } - - return ret; -} - -static void set_image_index(struct disk_partition *info, int index) -{ - int i; - efi_guid_t image_type_guid; - - uuid_str_to_bin(info->type_guid, image_type_guid.b, - UUID_STR_FORMAT_GUID); - - for (i = 0; i < update_info.num_images; i++) { - if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { - fw_images[i].image_index = index; - break; - } - } -} - -static int get_mmc_desc(struct blk_desc **desc) -{ - int ret; - struct mmc *mmc; - struct udevice *dev; - - /* - * For now the firmware images are assumed to - * be on the SD card - */ - ret = uclass_get_device(UCLASS_MMC, 1, &dev); - if (ret) - return -1; - - mmc = mmc_get_mmc_dev(dev); - if (!mmc) - return -ENODEV; - - if ((ret = mmc_init(mmc))) - return ret; - - *desc = mmc_get_blk_desc(mmc); - if (!*desc) - return -1; - - return 0; -} - -void set_dfu_alt_info(char *interface, char *devstr) -{ - const char *name; - bool first = true; - int p, len, devnum, ret; - char buf[DFU_ALT_BUF_LEN]; - struct disk_partition info; - struct blk_desc *desc = NULL; - - ret = get_mmc_desc(&desc); - if (ret) { - log_err("Unable to get mmc desc\n"); - return; - } - - memset(buf, 0, sizeof(buf)); - name = blk_get_uclass_name(desc->uclass_id); - devnum = desc->devnum; - len = strlen(buf); - - len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, - "%s %d=", name, devnum); - - for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) { - if (part_get_info(desc, p, &info)) - continue; - - /* Add entry to dfu_alt_info only for updatable images */ - if (updatable_image(&info)) { - if (!first) - len += snprintf(buf + len, - DFU_ALT_BUF_LEN - len, ";"); - - len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, - "%s%d_%s part %d %d", - name, devnum, info.name, devnum, p); - first = false; - } - } - - log_debug("dfu_alt_info => %s\n", buf); - env_set("dfu_alt_info", buf); -} - -__weak void rockchip_capsule_update_board_setup(void) -{ -} - -static void gpt_capsule_update_setup(void) -{ - int p, i, ret; - struct disk_partition info; - struct blk_desc *desc = NULL; - - fw_images = update_info.images; - rockchip_capsule_update_board_setup(); - - ret = get_mmc_desc(&desc); - if (ret) { - log_err("Unable to get mmc desc\n"); - return; - } - - for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) { - if (part_get_info(desc, p, &info)) - continue; - - /* - * Since we have a GPT partitioned device, the updatable - * images could be stored in any order. Populate the - * image_index at runtime. - */ - if (updatable_image(&info)) { - set_image_index(&info, i); - i++; - } - } -} -#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ - __weak int rk_board_late_init(void) { return 0; @@ -193,10 +44,6 @@ int board_late_init(void) { setup_boot_mode(); -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) - gpt_capsule_update_setup(); -#endif - return rk_board_late_init(); } diff --git a/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c index a533128b92..01c3b7d5a2 100644 --- a/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c +++ b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c @@ -4,22 +4,132 @@ */ #include <dm.h> +#include <mmc.h> +#include <part.h> #include <efi_loader.h> #define ROCKPI4_UPDATABLE_IMAGES 2 -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) -static struct efi_fw_image fw_images[ROCKPI4_UPDATABLE_IMAGES] = {0}; +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) + +#define DFU_ALT_BUF_LEN SZ_1K + +static struct efi_fw_image *fw_images = {0}; +static struct efi_fw_image fw_images_d[ROCKPI4_UPDATABLE_IMAGES] = {0}; struct efi_capsule_update_info update_info = { .num_images = ROCKPI4_UPDATABLE_IMAGES, - .images = fw_images, + .images = fw_images_d, }; -#endif +static bool updatable_image(struct disk_partition *info) +{ + int i; + bool ret = false; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < update_info.num_images; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + ret = true; + break; + } + } + + return ret; +} + +static void set_image_index(struct disk_partition *info, int index) +{ + int i; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < update_info.num_images; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + fw_images[i].image_index = index; + break; + } + } +} + +static int get_mmc_desc(struct blk_desc **desc) +{ + int ret; + struct mmc *mmc; + struct udevice *dev; + + /* + * For now the firmware images are assumed to + * be on the SD card + */ + ret = uclass_get_device(UCLASS_MMC, 1, &dev); + if (ret) + return -1; + + mmc = mmc_get_mmc_dev(dev); + if (!mmc) + return -ENODEV; + + ret = mmc_init(mmc); + if (ret) + return ret; + + *desc = mmc_get_blk_desc(mmc); + if (!*desc) + return -1; + + return 0; +} + +void set_dfu_alt_info(char *interface, char *devstr) +{ + const char *name; + bool first = true; + int p, len, devnum, ret; + char buf[DFU_ALT_BUF_LEN]; + struct disk_partition info; + struct blk_desc *desc = NULL; + + ret = get_mmc_desc(&desc); + if (ret) { + log_err("Unable to get mmc desc\n"); + return; + } + + memset(buf, 0, sizeof(buf)); + name = blk_get_uclass_name(desc->uclass_id); + devnum = desc->devnum; + len = strlen(buf); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s %d=", name, devnum); + + for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* Add entry to dfu_alt_info only for updatable images */ + if (updatable_image(&info)) { + if (!first) + len += snprintf(buf + len, + DFU_ALT_BUF_LEN - len, ";"); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_%s part %d %d", + name, devnum, info.name, devnum, p); + first = false; + } + } + + log_debug("dfu_alt_info => %s\n", buf); + env_set("dfu_alt_info", buf); +} -#ifndef CONFIG_SPL_BUILD -#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) static bool board_is_rockpi_4b(void) { return of_machine_is_compatible("radxa,rockpi4b"); @@ -30,7 +140,7 @@ static bool board_is_rockpi_4c(void) return of_machine_is_compatible("radxa,rockpi4c"); } -void rockchip_capsule_update_board_setup(void) +static void rockchip_capsule_update_board_setup(void) { if (board_is_rockpi_4b()) { efi_guid_t idbldr_image_type_guid = @@ -54,5 +164,45 @@ void rockchip_capsule_update_board_setup(void) fw_images[1].fw_name = u"ROCKPI4C-UBOOT"; } } + +static void gpt_capsule_update_setup(void) +{ + int p, i, ret; + struct disk_partition info; + struct blk_desc *desc = NULL; + + fw_images = update_info.images; + rockchip_capsule_update_board_setup(); + + ret = get_mmc_desc(&desc); + if (ret) { + log_err("Unable to get mmc desc\n"); + return; + } + + for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* + * Since we have a GPT partitioned device, the updatable + * images could be stored in any order. Populate the + * image_index at runtime. + */ + if (updatable_image(&info)) { + set_image_index(&info, i); + i++; + } + } +} #endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ -#endif /* !CONFIG_SPL_BUILD */ + +int rk_board_late_init(void) +{ +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION) + gpt_capsule_update_setup(); +#endif + + return 0; +} + -- 2.40.1

2 1

[PATCH v4 0/3] drivers: bootcount: Add support for ANY filesystem
by Vasileios Amoiridis 17 Jul '24

17 Jul '24

Changes in v4: - Add bootcount.rst in doc/api/index.rst - Fix typo in documentation Changes in v3: - Remove specific CONFIGs for filesystems - Add message to prompt user to enable required write function - Use tags from previous rounds - Move documentation to rST v2: https://lore.kernel.org/u-boot/20240610185116.353604-1-vassilisamir@gmail.c… Changes in v2: - Use generic code by utilizing FS_TYPE_ANY - Change filename from bootcount_ext.c to bootcount_fs.c v1: https://lore.kernel.org/u-boot/20240605181041.68317-1-vassilisamir@gmail.co… This patch adds support to save the bootcount variable in a file located in FAT filesystem. Up to now, there was support only for EXT filesystem. The reason I put this as RFC is because the file "bootcount_ext.c" will no longer represent the implementation for the EXT filesystem, but also for the FAT filesystem. Should it be renamed? If not, wouldn't it be inconsistent? Cheers, Vasilis Vasileios Amoiridis (3): drivers: bootcount: Add support for ANY filesystem doc: api: bootcount: Convert to rST documentation drivers: bootcount: Fix typo in documentation doc/README.bootcount | 53 ----------------- doc/api/bootcount.rst | 58 +++++++++++++++++++ doc/api/index.rst | 1 + drivers/bootcount/Kconfig | 36 ++++++------ drivers/bootcount/Makefile | 2 +- .../{bootcount_ext.c => bootcount_fs.c} | 12 ++-- 6 files changed, 84 insertions(+), 78 deletions(-) delete mode 100644 doc/README.bootcount create mode 100644 doc/api/bootcount.rst rename drivers/bootcount/{bootcount_ext.c => bootcount_fs.c} (81%) base-commit: c53b344475734d0d29f522b7b1d80c5b8204442d -- 2.25.1

3 6

[PATCH] firmware: psci: register PSCI power domains to stub driver
by Neil Armstrong 17 Jul '24

17 Jul '24

On some SoCs, like Qualcomm SoCs, the PSCI cluster power domain is used by system-wide firmware interfaces to make sure none of the CPUs are suspended before submitting requests. While on U-boot we only use the first core and we never suspend it, the Device Tree still references it and blocks those nodes to be probed. Simply bind the PSCI power-domain subnoded to a stub power domain driver in order to solve the runtime dependencies. Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- drivers/firmware/psci.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index 03544d76ed4..fc72bc17274 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -23,6 +23,7 @@ #include <linux/libfdt.h> #include <linux/printk.h> #include <linux/psci.h> +#include <power-domain-uclass.h> #define DRIVER_NAME "psci" @@ -172,6 +173,10 @@ static int bind_smccc_features(struct udevice *dev, int psci_method) static int psci_bind(struct udevice *dev) { +#if IS_ENABLED(CONFIG_POWER_DOMAIN) + ofnode node; +#endif + /* No SYSTEM_RESET support for PSCI 0.1 */ if (device_is_compatible(dev, "arm,psci-0.2") || device_is_compatible(dev, "arm,psci-1.0")) { @@ -188,6 +193,16 @@ static int psci_bind(struct udevice *dev) if (IS_ENABLED(CONFIG_ARM_SMCCC_FEATURES) && device_is_compatible(dev, "arm,psci-1.0")) dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + /* Bind power-domain subnodes */ +#if IS_ENABLED(CONFIG_POWER_DOMAIN) + dev_for_each_subnode(node, dev) { + if (device_bind_driver_to_node(dev, "psci_power_domain", + ofnode_get_name(node), + node, NULL)) + pr_warn("failed to bind %s\n", ofnode_get_name(node)); + } +#endif + return 0; } @@ -324,3 +339,29 @@ U_BOOT_DRIVER(psci) = { #endif .flags = DM_FLAG_PRE_RELOC, }; + +#if IS_ENABLED(CONFIG_POWER_DOMAIN) +/* Accept #power-domain-cells == 0 */ +static int psci_power_domain_xlate(struct power_domain *power_domain, + struct ofnode_phandle_args *args) +{ + return args->args_count == 0 ? 0 : -EINVAL; +} + +static const struct power_domain_ops psci_power_ops = { + .of_xlate = psci_power_domain_xlate, +}; + +static int psci_power_domain_probe(struct udevice *dev) +{ + return 0; +} + +U_BOOT_DRIVER(psci_power_domain) = { + .name = "psci_power_domain", + .id = UCLASS_POWER_DOMAIN, + .ops = &psci_power_ops, + .probe = psci_power_domain_probe, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif --- base-commit: 9e9f78f7aa0124ef0e622532043acf87e84008dc change-id: 20240628-topic-sm8x50-psci-power-domain-27dd90a7f298 Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH 0/9] rockchip: pinctrl: Minor fixes and add support for pinmux status cmd
by Jonas Karlman 16 Jul '24

16 Jul '24

This series includes some minor fixes, cleanup and add support for using the pinmux status cmd. Following is an example on a Radxa ROCK 5A (RK3588S): => pinmux dev pinctrl dev: pinctrl => pinmux status GPIO0_A0 : gpio GPIO0_A1 : func-2 GPIO0_A2 : gpio GPIO0_A3 : gpio GPIO0_A4 : func-1 GPIO0_A5 : func-2 GPIO0_A6 : gpio GPIO0_A7 : gpio GPIO0_B0 : gpio GPIO0_B1 : gpio GPIO0_B2 : gpio GPIO0_B3 : gpio GPIO0_B4 : gpio GPIO0_B5 : func-10 GPIO0_B6 : func-10 GPIO0_B7 : gpio [...] and on a ASUS TinkerBoard R2.0 (RK3288W): => pinmux dev pinctrl dev: pinctrl => pinmux status [...] GPIO2_C6 : gpio GPIO2_C7 : gpio GPIO2_D0 : unrouted GPIO2_D1 : unrouted GPIO2_D2 : unrouted GPIO2_D3 : unrouted GPIO2_D4 : unrouted GPIO2_D5 : unrouted GPIO2_D6 : unrouted GPIO2_D7 : unrouted GPIO3_A0 : func-2 GPIO3_A1 : func-2 [...] Patch 1-3 are minor fixes so that correct pinmux status is reported. Patch 4 refactor to use syscon_regmap_lookup_by_phandle() helper. Patch 6 refactor to get pinctrl device from gpio-ranges prop. Patch 5 and 7 change to use pinctrl pin offset instead of bank num to get current pinmux. Patch 8 add required ops for use of the pinmux status cmd. Patch 9 add gpio-ranges props for remaining RK SoCs, this is strictly not needed for pinmux status cmd to function. However, the change to not require the pin controller offset to be 32 aligned was required to add gpio-ranges props for RK3288. This series depends on the "rockchip: Add gpio request() ops and drop PCIe reset-gpios workaround" [1] series. [1] https://patchwork.ozlabs.org/cover/1934100/ Jonas Karlman (9): pinctrl: rockchip: rk3188: Fix support for IOMUX_GPIO_ONLY flag pinctrl: rockchip: rv1126: Fix support for IOMUX_L_SOURCE_PMU flag pinctrl: rockchip: rk3588: Fix support for rockchip_get_mux() pinctrl: rockchip: Use syscon_regmap_lookup_by_phandle() pinctrl: rockchip: Update get_gpio_mux() ops gpio: rockchip: Get pinctrl device from gpio-ranges prop gpio: rockchip: Use pinctrl pin offset to get_gpio_mux() pinctrl: rockchip: Add pinmux status related ops rockchip: gpio: Add gpio-ranges props arch/arm/dts/rk3036-u-boot.dtsi | 12 ++ arch/arm/dts/rk3066a-u-boot.dtsi | 3 +- arch/arm/dts/rk3128-u-boot.dtsi | 16 ++ arch/arm/dts/rk322x-u-boot.dtsi | 16 ++ arch/arm/dts/rk3288-u-boot.dtsi | 33 ++++ arch/arm/dts/rk3308-u-boot.dtsi | 20 +++ arch/arm/dts/rk3328-u-boot.dtsi | 13 ++ arch/arm/dts/rk3368-u-boot.dtsi | 16 ++ arch/arm/dts/rk3399-u-boot.dtsi | 20 +++ arch/arm/dts/rv1108-u-boot.dtsi | 16 ++ arch/arm/dts/rv1126-u-boot.dtsi | 14 ++ drivers/gpio/rk_gpio.c | 44 +++-- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 151 ++++++++++++++---- 13 files changed, 322 insertions(+), 52 deletions(-) -- 2.43.2

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[PATCH 0/4] rockchip: Add gpio request() ops and drop PCIe reset-gpios workaround
by Jonas Karlman 16 Jul '24

16 Jul '24

This series add gpio request() and pinctrl gpio_request_enable() ops so that a gpio requested pin automatically use gpio pinmux and U-Boot behaves more similar to Linux kernel. With the gpio and pinctrl ops implemented this series also remove a PCIe reset-gpios related device lock-up workaround from board u-boot.dtsi. PX30, RK3066, RK3188, RK356x and RK3588 are the only SoCs that currently define gpio-ranges props and is affected by this series. A follow up series adding support for the pinmux status cmd will also add gpio-ranges props for remaining RK SoCs. Jonas Karlman (4): pinctrl: rockchip: Add gpio_request_enable() ops gpio: rockchip: Add request() ops rockchip: rk3568-rock-3a: Drop PCIe reset-gpios workaround rockchip: rk3568-radxa-e25: Drop PCIe reset-gpios workaround arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 12 ------- arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 12 ------- drivers/gpio/rk_gpio.c | 10 ++++++ .../pinctrl/rockchip/pinctrl-rockchip-core.c | 31 +++++++++++++++++++ 4 files changed, 41 insertions(+), 24 deletions(-) -- 2.43.2

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[PATCH next 0/4] rockchip: imply ARMV8_CRYPTO on px30 + px30-ringneck/rk3399-puma defconfig changes
by Quentin Schulz 16 Jul '24

16 Jul '24

This implies ARMV8_CRYPTO + CONFIG_ARMV8_SET_SMPEN for cache coherency on PX30. Disable USB gadget support on PX30 as I've never been able to make it work in either Linux upstream or Rockchip's downstream 5.10, and while it exposes a device when executing the ums command in U-Boot, it never works. So disable for now to not mislead users. Additionally, add full fit support in SPL for PX30 Ringneck. Finally, add button support for Puma since its Haikou devkit exposes 4 over GPIO. Signed-off-by: Quentin Schulz <quentin.schulz(a)cherry.de> --- Quentin Schulz (4): rockchip: ringneck-px30: disable broken USB gadget rockchip: ringneck-px30: enable FIT verification in SPL rockchip: px30: imply ARMV8_CRYPTO rockchip: puma-rk3399: add button support arch/arm/mach-rockchip/Kconfig | 2 ++ configs/puma-rk3399_defconfig | 2 ++ configs/ringneck-px30_defconfig | 10 ++++------ 3 files changed, 8 insertions(+), 6 deletions(-) --- base-commit: ae4aaa44977cbe522e9f38f2ac2ac07a784bf867 change-id: 20240613-ringneck-no-gadget-848400043608 Best regards, -- Quentin Schulz <quentin.schulz(a)cherry.de>

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[PATCH RFC v2 00/23] Enable display cpuinfo to get the reset cause
by Anand Moon 16 Jul '24

16 Jul '24

All the Rockchip SoC support reset cauee like POR_RST, GLB_RST, TSADC_RST, WD_RST by reading the clock reset unit register. V2: with the feedback from Jonas Karlman and Quentin Schulz drop the inply for CONFIG_DISPLAY_CPUINFO as it defaault enabled. re-organized the code. As pointed only as of now RK3328, RK3399 supports this feature for POR and RST. On RK3568 and RK3588 SoC it only return POR, for all the case of reboot and poweroff. I have tried to debug this issue, found Clock Reset Unit will bind to rockchip_sysreset to determine the reset cause. if there is ant input on this please share. I have update two new patches from u-boot-radxa, but with no success. [0] https://elixir.bootlin.com/u-boot/v2024.07-rc3/source/drivers/clk/rockchip/… # dm tree # RK3568 clk 5 [ + ] rockchip_rk3588_cru |-- clock-controller@fd7c0000 sysreset 0 [ ] rockchip_sysreset | |-- sysreset reset 0 [ + ] rockchip_reset | `-- reset [1] https://elixir.bootlin.com/u-boot/v2024.07-rc3/source/drivers/clk/rockchip/… # dm tree # RK3588 clk 5 [ + ] rockchip_rk3588_cru |-- clock-controller@fd7c0000 sysreset 0 [ ] rockchip_sysreset | |-- sysreset reset 0 [ ] rockchip_reset | `-- reset Tested on Rock64, Rock-3a, Rock-5b boards. I have update few Rockchip SoC to verify this feature, Only Build to since I dont have the hardware. Thanks -Anand Anand Moon (21): rockchip: RK3328: Read the reset cause from clock reset unit for RK3328 SoC rockchip: RK3328: Enable display cpuinfo support on all boards rockchip: RK3399: Read the reset cause from clock reset unit for RK3399 SoC rockchip: RK3399: Enable display cpuinfo support on all boards arm: rockchip: Enable display cpuinfo to be build with SPL_BUILD rockchip: RK3568: Read the reset cause from clock reset unit for RK356x SoC rockchip: RK3568: Enable display cpuinfo support on all boards rockchip: RK3588: Read the reset cause from clock reset unit for RK3588 SoC rockchip: RK3588: Enable display cpuinfo support on all boards rockchip: PX30: Read the reset cause from clock reset unit for PX30 SoC rockchip: PX30: Enable display cpuinfo support on all boards rockchip: RK3288: Read the reset cause from clock reset unit for RK3288 SoC rockchip: RK3288: Enable display cpuinfo support on all boards rockchip: RK3308: Read the reset cause from clock reset unit for RK3308 SoC rockchip: RK3308: Enable display cpuinfo support on all boards rockchip: RK3368: Read the reset cause from clock reset unit for RK3368 SoC rockchip: RK3368: Enable display cpuinfo support on all boards rockchip: RV1108: Read the reset cause from clock reset unit for RV1108 SoC rockchip: RV1108: Enable display cpuinfo support on all boards rockchip: RV1126: Read the reset cause from clock reset unit for RV1126 SoC rockchip: RV1126: Enable display cpuinfo support on all boards Andy Yan (1): sysreset: rockchip: use dev_read_addr_ptr get cru base Kever Yang (1): sysreset: rockchip: use fst reset for ARM64 SOC arch/arm/include/asm/arch-rockchip/cru.h | 14 +++++++++++++ arch/arm/mach-rockchip/Makefile | 3 --- arch/arm/mach-rockchip/cpu-info.c | 20 +++++++++++++++++++ configs/anbernic-rgxx3-rk3566_defconfig | 1 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/chromebit_mickey_defconfig | 1 - configs/chromebook_bob_defconfig | 1 - configs/chromebook_jerry_defconfig | 1 - configs/chromebook_kevin_defconfig | 1 - configs/chromebook_minnie_defconfig | 1 - configs/chromebook_speedy_defconfig | 1 - configs/coolpi-4b-rk3588s_defconfig | 1 - configs/coolpi-cm5-evb-rk3588_defconfig | 1 - configs/elgin-rv1108_defconfig | 1 - configs/evb-px30_defconfig | 1 - configs/evb-px5_defconfig | 1 - configs/evb-rk3308_defconfig | 1 - configs/evb-rk3328_defconfig | 1 - configs/evb-rk3568_defconfig | 1 - configs/evb-rk3588_defconfig | 1 - configs/evb-rv1108_defconfig | 1 - configs/firefly-px30_defconfig | 1 - configs/geekbox_defconfig | 1 - configs/generic-rk3568_defconfig | 1 - configs/generic-rk3588_defconfig | 1 - configs/jaguar-rk3588_defconfig | 1 - configs/lion-rk3368_defconfig | 1 - configs/lubancat-2-rk3568_defconfig | 1 - configs/nanopc-t6-rk3588_defconfig | 1 - configs/nanopi-r2c-plus-rk3328_defconfig | 1 - configs/nanopi-r2c-rk3328_defconfig | 1 - configs/nanopi-r2s-rk3328_defconfig | 1 - configs/nanopi-r5c-rk3568_defconfig | 1 - configs/nanopi-r5s-rk3568_defconfig | 1 - configs/neu2-io-rv1126_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - configs/odroid-m1-rk3568_defconfig | 1 - configs/orangepi-5-plus-rk3588_defconfig | 1 - configs/orangepi-5-rk3588s_defconfig | 1 - configs/orangepi-r1-plus-lts-rk3328_defconfig | 1 - configs/orangepi-r1-plus-rk3328_defconfig | 1 - configs/pinetab2-rk3566_defconfig | 1 - configs/px30-core-ctouch2-of10-px30_defconfig | 1 - configs/px30-core-ctouch2-px30_defconfig | 1 - configs/px30-core-edimm2.2-px30_defconfig | 1 - configs/quartz64-a-rk3566_defconfig | 1 - configs/quartz64-b-rk3566_defconfig | 1 - configs/quartzpro64-rk3588_defconfig | 1 - configs/radxa-cm3-io-rk3566_defconfig | 1 - configs/radxa-e25-rk3568_defconfig | 1 - configs/ringneck-px30_defconfig | 1 - configs/roc-cc-rk3308_defconfig | 1 - configs/roc-cc-rk3328_defconfig | 1 - configs/rock-3a-rk3568_defconfig | 1 - configs/rock-pi-e-rk3328_defconfig | 1 - configs/rock-pi-s-rk3308_defconfig | 1 - configs/rock5a-rk3588s_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/rock64-rk3328_defconfig | 1 - configs/sheep-rk3368_defconfig | 1 - configs/sonoff-ihost-rv1126_defconfig | 1 - configs/soquartz-blade-rk3566_defconfig | 1 - configs/soquartz-cm4-rk3566_defconfig | 1 - configs/soquartz-model-a-rk3566_defconfig | 1 - configs/toybrick-rk3588_defconfig | 1 - configs/turing-rk1-rk3588_defconfig | 1 - drivers/sysreset/sysreset_rockchip.c | 9 +++++++-- 68 files changed, 41 insertions(+), 69 deletions(-) -- 2.44.0

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