June 2024 - U-Boot

[PATCH v3 0/6] Add Binman code-coverage test to CI
by Simon Glass 15 Jul '24

15 Jul '24

Binman has 100% code coverage to ensure that future changes and refactors do not break existing entry types. This is a critical feature, given that it is relied on to produce images for all sorts of different SoCs and vendors. With the NXP additions the 'binman test -T' step was missed, so the Binman coverage test is currently failing. This series provides a means to close the testing gap. It cannot be applied until the tests are added, which should happen before -next is applied to -master Changes in v3: - Drop the PATH modification altogether Changes in v2: - Add new patch to fix a few typos in toolchain code - Add to azure also (oops) - Add to buildman requirements instead Simon Glass (6): buildman: Add python3-coverage buildman: Add python3-pycryptodome buildman: Fix a few typos in toolchain code buildman: Always use the full path in CROSS_COMPILE u_boot_pylib: Use correct coverage tool within venv CI: Run code-coverage test for Binman .azure-pipelines.yml | 5 ++- .gitlab-ci.yml | 4 +- tools/buildman/bsettings.py | 3 ++ tools/buildman/builder.py | 5 +-- tools/buildman/builderthread.py | 4 +- tools/buildman/cmdline.py | 2 - tools/buildman/control.py | 6 +-- tools/buildman/requirements.txt | 2 + tools/buildman/test.py | 75 +++++++++++++++++++++++++++++++++ tools/buildman/toolchain.py | 24 +++++------ tools/u_boot_pylib/test_util.py | 11 +++-- 11 files changed, 111 insertions(+), 30 deletions(-) -- 2.34.1

3 18

[PATCH] arm: dts: mvebu: Migrate to upstream DT for Synology DS116 (Armada 385) board
by Tony Dinh 15 Jul '24

15 Jul '24

Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the DEFAULT_DEVICE_TREE in DS116 defconfig. Remove current DTS in arch/arm/dts/ directory. Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- arch/arm/dts/Makefile | 1 - arch/arm/dts/armada-385-synology-ds116.dts | 291 --------------------- configs/ds116_defconfig | 3 +- 3 files changed, 2 insertions(+), 293 deletions(-) delete mode 100644 arch/arm/dts/armada-385-synology-ds116.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a5c82ebf7a..75f7e616b4 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -155,7 +155,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-385-atl-x530.dtb \ armada-385-atl-x530DP.dtb \ armada-385-db-88f6820-amc.dtb \ - armada-385-synology-ds116.dtb \ armada-385-thecus-n2350.dtb \ armada-385-turris-omnia.dtb \ armada-388-clearfog.dtb \ diff --git a/arch/arm/dts/armada-385-synology-ds116.dts b/arch/arm/dts/armada-385-synology-ds116.dts deleted file mode 100644 index 82a0373f7f..0000000000 --- a/arch/arm/dts/armada-385-synology-ds116.dts +++ /dev/null @@ -1,291 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) -/* - * Device Tree file for Synology DS116 NAS - * - * Copyright (C) 2017 Willy Tarreau <w(a)1wt.eu> - */ - -/dts-v1/; -#include "armada-385.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Synology DS116"; - compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; /* 1 GB */ - }; - - soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 - MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 - MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 - MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - clock-frequency = <100000>; - - eeprom@57 { - compatible = "atmel,24c64"; - reg = <0x57>; - }; - }; - - serial@12000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; - }; - - serial@12100 { - /* A PIC16F1829 is connected to uart1 at 9600 bps, - * and takes single-character orders : - * "1" : power off // already handled by the poweroff node - * "2" : short beep - * "3" : long beep - * "4" : turn the power LED ON - * "5" : flash the power LED - * "6" : turn the power LED OFF - * "7" : turn the status LED OFF - * "8" : turn the status LED ON - * "9" : flash the status LED - * "A" : flash the motherboard LED (D8) - * "B" : turn the motherboard LED OFF - * "C" : hard reset - */ - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; - status = "okay"; - }; - - poweroff@12100 { - compatible = "synology,power-off"; - reg = <0x12100 0x100>; - clocks = <&coreclk 0>; - }; - - ethernet@70000 { - pinctrl-names = "default"; - phy = <&phy0>; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - status = "okay"; - }; - - mdio@72004 { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - - phy0: ethernet-phy@1 { - reg = <1>; - }; - }; - - sata@a8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sata0_pins>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - target-supply = <&reg_5v_sata0>; - }; - }; - - bm@c8000 { - status = "okay"; - }; - - usb3@f0000 { - usb-phy = <&usb3_0_phy>; - status = "okay"; - }; - - usb3@f8000 { - usb-phy = <&usb3_1_phy>; - status = "okay"; - }; - }; - - bm-bppi { - status = "okay"; - }; - - gpio-fan { - compatible = "gpio-fan"; - gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>, - <&gpio1 17 GPIO_ACTIVE_HIGH>, - <&gpio1 16 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = < 0 0 - 1500 1 - 2500 2 - 3000 3 - 3400 4 - 3700 5 - 3900 6 - 4000 7>; - #cooling-cells = <2>; - }; - - gpio-leds { - compatible = "gpio-leds"; - - /* The green part is on gpio0.20 which is also used by - * sata0, and accesses to SATA disk 0 make it blink so it - * doesn't need to be declared here. - */ - orange { - gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; - label = "ds116:orange:disk"; - default-state = "off"; - }; - }; - }; - - usb3_0_phy: usb3_0_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <&reg_usb3_0_vbus>; - #phy-cells = <0>; - }; - - usb3_1_phy: usb3_1_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <&reg_usb3_1_vbus>; - #phy-cells = <0>; - }; - - reg_usb3_0_vbus: usb3-vbus0 { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus0"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; - }; - - reg_usb3_1_vbus: usb3-vbus1 { - compatible = "regulator-fixed"; - regulator-name = "usb3-vbus1"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci1_vbus_pins>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>; - }; - - reg_sata0: pwr-sata0 { - compatible = "regulator-fixed"; - regulator-name = "pwr_en_sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - enable-active-high; - regulator-boot-on; - gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>; - }; - - reg_5v_sata0: v5-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v5.0-sata0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&reg_sata0>; - }; - - reg_12v_sata0: v12-sata0 { - compatible = "regulator-fixed"; - regulator-name = "v12.0-sata0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - vin-supply = <&reg_sata0>; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>; - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "macronix,mx25l6405d", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <50000000>; - m25p,fast-read; - - /* Note: there is a redboot partition table despite u-boot - * being used. The names presented here are the same as those - * found in the FIS directory. There is also a small device - * tree in the last 64kB of the RedBoot partition which is not - * enumerated. The MAC address and the serial number are listed - * in the "vendor" partition. - */ - partition@0 { - label = "RedBoot"; - reg = <0x00000000 0x000f0000>; - read-only; - }; - - partition@c0000 { - label = "zImage"; - reg = <0x000f0000 0x002d0000>; - }; - - partition@390000 { - label = "rd.gz"; - reg = <0x003c0000 0x00410000>; - }; - - partition@7d0000 { - label = "vendor"; - reg = <0x007d0000 0x00010000>; - read-only; - }; - - partition@7e0000 { - label = "RedBoot config"; - reg = <0x007e0000 0x00010000>; - read-only; - }; - - partition@7f0000 { - label = "FIS directory"; - reg = <0x007f0000 0x00010000>; - read-only; - }; - }; -}; - -&pinctrl { - /* use only one pin for UART1, as mpp20 is used by sata0 */ - uart1_pins: uart-pins-1 { - marvell,pins = "mpp19"; - marvell,function = "ua1"; - }; - - xhci0_vbus_pins: xhci0_vbus_pins { - marvell,pins = "mpp58"; - marvell,function = "gpio"; - }; - xhci1_vbus_pins: xhci1_vbus_pins { - marvell,pins = "mpp59"; - marvell,function = "gpio"; - }; -}; diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig index 1fc7380216..bcc5f00fe5 100644 --- a/configs/ds116_defconfig +++ b/configs/ds116_defconfig @@ -16,7 +16,7 @@ CONFIG_SF_DEFAULT_SPEED=50000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-synology-ds116" +CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-385-synology-ds116" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 @@ -56,6 +56,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(u-boot),7040k(kernel),64k(u-boot-env),-(data)" +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y -- 2.39.2

3 4

[PATCH] arm: sunxi: add support for I2C1 on V3s-based SoCs
by Tobias Schramm 15 Jul '24

15 Jul '24

Previously enabling I2C1 when using a V3s-based SoC had no effect. Set pinmux on PE21 and PE22 to I2C1 function when enabling I2C1 on V3s-based SoCs. Signed-off-by: Tobias Schramm <t.schramm(a)manjaro.org> --- board/sunxi/board.c | 4 ++++ include/sunxi_gpio.h | 1 + 2 files changed, 5 insertions(+) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 1313b01dce..df2faba3e5 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -98,6 +98,10 @@ void i2c_init_board(void) sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1); sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1); clock_twi_onoff(1, 1); +#elif defined(CONFIG_MACH_SUN8I_V3S) + sunxi_gpio_set_cfgpin(SUNXI_GPE(21), SUN8I_V3S_GPE_TWI1); + sunxi_gpio_set_cfgpin(SUNXI_GPE(22), SUN8I_V3S_GPE_TWI1); + clock_twi_onoff(1, 1); #elif defined(CONFIG_MACH_SUN8I) sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1); sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1); diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h index db3742c039..175b13a887 100644 --- a/include/sunxi_gpio.h +++ b/include/sunxi_gpio.h @@ -113,6 +113,7 @@ enum sunxi_gpio_number { #define SUN4I_GPB_TWI1 2 #define SUN5I_GPB_TWI1 2 #define SUN8I_V3S_GPB_TWI0 2 +#define SUN8I_V3S_GPE_TWI1 3 #define SUN4I_GPB_UART0 2 #define SUN5I_GPB_UART0 2 #define SUN8I_GPB_UART2 2 -- 2.30.2

2 1

[PATCH v2 0/2] sunxi, usb: UDC/DM gadget model support
by Sam Edwards 15 Jul '24

15 Jul '24

Happy Thursday, U-Boot list! Here is attempt 2 at making this USB controller driver compatible with DM's gadget model, following what most of the other musb variants do. v2 removes the unwanted printfs in the probe func, per feedback from Marek. I received no other feedback against v1 of this patch. Cheers, Sam Sam Edwards (2): usb: musb-new: sunxi: remove unwanted printfs usb: musb-new: sunxi: make compatible with UDC/DM gadget model drivers/usb/musb-new/sunxi.c | 52 +++++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 21 deletions(-) -- 2.39.2

3 9

[RFC] usb: xhci: Some USB devices fail to initialize
by Elena Popa 14 Jul '24

14 Jul '24

Hello, We've noticed that, at least, on the i.MX8M* platforms, some USB devices (especially USB2.0 sticks) fail to initialize with one of the following errors: - scanning bus usb@38200000 for devices... Device not responding to set address. USB device not accepting new address (error=80000000) - scanning bus usb@38200000 for devices... WARN halted endpoint, queueing URB anyway. Unexpected XHCI event TRB, skipping... (fcf1a5f0 00000000 13000000 01008401) BUG at drivers/usb/host/xhci-ring.c:530/abort_td()! BUG! resetting ... It seems to be a timing problem, since if we enable the debug messages, the USB device initializes correctly. We found out that if we add a small delay of 5 milliseconds at the beginning of the _xhci_submit_control_msg() function from the drivers/usb/host/xhci.c file, all devices initialize properly. Essentially, each control message is delayed by 5ms. We tried a smaller delay (1ms), but it is not enough. static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe, void *buffer, int length, struct devrequest *setup, int root_portnr) { + mdelay(5); struct xhci_ctrl *ctrl = xhci_get_ctrl(udev); int ret = 0; ... } We went a little further, and this delay seems to only be necessary for the requests of type: - USB_REQ_GET_STATUS (for the communication with the root) - USB_REQ_GET_DESCRIPTOR ( for the communication with the device) I don't have too much know-how about the USB, so I would appreciate your opinion related to this issue, and how can we find the root cause. I found several reports on the internet with the same problem on other boards. Maybe some of the USB timing specs are not implemented correctly? U-Boot is maybe sending control messages too aggressively? If you give me some suggestions of where to look, I could do some debugging myself. Of course, since printing debug messages makes the initialization work, complicates the debugging. Thank you, Elena

2 6

[PATCH] part: efi: Rely on a definition to specify the primary GPT position
by Roman Stratiienko 14 Jul '24

14 Jul '24

Use GPT_PRIMARY_PARTITION_TABLE_LBA as the only source for a primary GPT location instead of hardcoding it every time. Sometimes, we need to shift the primary GPT location. Having the location in the single place simplifies such shifting. Signed-off-by: Roman Stratiienko <r.stratiienko(a)gmail.com> --- disk/part_efi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/disk/part_efi.c b/disk/part_efi.c index 4ce9243ef2..b55e251ea1 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -387,7 +387,7 @@ int write_gpt_table(struct blk_desc *desc, gpt_header *gpt_h, gpt_entry *gpt_e) gpt_h->header_crc32 = cpu_to_le32(calc_crc32); /* Write the First GPT to the block right after the Legacy MBR */ - if (blk_dwrite(desc, 1, 1, gpt_h) != 1) + if (blk_dwrite(desc, (lbaint_t)le64_to_cpu(gpt_h->my_lba), 1, gpt_h) != 1) goto err; if (blk_dwrite(desc, le64_to_cpu(gpt_h->partition_entry_lba), @@ -534,7 +534,7 @@ int gpt_fill_pte(struct blk_desc *desc, static uint32_t partition_entries_offset(struct blk_desc *desc) { - uint32_t offset_blks = 2; + uint32_t offset_blks = GPT_PRIMARY_PARTITION_TABLE_LBA + 1; uint32_t __maybe_unused offset_bytes; int __maybe_unused config_offset; @@ -572,8 +572,8 @@ static uint32_t partition_entries_offset(struct blk_desc *desc) * The earliest LBA this can be at is LBA#2 (i.e. right behind * the (protective) MBR and the GPT header. */ - if (offset_blks < 2) - offset_blks = 2; + if (offset_blks < (GPT_PRIMARY_PARTITION_TABLE_LBA + 1)) + offset_blks = GPT_PRIMARY_PARTITION_TABLE_LBA + 1; return offset_blks; } @@ -584,7 +584,7 @@ int gpt_fill_header(struct blk_desc *desc, gpt_header *gpt_h, char *str_guid, gpt_h->signature = cpu_to_le64(GPT_HEADER_SIGNATURE_UBOOT); gpt_h->revision = cpu_to_le32(GPT_HEADER_REVISION_V1); gpt_h->header_size = cpu_to_le32(sizeof(gpt_header)); - gpt_h->my_lba = cpu_to_le64(1); + gpt_h->my_lba = cpu_to_le64(GPT_PRIMARY_PARTITION_TABLE_LBA); gpt_h->alternate_lba = cpu_to_le64(desc->lba - 1); gpt_h->last_usable_lba = cpu_to_le64(desc->lba - 34); gpt_h->partition_entry_lba = -- 2.40.1

2 4

[PATCH] clk: imx8mn: add video clocks support
by Michael Trimarchi 14 Jul '24

14 Jul '24

Add clocks support for the video subsystem. Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- drivers/clk/imx/clk-imx8mn.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 457acb8a40..baac79dd29 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -23,6 +23,7 @@ static const char *arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; static const char *sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_sel", }; static const char *sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; static const char *sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; +static const char *video_pll_bypass_sels[] = {"video_pll", "video_pll_ref_sel", }; static const char *imx8mn_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; @@ -30,6 +31,10 @@ static const char *imx8mn_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll static const char *imx8mn_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_800m", "sys_pll1_400m", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll_out", }; +static const char *imx8mn_disp_pixel_sels[] = {"osc_24m", "video_pll_out", "audio_pll2_out", + "audio_pll1_out", "sys_pll1_800m", "sys_pll2_1000m", + "sys_pll3_out", "clk_ext4", }; + static const char *imx8mn_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m", "sys_pll2_200m", "audio_pll1_out", "video_pll_out", "sys_pll3_out", }; @@ -139,6 +144,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_SYS_PLL3_REF_SEL, imx_clk_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + clk_dm(IMX8MN_VIDEO_PLL1_REF_SEL, + imx_clk_mux("video_pll_ref_sel", base + 0x28, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); clk_dm(IMX8MN_DRAM_PLL, imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", @@ -155,6 +163,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_SYS_PLL3, imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx_1416x_pll)); + clk_dm(IMX8MN_VIDEO_PLL1, + imx_clk_pll14xx("video_pll", "video_pll_ref_sel", + base + 0x28, &imx_1443x_pll)); /* PLL bypass out */ clk_dm(IMX8MN_DRAM_PLL_BYPASS, @@ -183,6 +194,12 @@ static int imx8mn_clk_probe(struct udevice *dev) ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT)); + clk_dm(IMX8MN_VIDEO_PLL1_BYPASS, + imx_clk_mux_flags("video_pll_bypass", base + 0x28, 16, 1, + video_pll_bypass_sels, + ARRAY_SIZE(video_pll_bypass_sels), + CLK_SET_RATE_PARENT)); + /* PLL out gate */ clk_dm(IMX8MN_DRAM_PLL_OUT, imx_clk_gate("dram_pll_out", "dram_pll_bypass", @@ -199,6 +216,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_SYS_PLL3_OUT, imx_clk_gate("sys_pll3_out", "sys_pll3_bypass", base + 0x114, 11)); + clk_dm(IMX8MN_VIDEO_PLL1_OUT, + imx_clk_gate("video_pll_out", "video_pll_bypass", + base + 0x28, 13)); /* SYS PLL fixed output */ clk_dm(IMX8MN_SYS_PLL1_40M, @@ -275,6 +295,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_CLK_USDHC2, imx8m_clk_composite("usdhc2", imx8mn_usdhc2_sels, base + 0xac80)); + + clk_dm(IMX8MN_CLK_DISP_PIXEL, + imx8m_clk_composite("disp_pixel", imx8mn_disp_pixel_sels, base + 0xa500)); clk_dm(IMX8MN_CLK_I2C1, imx8m_clk_composite("i2c1", imx8mn_i2c1_sels, base + 0xad00)); clk_dm(IMX8MN_CLK_I2C2, -- 2.40.1

3 5

[PATCH] eth: asix88179: reset during probe
by Caleb Connolly 13 Jul '24

13 Jul '24

In some cases (consistently in my case with an embedded board) the ethernet controller will time out on the first init but always succeed after reset. Let's reset the controller during probe so we always start with it in a known state, and don't have wait for the first asix_wait_link() to time out. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- I see this behaviour consistently across three Qualcomm platforms that use this controller. --- drivers/usb/eth/asix88179.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c index 7bfd285b3aa4..a0aa5c25e428 100644 --- a/drivers/usb/eth/asix88179.c +++ b/drivers/usb/eth/asix88179.c @@ -628,8 +628,14 @@ static int ax88179_eth_probe(struct udevice *dev) usb_dev = priv->ueth.pusb_dev; priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT]; + ret = asix_basic_reset(&priv->ueth, priv); + if (ret) { + printf("Failed to reset ethernet device\n"); + return ret; + } + /* Get the MAC address */ ret = asix_read_mac(&priv->ueth, pdata->enetaddr); if (ret) return ret; -- 2.45.0

3 5

[RESEND PATCH v2 0/5] net: dwc_eth_qos: Add glue driver for Intel MAC
by Philip Oberfichtner 13 Jul '24

13 Jul '24

This patch series implements the dwc_eth_qos glue driver for Intel SOCs. Before doing that, a few general adaptions to the dwc_eth_qos.c main driver are required. Most notably, the preparation for PCI based driver instances, which do not necessarily use a device tree. This patch series depends on: "net: dwc_eth_qos: mdio: Implement clause 45": https://patchwork.ozlabs.org/project/uboot/patch/20240507094237.168238-1-pr… Changes in V2: Improve coding-style in PATCH 5/5 Philip Oberfichtner (5): x86: provide mb() macro net: dwc_eth_qos: Fix header to be self-contained net: dwc_eth_qos: Adapt probe() for PCI devices net: dwc_eth_qos: Implement bind() for PCI devices net: dwc_eth_qos: Add glue driver for Intel MAC arch/x86/include/asm/io.h | 1 + drivers/net/Kconfig | 7 + drivers/net/Makefile | 1 + drivers/net/dwc_eth_qos.c | 44 ++- drivers/net/dwc_eth_qos.h | 8 +- drivers/net/dwc_eth_qos_imx.c | 1 + drivers/net/dwc_eth_qos_intel.c | 446 +++++++++++++++++++++++++++++ drivers/net/dwc_eth_qos_intel.h | 58 ++++ drivers/net/dwc_eth_qos_qcom.c | 1 + drivers/net/dwc_eth_qos_rockchip.c | 1 + drivers/net/dwc_eth_qos_starfive.c | 1 + drivers/net/dwc_eth_qos_stm32.c | 1 + include/pci_ids.h | 9 + 13 files changed, 575 insertions(+), 4 deletions(-) create mode 100644 drivers/net/dwc_eth_qos_intel.c create mode 100644 drivers/net/dwc_eth_qos_intel.h -- 2.39.2

3 13

[PATCH 0/6] Add Turris 1.x board
by Marek Mojík 13 Jul '24

13 Jul '24

Hello all, this is a continuation of previous work by Pali to add support for the Turris 1.x board. As the patches were based on u-boot v2022.04, a nontrivial rebasing was needed. Some notes: - Some options that are in SD defconfig are disabled in NOR defconfig because over the years u-boot grew and the old NOR defconfig will not fit into NOR memory. - SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We were not able to fix this yet) Marek Mojík (2): powerpc: mpc85xx: use CONFIG_VAL() for SYS_MONITOR_BASE in start.s powerpc: use CONFIG_IS_ENABLED() when checking for DM_SERIAL in include/asm/config.h This contributor prefers not to receive mails (4): board_f: Add support for CONFIG_OF_BOARD_FIXUP for XIP images board: freescale: p1_p2_rdb_pc: Add weak function p1_p2_rdb_pc_fix_fdt_model() for fixing DT model string powerpc: mpc8xxx: Extend find_law() to find_law_by_addr_id() powerpc: Add support for CZ.NIC Turris 1.x routers arch/powerpc/cpu/mpc85xx/Kconfig | 7 + arch/powerpc/cpu/mpc85xx/start.S | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 5 +- arch/powerpc/dts/Makefile | 1 + arch/powerpc/dts/turris1x-u-boot.dtsi | 17 + arch/powerpc/dts/turris1x.dts | 511 ++++++++++++++++++ arch/powerpc/include/asm/config.h | 2 +- arch/powerpc/include/asm/fsl_law.h | 8 +- board/CZ.NIC/turris_1x/Kconfig | 155 ++++++ board/CZ.NIC/turris_1x/MAINTAINERS | 13 + board/CZ.NIC/turris_1x/Makefile | 15 + board/CZ.NIC/turris_1x/ddr.c | 28 + board/CZ.NIC/turris_1x/law.c | 13 + board/CZ.NIC/turris_1x/tlb.c | 143 +++++ board/CZ.NIC/turris_1x/turris_1x.c | 571 ++++++++++++++++++++ board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 13 +- boot/Kconfig | 2 +- common/board_f.c | 8 +- configs/turris_1x_nor_defconfig | 87 +++ configs/turris_1x_sdcard_defconfig | 106 ++++ dts/Kconfig | 6 + include/configs/turris_1x.h | 335 ++++++++++++ 22 files changed, 2041 insertions(+), 7 deletions(-) create mode 100644 arch/powerpc/dts/turris1x-u-boot.dtsi create mode 100644 arch/powerpc/dts/turris1x.dts create mode 100644 board/CZ.NIC/turris_1x/Kconfig create mode 100644 board/CZ.NIC/turris_1x/MAINTAINERS create mode 100644 board/CZ.NIC/turris_1x/Makefile create mode 100644 board/CZ.NIC/turris_1x/ddr.c create mode 100644 board/CZ.NIC/turris_1x/law.c create mode 100644 board/CZ.NIC/turris_1x/tlb.c create mode 100644 board/CZ.NIC/turris_1x/turris_1x.c create mode 100644 configs/turris_1x_nor_defconfig create mode 100644 configs/turris_1x_sdcard_defconfig create mode 100644 include/configs/turris_1x.h -- 2.45.1

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[PATCH v5 0/6] Add DFU and usb boot for TI am62x SK and beagleplay
by Martyn Welch 12 Jul '24

12 Jul '24

This series adds DFU support for TI AM62 SK and beagleplay boards. I have picked this series up from Sjoerd due to time constraints. Since the last revision: * Removed dwc3 mode setting in favour of reinstating forced peripheral mode for usb0 * Use of config fragments for both r5 and a53 DFU configuration to reduce duplication * Typographical improvements to documentation We plan to also submit the dts changes to linux so that those can be dropped again in the near future (hopefully) Changes in v5: - Forcing usb0 into peripheral mode reinstated - Switch to config fragment for a53 DFU configuration - Use existing config fragment for a53 DFU configuration - Typographical corrections Changes in v4: - Add config dependency on SYSCON - Move defines and constants outside out of function scope - Don't force usb0 into peripheral mode - Move R5 dfu config to a config fragment rather then a full defconfig - Don't enable XHCI for the R5 SPL, unneeded Change in v3: - Add dfu via environment rather then config headers - Enable usb nodes in all boot phases - Run savedefconfig to adjust to more recent u-boot Changes in v2: - Switch dwc3 glue to a seperate driver rather then in dwc-generic - Minimize config changes to just DFU configuration - Only enable usb port 0 DFU in SPL - Create a seperate defconfig for R5 Sjoerd Simons (6): usb: dwc3: Add dwc3 glue driver for am62 board: ti: am62x: am62x: include env for DFU arm: dts: k3-am625-sk: Enable usb port in u-boot configs: am62x_evm_*: Enable USB and DFU support beagleplay: Add DFU support doc: board: Add document for DFU boot on am62x SoCs arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 9 ++ arch/arm/dts/k3-am625-sk-u-boot.dtsi | 9 ++ board/beagle/beagleplay/beagleplay.env | 1 + board/ti/am62x/am62x.env | 1 + configs/am62x_a53_usbdfu.config | 29 +++++ configs/am62x_beagleplay_a53_defconfig | 2 + configs/am62x_evm_a53_defconfig | 3 + configs/am62x_r5_usbdfu.config | 28 +++++ doc/board/beagle/am62x_beagleplay.rst | 14 ++- doc/board/ti/am62x_sk.rst | 37 ++++++ drivers/usb/dwc3/Kconfig | 14 +++ drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/dwc3-am62.c | 125 +++++++++++++++++++ 13 files changed, 272 insertions(+), 1 deletion(-) create mode 100644 configs/am62x_a53_usbdfu.config create mode 100644 configs/am62x_r5_usbdfu.config create mode 100644 drivers/usb/dwc3/dwc3-am62.c -- 2.43.0

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[PATCH] omap3: igep0x00: Switch to the I2C driver model
by Javier Martinez Canillas 11 Jul '24

11 Jul '24

From: Javier Martinez Canillas <javierm(a)redhat.com> When building with the igep00x0_defconfig, the following warning is shown: $ make -j $(nproc) ... LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin SYM spl/u-boot-spl.sym CAT spl/u-boot-spl-dtb.bin COPY spl/u-boot-spl.bin MKIMAGE MLO ===================== WARNING ====================== This board does not use CONFIG_DM_I2C (Driver Model for I2C drivers). Please update the board to use CONFIG_DM_I2C before the v2022.04 release. Failure to update by the deadline may result in board removal. See doc/develop/driver-model/migration.rst for more info. ==================================================== The only reason why I2C is enabled for the IGEP boards is that the TWL4030 driver requires it. But both the TWL4034 and the OMAP I2C controller drivers were converted to the driver model by commits daa69ffe3d4d ("drivers: i2c: omap24xx_i2c: adopt omap_i2c driver to driver model") and fb1b7712ad3f power: make most tps drivers and the twl4030 driver compatible with DM_I2C") respectively. So there's no reason anymore to keep using the I2C legacy API and instead the DM_I2C option could just be enabled. Signed-off-by: Javier Martinez Canillas <javierm(a)redhat.com> --- configs/igep00x0_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 87fd2797eace..473891607b0f 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -68,8 +68,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_SPL_DM=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_SYS_MTDPARTS_RUNTIME=y -- 2.45.2

3 2

[PATCH] cmd: add resize for FDT in bootelf
by Maxim Moskalets 11 Jul '24

11 Jul '24

In some FDTs, there is not enough free memory to add nodes, so this operation fails. Signed-off-by: Maxim Moskalets <maximmosk4(a)gmail.com> --- cmd/elf.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cmd/elf.c b/cmd/elf.c index 32b7462f92..673c6c3051 100644 --- a/cmd/elf.c +++ b/cmd/elf.c @@ -68,6 +68,8 @@ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) log_debug("Setting up FDT at 0x%08lx ...\n", fdt_addr); flush(); + fdt_set_totalsize((void *)fdt_addr, + fdt_totalsize(fdt_addr) + CONFIG_SYS_FDT_PAD); if (image_setup_libfdt(&img, (void *)fdt_addr, NULL)) return 1; } -- 2.39.2

4 3

[PATCH] gpt: allow spaces in partition list
by Mikhail Kshevetskiy 11 Jul '24

11 Jul '24

This allows spliting partition list to several lines in environment file ex: -------------------- gpt_partition_list= name=boot1,size=5MiB,start=0x100000; name=boot2,size=5MiB; name=rootfs1,size=70MiB; name=rootfs2,size=70MiB; name=overlay1,size=20MiB; name=overlay2,size=20MiB; name=art,size=4MiB; Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)iopsys.eu> --- cmd/gpt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cmd/gpt.c b/cmd/gpt.c index 7aaf1889a5a..2b29ab98ccc 100644 --- a/cmd/gpt.c +++ b/cmd/gpt.c @@ -117,6 +117,7 @@ static char *extract_val(const char *str, const char *key) k = strsep(&v, "="); if (!k) break; + k += strspn(k, " \t"); if (strcmp(k, key) == 0) { new = strdup(v); break; @@ -151,6 +152,7 @@ static bool found_key(const char *str, const char *key) k = strsep(&s, ","); if (!k) break; + k += strspn(k, " \t"); if (strcmp(k, key) == 0) { result = true; break; -- 2.43.0

5 7

[PATCH v2 0/7] rockchip: Add GMAC support for RK3568 and RK3588
by Jonas Karlman 11 Jul '24

11 Jul '24

This series adds a glue driver, dwc_eth_qos_rockchip, to support GMAC on RK356x and RK3588. rk_gmac_ops used in this series has been ported from mainline linux. Patch 1-3 does some minor cleanup in dwc_eth_qos driver. Patch 4 add glue driver with RK3568 support. Patch 5 add support for RK3588 to glue driver. Patch 6-7 update defconfigs to enable use of the new driver. Changes in v2: - Add comment about ported code intentionally left close to 1:1 with linux - Add lubancat-2-rk3568_defconfig changes - Add rock5b-rk3588_defconfig changes - Collect r-b tags Dependencies: - "rockchip: Port IO-domain driver for RK3568 from linux" [1] dhcp and ping commands has been tested on the followin devices: - RK3566: Quartz64 Model A and SOQuartz on Blade - RK3568: ROCK 3 Model A - RK3588: ROCK 5 Model A This series can also be found at [2]. [1] https://patchwork.ozlabs.org/cover/1823769/ [2] https://github.com/Kwiboo/u-boot-rockchip/commits/rk35xx-gmac-v2 Jonas Karlman (7): net: dwc_eth_qos: Drop unused rx_pkt from eqos_priv net: dwc_eth_qos: Return error code when start fails net: dwc_eth_qos: Stop spam of RX packet not available message net: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568 net: dwc_eth_qos_rockchip: Add support for RK3588 configs: rockchip: Enable ethernet driver on RK356x boards configs: rockchip: Enable ethernet driver on RK3588 boards configs/evb-rk3568_defconfig | 6 +- configs/evb-rk3588_defconfig | 5 +- configs/lubancat-2-rk3568_defconfig | 3 + configs/nanopi-r5s-rk3568_defconfig | 3 + configs/neu6a-io-rk3588_defconfig | 2 - configs/neu6b-io-rk3588_defconfig | 2 - configs/odroid-m1-rk3568_defconfig | 3 + configs/quartz64-a-rk3566_defconfig | 3 + configs/quartz64-b-rk3566_defconfig | 3 + configs/radxa-cm3-io-rk3566_defconfig | 6 +- configs/rock-3a-rk3568_defconfig | 5 +- configs/rock5a-rk3588s_defconfig | 5 +- configs/rock5b-rk3588_defconfig | 3 +- configs/soquartz-blade-rk3566_defconfig | 3 + configs/soquartz-cm4-rk3566_defconfig | 3 + configs/soquartz-model-a-rk3566_defconfig | 3 + drivers/net/Kconfig | 8 + drivers/net/Makefile | 1 + drivers/net/dwc_eth_qos.c | 33 +- drivers/net/dwc_eth_qos.h | 3 +- drivers/net/dwc_eth_qos_rockchip.c | 522 ++++++++++++++++++++++ 21 files changed, 590 insertions(+), 35 deletions(-) create mode 100644 drivers/net/dwc_eth_qos_rockchip.c -- 2.42.0

5 15

[PATCH] sunxi: SPL SPI: add support for the V3s SoC
by Michael Walle 11 Jul '24

11 Jul '24

The V3s is identical regarding register layout, clocks and resets to the sun6i variants. Therefore, we can just add the MACH_SUN8I_V3S to the sun6i compatible ones. SPI boot was tested on a custom board with a Gigadevice GD25Q64 8MiB SPI flash. Signed-off-by: Michael Walle <mwalle(a)kernel.org> --- arch/arm/mach-sunxi/Kconfig | 2 +- arch/arm/mach-sunxi/spl_spi_sunxi.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ddf9414b08e..17666814c52 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1078,7 +1078,7 @@ config SPL_STACK_R_ADDR config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2 + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN8I_V3S || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2 help Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 7acb44f52ae..d7abdc2e401 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -140,7 +140,8 @@ static bool is_sun6i_gen_spi(void) { return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || IS_ENABLED(CONFIG_SUN50I_GEN_H6) || - IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2); + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2) || + IS_ENABLED(CONFIG_MACH_SUN8I_V3S); } static uintptr_t spi0_base_address(void) -- 2.39.2

2 3

[PATCH 0/2] sunxi: v3s: add network support
by Michael Walle 11 Jul '24

11 Jul '24

Add network support for the V3s which only supports the internal PHY. Adding support was straight forward. The emac driver just needs the compatible string and some platform data and the clock driver needs to know the bits for the clock gating as well as the reset bits. This was tested on a custom board. Michael Walle (2): clk: sunxi: add EMAC and EPHY clocks and resets for the V3s SoC net: sun8i_emac: add support for the V3s drivers/clk/sunxi/clk_v3s.c | 6 ++++++ drivers/net/sun8i_emac.c | 7 +++++++ 2 files changed, 13 insertions(+) -- 2.39.2

2 5

[PATCH v6 0/3] Introduce mtdblock device
by Alexey Romanov 11 Jul '24

11 Jul '24

Hello! This series adds support for the mtdblock device, which allows to read/write data block by block. For example, it can now be used for BCB or Android AB command: $ bcb load mtd 0 part_name Tested only on SPI NAND, so bind is made only for SPI NAND drivers. --- Changes V1 -> V2 [1]: - Drop patch [2]. - Add warning if bind NAND mtdblock device. - Move documentation of mtdblock implementation from commit message to the source code. - Remove __maybe_unused from mtd partition functions description. - Use blk_enabled() instead of #ifdefs. Changes V2 -> V3 [2]: - Rebased over [3]. - Rename mtd_bread/bwrite -> mtd_blk_read/write. - Fix GPL-2.0 license short name definiton in headers. - Add empty line after MTD_ENTRY_NUMBERS define. Changes V3 -> V4 [4]: - Fix build warnings: use LBAF printf format string for lbaint_t types. Changes V4 -> V5 [5]: - Rebased over u-boot/master. - Fix build errors and warnings if CONFIG_BLK isn't enabled. - Fix failed tests in cases is mtdblock device isn't binded. Changes V5 -> V6 [6]: - Rebased over u-boot/master. - Fix build errors when CONFIG_MTD isn't enabled. - Use auto blk device devnum generation when call blk_create_devicef (pass -1 parameter instead of dev_seq(dev)). Links: - [1] https://lore.kernel.org/all/20240227100441.1811047-1-avromanov@salutedevice… - [2] https://lore.kernel.org/all/20240227100441.1811047-5-avromanov@salutedevice… - [3] https://lore.kernel.org/u-boot/20240403114047.84030-1-heinrich.schuchardt@c… - [4] https://lore.kernel.org/all/20240404105813.1520732-1-avromanov@salutedevice… - [5] https://lore.kernel.org/all/20240524102920.2631731-1-avromanov@salutedevice… - [6] https://lore.kernel.org/all/20240603155702.1840464-1-avromanov@salutedevice… Alexey Romanov (3): disk: support MTD partitions drivers: introduce mtdblock abstraction spinand: bind mtdblock disk/part.c | 3 +- drivers/block/blk-uclass.c | 1 + drivers/mtd/Kconfig | 1 + drivers/mtd/Makefile | 3 + drivers/mtd/mtdblock.c | 227 ++++++++++++++++++++++++++++++++++++ drivers/mtd/mtdpart.c | 76 ++++++++++++ drivers/mtd/nand/spi/core.c | 20 ++++ include/linux/mtd/mtd.h | 25 ++++ include/part.h | 3 + 9 files changed, 358 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/mtdblock.c -- 2.34.1

2 5

[PATCH 0/4] Add mini configuration support for versal2
by Venkatesh Yadav Abbarapu 11 Jul '24

11 Jul '24

Adding the basic mini u-boot configuration changes for qspi, ospi and emmc. Branch:next Venkatesh Yadav Abbarapu (4): arm64: versal2: Add support for mini configuration arm64: Add versal2 mini qspi support arm64: Add versal2 mini ospi support arm64: config: Add versal2 mini emmc defconfig arch/arm/dts/amd-versal2-mini.dts | 11 ++++ configs/amd_versal2_mini_defconfig | 77 +++++++++++++++++++++++ configs/amd_versal2_mini_emmc_defconfig | 69 ++++++++++++++++++++ configs/amd_versal2_mini_ospi_defconfig | 84 +++++++++++++++++++++++++ configs/amd_versal2_mini_qspi_defconfig | 79 +++++++++++++++++++++++ include/configs/amd_versal2_mini.h | 20 ++++++ 6 files changed, 340 insertions(+) create mode 100644 arch/arm/dts/amd-versal2-mini.dts create mode 100644 configs/amd_versal2_mini_defconfig create mode 100644 configs/amd_versal2_mini_emmc_defconfig create mode 100644 configs/amd_versal2_mini_ospi_defconfig create mode 100644 configs/amd_versal2_mini_qspi_defconfig create mode 100644 include/configs/amd_versal2_mini.h -- 2.17.1

2 5

[PATCH 0/2] env_spi: support overriding spi dev from board code
by Venkatesh Yadav Abbarapu 11 Jul '24

11 Jul '24

This enables boards to choose where to/from the environment should be saved/loaded either QSPI or OSPI based on the bootmode. Venkatesh Yadav Abbarapu (2): env_spi: support overriding spi dev from board code xilinx: versal-net: Handle spi seq number based on boot device board/xilinx/versal-net/board.c | 45 +++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi-nor-core.c | 9 +++++++ env/sf.c | 3 ++- include/spi.h | 2 ++ 4 files changed, 58 insertions(+), 1 deletion(-) -- 2.17.1

2 3

[PATCH] mtd: spi-nor: ids: Add IS25LP01GG flash support
by Prasad Kummari 11 Jul '24

11 Jul '24

Add support for ISSI 128MB flash IS25LP01GG. This part supports 4byte opcodes. It also supports dual and quad read. Signed-off-by: Prasad Kummari <prasad.kummari(a)amd.com> --- drivers/mtd/spi/spi-nor-ids.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 4e83b8c94c..8cad764237 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -242,6 +242,8 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, { INFO("is25lx512", 0x9d5a1a, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB) }, + { INFO("is25lp01gg", 0x9d6021, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_TB) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ /* Macronix */ -- 2.25.1

4 6

[PATCH] arm64: versal2: Remove UARTLITE from defconfig
by Michal Simek 11 Jul '24

11 Jul '24

UARTLITE can be used as console but none is testing it that's why removing it not to pop up there. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- configs/amd_versal2_virt_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig index 2d611f84cd93..b071a480b517 100644 --- a/configs/amd_versal2_virt_defconfig +++ b/configs/amd_versal2_virt_defconfig @@ -119,7 +119,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y -CONFIG_XILINX_UARTLITE=y CONFIG_SOC_DEVICE=y CONFIG_SOC_AMD_VERSAL2=y CONFIG_SPI=y -- 2.43.0

1 1

[PATCH v2 1/2] board: rockchip: Add FriendlyElec NanoPi R6C
by Sebastian Kropatsch 11 Jul '24

11 Jul '24

The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip RK3588s. It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB eMMC storage, one M.2 M-Key connector, one RTL8211F 1GbE and one RTL8125 2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a 30-pin GPIO header as well as multiple buttons and LEDs. Add initial support for this board using the upstream devicetree sources. Tests in U-Boot proper: - Booting from eMMC works - 1GbE Ethernet works using the eth_eqos driver (tested by ping) - 2.5GbE Ethernet works using the eth_rtl8169 driver (tested by ping), but the status LEDs on this specific port currently aren't working - NVMe SSD in M.2 socket does get recognized (tested with `nvme scan` followed by `nvme details`) Kernel commit: d5f1d7437451 ("arm64: dts: rockchip: Add support for NanoPi R6C") Signed-off-by: Sebastian Kropatsch <seb-dev(a)mail.de> Reviewed-by: Quentin Schulz <quentin.schulz(a)cherry.de> --- Changes v1 -> v2: - Add missing 'S' to 'RK3588S' symbols - Add similar board NanoPi R6S (new patch) - Collect r-b tag from Quentin Schulz for patch 1 - Link to v1: https://lore.kernel.org/u-boot/20240605155413.226629-1-seb-dev@mail.de/ Hello! The Ethernet status LEDs which sit directly on the 2.5GbE port using the RTL8169 driver don't light up when connected and I couldn't figure out why. The other port with a RTL8211F has no problems with the LEDs. Have there been occurrences like this in combination with the RTL8125? I'm trying to figure out if this is something that could be solved in the devicetree or if this is a potential driver bug. Secondly, the default active network device in U-Boot is the 1GbE one. I believe it would make sense to make the 2.5GbE device the default active one since this one is labeled "LAN", whereas the 1GbE is labeled "WAN". However, since the 2.5GbE device is PCIe-based, it only shows up in U-Boot proper after using the `pci enum` command (shows up as in gets listed in `net list` and `dm tree`). Do you have any tips on the preferred approach to handle this switch of the default active net device? Is this even a sensible thing to include in U-Boot in your opinion? Thanks for your feedback! Cheers, Sebastian --- arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi | 3 + arch/arm/mach-rockchip/rk3588/Kconfig | 13 +++ board/friendlyelec/nanopi-r6c-rk3588s/Kconfig | 12 +++ .../nanopi-r6c-rk3588s/MAINTAINERS | 7 ++ configs/nanopi-r6c-rk3588s_defconfig | 83 +++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/nanopi-r6c-rk3588s.h | 12 +++ 7 files changed, 131 insertions(+) create mode 100644 arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi create mode 100644 board/friendlyelec/nanopi-r6c-rk3588s/Kconfig create mode 100644 board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS create mode 100644 configs/nanopi-r6c-rk3588s_defconfig create mode 100644 include/configs/nanopi-r6c-rk3588s.h diff --git a/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi new file mode 100644 index 0000000000..853ed58cfe --- /dev/null +++ b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 820e979abb..4b7d751c6f 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -78,6 +78,18 @@ config TARGET_NANOPCT6_RK3588 Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) +config TARGET_NANOPI_R6C_RK3588S + bool "FriendlyElec NanoPi R6C" + select BOARD_LATE_INIT + help + The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip + RK3588s. + It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB + eMMC storage, one M.2 M-Key connector, one RTL8211F 1GbE and one + RTL8125 2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 + Type-A port, a HDMI port, a 30-pin GPIO header as well as some + buttons and LEDs. + config TARGET_NOVA_RK3588 bool "Indiedroid Nova RK3588" select BOARD_LATE_INIT @@ -232,6 +244,7 @@ config TEXT_BASE source "board/edgeble/neural-compute-module-6/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" +source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" source "board/indiedroid/nova/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" diff --git a/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig b/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig new file mode 100644 index 0000000000..2d8acbf62f --- /dev/null +++ b/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig @@ -0,0 +1,12 @@ +if TARGET_NANOPI_R6C_RK3588S + +config SYS_BOARD + default "nanopi-r6c-rk3588s" + +config SYS_VENDOR + default "friendlyelec" + +config SYS_CONFIG_NAME + default "nanopi-r6c-rk3588s" + +endif diff --git a/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS b/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS new file mode 100644 index 0000000000..18d0bd1287 --- /dev/null +++ b/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS @@ -0,0 +1,7 @@ +NANOPI-R6C +M: Sebastian Kropatsch <seb-dev(a)mail.de> +S: Maintained +F: arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi +F: board/friendlyelec/nanopi-r6c-rk3588s +F: configs/nanopi-r6c-rk3588s_defconfig +F: include/configs/nanopi-r6c-rk3588s.h diff --git a/configs/nanopi-r6c-rk3588s_defconfig b/configs/nanopi-r6c-rk3588s_defconfig new file mode 100644 index 0000000000..f8d2d67bd3 --- /dev/null +++ b/configs/nanopi-r6c-rk3588s_defconfig @@ -0,0 +1,83 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6c" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_NANOPI_R6C_RK3588S=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index cfbf641f49..a3d9837dda 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -123,6 +123,7 @@ List of mainline supported Rockchip boards: - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) + - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s) - Generic RK3588S/RK3588 (generic-rk3588) - Indiedroid Nova (nova-rk3588s) - Pine64 QuartzPro64 (quartzpro64-rk3588) diff --git a/include/configs/nanopi-r6c-rk3588s.h b/include/configs/nanopi-r6c-rk3588s.h new file mode 100644 index 0000000000..2b57d60eb5 --- /dev/null +++ b/include/configs/nanopi-r6c-rk3588s.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __NANOPI_R6C_RK3588S_H +#define __NANOPI_R6C_RK3588S_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __NANOPI_R6C_RK3588S_H */ -- 2.45.2

3 5

[PATCH 0/6] power: pmic: sunxi: consolidate AXP SPL drivers
by Andre Przywara 11 Jul '24

11 Jul '24

Hi, this is the first series in an attempt to clean up the X-Powers AXP PMIC drivers used by the SPL for sunxi boards. So far we have a separate driver file for each AXP variant, but the code was largely the same, just differing by the regulator ranges. This adds a new generic driver, which reads the regulator description from an array of structs. This is similar to how the DM AXP driver used for U-Boot proper works, but is simplified, since we won't need the full feature set for the SPL, and we want to keep the code size small. To help bisect-ability, and to simplify review, each of the simpler AXP drivers covered by this approach is handled in a separate patch. We just convert the AXP313, AXP305, AXP717 for now, and on the way add support for the AXP707, just because it's now very easy, and we will need it soon enough. The other AXP SPL drivers are more complex, and support more regulators, but my hunch is that we really just need the DC/DC converters in the SPL. However I need to prove and test this, so I will convert the other AXP chips later. Please have a look and comment whether the approach in general is a good idea. Cheers, Andre Andre Przywara (6): power: pmic: sunxi: only build AXP drivers for SPL power: pmic: sunxi: introduce generic SPL AXP DC/DC driver power: pmic: sunxi: replace AXP717 SPL driver power: pmic: sunxi: use generic AXP SPL driver for AXP313 power: pmic: sunxi: use generic AXP SPL driver for AXP305 power: pmic: sunxi: add AXP707 support drivers/power/Makefile | 8 +- drivers/power/axp305.c | 82 ------------------ drivers/power/axp313.c | 133 ----------------------------- drivers/power/axp717.c | 92 -------------------- drivers/power/axp_spl.c | 184 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 189 insertions(+), 310 deletions(-) delete mode 100644 drivers/power/axp305.c delete mode 100644 drivers/power/axp313.c delete mode 100644 drivers/power/axp717.c create mode 100644 drivers/power/axp_spl.c -- 2.35.8

3 10

[PATCH] include/fastboot.h: add missing types.h include
by Caleb Connolly 09 Jul '24

09 Jul '24

Fixes a compile error when building with only the TCP fastboot implementation. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- include/fastboot.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/fastboot.h b/include/fastboot.h index 2ca1b907a54d..b106d6177493 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -11,8 +11,10 @@ */ #ifndef _FASTBOOT_H_ #define _FASTBOOT_H_ +#include <linux/types.h> + #define FASTBOOT_VERSION "0.4" /* * Signals u-boot fastboot code to send multiple responses by -- 2.45.0

3 3

[PATCH 0/3] qcom: rpmh core and regulator support
by Caleb Connolly 09 Jul '24

09 Jul '24

This series introduces support for the RPMh (Resource Power Manager (hardened)) co-processor and associated regulator driver found on most modern Qualcomm platforms (since ~2017). Even though most regulators are controlled via SPMI, the specific regions on the PMICs for controlling the regulators are restricted and can't be accessed by the Applications Processor (AP/HLOS). Instead, these resources are proxied via the RPMh where they can be voted on by multiple subsystems (Linux, the modem, and the other DSPs). This is done for security (to protect clocks, power domains, and regulators that are specifically relevant for the trustzone) as well as to simplify the management of shared peripherals and to allow for handover of peripherals like the USB controller. For U-Boot, our main concern is the regulators. Since all regulators on the system are controlled via the RPMh, it is necessary to support it to enable USB VBUS on some platforms, and may be needed for other peripherals in the future. Communicating with the RPMh additional requires accessing the cmd-db shared memory region, this contains key/value maps to determine the address of specific resources on the RPMh. Introduce support for the cmd-db, the RPMh framework, and some of the regulators that are necessary to enable USB VBUS on the RB5 development board. These drivers were originally taken from Linux, however they have been heavily modified and simplified for U-Boot. Since the original Linux drivers contained heavy optimisations related to multithreading and asynchronous probing, as well as support for idle and suspend states which we don't need to deal with here. The U-Boot version of the driver supports a single TCS and always requests a response from the RPMh, since we don't need to worry about having multiple transactions in flight at once. --- Caleb Connolly (3): linux/bitmap.h: add bitmap_empty helper soc: qcom: rpmh and cmd-db drivers power: regulator: add qcom-rpmh-regulator drivers/power/regulator/Kconfig | 8 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/qcom-rpmh-regulator.c | 534 ++++++++++++++++++++++ drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/qcom/Kconfig | 25 ++ drivers/soc/qcom/Makefile | 4 + drivers/soc/qcom/cmd-db.c | 246 ++++++++++ drivers/soc/qcom/rpmh-internal.h | 141 ++++++ drivers/soc/qcom/rpmh-rsc.c | 619 ++++++++++++++++++++++++++ drivers/soc/qcom/rpmh.c | 110 +++++ include/linux/bitmap.h | 8 + include/soc/qcom/cmd-db.h | 42 ++ include/soc/qcom/rpmh.h | 29 ++ include/soc/qcom/tcs.h | 78 ++++ 15 files changed, 1847 insertions(+) --- change-id: 20240611-b4-qcom-rpmh-fcfd32ac2940 base-commit: 65134a67bca5e11415e93262e530b1c91fee154f // Caleb (they/them)

3 9

[PATCH v4 00/14] mediatek: cumulative trivial fix for OF_UPSTREAM support
by Christian Marangi 09 Jul '24

09 Jul '24

This is an initial series that have all the initial trivial fixes required for usage of OF_UPSTREAM for the mediatek SoC This also contains the pcie-gen3 driver and the required tphy support driver to make it work. Subsequent series will follow with conversion of the mtk-clk to permit usage of OF_UPSTREAM and upstream clk ID. MT7981, MT7986 and MT7988 migration to upstream clock ID is complete and working on MT7623. Series CI tested with PR [0] [0] https://github.com/u-boot/u-boot/pull/590 Changes v4: - Fix compilation error catched by Azure CI - Rework serial with legacy platform Changes v3: - Fix copy paste error in gpio-controller (dev instead of parent) - Rebase on top of next Changes v2: - Add mt7986 and mt7988 apmixed trivial PATCH - Make phy for pcie optional (it is for mt7988) - Fix broken mmc patch Christian Marangi (13): phy: phy-mtk-tphy: add support for phy type switch spi: mtk_spim: add support for upstream mediatek,spi-ipm compatible net: mediatek: handle alternative name for pn_swap property i2c: mediatek: add support for optional arb and pmic clock serial: mediatek: add support for bus clock and enable it serial: mediatek: add special handling for highspeed and linux compat mmc: mediatek: add support for upstream linux clock and property clk: mediatek: mt7981: support alternative compatible for fixed-plls pinctrl: mediatek: add support for gpio-controller property in root node pinctrl: mediatek: mt7981: init device before relocation pci: mediatek: make pcie-phy optional for gen3 clk: mediatek: mt7988: support alternative compatible for fixed-plls clk: mediatek: mt7986: support alternative compatible for fixed-plls John Crispin (1): pci: mediatek: add PCIe controller support for filogic silicon drivers/clk/mediatek/clk-mt7981.c | 1 + drivers/clk/mediatek/clk-mt7986.c | 1 + drivers/clk/mediatek/clk-mt7988.c | 1 + drivers/i2c/mtk_i2c.c | 30 ++ drivers/mmc/mtk-sd.c | 35 +- drivers/net/mtk_eth.c | 4 +- drivers/pci/Kconfig | 7 + drivers/pci/Makefile | 1 + drivers/pci/pcie_mediatek_gen3.c | 384 ++++++++++++++++++ drivers/phy/Kconfig | 2 + drivers/phy/phy-mtk-tphy.c | 80 ++++ drivers/pinctrl/mediatek/pinctrl-mt7981.c | 1 + drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 10 + drivers/serial/serial_mtk.c | 20 +- drivers/spi/mtk_spim.c | 45 +- 15 files changed, 614 insertions(+), 8 deletions(-) create mode 100644 drivers/pci/pcie_mediatek_gen3.c -- 2.45.1

2 15

[PATCH] mvebu: armada-8k: respect CONFIG_DISTRO_DEFAULTS
by Robert Marko 08 Jul '24

08 Jul '24

Currently, Armada 8k config header is setting boot devices and including <config_distro_bootcmd.h> regardless of the CONFIG_DISTRO_DEFAULTS being enabled or not, thus populating the environment for distro boot even on devices that have no need for it. So, lets simply respect the value of CONFIG_DISTRO_DEFAULTS. Signed-off-by: Robert Marko <robimarko(a)gmail.com> --- include/configs/mvebu_armada-8k.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 239a09763a..6fedbe9ee3 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -30,7 +30,7 @@ /* * PCI configuration */ - +#ifdef CONFIG_DISTRO_DEFAULTS #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ @@ -40,6 +40,9 @@ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> +#else +#define BOOTENV +#endif #define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x6d00000\0" \ -- 2.45.2

2 1

[PATCH u-boot-marvell 00/16] Turris Omnia DDR training changes
by Marek Behún 08 Jul '24

08 Jul '24

Hi Stefan, this is v2 of the series adds some changes to DDR3 training for Armada 38x and Turris Omnia. I also put one unrelated patch (Fix ethernet PHY reset gpio FDT fixup) here. It depends on stuff in Tom's next branch. Marek Marek Behún (16): arm: mvebu: turris_omnia: Disable ext4 write support in defconfig ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if we won't print anything ddr: marvell: a38x: debug: Remove unused variables ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if needed, and make them static ddr: marvell: a38x: debug: Allow compiling with immutable debug settings to reduce binary size arm: mvebu: turris_omnia: Enable immutable debug settings in DDR3 training by default arm: mvebu: turris_omnia: Fix ethernet PHY reset gpio FDT fixup arm: mvebu: turris_omnia: Implement EEPROM layout for the 'eeprom' command arm: mvebu: turris_omnia: Enable the 'eeprom' command arm: mvebu: turris_omnia: Extend EEPROM info structure arm: mvebu: turris_omnia: Read DDR speed from EEPROM ddr: marvell: a38x: Import old DDR training code from 2017 version of U-Boot ddr: marvell: a38x: old: Fix some compiler warning of the old code ddr: marvell: a38x: old: Backport immutable debug settings arm: mvebu: a38x: Add optional support for using old DDR3 training code arm: mvebu: turris_omnia: Support old DDR3 training arch/arm/mach-mvebu/Kconfig | 15 + arch/arm/mach-mvebu/include/mach/cpu.h | 1 + arch/arm/mach-mvebu/spl.c | 37 +- board/CZ.NIC/turris_omnia/Makefile | 2 + board/CZ.NIC/turris_omnia/eeprom.c | 190 ++ board/CZ.NIC/turris_omnia/old_ddr3_training.c | 63 + board/CZ.NIC/turris_omnia/turris_omnia.c | 199 +- configs/turris_omnia_defconfig | 6 +- drivers/ddr/marvell/a38x/Makefile | 2 + drivers/ddr/marvell/a38x/ddr3_debug.c | 30 +- drivers/ddr/marvell/a38x/ddr3_init.c | 3 +- drivers/ddr/marvell/a38x/ddr3_init.h | 43 +- drivers/ddr/marvell/a38x/old/Makefile | 29 + drivers/ddr/marvell/a38x/old/ddr3_a38x.c | 737 +++++ drivers/ddr/marvell/a38x/old/ddr3_a38x.h | 93 + .../marvell/a38x/old/ddr3_a38x_mc_static.h | 226 ++ .../ddr/marvell/a38x/old/ddr3_a38x_topology.h | 22 + .../ddr/marvell/a38x/old/ddr3_a38x_training.c | 39 + drivers/ddr/marvell/a38x/old/ddr3_debug.c | 1546 ++++++++++ .../marvell/a38x/old/ddr3_hws_hw_training.c | 147 + .../marvell/a38x/old/ddr3_hws_hw_training.h | 49 + .../a38x/old/ddr3_hws_hw_training_def.h | 464 +++ .../marvell/a38x/old/ddr3_hws_sil_training.h | 17 + drivers/ddr/marvell/a38x/old/ddr3_init.c | 769 +++++ drivers/ddr/marvell/a38x/old/ddr3_init.h | 405 +++ .../ddr/marvell/a38x/old/ddr3_logging_def.h | 101 + .../marvell/a38x/old/ddr3_patterns_64bit.h | 924 ++++++ .../ddr/marvell/a38x/old/ddr3_topology_def.h | 76 + drivers/ddr/marvell/a38x/old/ddr3_training.c | 2650 +++++++++++++++++ .../ddr/marvell/a38x/old/ddr3_training_bist.c | 288 ++ .../a38x/old/ddr3_training_centralization.c | 711 +++++ .../ddr/marvell/a38x/old/ddr3_training_db.c | 651 ++++ .../marvell/a38x/old/ddr3_training_hw_algo.c | 685 +++++ .../marvell/a38x/old/ddr3_training_hw_algo.h | 14 + .../ddr/marvell/a38x/old/ddr3_training_ip.h | 178 ++ .../marvell/a38x/old/ddr3_training_ip_bist.h | 54 + .../old/ddr3_training_ip_centralization.h | 15 + .../marvell/a38x/old/ddr3_training_ip_db.h | 34 + .../marvell/a38x/old/ddr3_training_ip_def.h | 173 ++ .../a38x/old/ddr3_training_ip_engine.c | 1354 +++++++++ .../a38x/old/ddr3_training_ip_engine.h | 85 + .../marvell/a38x/old/ddr3_training_ip_flow.h | 349 +++ .../marvell/a38x/old/ddr3_training_ip_pbs.h | 41 + .../a38x/old/ddr3_training_ip_prv_if.h | 107 + .../a38x/old/ddr3_training_ip_static.h | 31 + .../marvell/a38x/old/ddr3_training_leveling.c | 1836 ++++++++++++ .../marvell/a38x/old/ddr3_training_leveling.h | 17 + .../ddr/marvell/a38x/old/ddr3_training_pbs.c | 994 +++++++ .../marvell/a38x/old/ddr3_training_static.c | 537 ++++ .../ddr/marvell/a38x/old/ddr_topology_def.h | 121 + .../ddr/marvell/a38x/old/ddr_training_ip_db.h | 16 + .../marvell/a38x/old/glue_symbol_renames.h | 247 ++ drivers/ddr/marvell/a38x/old/silicon_if.h | 17 + drivers/ddr/marvell/a38x/old/xor.h | 92 + 54 files changed, 17475 insertions(+), 57 deletions(-) create mode 100644 board/CZ.NIC/turris_omnia/eeprom.c create mode 100644 board/CZ.NIC/turris_omnia/old_ddr3_training.c create mode 100644 drivers/ddr/marvell/a38x/old/Makefile create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_a38x.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_a38x.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_a38x_mc_static.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_a38x_topology.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_a38x_training.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_debug.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_hws_hw_training.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_hws_hw_training.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_hws_hw_training_def.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_hws_sil_training.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_init.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_init.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_logging_def.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_patterns_64bit.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_topology_def.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_bist.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_centralization.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_db.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_hw_algo.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_hw_algo.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_bist.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_centralization.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_db.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_def.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_engine.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_engine.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_flow.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_pbs.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_prv_if.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_ip_static.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_leveling.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_leveling.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_pbs.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_training_static.c create mode 100644 drivers/ddr/marvell/a38x/old/ddr_topology_def.h create mode 100644 drivers/ddr/marvell/a38x/old/ddr_training_ip_db.h create mode 100644 drivers/ddr/marvell/a38x/old/glue_symbol_renames.h create mode 100644 drivers/ddr/marvell/a38x/old/silicon_if.h create mode 100644 drivers/ddr/marvell/a38x/old/xor.h -- 2.44.2

2 17

[PATCH] arm: dts: mvebu: Update DTS for Thecus N2350 board
by Tony Dinh 08 Jul '24

08 Jul '24

- Change the spi-max-frequency to 50000000 (50 Mhz). According to the data sheet[1], the MX25L3205D max frequency is 86 Mhz. Using 50 Mhz in the DTS to ensure u-boot is consistent with what Linux kernel expected. - Update GPIO fan to conform to the latest DT binding. [1] MX25L3205D-MX25L1605D-MX25L6405D-Macronix-MX25L3205DM2I-12G-datasheet.pdf Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- arch/arm/dts/armada-385-thecus-n2350.dts | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/armada-385-thecus-n2350.dts b/arch/arm/dts/armada-385-thecus-n2350.dts index 253cf01130..fdaa444e51 100644 --- a/arch/arm/dts/armada-385-thecus-n2350.dts +++ b/arch/arm/dts/armada-385-thecus-n2350.dts @@ -2,7 +2,7 @@ /* * Device Tree file for Thecus N2350 board * - * Copyright (C) 2018-2023 Tony Dinh <mibodhi(a)gmail.com> + * Copyright (C) 2018-2024 Tony Dinh <mibodhi(a)gmail.com> * Copyright (C) 2018 Manuel Jung <manuel.jung(a)hotmail.com> */ @@ -143,9 +143,9 @@ fan { compatible = "gpio-fan"; gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; - gpio-fan,speed-map = < 0 0 - 600 1 - 3000 2 >; + gpio-fan,speed-map = < 0 0>, + <600 1>, + <3000 2 >; pinctrl-0 = <&pmx_fan>; pinctrl-names = "default"; }; @@ -415,7 +415,7 @@ compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <108000000>; + spi-max-frequency = <50000000>; spi-cpha; partition@0 { -- 2.39.2

3 3

[PATCH] arm: mvebu: env_sf_get_env_addr() missing check for CONFIG_ENV_IS_IN_SPI_FLASH
by Tony Dinh 08 Jul '24

08 Jul '24

The CONFIG_ENV_OFFSET is undefined if boot device is UART (CONFIG_MVEBU_SPL_BOOT_DEVICE_UART), or envs are not stored on flash (CONFIG_ENV_IS_NOWHERE). Check for CONFIG_ENV_IS_IN_SPI_FLASH as the first condition to determine whether env_sf_get_env_addr() should be provided. Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- arch/arm/mach-mvebu/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 7c62a5dbb6..6dd729ae6e 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -36,7 +36,7 @@ static const struct mbus_win windows[] = { }; /* SPI0 CS0 Flash of size MBUS_SPI_SIZE is mapped to address MBUS_SPI_BASE */ -#if CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \ +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \ CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= MBUS_SPI_SIZE void *env_sf_get_env_addr(void) { -- 2.39.2

2 1

[PATCH v3] configs: add mvebu_espressobin_ultra-88f3720_defconfig
by Benjamin Schneider 08 Jul '24

08 Jul '24

Add support for a Marvell Armada 3720 device variant Signed-off-by: Benjamin Schneider <ben(a)bens.haus> --- Changes in v3: - Fix typo in MAINTAINERS board/Marvell/mvebu_armada-37xx/MAINTAINERS | 5 + .../mvebu_espressobin_ultra-88f3720_defconfig | 106 ++++++++++++++++++ 2 files changed, 111 insertions(+) create mode 100644 configs/mvebu_espressobin_ultra-88f3720_defconfig diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS index 9b0afeef10..e96499e161 100644 --- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS +++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS @@ -9,3 +9,8 @@ ESPRESSOBin BOARD M: Konstantin Porotchkin <kostap(a)marvell.com> S: Maintained F: configs/mvebu_espressobin-88f3720_defconfig + +ESPRESSOBin Ultra BOARD +M: Ben Schneider <ben(a)bens.haus> +S: Maintained +F: configs/mvebu_espressobin_ultra-88f3720_defconfig diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig new file mode 100644 index 0000000000..c6ffaaabca --- /dev/null +++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig @@ -0,0 +1,106 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_TEXT_BASE=0x00000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x3F0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-3720-espressobin-ultra" +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_PCI=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_DISTRO_DEFAULTS=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SYS_MAXARGS=32 +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SATA=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_BTRFS=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y +CONFIG_CMD_FS_UUID=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_PCI=y +CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_DM_DSA=y +CONFIG_MV88E6XXX=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_NVME_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DEFAULT_ENV_IS_RW=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_WATCHDOG_AUTOSTART is not set +CONFIG_WDT=y +CONFIG_WDT_ARMADA_37XX=y +CONFIG_SHA1=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF8563=y +# CONFIG_DEBUG_UART=y +# CONFIG_DEBUG_UART_BASE=0xd0012000 +# CONFIG_DEBUG_UART_CLOCK=25804800 +# CONFIG_DEBUG_UART_SHIFT=2 +# CONFIG_DEBUG_UART_ANNOUNCE=y -- 2.45.1

2 1

[PATCH] board: sifive: unmatched: remove extra space in fdtfile value
by Andreas Schwab 08 Jul '24

08 Jul '24

Fixes: 44a792c994 ("riscv: sifive: unmatched: migrate to text environment") Signed-off-by: Andreas Schwab <schwab(a)suse.de> --- board/sifive/unmatched/unmatched.env | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/sifive/unmatched/unmatched.env b/board/sifive/unmatched/unmatched.env index 0f1e5a7174..34425dc9ef 100644 --- a/board/sifive/unmatched/unmatched.env +++ b/board/sifive/unmatched/unmatched.env @@ -16,4 +16,4 @@ partitions= name=loader1,start=17K,size=1M,type=${type_guid_gpt_loader1}; name=loader2,size=4MB,type=${type_guid_gpt_loader2}; name=system,size=-,bootable,type=${type_guid_gpt_system}; -fdtfile= CONFIG_DEFAULT_FDT_FILE +fdtfile=CONFIG_DEFAULT_FDT_FILE -- 2.45.2 -- Andreas Schwab, SUSE Labs, schwab(a)suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."

2 1

[PATCH 1/1] riscv: semihosting: correct alignment
by Heinrich Schuchardt 08 Jul '24

08 Jul '24

Commit 7400d34ba992 ("riscv: semihosting: replace inline assembly with assembly file") reduced the alignment of function smh_trap(). As described in the "RISC-V Semihosting" specification [1] the ssli, ebreak, and srai statements must all reside in the same memory page. [1] RISC-V Semihosting, Version 0.4, 12th June 2024 https://github.com/riscv-non-isa/riscv-semihosting Fixes: 7400d34ba992 ("riscv: semihosting: replace inline assembly with assembly file") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- arch/riscv/lib/semihosting.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/lib/semihosting.S b/arch/riscv/lib/semihosting.S index c0c571bce9b..49bb419a962 100644 --- a/arch/riscv/lib/semihosting.S +++ b/arch/riscv/lib/semihosting.S @@ -8,7 +8,7 @@ .pushsection .text.smh_trap, "ax" ENTRY(smh_trap) - .align 2 + .align 4 /* keep slli, ebreak, srai in same page */ .option push .option norvc /* semihosting sequence must be 32-bit wide */ -- 2.45.1

2 1

[PATCH 1/1] riscv: add RISC-V fields to bdinfo command
by Heinrich Schuchardt 08 Jul '24

08 Jul '24

The firmware invoking main U-Boot uses * a0 to pass the boot hart * a1 to pass a device-tree Let the bdinfo command print this information, e.g. boot hart = 0x000000000000001b firmware fdt= 0x0000000087e00000 The firmware fdt field will only be printed if it is non-zero. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- arch/riscv/lib/Makefile | 1 + arch/riscv/lib/bdinfo.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 arch/riscv/lib/bdinfo.c diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 9a05b662fd6..65dc49f6fa5 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -26,6 +26,7 @@ obj-y += setjmp.o obj-$(CONFIG_$(SPL_)SMP) += smp.o obj-$(CONFIG_SPL_BUILD) += spl.o obj-y += fdt_fixup.o +obj-$(CONFIG_$(SPL)CMD_BDI) += bdinfo.o # For building EFI apps CFLAGS_NON_EFI := -fstack-protector-strong diff --git a/arch/riscv/lib/bdinfo.c b/arch/riscv/lib/bdinfo.c new file mode 100644 index 00000000000..7734e51d670 --- /dev/null +++ b/arch/riscv/lib/bdinfo.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * RISC-V-specific information for the 'bdinfo' command + */ + +#include <init.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +void arch_print_bdinfo(void) +{ + bdinfo_print_num_l("boot hart", gd->arch.boot_hart); + + if (gd->arch.firmware_fdt_addr) + bdinfo_print_num_ll("firmware fdt", + (long long)gd->arch.firmware_fdt_addr); +} -- 2.43.0

2 1

[PATCH v5 0/6] Introduce UBI block device
by Alexey Romanov 08 Jul '24

08 Jul '24

Hello! This series adds support for the UBI block device, which allows to read/write data block by block. For example, it can now be used for BCB or Android AB command: $ bcb load ubi 0 part_name Tested only on SPI NAND, so bind is made only for SPI NAND drivers. Can be used with mtdblock device [1]. --- Changes V1 -> V2 [2]: - Rebased over mtdblock v2 patchset [3]. - Compile UBI partitions support only if CONFIG_BLK option is enabled. Changes V2 -> V3 [4]: - Fix build warnings: use LBAF printf format string for lbaint_t types. Changes V3 -> V4 [5]: - Rebased over u-boot/master. - Fix build errors and warnings if CONFIG_BLK isn't enabled. - Fix failed tests in cases is ubiblock device isn't binded. Changes V4 -> V5 [6]: - Rebased over u-boot/master. - Fix build errors when CONFIG_MTD and CONFIG_MTD_UBI isn't enabled. - Use auto blk device devnum generation when call blk_create_devicef (pass -1 parameter instead of dev_seq(dev)). Links: [1] https://lore.kernel.org/all/20240227100441.1811047-1-avromanov@salutedevice… [2] https://lore.kernel.org/all/20240306134906.1179285-1-avromanov@salutedevice… [3] https://lore.kernel.org/all/20240307130726.1582487-1-avromanov@salutedevice… [4] https://lore.kernel.org/all/20240325144148.3738195-1-avromanov@salutedevice… [5] https://lore.kernel.org/all/20240524111319.3512009-1-avromanov@salutedevice… [6] https://lore.kernel.org/all/20240603155740.1840571-1-avromanov@salutedevice… Alexey Romanov (6): ubi: allow to read from volume with offset ubi: allow to write to volume with offset drivers: introduce UBI block abstraction disk: don't try search for partition type if already set disk: support UBI partitions spinand: bind UBI block cmd/ubi.c | 78 ++++++++++++++++++++-- disk/part.c | 7 ++ drivers/block/blk-uclass.c | 1 + drivers/mtd/nand/spi/core.c | 9 ++- drivers/mtd/ubi/Makefile | 1 + drivers/mtd/ubi/block.c | 130 ++++++++++++++++++++++++++++++++++++ drivers/mtd/ubi/part.c | 99 +++++++++++++++++++++++++++ env/ubi.c | 16 ++--- include/part.h | 2 + include/ubi_uboot.h | 13 +++- 10 files changed, 339 insertions(+), 17 deletions(-) create mode 100644 drivers/mtd/ubi/block.c create mode 100644 drivers/mtd/ubi/part.c -- 2.34.1

1 7

[PATCH] spl: fit: List DTOs applied by SPL in U-Boot control DT
by Marek Vasut 08 Jul '24

08 Jul '24

Insert /u-boot,<dto-name> = <index> property into the U-Boot control DT during SPL DTO application process. This can be used by user to inspect which DTOs got applied by the SPL and in which order from running U-Boot. Example: ``` u-boot=> fdt addr $fdtcontroladdr && fdt list / Working FDT set to aee9aeb0 / { u-boot,fdt-dto-imx8mp-dhcom-pdk3-overlay-rev100 = <0x00000005>; u-boot,fdt-dto-imx8mp-dhcom-som-overlay-rev100 = <0x00000004>; u-boot,fdt-dto-imx8mp-dhcom-pdk-overlay-eth2xfast = <0x00000003>; u-boot,fdt-dto-imx8mp-dhcom-som-overlay-eth2xfast = <0x00000002>; ... ``` Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Manoj Sai <abbaraju.manojsai(a)amarulasolutions.com> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Suniel Mahesh <sunil(a)amarulasolutions.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)dh-electronics.com Cc: u-boot(a)lists.denx.de --- common/spl/spl_fit.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 988125be008..261b72419b1 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -363,6 +363,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, { struct spl_image_info image_info; int node, ret = 0, index = 0; + char dtoname[256]; /* * Use the address following the image as target address for the @@ -450,7 +451,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, /* Make room in FDT for changes from the overlay */ ret = fdt_increase_size(spl_image->fdt_addr, - image_info.size); + image_info.size + strlen(str)); if (ret < 0) break; @@ -464,6 +465,26 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, debug("%s: DT overlay %s applied\n", __func__, fit_get_name(ctx->fit, node, NULL)); + + /* + * Insert /u-boot,<dto-name> = <index> property into + * the U-Boot control DT. This can be used by user + * to inspect which DTOs got applied by the SPL from + * a running U-Boot. + */ + snprintf(dtoname, sizeof(dtoname), "u-boot,%s", str); + ret = fdt_setprop_u32(spl_image->fdt_addr, 0, dtoname, + index); + if (!ret) { + /* + * The DTO itself was applied, do not treat the + * insertion of /u-boot,<dto-name> as an error + * so the system can possibly boot somehow. + */ + debug("%s: DT overlay %s name not inserted into / node (%d)\n", + __func__, + fit_get_name(ctx->fit, node, NULL), ret); + } } free(tmpbuffer); if (ret) -- 2.43.0

3 9

[PATCH] Revert "zlib: Port fix for CVE-2016-9841 to U-Boot"
by Tom Rini 08 Jul '24

08 Jul '24

In commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot") Michal brings in (correctly) the upstream fix for CVE-2016-9841. However, when upstream was fixing this issue they also removed a necessary optimization for some CPU classes as part of simplifying the code. This in turn leads to boot failures on the platforms as they now take too long to decompress images and so the watchdog sees the system as stuck. The long term fix here is as Christophe has posted, which is to restore the optimization. Given the nearness of the release, what I do here is very similar, result wise, but less so, code wise. This is a revert of Michal's commit _except_ we only allow for post-increment in the code, thus keeping the CVE resolved. For the next release this commit shall be reverted and then Christophe's patch applied. This largely reverts commit 340fdf1303dce7e5f53ddd981471836058ff23ef. Reported-by: Christophe Leroy <christophe.leroy(a)csgroup.eu> Signed-off-by: Tom Rini <trini(a)konsulko.com> -- Cc: Christophe Leroy <christophe.leroy(a)csgroup.eu> Cc: Michal Simek <michal.simek(a)amd.com> --- lib/zlib/inffast.c | 117 +++++++++++++++++++++++++++++---------------- 1 file changed, 75 insertions(+), 42 deletions(-) diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c index 5e2a65ad4d27..c271d85ea191 100644 --- a/lib/zlib/inffast.c +++ b/lib/zlib/inffast.c @@ -1,5 +1,5 @@ /* inffast.c -- fast decoding - * Copyright (C) 1995-2008, 2010, 2013 Mark Adler + * Copyright (C) 1995-2004 Mark Adler * For conditions of distribution and use, see copyright notice in zlib.h */ @@ -12,6 +12,12 @@ #ifndef ASMINF +/* + * Only allow post-increment in order to resolve CVE-2016-9841 + */ +# define OFF 0 +# define PUP(a) *(a)++ + /* Decode literal, length, and distance codes and write out the resulting literal and match bytes until either not enough input or output is @@ -47,13 +53,12 @@ requires strm->avail_out >= 258 for each loop to avoid checking for output space. */ -void ZLIB_INTERNAL inflate_fast(strm, start) -z_streamp strm; -unsigned start; /* inflate()'s starting value for strm->avail_out */ +void inflate_fast(z_streamp strm, unsigned start) +/* start: inflate()'s starting value for strm->avail_out */ { struct inflate_state FAR *state; - z_const unsigned char FAR *in; /* local strm->next_in */ - z_const unsigned char FAR *last; /* have enough input while in < last */ + unsigned char FAR *in; /* local strm->next_in */ + unsigned char FAR *last; /* while in < last, enough input available */ unsigned char FAR *out; /* local strm->next_out */ unsigned char FAR *beg; /* inflate()'s initial strm->next_out */ unsigned char FAR *end; /* while out < end, enough space available */ @@ -79,7 +84,7 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ /* copy state to local variables */ state = (struct inflate_state FAR *)strm->state; - in = strm->next_in; + in = strm->next_in - OFF; last = in + (strm->avail_in - 5); if (in > last && strm->avail_in > 5) { /* @@ -89,7 +94,7 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ strm->avail_in = 0xffffffff - (uintptr_t)in; last = in + (strm->avail_in - 5); } - out = strm->next_out; + out = strm->next_out - OFF; beg = out - (start - strm->avail_out); end = out + (strm->avail_out - 257); #ifdef INFLATE_STRICT @@ -110,9 +115,9 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ input data or output space */ do { if (bits < 15) { - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; } here = lcode[hold & lmask]; @@ -125,14 +130,14 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ? "inflate: literal '%c'\n" : "inflate: literal 0x%02x\n", here.val)); - *out++ = (unsigned char)(here.val); + PUP(out) = (unsigned char)(here.val); } else if (op & 16) { /* length base */ len = (unsigned)(here.val); op &= 15; /* number of extra bits */ if (op) { if (bits < op) { - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; } len += (unsigned)hold & ((1U << op) - 1); @@ -141,9 +146,9 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ } Tracevv((stderr, "inflate: length %u\n", len)); if (bits < 15) { - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; } here = dcode[hold & dmask]; @@ -156,10 +161,10 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ dist = (unsigned)(here.val); op &= 15; /* number of extra bits */ if (bits < op) { - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; if (bits < op) { - hold += (unsigned long)(*in++) << bits; + hold += (unsigned long)(PUP(in)) << bits; bits += 8; } } @@ -178,18 +183,17 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ if (dist > op) { /* see if copy from window */ op = dist - op; /* distance back in window */ if (op > whave) { - strm->msg = - (char *)"invalid distance too far back"; + strm->msg = (char *)"invalid distance too far back"; state->mode = BAD; break; } - from = window; + from = window - OFF; if (wnext == 0) { /* very common case */ from += wsize - op; if (op < len) { /* some from window */ len -= op; do { - *out++ = *from++; + PUP(out) = PUP(from); } while (--op); from = out - dist; /* rest from output */ } @@ -200,14 +204,14 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ if (op < len) { /* some from end of window */ len -= op; do { - *out++ = *from++; + PUP(out) = PUP(from); } while (--op); - from = window; + from = window - OFF; if (wnext < len) { /* some from start of window */ op = wnext; len -= op; do { - *out++ = *from++; + PUP(out) = PUP(from); } while (--op); from = out - dist; /* rest from output */ } @@ -218,36 +222,65 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ if (op < len) { /* some from window */ len -= op; do { - *out++ = *from++; + PUP(out) = PUP(from); } while (--op); from = out - dist; /* rest from output */ } } while (len > 2) { - *out++ = *from++; - *out++ = *from++; - *out++ = *from++; + PUP(out) = PUP(from); + PUP(out) = PUP(from); + PUP(out) = PUP(from); len -= 3; } if (len) { - *out++ = *from++; + PUP(out) = PUP(from); if (len > 1) - *out++ = *from++; + PUP(out) = PUP(from); } } else { + unsigned short *sout; + unsigned long loops; + from = out - dist; /* copy direct from output */ - do { /* minimum length is three */ - *out++ = *from++; - *out++ = *from++; - *out++ = *from++; - len -= 3; - } while (len > 2); - if (len) { - *out++ = *from++; - if (len > 1) - *out++ = *from++; - } + /* minimum length is three */ + /* Align out addr */ + if (!((long)(out - 1 + OFF) & 1)) { + PUP(out) = PUP(from); + len--; + } + sout = (unsigned short *)(out - OFF); + if (dist > 2 ) { + unsigned short *sfrom; + + sfrom = (unsigned short *)(from - OFF); + loops = len >> 1; + do + PUP(sout) = get_unaligned(++sfrom); + while (--loops); + out = (unsigned char *)sout + OFF; + from = (unsigned char *)sfrom + OFF; + } else { /* dist == 1 or dist == 2 */ + unsigned short pat16; + + pat16 = *(sout-2+2*OFF); + if (dist == 1) +#if defined(__BIG_ENDIAN) + pat16 = (pat16 & 0xff) | ((pat16 & 0xff ) << 8); +#elif defined(__LITTLE_ENDIAN) + pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00 ) >> 8); +#else +#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined +#endif + loops = len >> 1; + do + PUP(sout) = pat16; + while (--loops); + out = (unsigned char *)sout + OFF; + } + if (len & 1) + PUP(out) = PUP(from); } } else if ((op & 64) == 0) { /* 2nd level distance code */ @@ -283,8 +316,8 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ hold &= (1U << bits) - 1; /* update state and return */ - strm->next_in = in; - strm->next_out = out; + strm->next_in = in + OFF; + strm->next_out = out + OFF; strm->avail_in = (unsigned)(in < last ? 5 + (last - in) : 5 - (in - last)); strm->avail_out = (unsigned)(out < end ? 257 + (end - out) : 257 - (out - end)); -- 2.34.1

3 2

[PATCH 2/3] rockchip: fix wrong PCI range address in rk3568 dtsi
by ETIENNE DUBLE 08 Jul '24

08 Jul '24

One of the PCI ranges was wrong in this device tree. When testing with a FriendlyElec Nanopi R5C board, the 2nd ethernet interface (labelled "wan") was not working in u-boot because of that. With the correct value (found in FriendlyElec's downstream u-boot repository), this 2nd ethernet interface now works. Signed-off-by: Etienne Dublé <etienne.duble(a)imag.fr> --- dts/upstream/src/arm64/rockchip/rk3568.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dts/upstream/src/arm64/rockchip/rk3568.dtsi b/dts/upstream/src/arm64/rockchip/rk3568.dtsi index f1be76a54c..06aac034ca 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3568.dtsi @@ -150,7 +150,7 @@ <0x0 0xf0000000 0x0 0x00100000>; ranges = <0x01000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x00100000>, <0x02000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0x01e00000>, - <0x03000000 0x0 0x40000000 0x3 0x80000000 0x0 0x40000000>; + <0x03000000 0x0 0x80000000 0x3 0x80000000 0x0 0x40000000>; reg-names = "dbi", "apb", "config"; resets = <&cru SRST_PCIE30X2_POWERUP>; reset-names = "pipe"; -- 2.34.1

5 8

[PATCH] zlib: Fix big performance regression
by Christophe Leroy 08 Jul '24

08 Jul '24

Commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot") brings a big performance regression in inflate_fast(), which leads to watchdog timer reset on powerpc 8xx. It looks like that commit does more than what it describe, it especially removed an important optimisation that was doing copies using halfwords instead of bytes. That unexpected change multiplied by almost 4 the time spent in inflate_fast() and increased by 40% the overall time needed to uncompress linux kernel image. So partially revert that commit but keep post incrementation as it is the initial purpose of said commit. Fixes: 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot") Signed-off-by: Christophe Leroy <christophe.leroy(a)csgroup.eu> --- lib/zlib/inffast.c | 51 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 40 insertions(+), 11 deletions(-) diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c index 5e2a65ad4d..c4b1d12258 100644 --- a/lib/zlib/inffast.c +++ b/lib/zlib/inffast.c @@ -236,18 +236,47 @@ unsigned start; /* inflate()'s starting value for strm->avail_out */ } } else { + unsigned short *sout; + unsigned long loops; + from = out - dist; /* copy direct from output */ - do { /* minimum length is three */ - *out++ = *from++; - *out++ = *from++; - *out++ = *from++; - len -= 3; - } while (len > 2); - if (len) { - *out++ = *from++; - if (len > 1) - *out++ = *from++; - } + /* minimum length is three */ + /* Align out addr */ + if (!((long)(out - 1) & 1)) { + *out++ = *from++; + len--; + } + sout = (unsigned short *)out; + if (dist > 2 ) { + unsigned short *sfrom; + + sfrom = (unsigned short *)from; + loops = len >> 1; + do + *sout++ = get_unaligned(++sfrom); + while (--loops); + out = (unsigned char *)sout; + from = (unsigned char *)sfrom; + } else { /* dist == 1 or dist == 2 */ + unsigned short pat16; + + pat16 = *(sout-2); + if (dist == 1) +#if defined(__BIG_ENDIAN) + pat16 = (pat16 & 0xff) | ((pat16 & 0xff ) << 8); +#elif defined(__LITTLE_ENDIAN) + pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00 ) >> 8); +#else +#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined +#endif + loops = len >> 1; + do + *sout++ = pat16; + while (--loops); + out = (unsigned char *)sout; + } + if (len & 1) + *out++ = *from++; } } else if ((op & 64) == 0) { /* 2nd level distance code */ -- 2.44.0

3 11

[PATCH 1/2] ARM: imx: Enable PCA953x driver on DH i.MX8MP DHCOM PDK2
by Marek Vasut 06 Jul '24

06 Jul '24

Enable PCA953x GPIO expander driver in DH i.MX8MP DHCOM PDK2 configuration. The PCA9539 GPIO expander is used on production DH i.MX8MP DHCOM SoM rev.200. This is already enabled in DH i.MX8MP DHCOM PDK3 configuration so align the two configurations. Fixes: 9de599ec3d59 ("arm64: dts: imx8mp: Update i.MX8MP DHCOM SoM DT to production rev.200") Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: u-boot(a)dh-electronics.com Cc: u-boot(a)lists.denx.de --- configs/imx8mp_dhcom_pdk2_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index cbc608dd912..79b3e96c8e3 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -182,6 +182,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y +CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y # CONFIG_INPUT is not set CONFIG_LED=y -- 2.43.0

2 2

[PATCH] ARM: imx: Enable cat and xxd commands on DH i.MX8M Plus DHCOM
by Marek Vasut 06 Jul '24

06 Jul '24

Enable 'cat' command to print file from filesystem to stdout. Enable 'xxd' command to hexdump file from filesystem to stdout. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: u-boot(a)dh-electronics.com Cc: u-boot(a)lists.denx.de --- configs/imx8mp_dhcom_pdk2_defconfig | 2 ++ configs/imx8mp_dhcom_pdk3_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 7fde7ad769d..79b3e96c8e3 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -108,6 +108,8 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CAT=y +CONFIG_CMD_XXD=y CONFIG_CMD_DHCP=y CONFIG_CMD_DHCP6=y CONFIG_CMD_TFTPPUT=y diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index 7b3dae504f8..6c7ee7ba3fa 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -111,6 +111,8 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CAT=y +CONFIG_CMD_XXD=y CONFIG_CMD_DHCP=y CONFIG_CMD_DHCP6=y CONFIG_CMD_TFTPPUT=y -- 2.43.0

2 1

[PATCH v3] ARM: imx: verdin-imx8mm: Set CAN oscillator frequency based on model
by Marek Vasut 06 Jul '24

06 Jul '24

The older i.MX8M Mini Verdin SoMs may came with 20 MHz SPI CAN controller oscillator, the newer SoMs always use 40 MHz oscillator. Handle both by overriding the oscillator frequency just before booting the kernel. These are the known variants with 20 MHz oscillator: - 0055, V1.1A, V1.1B, V1.1C and V1.1D, use a 20MHz oscillator - 0059, V1.1A and V1.1B, use a 20MHz oscillator Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Francesco Dolcini <francesco.dolcini(a)toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Cc: Martyn Welch <martyn.welch(a)collabora.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: u-boot(a)lists.denx.de --- V2: - Update the comment in conditional statement - Update ver_assembly check for 0055 rev.A/B/C/D V3: - Update code comment per upstream feedback --- board/toradex/verdin-imx8mm/verdin-imx8mm.c | 29 +++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 55c02653da6..59cc28f652f 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -125,6 +125,35 @@ int board_phys_sdram_size(phys_size_t *size) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { + const char *canoscpath = "/oscillator"; + int freq = 40000000; /* 40 MHz is used on most variants */ + int canoscoff, ret; + + canoscoff = fdt_path_offset(blob, canoscpath); + if (canoscoff < 0) /* No CAN oscillator found. */ + goto exit; + + /* + * The following "prodid" (PID4 in Toradex naming) use + * a 20MHz CAN oscillator: + * - 0055, V1.1A, V1.1B, V1.1C and V1.1D + * - 0059, V1.1A and V1.1B + */ + if ((tdx_hw_tag.ver_major == 1 && tdx_hw_tag.ver_minor == 1) && + ((tdx_hw_tag.prodid == VERDIN_IMX8MMQ_IT && + tdx_hw_tag.ver_assembly <= 1) || /* 0059 rev. A or B */ + (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT && + tdx_hw_tag.ver_assembly <= 3))) { /* 0055 rev. A/B/C/D */ + freq = 20000000; + } + + ret = fdt_setprop_u32(blob, canoscoff, "clock-frequency", freq); + if (ret < 0) { + printf("Failed to set CAN oscillator clock-frequency, ret=%d\n", + ret); + } + +exit: return ft_common_board_setup(blob, bd); } #endif -- 2.43.0

3 2

[PATCH] watchdog: mpc8xxx: Fix timer value
by Christophe Leroy 06 Jul '24

06 Jul '24

Timer value is a 16 bits calculated from the wanted timeout and the system clock. On powerpc/8xx, a timeout of 2s gives a value which is over U16_MAX so U16_MAX shall be used. But the calculation is casted to u16 so at the end the result is 63770 instead of 128906. So the timer gets loaded with 63770 instead of 65535. It is not a big difference in that case, but lets make the code correct and cast to u32 instead of u16. Fixes: 26e8ebcd7cb7 ("watchdog: mpc8xxx: Make it generic") Signed-off-by: Christophe Leroy <christophe.leroy(a)csgroup.eu> --- drivers/watchdog/mpc8xxx_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c index f28636ca90..67e687a364 100644 --- a/drivers/watchdog/mpc8xxx_wdt.c +++ b/drivers/watchdog/mpc8xxx_wdt.c @@ -44,7 +44,7 @@ static int mpc8xxx_wdt_start(struct udevice *dev, u64 timeout, ulong flags) struct mpc8xxx_wdt_priv *priv = dev_get_priv(dev); const char *mode = env_get("watchdog_mode"); ulong prescaler = dev_get_driver_data(dev); - u16 swtc = min_t(u16, timeout * get_board_sys_clk() / 1000 / prescaler, U16_MAX); + u16 swtc = min_t(u32, timeout * get_board_sys_clk() / 1000 / prescaler, U16_MAX); u32 val; mpc8xxx_wdt_reset(dev); -- 2.44.0

2 1

[PATCH] pci_ids: fix i225 unprogrammed value
by Marjolaine Amate 06 Jul '24

06 Jul '24

This patch fixes the I225 hardware default value at 0x15FD meaning empty flash image or the NVM configuration loading failed Signed-off-by: Marjolaine Amate <marjolaine.amate(a)odyssee-systemes.fr> --- include/pci_ids.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/pci_ids.h b/include/pci_ids.h index f1886c3a75..b2136d3e9d 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -2710,7 +2710,7 @@ #define PCI_DEVICE_ID_INTEL_I211_COPPER 0x1539 #define PCI_DEVICE_ID_INTEL_I210_COPPER_FLASHLESS 0x157b #define PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS 0x157c -#define PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED 0x15dF +#define PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED 0x15fd #define PCI_DEVICE_ID_INTEL_I225_IT 0x0d9f #define PCI_DEVICE_ID_INTEL_80960_RP 0x1960 #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 -- 2.43.0

2 1

[PATCH] e1000: add support for i226
by Marjolaine Amate 06 Jul '24

06 Jul '24

This patch adds support for Intel Foxville I226 devices LM,V,I,K in e1000 driver. Signed-off-by: Marjolaine Amate <marjolaine.amate(a)odyssee-systemes.fr> --- drivers/net/e1000.c | 18 ++++++++++++++++++ drivers/net/e1000.h | 2 ++ include/pci_ids.h | 7 +++++++ 3 files changed, 27 insertions(+) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 4e7ba66677..f9803b92b0 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -108,6 +108,12 @@ static struct pci_device_id e1000_supported[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_SPT) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_SPT) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I226_K) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I226_LMVP) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I226_LM) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I226_V) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I226_IT) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I226_UNPROGRAMMED) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_UNPROGRAMMED) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I211_UNPROGRAMMED) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_COPPER) }, @@ -1569,6 +1575,12 @@ e1000_set_mac_type(struct e1000_hw *hw) case E1000_DEV_ID_ICH8_IGP_M: hw->mac_type = e1000_ich8lan; break; + case PCI_DEVICE_ID_INTEL_I226_K: + case PCI_DEVICE_ID_INTEL_I226_LMVP: + case PCI_DEVICE_ID_INTEL_I226_LM: + case PCI_DEVICE_ID_INTEL_I226_V: + case PCI_DEVICE_ID_INTEL_I226_IT: + case PCI_DEVICE_ID_INTEL_I226_UNPROGRAMMED: case PCI_DEVICE_ID_INTEL_I210_UNPROGRAMMED: case PCI_DEVICE_ID_INTEL_I211_UNPROGRAMMED: case PCI_DEVICE_ID_INTEL_I210_COPPER: @@ -4843,6 +4855,8 @@ static int e1000_set_phy_type (struct e1000_hw *hw) hw->phy_type = e1000_phy_igb; break; case I225_I_PHY_ID: + case I226_LM_PHY_ID: + case I226_I_PHY_ID: hw->phy_type = e1000_phy_igc; break; /* Fall Through */ @@ -4954,6 +4968,10 @@ e1000_detect_gig_phy(struct e1000_hw *hw) match = true; if (hw->phy_id == I225_I_PHY_ID) match = true; + if (hw->phy_id == I226_LM_PHY_ID) + match = true; + if (hw->phy_id == I226_I_PHY_ID) + match = true; break; default: DEBUGOUT("Invalid MAC type %d\n", hw->mac_type); diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index e1311126a3..aa649328f5 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -2421,7 +2421,9 @@ struct e1000_hw { #define BME1000_E_PHY_ID 0x01410CB0 #define I210_I_PHY_ID 0x01410C00 +#define I226_LM_PHY_ID 0x67C9DC10 #define I225_I_PHY_ID 0x67C9DCC0 +#define I226_I_PHY_ID 0x67C9DCD0 /* Miscellaneous PHY bit definitions. */ #define PHY_PREAMBLE 0xFFFFFFFF diff --git a/include/pci_ids.h b/include/pci_ids.h index f1886c3a75..834ec926b5 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -2701,6 +2701,11 @@ #define PCI_DEVICE_ID_INTEL_82441 0x1237 #define PCI_DEVICE_ID_INTEL_82380FB 0x124b #define PCI_DEVICE_ID_INTEL_82439 0x1250 +#define PCI_DEVICE_ID_INTEL_I226_LM 0x125b +#define PCI_DEVICE_ID_INTEL_I226_V 0x125c +#define PCI_DEVICE_ID_INTEL_I226_IT 0x125d +#define PCI_DEVICE_ID_INTEL_I221_V 0x125e +#define PCI_DEVICE_ID_INTEL_I226_UNPROGRAMMED 0x125f #define PCI_DEVICE_ID_INTEL_I210_UNPROGRAMMED 0x1531 #define PCI_DEVICE_ID_INTEL_I211_UNPROGRAMMED 0x1532 #define PCI_DEVICE_ID_INTEL_I210_COPPER 0x1533 @@ -2930,6 +2935,7 @@ #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2 0x2db1 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2 0x2db2 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2 0x2db3 +#define PCI_DEVICE_ID_INTEL_I226_K 0x3102 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 #define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429 #define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a @@ -3001,6 +3007,7 @@ #define PCI_DEVICE_ID_INTEL_UNC_R3QPI1 0x3c45 #define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX 0x3ce0 #define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f +#define PCI_DEVICE_ID_INTEL_I226_LMVP 0x5503 #define PCI_DEVICE_ID_INTEL_5100_16 0x65f0 #define PCI_DEVICE_ID_INTEL_5100_19 0x65f3 #define PCI_DEVICE_ID_INTEL_5100_21 0x65f5 -- 2.43.0

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[PATCH] configs: am64x_evm_a53_defconfig: Enable I2C GPIO drivers
by Roger Quadros 06 Jul '24

06 Jul '24

The board has the TCA9554 I2C GPIO expander chip for expansion board presence detection logic. Enable the relevant I2C GPIO drivers. Signed-off-by: Roger Quadros <rogerq(a)kernel.org> --- configs/am64x_evm_a53_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index e000549d6d0..8411a29a2ae 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -103,7 +103,11 @@ CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DM_PCA953X=y +CONFIG_SPL_DM_PCA953X=y CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y --- base-commit: fe2ce09a0753634543c32cafe85eb87a625f76ca change-id: 20240623-for-2023-10-am64-nand-cdec8003ca80 Best regards, -- Roger Quadros <rogerq(a)kernel.org>

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[PATCH] doc: board: phytec: phycore-am6: Describe UART based boot
by Wadim Egorov 06 Jul '24

06 Jul '24

Describe how to boot via UART. Signed-off-by: Wadim Egorov <w.egorov(a)phytec.de> --- For next --- doc/board/phytec/phycore-am62x.rst | 17 +++++++++++++++++ doc/board/phytec/phycore-am64x.rst | 19 +++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst index a615d01474e..5f02a9db5f8 100644 --- a/doc/board/phytec/phycore-am62x.rst +++ b/doc/board/phytec/phycore-am62x.rst @@ -118,6 +118,23 @@ tiboot3.bin, tispl.bin and u-boot.img are stored on the uSD card. fatload mmc 1 ${loadaddr} u-boot.img mtd write ospi.u-boot ${loadaddr} 0 ${filesize} +UART based boot +--------------- + +To boot the board via UART, set the switches to UART mode and connect to the +micro USB port labeled as "Debug UART". After power-on the build artifacts +needs to be uploaded one by one with a tool like sz. + +Example bash script sequence for running on a Linux host PC feeding all boot +artifacts needed to the device. Assuming the host uses /dev/ttyUSB0 as +the main domain serial port: + +.. prompt:: bash $ + + stty -F /dev/ttyUSB0 115200 + sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + sb --ymodem tispl.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + sb --ymodem u-boot.img > /dev/ttyUSB0 < /dev/ttyUSB0 Boot Modes ---------- diff --git a/doc/board/phytec/phycore-am64x.rst b/doc/board/phytec/phycore-am64x.rst index 189da179534..e7f8656e1bf 100644 --- a/doc/board/phytec/phycore-am64x.rst +++ b/doc/board/phytec/phycore-am64x.rst @@ -119,6 +119,25 @@ tiboot3.bin, tispl.bin and u-boot.img are stored on the uSD card. fatload mmc 1 ${loadaddr} u-boot.img mtd write ospi.u-boot ${loadaddr} 0 ${filesize} +UART based boot +--------------- + +To boot the board via UART, set the switches to UART mode and connect to the +micro USB port labeled as "Debug UART". After power-on the build artifacts +needs to be uploaded one by one with a tool like sz. + +Example bash script sequence for running on a Linux host PC feeding all boot +artifacts needed to the device. Assuming the host uses /dev/ttyUSB0 as +the main domain serial port: + +.. prompt:: bash $ + + stty -F /dev/ttyUSB0 115200 + sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + # Resend tiboot3.bin a 2nd time due to ErrataID:i2331 + sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + sb --ymodem tispl.bin > /dev/ttyUSB0 < /dev/ttyUSB0 + sb --ymodem u-boot.img > /dev/ttyUSB0 < /dev/ttyUSB0 Boot Modes ---------- -- 2.34.1

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[PATCH v5] cmd: bootm: add ELF file support
by Maxim Moskalets 06 Jul '24

06 Jul '24

Some operating systems (e.g. seL4) and embedded applications are ELF images. It is convenient to use FIT-images to implement trusted boot. Added "elf" image type for booting using bootm command. Signed-off-by: Maxim Moskalets <maximmosk4(a)gmail.com> --- v5: used func from lib/elf.c to avoid dependency form CLI --- boot/bootm_os.c | 18 ++++++++++++++++++ boot/image-fit.c | 3 ++- boot/image.c | 5 ++++- cmd/Kconfig | 7 +++++++ include/image.h | 1 + 5 files changed, 32 insertions(+), 2 deletions(-) diff --git a/boot/bootm_os.c b/boot/bootm_os.c index 15297ddb53..6a6621706f 100644 --- a/boot/bootm_os.c +++ b/boot/bootm_os.c @@ -8,6 +8,7 @@ #include <bootstage.h> #include <cpu_func.h> #include <efi_loader.h> +#include <elf.h> #include <env.h> #include <fdt_support.h> #include <image.h> @@ -394,6 +395,20 @@ static int do_bootm_qnxelf(int flag, struct bootm_info *bmi) } #endif +#if defined(CONFIG_BOOTM_ELF) +static int do_bootm_elf(int flag, struct bootm_info *bmi) +{ + Bootelf_flags flags = { .autostart = 1 }; + + if (flag != BOOTM_STATE_OS_GO) + return 0; + + bootelf(bmi->images->ep, flags, 0, NULL); + + return 1; +} +#endif + #ifdef CONFIG_INTEGRITY static int do_bootm_integrity(int flag, struct bootm_info *bmi) { @@ -535,6 +550,9 @@ static boot_os_fn *boot_os[] = { #ifdef CONFIG_BOOTM_EFI [IH_OS_EFI] = do_bootm_efi, #endif +#if defined(CONFIG_BOOTM_ELF) + [IH_OS_ELF] = do_bootm_elf, +#endif }; /* Allow for arch specific config before we boot */ diff --git a/boot/image-fit.c b/boot/image-fit.c index f6464bcf62..9253f81fff 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -2175,7 +2175,8 @@ int fit_image_load(struct bootm_headers *images, ulong addr, fit_image_check_os(fit, noffset, IH_OS_TEE) || fit_image_check_os(fit, noffset, IH_OS_OPENRTOS) || fit_image_check_os(fit, noffset, IH_OS_EFI) || - fit_image_check_os(fit, noffset, IH_OS_VXWORKS); + fit_image_check_os(fit, noffset, IH_OS_VXWORKS) || + fit_image_check_os(fit, noffset, IH_OS_ELF); /* * If either of the checks fail, we should report an error, but diff --git a/boot/image.c b/boot/image.c index fc774d605d..abac254e02 100644 --- a/boot/image.c +++ b/boot/image.c @@ -130,7 +130,10 @@ static const table_entry_t uimage_os[] = { { IH_OS_OPENRTOS, "openrtos", "OpenRTOS", }, #endif { IH_OS_OPENSBI, "opensbi", "RISC-V OpenSBI", }, - { IH_OS_EFI, "efi", "EFI Firmware" }, + { IH_OS_EFI, "efi", "EFI Firmware" }, +#ifdef CONFIG_BOOTM_ELF + { IH_OS_ELF, "elf", "ELF Image" }, +#endif { -1, "", "", }, }; diff --git a/cmd/Kconfig b/cmd/Kconfig index a2dee34689..613baa106e 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -321,6 +321,13 @@ config BOOTM_EFI help Support booting UEFI FIT images via the bootm command. +config BOOTM_ELF + bool "Support booting ELF images" + depends on CMD_BOOTM && LIB_ELF + default n + help + Support booting ELF images via the bootm command. + config CMD_BOOTZ bool "bootz" help diff --git a/include/image.h b/include/image.h index c5b288f62b..9daaee15cd 100644 --- a/include/image.h +++ b/include/image.h @@ -100,6 +100,7 @@ enum { IH_OS_TEE, /* Trusted Execution Environment */ IH_OS_OPENSBI, /* RISC-V OpenSBI */ IH_OS_EFI, /* EFI Firmware (e.g. GRUB2) */ + IH_OS_ELF, /* ELF Image (e.g. seL4) */ IH_OS_COUNT, }; -- 2.39.2

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[PATCH] mkimage: Allow 'auto-conf' signing of scripts
by Alexander Dahl 06 Jul '24

06 Jul '24

U-Boot configured for verified boot with the "required" option set to "conf" also checks scripts put in FIT images for a valid signature, and refuses to source and run such a script if the signature for the configuration is bad or missing. Such a script could not be packaged before, because mkimage failed like this: % tools/mkimage -T script -C none -d tmp/my.scr -f auto-conf -k tmp -g dev -o sha256,rsa4096 my.uimg Failed to find any images for configuration 'conf-1/signature' tools/mkimage Can't add hashes to FIT blob: -1 Error: Bad parameters for FIT image type This is especially unfortunate if LEGACY_IMAGE_FORMAT is disabled as recommended. Listing the script configuration in a "sign-images" subnode instead, would have added even more complexity to the already complex auto fit generation code. Signed-off-by: Alexander Dahl <ada(a)thorsis.com> --- tools/image-host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/image-host.c b/tools/image-host.c index 7bfc0cb6b18..49ce7436bb9 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -730,7 +730,7 @@ static const char *fit_config_get_image_list(const void *fit, int noffset, int *lenp, int *allow_missingp) { static const char default_list[] = FIT_KERNEL_PROP "\0" - FIT_FDT_PROP; + FIT_FDT_PROP "\0" FIT_SCRIPT_PROP; const char *prop; /* If there is an "sign-image" property, use that */ base-commit: fe2ce09a0753634543c32cafe85eb87a625f76ca -- 2.39.2

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