June 2024 - U-Boot

[PATCH v4 0/6] rpi5: initial support
by Ivan T. Ivanov 19 Sep '24

19 Sep '24

Hi, These patches are slight update for patches posted earlier here[1]. They are adding basic support for RPi5 and are based on v2 series from Dmitry Malkin[2]. What changed: * Initial memory map now includes whole first 1GB of DRAM. At runtime, the firmware will adjust this size depending on whether an HDMI cable is plugged in or not. If there is HDMI monitor connected it will reserve framebufer memory region and will add simple-framebuffer device into devicetree. * Dynamically calculate bits per pixel in video driver. This works on all prevous RPi's models that I have. * I am dropping PCIe patch for now. I made some progress on porting changes from vendor Linux tree to U-Boot. Unfortunatly testing it is little bit tricky. They are many devices behind PCIe, but more or less all of them requires missing either "reset-controller" or "clock-controller" or "pin-controller" drivers. I was able to probe "cdns,macb" device, but access to ethernet PHY over MDIO bus is stucking. Then I ported "raspberrypi,rp1-adc" driver from vendor Linux tree, but it requires missing clock. And on top of that machine that I used for developing this crashed and I lost my PCIe changes :-|. Anyway. These patches allows me to boot current openSUSE Tumbleweed without modification. I can see serial console log and boot process on HDMI connected monitor. I think these patches should be enough for start. Please consider for inclusion. Thanks, Ivan [1] https://lore.kernel.org/all/20231218210341.30073-1-iivanov@suse.de/ [2] https://lore.kernel.org/all/CAKRNjQ0dsWozGo4n8g58m4cCEk3n=qx1R+L24WBgpo-iP1… Dmitry Malkin (2): rpi5: add initial memory map for bcm2712 rpi5: Use devicetree as alternative way to read IO base addresses Ivan T. Ivanov (4): rpi5: Use devicetree to retrieve board revision bcm2835: Dynamically calculate bytes per pixel parameter mmc: bcmstb: Add support for bcm2712 SD controller configs: rpi_arm64: enable SDHCI BCMSTB driver arch/arm/mach-bcm283x/include/mach/base.h | 5 +- arch/arm/mach-bcm283x/include/mach/mbox.h | 3 +- arch/arm/mach-bcm283x/include/mach/sdhci.h | 3 +- arch/arm/mach-bcm283x/include/mach/timer.h | 3 +- arch/arm/mach-bcm283x/include/mach/wdog.h | 3 +- arch/arm/mach-bcm283x/init.c | 74 ++++++++- board/raspberrypi/rpi/rpi.c | 22 ++- configs/rpi_arm64_defconfig | 1 + drivers/mmc/bcmstb_sdhci.c | 173 ++++++++++++++++++++- drivers/video/bcm2835.c | 18 ++- 10 files changed, 282 insertions(+), 23 deletions(-) -- 2.35.3

5 18

[PATCH 1/2] mtd: spi-nor-core: allow overriding 4-byte OPCODE support
by Robert Marko 12 Sep '24

12 Sep '24

Currently, the only way to indicate 4-byte OPCODE support is by setting the SPI_NOR_4B_OPCODES feature flag for each JEDEC ID in spi_nor_ids[]. However, its becoming increasingly common practice for vendors to reuse the same JEDEC ID for new revisions of current parts. For example Winbond W25Q256FV does not fully support 4-byte OPCODE-s while newer W25Q256JV revision does fully support them but they share the same JEDEC ID thus currently its not possible to advertise support for 4-byte OPCODE-s on W25Q256JV. Luckily for us, there usually is a way to differentiate between parts with the same JEDEC ID by differences in SFDP tables, so in order to be able to apply a fixup after they are parsed lets add a feature flag that we can override. Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> --- drivers/mtd/spi/spi-nor-core.c | 6 ++++-- include/linux/mtd/spi-nor.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f86003ca8c..7615ba602f 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3879,7 +3879,7 @@ static int spi_nor_init(struct spi_nor *nor) if (nor->addr_width == 4 && !(nor->info->flags & SPI_NOR_OCTAL_DTR_READ) && (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) && - !(nor->info->flags & SPI_NOR_4B_OPCODES)) { + !(nor->flags & SNOR_F_4B_OPCODES)) { /* * If the RESET# pin isn't hooked up properly, or the system * otherwise doesn't perform a reset command in the boot @@ -4118,6 +4118,8 @@ int spi_nor_scan(struct spi_nor *nor) nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; if (info->flags & USE_CLSR) nor->flags |= SNOR_F_USE_CLSR; + if (info->flags & SPI_NOR_4B_OPCODES) + nor->flags |= SNOR_F_4B_OPCODES; if (info->flags & SPI_NOR_NO_ERASE) mtd->flags |= MTD_NO_ERASE; @@ -4156,7 +4158,7 @@ int spi_nor_scan(struct spi_nor *nor) /* enable 4-byte addressing if the device exceeds 16MiB */ nor->addr_width = 4; if (JEDEC_MFR(info) == SNOR_MFR_SPANSION || - info->flags & SPI_NOR_4B_OPCODES) + nor->flags & SNOR_F_4B_OPCODES) spi_nor_set_4byte_opcodes(nor, info); #else /* Configure the BAR - discover bank cmds and read current bank */ diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index d1dbf3eadb..80e56cf308 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -294,6 +294,7 @@ enum spi_nor_option_flags { SNOR_F_BROKEN_RESET = BIT(6), SNOR_F_SOFT_RESET = BIT(7), SNOR_F_IO_MODE_EN_VOLATILE = BIT(8), + SNOR_F_4B_OPCODES = BIT(9), }; struct spi_nor; -- 2.44.0

3 5

[PATCH 1/7] m68k: Implement a default flush_dcache_all
by Tom Rini 10 Sep '24

10 Sep '24

Implement a weak default version of flush_dcache_all which is based on the ARM default, which is to flush the entire range via flush_dcache_range(...). Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Cc: Huan Wang <alison.wang(a)nxp.com> Cc: Angelo Dureghello <angelo(a)kernel-space.org> --- arch/m68k/lib/cache.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c index de04124404cf..dab834c1cbd8 100644 --- a/arch/m68k/lib/cache.c +++ b/arch/m68k/lib/cache.c @@ -134,6 +134,15 @@ void dcache_invalid(void) #endif } +/* + * Default implementation: + * do a range flush for the entire range + */ +__weak void flush_dcache_all(void) +{ + flush_dcache_range(0, ~0); +} + __weak void invalidate_dcache_range(unsigned long start, unsigned long stop) { /* An empty stub, real implementation should be in platform code */ -- 2.34.1

4 15

[PATCH] net: ftgmac100: Modify desc. size to cache line
by Jacky Chou 09 Sep '24

09 Sep '24

The TX/RX descriptor size is 16 byte. When the cache line size is larger than 16 bytes, descriptors flushed to RAM will flush more than one descriptor. It is possible that it may mistakenly flush to other descriptor that has been updated by MAC in RAM. To avoid this issue, align the descriptors to cache line size. Only one desc will be flushed or invalidated at a time. Signed-off-by: Jacky Chou <jacky_chou(a)aspeedtech.com> --- drivers/net/ftgmac100.c | 13 ++++++++++++- drivers/net/ftgmac100.h | 5 +++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c index 256a519020..9fb8c12838 100644 --- a/drivers/net/ftgmac100.c +++ b/drivers/net/ftgmac100.c @@ -322,7 +322,7 @@ static int ftgmac100_start(struct udevice *dev) struct ftgmac100_data *priv = dev_get_priv(dev); struct ftgmac100 *ftgmac100 = priv->iobase; struct phy_device *phydev = priv->phydev; - unsigned int maccr; + unsigned int maccr, dblac, desc_size; ulong start, end; int ret; int i; @@ -367,6 +367,17 @@ static int ftgmac100_start(struct udevice *dev) /* receive ring */ writel((u32)priv->rxdes, &ftgmac100->rxr_badr); + /* Configure TX/RX decsriptor size + * This size is calculated based on cache line. + */ + desc_size = ARCH_DMA_MINALIGN / FTGMAC100_DESC_UNIT; + /* The descriptor size is at least 2 descriptor units. */ + if (desc_size < 2) + desc_size = 2; + dblac = readl(&ftgmac100->dblac) & ~GENMASK(19, 12); + dblac |= FTGMAC100_DBLAC_RXDES_SIZE(desc_size) | FTGMAC100_DBLAC_TXDES_SIZE(desc_size); + writel(dblac, &ftgmac100->dblac); + /* poll receive descriptor automatically */ writel(FTGMAC100_APTC_RXPOLL_CNT(1), &ftgmac100->aptc); diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h index f7874ae68b..37c029aded 100644 --- a/drivers/net/ftgmac100.h +++ b/drivers/net/ftgmac100.h @@ -111,6 +111,7 @@ struct ftgmac100 { #define FTGMAC100_DBLAC_TXBURST_SIZE(x) (((x) & 0x3) << 10) #define FTGMAC100_DBLAC_RXDES_SIZE(x) (((x) & 0xf) << 12) #define FTGMAC100_DBLAC_TXDES_SIZE(x) (((x) & 0xf) << 16) +#define FTGMAC100_DESC_UNIT 8 #define FTGMAC100_DBLAC_IFG_CNT(x) (((x) & 0x7) << 20) #define FTGMAC100_DBLAC_IFG_INC BIT(23) @@ -183,7 +184,7 @@ struct ftgmac100_txdes { unsigned int txdes1; unsigned int txdes2; /* not used by HW */ unsigned int txdes3; /* TXBUF_BADR */ -} __aligned(16); +} __aligned(ARCH_DMA_MINALIGN); #define FTGMAC100_TXDES0_TXBUF_SIZE(x) ((x) & 0x3fff) #define FTGMAC100_TXDES0_EDOTR BIT(15) @@ -209,7 +210,7 @@ struct ftgmac100_rxdes { unsigned int rxdes1; unsigned int rxdes2; /* not used by HW */ unsigned int rxdes3; /* RXBUF_BADR */ -} __aligned(16); +} __aligned(ARCH_DMA_MINALIGN); #define FTGMAC100_RXDES0_VDBC(x) ((x) & 0x3fff) #define FTGMAC100_RXDES0_EDORR BIT(15) -- 2.25.1

2 1

[PATCH] net: ftgmac100: Fixed NC-SI PHY device cannot get
by Jacky Chou 09 Sep '24

09 Sep '24

The NC-SI interface does not need the MDIO bus and the NC-SI PHY device cannot get from dm_eth_phy_connect. Therefore, use phy_connect directly here. Signed-off-by: Jacky Chou <jacky_chou(a)aspeedtech.com> --- drivers/net/ftgmac100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c index 9b536fd5ab..256a519020 100644 --- a/drivers/net/ftgmac100.c +++ b/drivers/net/ftgmac100.c @@ -223,7 +223,7 @@ static int ftgmac100_phy_init(struct udevice *dev) struct phy_device *phydev; int ret; - if (IS_ENABLED(CONFIG_DM_MDIO)) + if (IS_ENABLED(CONFIG_DM_MDIO) && priv->phy_mode != PHY_INTERFACE_MODE_NCSI) phydev = dm_eth_phy_connect(dev); else phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode); -- 2.25.1

2 1

[PATCH] net: ftgmac100: Fixed the cache coherency issues of rx memory
by Jacky Chou 09 Sep '24

09 Sep '24

When executing TFTP, the ARP will be replied to after receiving the ARP. U-boot's ARP routine modifies the data in the receive packet in response to the ARP packet and then copies it into the transmit packet. At this point, the received packet cache is inconsistent. It is possible that the cache will perform a writeback action to affect the MAC receiving packets. Avoid the same problem that occurs in other networking protocols. In the free_pkt function, ensure cache and memory consistency. Signed-off-by: Jacky Chou <jacky_chou(a)aspeedtech.com> --- drivers/net/ftgmac100.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c index 9b536fd5ab..56854dfab8 100644 --- a/drivers/net/ftgmac100.c +++ b/drivers/net/ftgmac100.c @@ -411,6 +411,14 @@ static int ftgmac100_free_pkt(struct udevice *dev, uchar *packet, int length) ulong des_end = des_start + roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN); + /* + * Make sure there are no stale data in write-back over this area, which + * might get written into the memory while the ftgmac100 also writes + * into the same memory area. + */ + flush_dcache_range((ulong)net_rx_packets[priv->rx_index], + (ulong)net_rx_packets[priv->rx_index] + PKTSIZE_ALIGN); + /* Release buffer to DMA and flush descriptor */ curr_des->rxdes0 &= ~FTGMAC100_RXDES0_RXPKT_RDY; flush_dcache_range(des_start, des_end); -- 2.34.1

2 1

[PATCH v2 1/3] phy: Extend generic_setup_phy() with PHY mode and submode
by Marek Vasut 09 Sep '24

09 Sep '24

Extend generic_setup_phy() parameter list with PHY mode and submode and call generic_phy_set_mode() in generic_setup_phy(), so the generic PHY setup function can configure the PHY into correct mode before powering the PHY up. Update all call sites of generic_setup_phy() as well, all of which are USB host related, except for DM test which now behaves as a USB host test. Note that if the PHY driver does not implement the .set_mode callback, generic_phy_set_mode() call returns 0 and does not error out, so this should not break any existing systems. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Caleb Connolly <caleb.connolly(a)linaro.org> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Fabrice Gasnier <fabrice.gasnier(a)foss.st.com> Cc: Jonas Karlman <jonas(a)kwiboo.se> Cc: Mathieu Othacehe <othacehe(a)gnu.org> Cc: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> Cc: Neil Armstrong <neil.armstrong(a)linaro.org> Cc: Nishanth Menon <nm(a)ti.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Sumit Garg <sumit.garg(a)linaro.org> Cc: Tim Harvey <tharvey(a)gateworks.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Xavier Drudis Ferran <xdrudis(a)tinet.cat> Cc: u-boot-qcom(a)groups.io Cc: u-boot(a)lists.denx.de --- V2: Add failpath to return errno from generic_phy_set_mode() --- drivers/phy/phy-uclass.c | 13 +++++++++++-- drivers/usb/host/ehci-generic.c | 2 +- drivers/usb/host/ehci-msm.c | 2 +- drivers/usb/host/ehci-mx6.c | 2 +- drivers/usb/host/ehci-pci.c | 2 +- drivers/usb/host/ohci-generic.c | 2 +- include/generic-phy.h | 5 ++++- test/dm/phy.c | 8 ++++---- 8 files changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index acdcda15b5b..777d952b041 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -508,7 +508,8 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk) return ret; } -int generic_setup_phy(struct udevice *dev, struct phy *phy, int index) +int generic_setup_phy(struct udevice *dev, struct phy *phy, int index, + enum phy_mode mode, int submode) { int ret; @@ -520,10 +521,18 @@ int generic_setup_phy(struct udevice *dev, struct phy *phy, int index) if (ret) return ret; + ret = generic_phy_set_mode(phy, mode, submode); + if (ret) + goto phys_mode_err; + ret = generic_phy_power_on(phy); if (ret) - generic_phy_exit(phy); + goto phys_mode_err; + + return 0; +phys_mode_err: + generic_phy_exit(phy); return ret; } diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 23c3ed25554..1ae3619ce25 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -94,7 +94,7 @@ static int ehci_usb_probe(struct udevice *dev) if (err) goto reset_err; - err = generic_setup_phy(dev, &priv->phy, 0); + err = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (err) goto regulator_err; diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index a081f71b187..b0c060b8173 100644 --- a/drivers/usb/host/ehci-msm.c +++ b/drivers/usb/host/ehci-msm.c @@ -56,7 +56,7 @@ static int ehci_usb_probe(struct udevice *dev) hcor = (struct ehci_hcor *)((phys_addr_t)hccr + HC_LENGTH(ehci_readl(&(hccr)->cr_capbase))); - ret = generic_setup_phy(dev, &p->phy, 0); + ret = generic_setup_phy(dev, &p->phy, 0, PHY_MODE_USB_HOST, 0); if (ret) return ret; diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 31cd8a50f4a..a93fa5d5455 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -703,7 +703,7 @@ static int ehci_usb_probe(struct udevice *dev) usb_phy_enable(ehci, priv->phy_addr); #endif #else - ret = generic_setup_phy(dev, &priv->phy, 0); + ret = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (ret) goto err_regulator; #endif diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 572686580cd..8d05b14e898 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -30,7 +30,7 @@ static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr, int ret; u32 cmd; - ret = generic_setup_phy(dev, &priv->phy, 0); + ret = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (ret) return ret; diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index f1325cd4953..cc44226f5e0 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -50,7 +50,7 @@ static int ohci_usb_probe(struct udevice *dev) goto reset_err; } - err = generic_setup_phy(dev, &priv->phy, 0); + err = generic_setup_phy(dev, &priv->phy, 0, PHY_MODE_USB_HOST, 0); if (err) goto reset_err; diff --git a/include/generic-phy.h b/include/generic-phy.h index eaab7491660..47962023236 100644 --- a/include/generic-phy.h +++ b/include/generic-phy.h @@ -415,10 +415,13 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk); * @dev: The consumer device. * @phy: A pointer to the PHY port * @index: The index in the list of available PHYs + * @mode: PHY mode + * @submode: PHY submode * * Return: 0 if OK, or negative error code. */ -int generic_setup_phy(struct udevice *dev, struct phy *phy, int index); +int generic_setup_phy(struct udevice *dev, struct phy *phy, int index, + enum phy_mode mode, int submode); /** * generic_shutdown_phy() - Power off and de-initialize phy. diff --git a/test/dm/phy.c b/test/dm/phy.c index d14117f6f7a..a90881b12ab 100644 --- a/test/dm/phy.c +++ b/test/dm/phy.c @@ -243,20 +243,20 @@ static int dm_test_phy_setup(struct unit_test_state *uts) "gen_phy_user", &parent)); /* normal */ - ut_assertok(generic_setup_phy(parent, &phy, 0)); + ut_assertok(generic_setup_phy(parent, &phy, 0, PHY_MODE_USB_HOST, 0)); ut_assertok(generic_shutdown_phy(&phy)); /* power_off fail with -EIO */ - ut_assertok(generic_setup_phy(parent, &phy, 1)); + ut_assertok(generic_setup_phy(parent, &phy, 1, PHY_MODE_USB_HOST, 0)); ut_asserteq(-EIO, generic_shutdown_phy(&phy)); /* power_on fail with -EIO */ - ut_asserteq(-EIO, generic_setup_phy(parent, &phy, 2)); + ut_asserteq(-EIO, generic_setup_phy(parent, &phy, 2, PHY_MODE_USB_HOST, 0)); ut_assertok(generic_shutdown_phy(&phy)); /* generic_phy_get_by_index fail with -ENOENT */ ut_asserteq(-ENOENT, generic_phy_get_by_index(parent, 3, &phy)); - ut_assertok(generic_setup_phy(parent, &phy, 3)); + ut_assertok(generic_setup_phy(parent, &phy, 3, PHY_MODE_USB_HOST, 0)); ut_assertok(generic_shutdown_phy(&phy)); return 0; -- 2.43.0

3 7

[PATCH v2 0/4] clk: sophgo: milkv_duo: Add and enable clock controller driver
by Kongyang Liu 09 Sep '24

09 Sep '24

This series of patches introduces the clock controller driver for the Sophgo CV1800B SoC, updates the device tree sources to use the new clock controller, and enables the clock controller in the configuration for the Milk-V Duo board. Changes in v2: - Fix compilation error - Remove unused code Kongyang Liu (4): dt-bindings: clk: import header for clock controller of sophgo CV1800B clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC configs: milkv_duo: Enable clock controller riscv: dts: sophgo: Replace device clocks with real clocks. arch/riscv/dts/cv18xx.dtsi | 40 +- configs/milkv_duo_defconfig | 9 +- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sophgo/Kconfig | 14 + drivers/clk/sophgo/Makefile | 6 + drivers/clk/sophgo/clk-common.h | 74 +++ drivers/clk/sophgo/clk-cv1800b.c | 754 ++++++++++++++++++++++ drivers/clk/sophgo/clk-cv1800b.h | 123 ++++ drivers/clk/sophgo/clk-ip.c | 594 +++++++++++++++++ drivers/clk/sophgo/clk-ip.h | 288 +++++++++ drivers/clk/sophgo/clk-pll.c | 275 ++++++++ drivers/clk/sophgo/clk-pll.h | 74 +++ include/dt-bindings/clock/sophgo,cv1800.h | 176 +++++ 14 files changed, 2401 insertions(+), 28 deletions(-) create mode 100644 drivers/clk/sophgo/Kconfig create mode 100644 drivers/clk/sophgo/Makefile create mode 100644 drivers/clk/sophgo/clk-common.h create mode 100644 drivers/clk/sophgo/clk-cv1800b.c create mode 100644 drivers/clk/sophgo/clk-cv1800b.h create mode 100644 drivers/clk/sophgo/clk-ip.c create mode 100644 drivers/clk/sophgo/clk-ip.h create mode 100644 drivers/clk/sophgo/clk-pll.c create mode 100644 drivers/clk/sophgo/clk-pll.h create mode 100644 include/dt-bindings/clock/sophgo,cv1800.h -- 2.41.0

2 8

[PATCH 1/1] clk: sifive: avoid declaring static variables in includes
by Heinrich Schuchardt 09 Sep '24

09 Sep '24

The existing code is unnecessarily convoluted: Arrays __prci_init_clocks_fu[5|7]40 are initialized with data. In separate includes fu[5|7]40-prci.h the size of the arrays is provided as constants. By moving the structures prci_clk_fu[5|7]40 to the respective code modules we can directly use ARRAY_SIZE() to access the size of the data used for initialization. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- drivers/clk/sifive/fu540-prci.c | 7 ++++++- drivers/clk/sifive/fu540-prci.h | 22 ---------------------- drivers/clk/sifive/fu740-prci.c | 7 ++++++- drivers/clk/sifive/fu740-prci.h | 22 ---------------------- drivers/clk/sifive/sifive-prci.c | 3 +-- drivers/clk/sifive/sifive-prci.h | 4 ++++ 6 files changed, 17 insertions(+), 48 deletions(-) delete mode 100644 drivers/clk/sifive/fu540-prci.h delete mode 100644 drivers/clk/sifive/fu740-prci.h diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index ceb2c6fab0d..e55a26ab8fd 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -58,7 +58,7 @@ static const struct __prci_clock_ops sifive_fu540_prci_tlclksel_clk_ops = { }; /* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu540[] = { +static struct __prci_clock __prci_init_clocks_fu540[] = { [PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -83,3 +83,8 @@ struct __prci_clock __prci_init_clocks_fu540[] = { .ops = &sifive_fu540_prci_tlclksel_clk_ops, }, }; + +const struct prci_clk_desc prci_clk_fu540 = { + .clks = __prci_init_clocks_fu540, + .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540), +}; diff --git a/drivers/clk/sifive/fu540-prci.h b/drivers/clk/sifive/fu540-prci.h deleted file mode 100644 index 113301107da..00000000000 --- a/drivers/clk/sifive/fu540-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020-2021 SiFive, Inc. - * Zong Li - * Pragnesh Patel - */ - -#ifndef __SIFIVE_CLK_FU540_PRCI_H -#define __SIFIVE_CLK_FU540_PRCI_H - -#include "sifive-prci.h" - -#define NUM_CLOCK_FU540 4 - -extern struct __prci_clock __prci_init_clocks_fu540[NUM_CLOCK_FU540]; - -static const struct prci_clk_desc prci_clk_fu540 = { - .clks = __prci_init_clocks_fu540, - .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540), -}; - -#endif /* __SIFIVE_CLK_FU540_PRCI_H */ diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c index 5edc864e4bd..4274b215d2f 100644 --- a/drivers/clk/sifive/fu740-prci.c +++ b/drivers/clk/sifive/fu740-prci.c @@ -102,7 +102,7 @@ static const struct __prci_clock_ops sifive_fu740_prci_pcieaux_clk_ops = { }; /* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu740[] = { +static struct __prci_clock __prci_init_clocks_fu740[] = { [FU740_PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -156,3 +156,8 @@ struct __prci_clock __prci_init_clocks_fu740[] = { .pwd = &__prci_pcieaux_data, } }; + +const struct prci_clk_desc prci_clk_fu740 = { + .clks = __prci_init_clocks_fu740, + .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740), +}; diff --git a/drivers/clk/sifive/fu740-prci.h b/drivers/clk/sifive/fu740-prci.h deleted file mode 100644 index b74f0789061..00000000000 --- a/drivers/clk/sifive/fu740-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020-2021 SiFive, Inc. - * Zong Li - * Pragnesh Patel - */ - -#ifndef __SIFIVE_CLK_FU740_PRCI_H -#define __SIFIVE_CLK_FU740_PRCI_H - -#include "sifive-prci.h" - -#define NUM_CLOCK_FU740 9 - -extern struct __prci_clock __prci_init_clocks_fu740[NUM_CLOCK_FU740]; - -static const struct prci_clk_desc prci_clk_fu740 = { - .clks = __prci_init_clocks_fu740, - .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740), -}; - -#endif /* __SIFIVE_CLK_FU740_PRCI_H */ diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c index c8fb6002907..603a176d06a 100644 --- a/drivers/clk/sifive/sifive-prci.c +++ b/drivers/clk/sifive/sifive-prci.c @@ -34,8 +34,7 @@ #include <linux/math64.h> #include <dt-bindings/clock/sifive-fu740-prci.h> -#include "fu540-prci.h" -#include "fu740-prci.h" +#include "sifive-prci.h" /* * Private functions diff --git a/drivers/clk/sifive/sifive-prci.h b/drivers/clk/sifive/sifive-prci.h index 5ce33d61846..b391698081d 100644 --- a/drivers/clk/sifive/sifive-prci.h +++ b/drivers/clk/sifive/sifive-prci.h @@ -320,4 +320,8 @@ unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct __prci_clock *pc, int sifive_prci_clock_enable(struct __prci_clock *pc, bool enable); +/* Clock driver data */ +extern const struct prci_clk_desc prci_clk_fu540; +extern const struct prci_clk_desc prci_clk_fu740; + #endif /* __SIFIVE_CLK_SIFIVE_PRCI_H */ -- 2.43.0

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[PATCH] video: Add parentheses around VNBYTES() macro
by Dan Carpenter 06 Sep '24

06 Sep '24

The VNBYTES() macro needs to have parentheses to prevent some (harmless) macro expansion bugs. The VNBYTES() macro is used like this: VID_TO_PIXEL(x) * VNBYTES(vid_priv->bpix) The * operation is done before the / operation. It still ends up with the same results, but it's not ideal. Signed-off-by: Dan Carpenter <dan.carpenter(a)linaro.org> --- include/video.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/video.h b/include/video.h index 9729fa348aa5..b364bf91825f 100644 --- a/include/video.h +++ b/include/video.h @@ -58,7 +58,7 @@ enum video_log2_bpp { * Convert enum video_log2_bpp to bytes and bits. Note we omit the outer * brackets to allow multiplication by fractional pixels. */ -#define VNBYTES(bpix) (1 << (bpix)) / 8 +#define VNBYTES(bpix) ((1 << (bpix)) / 8) #define VNBITS(bpix) (1 << (bpix)) -- 2.39.2

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