May 2024 - U-Boot

[PATCH v6 0/3] BOOTP/DHCPv4 enhancements
by Sean Edmond 08 May '24

08 May '24

In our datacenter application, a single DHCP server is servicing 36000+ clients. Improvements are required to the DHCPv4 retransmission behavior to align with RFC and ensure less pressure is exerted on the server: - retransmission backoff interval maximum is configurable (environment variable bootpretransmitperiodmax) - initial retransmission backoff interval is configurable (environment variable bootpretransmitperiodinit) - transaction ID is kept the same for each BOOTP/DHCPv4 request (not recreated on each retry) For our application we'll use: - bootpretransmitperiodmax=16000 - bootpretransmitperiodinit=2000 A new configuration BOOTP_RANDOM_XID has been added to enable a randomized BOOTP/DHCPv4 transaction ID. Enhance DHCPv4 sending/parsing option 209 (PXE config file). A previous patch was accepted. A new patch fixes a possible double free() and addresses latest review comments. Changes in v7: - Remove "depends on LIB_RAND || LIB_HW_RAND" from CMD_BOOTP - Add CMD_BOOTP/CMD_DHCP/CMD_DHCP6 to LIB_RAND menu choice - Add space after "config CMD_DHCP" Changes in v6: - CMD_BOOTP should "depends on LIB_RAND || LIB_HW_RAND" Changes in v5: - add change log to individual patches - fix depends for BOOTP_RANDOM_XID: "depends on CMD_BOOTP && (LIB_RAND || LIB_HW_RAND)" Changes in v4: - rebase master and resolve conflicts - default y for BOOTP_PXE_DHCP_OPTION (feedback from review) - Add "select LIB_RAND" for "config CMD_BOOTP" (retransmission improvements require rand()) Changes in v3: - add define for option 209 and rfc5071 reference - Set RETRANSMIT_PERIOD_MAX_MS=60000 - Add randomization factor to retransmission timeout - Add depends for BOOTP_RANDOM_XID Changes in v2: - use env_get_ulong() to get environment variables Sean Edmond (3): net: Enhancements for dhcp option 209 net: bootp: BOOTP/DHCPv4 retransmission improvements net: bootp: add config option BOOTP_RANDOM_XID cmd/Kconfig | 8 ++++++ cmd/pxe.c | 2 ++ lib/Kconfig | 3 ++- net/bootp.c | 76 +++++++++++++++++++++++++++++++++++++++++------------ net/bootp.h | 2 ++ 5 files changed, 73 insertions(+), 18 deletions(-) -- 2.42.0

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Does u-boot support USB CCID communication?
by Sourabh Hegde Ramu 08 May '24

08 May '24

Hello, I wanted to know if u-boot can communicate with CCID compliant smartcards or not (with a USB-HSM device). I couldn't find any documents related to this online. USB support seems to be limited within u-boot. Can anyone please let me know if they have experimented with this? Thanks in advance

2 1

[PATCH v2 0/4] arm: Add Analog Devices SC5xx Machine Type
by Greg Malysa 08 May '24

08 May '24

This series adds support for the ADI SC5xx machine type and includes two core drivers that are required for being able to boot any board--a UART driver, the gptimer driver which is used as a clock reference (CNTVCNT is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our corresponding Linux support relies on u-boot configuring the clocks correctly before booting, so it is not possible to boot any board without the CGU/CDU configuration happening here. There are also no board files, device trees, or defconfigs included here, but some common definitions that will be used to build board files currently are. The sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended to be a drop-in replacement for the SC594 in terms of peripherals, with a Cortex-A55 instead. Some of the configuration code in dmcinit and clkinit is quite scary and causes a lot of checkpatch violations. It is modified from code initially provided by ADI, but it has not been fully rewritten. There's a question of how important it is to clean up this code--it has some quality violations, but it has been in use (including in production) for over two years and is known to work for performing the low level SoC initialization, while a rewrite might introduce timing or sequence bugs that could take a significant amount of time to detect in the future. Thank you! Changes in v2: - Removed MACH_TYPE constants and any references to setting the MACH_TYPE as it is not used by this platform - Removed additional compiler flags from config.mk - Converted to text env. Each board is expected to provide a text env and #include env/adi/adi_boot.env if it wants to use the reference ADI boot flow - Some further cleanup on use of Kconfigs--some per board settings affecting dmcinit and clkinit have been converted to Kconfigs instead of config header constants - Converted some #ifdef blocks into soc-specific functions with common functionality in soc.c, such as configuring SECUREC0, 1, and 2. - Reviewed #include usage and pruned unnecessary files - Passes gitlab CI run locally - Added gptimer driver to this series because a minimal system can't boot without it Greg Malysa (1): drivers: timer: Add in driver support for ADI SC5XX-family GP timer peripheral Nathan Barrett-Morrison (3): arch: arm: Add Analog Devices SC5xx machine type drivers: clk: adi: Add in SC5XX-family clock driver drivers: serial: Add in UART for ADI SC5XX-family processors MAINTAINERS | 16 + arch/arm/Kconfig | 5 + arch/arm/Makefile | 1 + arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h | 39 + arch/arm/include/asm/arch-adi/sc5xx/soc.h | 18 + arch/arm/include/asm/arch-adi/sc5xx/spl.h | 43 + arch/arm/mach-sc5xx/Kconfig | 475 +++++++++ arch/arm/mach-sc5xx/Makefile | 19 + arch/arm/mach-sc5xx/config.mk | 16 + arch/arm/mach-sc5xx/init/Makefile | 11 + arch/arm/mach-sc5xx/init/clkinit.c | 558 +++++++++++ arch/arm/mach-sc5xx/init/clkinit.h | 18 + arch/arm/mach-sc5xx/init/dmcinit.c | 954 +++++++++++++++++++ arch/arm/mach-sc5xx/init/dmcinit.h | 31 + arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h | 62 ++ arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h | 50 + arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h | 50 + arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h | 49 + arch/arm/mach-sc5xx/rcu.c | 22 + arch/arm/mach-sc5xx/sc57x.c | 32 + arch/arm/mach-sc5xx/sc58x.c | 32 + arch/arm/mach-sc5xx/sc59x.c | 43 + arch/arm/mach-sc5xx/sc59x_64.c | 97 ++ arch/arm/mach-sc5xx/soc.c | 179 ++++ arch/arm/mach-sc5xx/spl.c | 102 ++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/adi/Kconfig | 83 ++ drivers/clk/adi/Makefile | 16 + drivers/clk/adi/clk-adi-pll.c | 93 ++ drivers/clk/adi/clk-adi-sc57x.c | 206 ++++ drivers/clk/adi/clk-adi-sc58x.c | 222 +++++ drivers/clk/adi/clk-adi-sc594.c | 231 +++++ drivers/clk/adi/clk-adi-sc598.c | 308 ++++++ drivers/clk/adi/clk-shared.c | 48 + drivers/clk/adi/clk.h | 123 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_adi_uart4.c | 225 +++++ drivers/timer/Kconfig | 8 + drivers/timer/Makefile | 1 + drivers/timer/adi_sc5xx_timer.c | 145 +++ include/dt-bindings/clock/adi-sc5xx-clock.h | 271 ++++++ include/env/adi/adi_boot.env | 122 +++ 43 files changed, 5027 insertions(+) create mode 100644 arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h create mode 100644 arch/arm/include/asm/arch-adi/sc5xx/soc.h create mode 100644 arch/arm/include/asm/arch-adi/sc5xx/spl.h create mode 100644 arch/arm/mach-sc5xx/Kconfig create mode 100644 arch/arm/mach-sc5xx/Makefile create mode 100644 arch/arm/mach-sc5xx/config.mk create mode 100644 arch/arm/mach-sc5xx/init/Makefile create mode 100644 arch/arm/mach-sc5xx/init/clkinit.c create mode 100644 arch/arm/mach-sc5xx/init/clkinit.h create mode 100644 arch/arm/mach-sc5xx/init/dmcinit.c create mode 100644 arch/arm/mach-sc5xx/init/dmcinit.h create mode 100644 arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h create mode 100644 arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h create mode 100644 arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h create mode 100644 arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h create mode 100644 arch/arm/mach-sc5xx/rcu.c create mode 100644 arch/arm/mach-sc5xx/sc57x.c create mode 100644 arch/arm/mach-sc5xx/sc58x.c create mode 100644 arch/arm/mach-sc5xx/sc59x.c create mode 100644 arch/arm/mach-sc5xx/sc59x_64.c create mode 100644 arch/arm/mach-sc5xx/soc.c create mode 100644 arch/arm/mach-sc5xx/spl.c create mode 100644 drivers/clk/adi/Kconfig create mode 100644 drivers/clk/adi/Makefile create mode 100644 drivers/clk/adi/clk-adi-pll.c create mode 100644 drivers/clk/adi/clk-adi-sc57x.c create mode 100644 drivers/clk/adi/clk-adi-sc58x.c create mode 100644 drivers/clk/adi/clk-adi-sc594.c create mode 100644 drivers/clk/adi/clk-adi-sc598.c create mode 100644 drivers/clk/adi/clk-shared.c create mode 100644 drivers/clk/adi/clk.h create mode 100644 drivers/serial/serial_adi_uart4.c create mode 100644 drivers/timer/adi_sc5xx_timer.c create mode 100644 include/dt-bindings/clock/adi-sc5xx-clock.h create mode 100644 include/env/adi/adi_boot.env -- 2.43.2

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[PATCH] efi_loader: capsule: detect possible ESP device path
by Weizhao Ouyang 08 May '24

08 May '24

When using CapsuleApp to execute on-disk update, it will choose the first boot option as BootNext entry to perform the capsule update after a reboot. But auto-generate boot option will ignore the logical partition which might be an ESP, thus it could not find the capsule file. Align with the EDK II, detect the possible ESP device path by expanding the media path. Fixes: f86fba8adbf3 ("efi_loader: auto-generate boot option for each blkio device") Signed-off-by: Weizhao Ouyang <o451686892(a)gmail.com> --- include/efi_loader.h | 6 ++ lib/efi_loader/efi_boottime.c | 15 ++--- lib/efi_loader/efi_capsule.c | 110 +++++++++++++++++++++++++++++++++- 3 files changed, 118 insertions(+), 13 deletions(-) diff --git a/include/efi_loader.h b/include/efi_loader.h index 9600941aa327..9d78fa936701 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -683,6 +683,12 @@ efi_status_t efi_protocol_open(struct efi_handler *handler, void **protocol_interface, void *agent_handle, void *controller_handle, uint32_t attributes); +/* Connect drivers to controller */ +efi_status_t EFIAPI efi_connect_controller(efi_handle_t controller_handle, + efi_handle_t *driver_image_handle, + struct efi_device_path *remain_device_path, + bool recursive); + /* Install multiple protocol interfaces */ efi_status_t EFIAPI efi_install_multiple_protocol_interfaces(efi_handle_t *handle, ...); diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 1951291747cd..2c86d78208b2 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -103,12 +103,6 @@ static efi_status_t EFIAPI efi_disconnect_controller( efi_handle_t driver_image_handle, efi_handle_t child_handle); -static -efi_status_t EFIAPI efi_connect_controller(efi_handle_t controller_handle, - efi_handle_t *driver_image_handle, - struct efi_device_path *remain_device_path, - bool recursive); - /* Called on every callback entry */ int __efi_entry_check(void) { @@ -3670,11 +3664,10 @@ static efi_status_t efi_connect_single_controller( * * Return: status code */ -static efi_status_t EFIAPI efi_connect_controller( - efi_handle_t controller_handle, - efi_handle_t *driver_image_handle, - struct efi_device_path *remain_device_path, - bool recursive) +efi_status_t EFIAPI efi_connect_controller(efi_handle_t controller_handle, + efi_handle_t *driver_image_handle, + struct efi_device_path *remain_device_path, + bool recursive) { efi_status_t r; efi_status_t ret = EFI_NOT_FOUND; diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index de0d49ebebda..919e3cba071b 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -922,6 +922,105 @@ static bool device_is_present_and_system_part(struct efi_device_path *dp) return true; } +/** + * get_esp_from_boot_option_file_path - get the expand device path + * + * Get a possible efi system partition by expanding a boot option + * file path. + * + * @boot_dev The device path pointing to a boot option + * Return: The full ESP device path or NULL if fail + */ +static struct efi_device_path *get_esp_from_boot_option_file_path(struct efi_device_path *boot_dev) +{ + efi_status_t ret = EFI_SUCCESS; + efi_handle_t handle; + struct efi_device_path *dp = boot_dev; + struct efi_device_path *full_path = NULL; + + ret = EFI_CALL(efi_locate_device_path(&efi_simple_file_system_protocol_guid, + &dp, + &handle)); + if (ret != EFI_SUCCESS) + ret = EFI_CALL(efi_locate_device_path(&efi_block_io_guid, &dp, &handle)); + + /* Expand Media Device Path */ + if (ret == EFI_SUCCESS && EFI_DP_TYPE(dp, END, END)) { + struct efi_device_path *temp_dp; + struct efi_block_io *block_io; + void *buffer; + efi_handle_t *simple_file_system_handle; + efi_uintn_t number_handles, index; + u32 size; + u32 temp_size; + + temp_dp = boot_dev; + ret = EFI_CALL(efi_locate_device_path(&efi_simple_file_system_protocol_guid, + &temp_dp, + &handle)); + /* + * For device path pointing to simple file system, it only expands to one + * full path + */ + if (ret == EFI_SUCCESS && EFI_DP_TYPE(temp_dp, END, END)) { + if (device_is_present_and_system_part(temp_dp)) + return temp_dp; + } + + /* + * For device path only pointing to the removable device handle, try to + * search all its children handles + */ + ret = EFI_CALL(efi_locate_device_path(&efi_block_io_guid, &temp_dp, &handle)); + EFI_CALL(efi_connect_controller(handle, NULL, NULL, true)); + + /* Align with edk2, issue a dummy read to the device to check the device change */ + ret = EFI_CALL(efi_handle_protocol(handle, &efi_block_io_guid, (void **)&block_io)); + if (ret == EFI_SUCCESS) { + buffer = memalign(block_io->media->io_align, block_io->media->block_size); + if (buffer) { + ret = EFI_CALL(block_io->read_blocks(block_io, + block_io->media->media_id, + 0, + block_io->media->block_size, + buffer)); + free(buffer); + } else { + return full_path; + } + } else { + return full_path; + } + + /* detect the default boot file from removable media */ + size = efi_dp_size(boot_dev) - sizeof(struct efi_device_path); + EFI_CALL(efi_locate_handle_buffer(BY_PROTOCOL, + &efi_simple_file_system_protocol_guid, + NULL, + &number_handles, + &simple_file_system_handle)); + for (index = 0; index < number_handles; index++) { + EFI_CALL(efi_handle_protocol(simple_file_system_handle[index], + &efi_guid_device_path, + (void **)&temp_dp)); + + log_debug("Search ESP %pD\n", temp_dp); + temp_size = efi_dp_size(temp_dp) - sizeof(struct efi_device_path); + if (size <= temp_size && !memcmp(temp_dp, boot_dev, size)) { + if (device_is_present_and_system_part(temp_dp)) { + efi_free_pool(simple_file_system_handle); + return temp_dp; + } + } + } + + if (simple_file_system_handle) + efi_free_pool(simple_file_system_handle); + } + + return full_path; +} + /** * find_boot_device - identify the boot device * @@ -938,6 +1037,7 @@ static efi_status_t find_boot_device(void) int i, num; struct efi_simple_file_system_protocol *volume; struct efi_device_path *boot_dev = NULL; + struct efi_device_path *full_path = NULL; efi_status_t ret; /* find active boot device in BootNext */ @@ -961,8 +1061,14 @@ static efi_status_t find_boot_device(void) if (device_is_present_and_system_part(boot_dev)) { goto found; } else { - efi_free_pool(boot_dev); - boot_dev = NULL; + full_path = get_esp_from_boot_option_file_path(boot_dev); + if (full_path) { + boot_dev = full_path; + goto found; + } else { + efi_free_pool(boot_dev); + boot_dev = NULL; + } } } } -- 2.40.1

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[PATCH] qcom_defconfig: enable msm8916 and msm8996
by Sam Day 08 May '24

08 May '24

From: Caleb Connolly <caleb.connolly(a)linaro.org> Enable the clock/pinctrl drivers for these two SoCs. Previously left out due to only being used on the db410c and db820c respectively which both have their own board code. We can still boot these with most features working without that board code. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- I nabbed this commit from one of Caleb's work trees. Along with the carveout patch I just sent, this gets U-Boot to successfully boot when chained from lk2nd on msm8916 devices supported by that bootloader. A similar plea on this patch as with the "mach-snapdragon: do carveouts for qcs404 only" patch: if we could scrape these changes into the 2024.07 release that would be positively sublime. Signed-off-by: Sam Day <me(a)samcday.com> --- configs/qcom_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 80ad3b32e1..c438aeef8e 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -37,6 +37,8 @@ CONFIG_OF_LIVE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y +CONFIG_CLK_QCOM_APQ8016=y +CONFIG_CLK_QCOM_APQ8096=y CONFIG_CLK_QCOM_QCM2290=y CONFIG_CLK_QCOM_QCS404=y CONFIG_CLK_QCOM_SDM845=y @@ -73,6 +75,8 @@ CONFIG_PHY_QCOM_QUSB2=y CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y CONFIG_PHY_QCOM_SNPS_EUSB2=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_QCOM_APQ8016=y +CONFIG_PINCTRL_QCOM_APQ8096=y CONFIG_PINCTRL_QCOM_QCM2290=y CONFIG_PINCTRL_QCOM_QCS404=y CONFIG_PINCTRL_QCOM_SDM845=y --- base-commit: 1c40dda60f5f7e83a6d6f541cf5a57eb7e8ec43c change-id: 20240507-qcom-defconfig-msm8916-61c8437a0b2e Best regards, -- Sam Day <me(a)samcday.com>

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[PATCH] board: rockchip: add ArmSoM Sige7 Rk3588 board
by Jianfeng Liu 08 May '24

08 May '24

ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by ArmSoM. There are two variants depending on the DRAM size : 8G and 16G. Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 8/16GB memory LPDDR4x Mali G610MC4 GPU 2x MIPI CSI 2 multiple lanes connector 64GB/128GB on board eMMC uSD slot 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C 1x HDMI 2.1 output 2x 2.5 Gbps Ethernet port 40-pin IO header including UART, SPI and I2C USB PD over USB Type-C Size: 92mm x 62mm Kernel commit: 81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board) Note that these commits: - e18e5e8188f2 (arm64: dts: rockchip: add USBDP phys on rk3588) - 6fca4edb93d3 (arm64: dts: rockchip: Add rk3588 GPU node) are not synced to u-boot, so I remove usb3 drd nodes and gpu from kernel devicetree. Signed-off-by: Jianfeng Liu <liujianfeng1994(a)gmail.com> --- MAINTAINERS | 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 31 + arch/arm/dts/rk3588-armsom-sige7.dts | 691 +++++++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 26 + board/armsom/sige7-rk3588/Kconfig | 12 + board/armsom/sige7-rk3588/MAINTAINERS | 8 + configs/sige7-rk3588_defconfig | 104 +++ doc/board/rockchip/rockchip.rst | 1 + include/configs/sige7-rk3588.h | 15 + 10 files changed, 890 insertions(+) create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588-armsom-sige7.dts create mode 100644 board/armsom/sige7-rk3588/Kconfig create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS create mode 100644 configs/sige7-rk3588_defconfig create mode 100644 include/configs/sige7-rk3588.h diff --git a/MAINTAINERS b/MAINTAINERS index 7a3b4d3712..52367bf38c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -532,6 +532,7 @@ F: arch/arm/dts/rv11* F: arch/arm/include/asm/arch-rockchip/ F: arch/arm/mach-rockchip/ F: board/amarula/vyasa-rk3288/ +F: board/armsom/sige7-rk3588/ F: board/anbernic/rgxx3_rk3566/ F: board/chipspark/popmetal_rk3288 F: board/engicam/px30_core/ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c9f1b25ad6..040238dede 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -166,6 +166,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3568-rock-3a.dtb dtb-$(CONFIG_ROCKCHIP_RK3588) += \ + rk3588-armsom-sige7.dtb \ rk3588s-coolpi-4b.dtb \ rk3588-coolpi-cm5-evb.dtb \ rk3588-edgeble-neu6a-io.dtb \ diff --git a/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi new file mode 100644 index 0000000000..b9196ba5f5 --- /dev/null +++ b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 ArmSoM Technology Co., Ltd. + */ + +#include "rk3588-u-boot.dtsi" + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; + +&u2phy1 { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&usbdp_phy1 { + status = "okay"; +}; + +&usbdp_phy1_u3 { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588-armsom-sige7.dts b/arch/arm/dts/rk3588-armsom-sige7.dts new file mode 100644 index 0000000000..c7b46536ec --- /dev/null +++ b/arch/arm/dts/rk3588-armsom-sige7.dts @@ -0,0 +1,691 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include "rk3588.dtsi" + +/ { + model = "ArmSoM Sige7"; + compatible = "armsom,sige7", "rockchip,rk3588"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + analog-sound { + compatible = "audio-graph-card"; + dais = <&i2s0_8ch_p0>; + label = "rk3588-es8316"; + hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_detect>; + routing = "MIC2", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR"; + widgets = "Microphone", "Mic Jack", + "Headphone", "Headphones"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_rgb_g>; + + led_green: led-0 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led_red: led-1 { + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_STATUS; + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + }; + }; + + fan: pwm-fan { + compatible = "pwm-fan"; + cooling-levels = <0 95 145 195 255>; + fan-supply = <&vcc5v0_sys>; + pwms = <&pwm1 0 50000 0>; + #cooling-cells = <2>; + }; + + vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie2x1l2"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc3v3_pcie30: vcc3v3-pcie30-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c6 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + wakeup-source; + }; +}; + +&i2c7 { + status = "okay"; + + es8316: audio-codec@11 { + compatible = "everest,es8316"; + reg = <0x11>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + + port { + es8316_p0_0: endpoint { + remote-endpoint = <&i2s0_8ch_p0_0>; + }; + }; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; + + i2s0_8ch_p0: port { + i2s0_8ch_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&es8316_p0_0>; + }; + }; +}; + +/* phy1 - right ethernet port */ +&pcie2x1l0 { + reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* phy2 - WiFi */ +&pcie2x1l1 { + reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* phy0 - left ethernet port */ +&pcie2x1l2 { + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + +&pinctrl { + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led_rgb_g: led-rgb-g { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + led_rgb_r: led-rgb-r { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sound { + hp_detect: hp-detect { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + status = "okay"; +}; + +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + mmc-hs200-1_8v; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + max-frequency = <200000000>; + no-sdio; + no-mmc; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + spi-max-frequency = <1000000>; + reg = <0x0>; + + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + system-power-controller; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_log_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_vdenc_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_2v0_pldo_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vcc_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 39049ab35a..4c14b0be1e 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -152,6 +152,31 @@ config TARGET_ROCK5B_RK3588 USB PD over USB Type-C Size: 100mm x 72mm (Pico-ITX form factor) +config TARGET_SIGE7_RK3588 + bool "ArmSoM Sige7 RK3588 board" + select BOARD_LATE_INIT + help + ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) + by ArmSoM. + + There are two variants depending on the DRAM size : 8G and 16G. + + Specification: + + Rockchip Rk3588 SoC + 4x ARM Cortex-A76, 4x ARM Cortex-A55 + 8/16GB memory LPDDR4x + Mali G610MC4 GPU + 2x MIPI CSI 2 multiple lanes connector + 64GB/128GB on board eMMC + uSD slot + 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C + 1x HDMI 2.1 output + 2x 2.5 Gbps Ethernet port + 40-pin IO header including UART, SPI and I2C + USB PD over USB Type-C + Size: 92mm x 62mm + config TARGET_QUARTZPRO64_RK3588 bool "Pine64 QuartzPro64 RK3588 board" select BOARD_LATE_INIT @@ -221,6 +246,7 @@ config ROCKCHIP_COMMON_STACK_ADDR config TEXT_BASE default 0x00a00000 +source "board/armsom/sige7-rk3588/Kconfig" source "board/edgeble/neural-compute-module-6/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" diff --git a/board/armsom/sige7-rk3588/Kconfig b/board/armsom/sige7-rk3588/Kconfig new file mode 100644 index 0000000000..793985f531 --- /dev/null +++ b/board/armsom/sige7-rk3588/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SIGE7_RK3588 + +config SYS_BOARD + default "sige7-rk3588" + +config SYS_VENDOR + default "armsom" + +config SYS_CONFIG_NAME + default "sige7-rk3588" + +endif diff --git a/board/armsom/sige7-rk3588/MAINTAINERS b/board/armsom/sige7-rk3588/MAINTAINERS new file mode 100644 index 0000000000..0b84946284 --- /dev/null +++ b/board/armsom/sige7-rk3588/MAINTAINERS @@ -0,0 +1,8 @@ +SIGE7-RK3588 +M: Jianfeng Liu <liujianfeng1994(a)gmail.com> +S: Maintained +F: board/armsom/sige7-rk3588 +F: include/configs/sige7-rk3588.h +F: configs/sige7-rk3588_defconfig +F: arch/arm/dts/rk3588-armsom-sige7.dts +F: arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi diff --git a/configs/sige7-rk3588_defconfig b/configs/sige7-rk3588_defconfig new file mode 100644 index 0000000000..76fcd2878c --- /dev/null +++ b/configs/sige7-rk3588_defconfig @@ -0,0 +1,104 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588-armsom-sige7" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_SIGE7_RK3588=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-armsom-sige7.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_AHCI_PCI=y +CONFIG_DWC_AHCI=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_PHYLIB=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 9a726e9cde..6b826b3288 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -118,6 +118,7 @@ List of mainline supported Rockchip boards: - Radxa ROCK 3 Model A (rock-3a-rk3568) * rk3588 + - ArmSoM Sige7 (sige7-rk3588) - Rockchip EVB (evb-rk3588) - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) diff --git a/include/configs/sige7-rk3588.h b/include/configs/sige7-rk3588.h new file mode 100644 index 0000000000..fd08da568b --- /dev/null +++ b/include/configs/sige7-rk3588.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 ArmSoM Technology Co., Ltd. + */ + +#ifndef __SIGE7_RK3588_H +#define __SIGE7_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __SIGE7_RK3588_H */ -- 2.34.1

3 3

[PATCH V3] board: rockchip: add Powkiddy X55
by Chris Morgan 08 May '24

08 May '24

From: Chris Morgan <macromorgan(a)hotmail.com> The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device. UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this successfully boots mainline Linux. Kernel commit: e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy X55") Signed-off-by: Chris Morgan <macromorgan(a)hotmail.com> --- Changes since V2: - Refactored to use the upstream device tree from Linux. - Removed logic for handling the adc button and instead simply try to boot from sdmmc0 as a valid target first. --- arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi | 9 +++ arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++ board/powkiddy/x55/Kconfig | 15 +++++ board/powkiddy/x55/MAINTAINERS | 7 +++ board/powkiddy/x55/Makefile | 6 ++ board/powkiddy/x55/x55.c | 39 +++++++++++++ configs/powkiddy-x55-rk3566_defconfig | 59 ++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/powkiddy-x55-rk3566.h | 12 ++++ 9 files changed, 154 insertions(+) create mode 100644 arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi create mode 100644 board/powkiddy/x55/Kconfig create mode 100644 board/powkiddy/x55/MAINTAINERS create mode 100644 board/powkiddy/x55/Makefile create mode 100644 board/powkiddy/x55/x55.c create mode 100644 configs/powkiddy-x55-rk3566_defconfig create mode 100644 include/configs/powkiddy-x55-rk3566.h diff --git a/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi new file mode 100644 index 0000000000..c440201ec7 --- /dev/null +++ b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = &sdmmc0, &sdmmc1, &sdhci; + }; +}; diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index af537d912a..014ebf9f0b 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568 help Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC. +config TARGET_POWKIDDY_X55_RK3566 + bool "Powkiddy X55" + help + Powkiddy X55 handheld gaming console with an RK3566 SoC. + config TARGET_QUARTZ64_RK3566 bool "Pine64 Quartz64" help @@ -48,5 +53,6 @@ source "board/rockchip/evb_rk3568/Kconfig" source "board/anbernic/rgxx3_rk3566/Kconfig" source "board/hardkernel/odroid_m1/Kconfig" source "board/pine64/quartz64_rk3566/Kconfig" +source "board/powkiddy/x55/Kconfig" endif diff --git a/board/powkiddy/x55/Kconfig b/board/powkiddy/x55/Kconfig new file mode 100644 index 0000000000..a7b3ed4d0d --- /dev/null +++ b/board/powkiddy/x55/Kconfig @@ -0,0 +1,15 @@ +if TARGET_POWKIDDY_X55_RK3566 + +config SYS_BOARD + default "x55" + +config SYS_VENDOR + default "powkiddy" + +config SYS_CONFIG_NAME + default "powkiddy-x55-rk3566" + +config BOARD_SPECIFIC_OPTIONS + def_bool y + +endif diff --git a/board/powkiddy/x55/MAINTAINERS b/board/powkiddy/x55/MAINTAINERS new file mode 100644 index 0000000000..01ae8da19d --- /dev/null +++ b/board/powkiddy/x55/MAINTAINERS @@ -0,0 +1,7 @@ +X55 +M: Chris Morgan <macromorgan(a)hotmail.com> +S: Maintained +F: board/powkiddy/x55 +F: include/configs/powkiddy-x55-rk3566.h +F: configs/powkiddy-x55-rk3566_defconfig +F: arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi diff --git a/board/powkiddy/x55/Makefile b/board/powkiddy/x55/Makefile new file mode 100644 index 0000000000..55c8c16aa1 --- /dev/null +++ b/board/powkiddy/x55/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2023 Chris Morgan <macromorgan(a)hotmail.com> +# + +obj-y += x55.o diff --git a/board/powkiddy/x55/x55.c b/board/powkiddy/x55/x55.c new file mode 100644 index 0000000000..b2703e6382 --- /dev/null +++ b/board/powkiddy/x55/x55.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 Chris Morgan <macromorgan(a)hotmail.com> + */ + +#include <asm/io.h> + +#define GPIO4_BASE 0xfe770000 +#define GPIO_SWPORT_DR_L 0x0000 +#define GPIO_SWPORT_DDR_L 0x0008 +#define GPIO_B4 BIT(12) +#define GPIO_B5 BIT(13) +#define GPIO_B6 BIT(14) + +#define GPIO_WRITEMASK(bits) ((bits) << 16) + +/* + * Start LED very early so user knows device is on. Set color + * to red. + */ +void spl_board_init(void) +{ + /* Set GPIO4_B4, GPIO4_B5, and GPIO4_B6 to output. */ + writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | \ + (GPIO_B6 | GPIO_B5 | GPIO_B4), + (GPIO4_BASE + GPIO_SWPORT_DDR_L)); + /* Set GPIO4_B5 and GPIO4_B6 to 0 and GPIO4_B4 to 1. */ + writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B4, + (GPIO4_BASE + GPIO_SWPORT_DR_L)); +} + +int rk_board_late_init(void) +{ + /* Turn off red LED and turn on orange LED. */ + writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B6, + (GPIO4_BASE + GPIO_SWPORT_DR_L)); + + return 0; +} diff --git a/configs/powkiddy-x55-rk3566_defconfig b/configs/powkiddy-x55-rk3566_defconfig new file mode 100644 index 0000000000..db996fd570 --- /dev/null +++ b/configs/powkiddy-x55-rk3566_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-powkiddy-x55" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_SERIAL=y +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-powkiddy-x55.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 9a726e9cde..924a8d0886 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -104,6 +104,7 @@ List of mainline supported Rockchip boards: - Pine64 SOQuartz on Blade (soquartz-blade-rk3566) - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566) - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566) + - Powkiddy X55 (powkiddy-x55-rk3566) - Radxa CM3 IO Board (radxa-cm3-io-rk3566) * rk3568 diff --git a/include/configs/powkiddy-x55-rk3566.h b/include/configs/powkiddy-x55-rk3566.h new file mode 100644 index 0000000000..4b25c6a877 --- /dev/null +++ b/include/configs/powkiddy-x55-rk3566.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __POWKIDDY_X55_RK3566_H +#define __POWKIDDY_X55_RK3566_H + +#include <configs/rk3568_common.h> + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#endif -- 2.34.1

2 1

[PATCH V2] board: rockchip: Add Indiedroid Nova
by Chris Morgan 08 May '24

08 May '24

From: Chris Morgan <macromorgan(a)hotmail.com> The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid. Specifications: Rockchip RK3588S SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU Optional eMMC 2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt 1x MIPI-CSI Port (4-lane or 2x 2-lane) 1x MIPI-DSI 4-lane connector 1x Micro HDMI 2.1 output, 1x DP 1.4 output Gigabit Ethernet Realtek RTL8821CS WiFi 4 pin debug UART connector 40 pin GPIO header Size: 85mm x 56mm (Raspberry Pi Form Factor) Kernel commit: 3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board") Signed-off-by: Chris Morgan <macromorgan(a)hotmail.com> --- Changes since V1: - Refactored to use the upstream Linux device tree now that that is an option. - Added board to doc/board/rockchip/rockchip.rst. --- arch/arm/mach-rockchip/rk3588/Kconfig | 10 ++++ board/indiedroid/nova/Kconfig | 12 +++++ board/indiedroid/nova/MAINTAINERS | 6 +++ configs/nova-rk3588s_defconfig | 70 +++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/nova-rk3588s.h | 15 ++++++ 6 files changed, 114 insertions(+) create mode 100644 board/indiedroid/nova/Kconfig create mode 100644 board/indiedroid/nova/MAINTAINERS create mode 100644 configs/nova-rk3588s_defconfig create mode 100644 include/configs/nova-rk3588s.h diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 39049ab35a..820e979abb 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -78,6 +78,15 @@ config TARGET_NANOPCT6_RK3588 Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) +config TARGET_NOVA_RK3588 + bool "Indiedroid Nova RK3588" + select BOARD_LATE_INIT + help + Indiedroid Nova is a Rockchip RK3588s based SBC by Indiedroid. + It comes in configurations from 4GB of RAM to 16GB of RAM, + includes socket for eMMC storage, an SDMMC slot, and a 40-pin + GPIO header for expansion. + config TARGET_RK3588_NEU6 bool "Edgeble Neural Compute Module 6(Neu6) SoM" select BOARD_LATE_INIT @@ -223,6 +232,7 @@ config TEXT_BASE source "board/edgeble/neural-compute-module-6/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" +source "board/indiedroid/nova/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" source "board/radxa/rock5a-rk3588s/Kconfig" diff --git a/board/indiedroid/nova/Kconfig b/board/indiedroid/nova/Kconfig new file mode 100644 index 0000000000..271d15a0ed --- /dev/null +++ b/board/indiedroid/nova/Kconfig @@ -0,0 +1,12 @@ +if TARGET_NOVA_RK3588 + +config SYS_BOARD + default "nova-rk3588s" + +config SYS_VENDOR + default "indiedroid" + +config SYS_CONFIG_NAME + default "nova-rk3588s" + +endif diff --git a/board/indiedroid/nova/MAINTAINERS b/board/indiedroid/nova/MAINTAINERS new file mode 100644 index 0000000000..9c56d01bf0 --- /dev/null +++ b/board/indiedroid/nova/MAINTAINERS @@ -0,0 +1,6 @@ +INDIEDROID-NOVA-RK3588 +M: Chris Morgan <macromorgan(a)hotmail.com> +S: Maintained +F: board/indiedroid/nova +F: include/configs/nova-rk3588s.h +F: configs/indiedroid-nova-rk3588_defconfig diff --git a/configs/nova-rk3588s_defconfig b/configs/nova-rk3588s_defconfig new file mode 100644 index 0000000000..231831fb55 --- /dev/null +++ b/configs/nova-rk3588s_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-indiedroid-nova" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_NOVA_RK3588=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-indiedroid-nova.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 9a726e9cde..593070e58b 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -123,6 +123,7 @@ List of mainline supported Rockchip boards: - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) - Generic RK3588S/RK3588 (generic-rk3588) + - Indiedroid Nova (nova-rk3588s) - Pine64 QuartzPro64 (quartzpro64-rk3588) - Radxa ROCK 5A (rock5a-rk3588s) - Radxa ROCK 5B (rock5b-rk3588) diff --git a/include/configs/nova-rk3588s.h b/include/configs/nova-rk3588s.h new file mode 100644 index 0000000000..0edd1ce888 --- /dev/null +++ b/include/configs/nova-rk3588s.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Collabora Ltd. + */ + +#ifndef __NOVA_RK3588S_H +#define __NOVA_RK3588S_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __NOVA_RK3588S_H */ -- 2.34.1

3 2

[PATCH V2 1/4] arm: davinci: Migrate da850-evm to OF_UPSTREAM
by Adam Ford 07 May '24

07 May '24

The da850-evm can remove the U-Boot device trees if migrated to OF_UPSTREAM. This means pointing the device trees to the ti/davinci directory. Signed-off-by: Adam Ford <aford173(a)gmail.com> --- v2: Remove DTS from Makefile. diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c9f1b25ad6..d6135c41ad 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -41,7 +41,6 @@ dtb-$(CONFIG_ARCH_APPLE) += \ t8103-j457.dtb dtb-$(CONFIG_ARCH_DAVINCI) += \ - da850-evm.dtb \ da850-lcdk.dtb \ da850-lego-ev3.dtb diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts deleted file mode 100644 index 378af9f344..0000000000 --- a/arch/arm/dts/da850-evm.dts +++ /dev/null @@ -1,453 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Device Tree for DA850 EVM board - * - * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ - */ -/dts-v1/; -#include "da850.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - compatible = "ti,da850-evm", "ti,da850"; - model = "DA850/AM1808/OMAP-L138 EVM"; - - chosen { - stdout-path = &serial2; - }; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - ethernet0 = &eth0; - spi0 = &spi1; - }; - - backlight: backlight-pwm { - pinctrl-names = "default"; - pinctrl-0 = <&ecap2_pins>; - power-supply = <&backlight_lcd>; - compatible = "pwm-backlight"; - /* - * The PWM here corresponds to production hardware. The - * schematic needs to be 1015171 (15 March 2010), Rev A - * or newer. - */ - pwms = <&ecap2 0 50000 0>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>; - default-brightness-level = <7>; - }; - - panel { - compatible = "ti,tilcdc,panel"; - pinctrl-names = "default"; - pinctrl-0 = <&lcd_pins>; - /* - * The vpif and the LCD are mutually exclusive. - * To enable VPIF, change the status below to 'disabled' then - * then change the status of the vpif below to 'okay' - */ - status = "okay"; - enable-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */ - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <16>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: 480x272 { - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hfront-porch = <3>; - hback-porch = <2>; - hsync-len = <42>; - vback-porch = <3>; - vfront-porch = <4>; - vsync-len = <11>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - }; - }; - - vbat: fixedregulator0 { - compatible = "regulator-fixed"; - regulator-name = "vbat"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - }; - - baseboard_3v3: fixedregulator-3v3 { - /* TPS73701DCQ */ - compatible = "regulator-fixed"; - regulator-name = "baseboard_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vbat>; - regulator-always-on; - regulator-boot-on; - }; - - baseboard_1v8: fixedregulator-1v8 { - /* TPS73701DCQ */ - compatible = "regulator-fixed"; - regulator-name = "baseboard_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vbat>; - regulator-always-on; - regulator-boot-on; - }; - - backlight_lcd: backlight-regulator { - compatible = "regulator-fixed"; - regulator-name = "lcd_backlight_pwr"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio 47 GPIO_ACTIVE_HIGH>; /* lcd_backlight_pwr */ - enable-active-high; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "DA850-OMAPL138 EVM"; - simple-audio-card,widgets = - "Line", "Line In", - "Line", "Line Out"; - simple-audio-card,routing = - "LINE1L", "Line In", - "LINE1R", "Line In", - "Line Out", "LLOUT", - "Line Out", "RLOUT"; - simple-audio-card,format = "dsp_b"; - simple-audio-card,bitclock-master = <&link0_codec>; - simple-audio-card,frame-master = <&link0_codec>; - simple-audio-card,bitclock-inversion; - - simple-audio-card,cpu { - sound-dai = <&mcasp0>; - system-clock-frequency = <24576000>; - }; - - link0_codec: simple-audio-card,codec { - sound-dai = <&tlv320aic3106>; - system-clock-frequency = <24576000>; - }; - }; -}; - -&ecap2 { - status = "okay"; -}; - -&ref_clk { - clock-frequency = <24000000>; -}; - -&pmx_core { - status = "okay"; - - mcasp0_pins: pinmux_mcasp0_pins { - pinctrl-single,bits = < - /* - * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR, - * AFSR, AMUTE - */ - 0x00 0x11111111 0xffffffff - /* AXR11, AXR12 */ - 0x04 0x00011000 0x000ff000 - >; - }; - nand_pins: nand_pins { - pinctrl-single,bits = < - /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */ - 0x1c 0x10110110 0xf0ff0ff0 - /* - * EMA_D[0], EMA_D[1], EMA_D[2], - * EMA_D[3], EMA_D[4], EMA_D[5], - * EMA_D[6], EMA_D[7] - */ - 0x24 0x11111111 0xffffffff - /* EMA_A[1], EMA_A[2] */ - 0x30 0x01100000 0x0ff00000 - >; - }; -}; - -&sata { - status = "okay"; -}; - -&serial0 { - status = "okay"; -}; - -&serial1 { - status = "okay"; -}; - -&serial2 { - status = "okay"; -}; - -&rtc0 { - status = "okay"; -}; - -&lcdc { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - tps: tps@48 { - reg = <0x48>; - }; - tlv320aic3106: tlv320aic3106@18 { - #sound-dai-cells = <0>; - compatible = "ti,tlv320aic3106"; - reg = <0x18>; - status = "okay"; - - /* Regulators */ - IOVDD-supply = <&vdcdc2_reg>; - AVDD-supply = <&baseboard_3v3>; - DRVDD-supply = <&baseboard_3v3>; - DVDD-supply = <&baseboard_1v8>; - }; - tca6416: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - tca6416_bb: gpio@21 { - compatible = "ti,tca6416"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - }; -}; - -&wdt { - status = "okay"; -}; - -&mmc0 { - max-frequency = <50000000>; - bus-width = <4>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio 65 GPIO_ACTIVE_HIGH>; -}; - -&spi1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; - flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "m25p64"; - spi-max-frequency = <30000000>; - m25p,fast-read; - reg = <0>; - partition@0 { - label = "U-Boot-SPL"; - reg = <0x00000000 0x00010000>; - read-only; - }; - partition@1 { - label = "U-Boot"; - reg = <0x00010000 0x00080000>; - read-only; - }; - partition@2 { - label = "U-Boot-Env"; - reg = <0x00090000 0x00010000>; - read-only; - }; - partition@3 { - label = "Kernel"; - reg = <0x000a0000 0x00280000>; - }; - partition@4 { - label = "Filesystem"; - reg = <0x00320000 0x00400000>; - }; - partition@5 { - label = "MAC-Address"; - reg = <0x007f0000 0x00010000>; - read-only; - }; - }; -}; - -&mdio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - bus_freq = <2200000>; -}; - -&eth0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mii_pins>; -}; - -&gpio { - status = "okay"; -}; - -/include/ "tps6507x.dtsi" - -&tps { - vdcdc1_2-supply = <&vbat>; - vdcdc3-supply = <&vbat>; - vldo1_2-supply = <&vbat>; - - regulators { - vdcdc1_reg: regulator@0 { - regulator-name = "VDCDC1_3.3V"; - regulator-min-microvolt = <3150000>; - regulator-max-microvolt = <3450000>; - regulator-always-on; - regulator-boot-on; - }; - - vdcdc2_reg: regulator@1 { - regulator-name = "VDCDC2_3.3V"; - regulator-min-microvolt = <1710000>; - regulator-max-microvolt = <3450000>; - regulator-always-on; - regulator-boot-on; - ti,defdcdc_default = <1>; - }; - - vdcdc3_reg: regulator@2 { - regulator-name = "VDCDC3_1.2V"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - ti,defdcdc_default = <1>; - }; - - ldo1_reg: regulator@3 { - regulator-name = "LDO1_1.8V"; - regulator-min-microvolt = <1710000>; - regulator-max-microvolt = <1890000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo2_reg: regulator@4 { - regulator-name = "LDO2_1.2V"; - regulator-min-microvolt = <1140000>; - regulator-max-microvolt = <1320000>; - regulator-always-on; - regulator-boot-on; - }; - }; -}; - -&mcasp0 { - #sound-dai-cells = <0>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mcasp0_pins>; - - op-mode = <0>; /* MCASP_IIS_MODE */ - tdm-slots = <2>; - /* 4 serializer */ - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 0 0 0 0 - 0 0 0 0 - 0 0 0 1 - 2 0 0 0 - >; - tx-num-evt = <32>; - rx-num-evt = <32>; -}; - -&edma0 { - ti,edma-reserved-slot-ranges = <32 50>; -}; - -&edma1 { - ti,edma-reserved-slot-ranges = <32 90>; -}; - -&aemif { - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins>; - status = "okay"; - cs3 { - #address-cells = <2>; - #size-cells = <1>; - clock-ranges; - ranges; - - ti,cs-chipselect = <3>; - - nand@2000000,0 { - compatible = "ti,davinci-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0x02000000 0x02000000 - 1 0x00000000 0x00008000>; - - ti,davinci-chipselect = <1>; - ti,davinci-mask-ale = <0>; - ti,davinci-mask-cle = <0>; - ti,davinci-mask-chipsel = <0>; - ti,davinci-ecc-mode = "hw"; - ti,davinci-ecc-bits = <4>; - ti,davinci-nand-use-bbt; - }; - }; -}; - -&usb_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - -&vpif { - pinctrl-names = "default"; - pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>; - /* - * The vpif and the LCD are mutually exclusive. - * To enable VPIF, disable the ti,tilcdc,panel then - * change the status below to 'okay' - */ - status = "disabled"; -}; diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 25c5db4991..8fa2660a0c 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -9,6 +9,7 @@ config TARGET_DA850EVM select MACH_DAVINCI_DA850_EVM select SOC_DA850 select SUPPORT_SPL + imply OF_UPSTREAM config TARGET_OMAPL138_LCDK bool "OMAPL138 LCDK" diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 1095a761ab..30d1a93fec 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -18,7 +18,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/davinci/da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x8001ff00 diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 4d6efbebf3..936de61071 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -14,7 +14,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8001ff00 CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/davinci/da850-evm" CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_ENV_ADDR=0x60100000 CONFIG_LTO=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 1f22b65302..62cbd02b69 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -15,7 +15,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/davinci/da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x8001ff00 -- 2.43.0

2 4

Pull request: u-boot-rockchip-20240507
by Kever Yang 07 May '24

07 May '24

Hi Tom, Please pull the updates for rockchip platform, this PR is mainly for: - migrate to use OF_UPSTREAM for rv1108, rk3308, rk3328, rk356x, rk3588; CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/20628 Thanks, - Kever The following changes since commit 52835266d3e933656a217233eaf672dd9ccd7352: Prepare v2024.07-rc2 (2024-05-06 13:54:17 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-rockchip.git tags/u-boot-rockchip-20240507 for you to fetch changes up to bc7cb4b67a4070129bbfc5bffb2f5e9fd206991e: configs: rk3588-turing-rk1: disable SPI flash by default (2024-05-07 15:56:10 +0800) ---------------------------------------------------------------- Fabio Estevam (1): rockchip: rv1108: Convert to OF_UPSTREAM Jonas Karlman (58): rockchip: rk3399-gru: Fix max SPL size on bob and kevin rockchip: rk3399-puma: Update SPL_PAD_TO Kconfig option rockchip: rk3399-puma: Use common bss and stack addresses rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr rockchip: rk3399: Sort imply statements alphabetically rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation rockchip: rk3399: Enable random generator on all boards rockchip: rk3399: Imply support for GbE PHY rockchip: rk3399: Enable DT overlay support on all boards rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options rockchip: rk3399: Add a default spl-boot-order prop rockchip: rk3399: Remove inherited bootph-all props rockchip: rk3399: Sort nodes in u-boot.dtsi files rockchip: rk3399: Fix bootph prop for vop nodes rockchip: rk3399-puma: Move uart0 bootph to board u-boot.dtsi rockchip: rk3399: Include uart related pinctrl nodes in TPL/SPL rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC rockchip: rk3399: Configure sdmmc regulator pinctrl in SPL clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock clk: rockchip: rk3399: Improve support for SCLK_PCIEPHY_REF clock clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support rockchip: rk3399: Sync SoC DT from Linux kernel v6.8 rockchip: rk3399-gru: Sync DT from Linux kernel v6.8 rockchip: rk3399-puma: Sync DT from Linux kernel v6.8 rockchip: rk3399-rock-pi-n10: Sync DT from v6.8 and update defconfig rockchip: rk3399-eaidk-610: Sync DT from v6.8 and update defconfig rockchip: rk3399-leez: Sync DT from v6.8 and update defconfig rockchip: rk3399-evb: Sync DT from v6.8 and update defconfig rockchip: rk3399-firefly: Sync DT from v6.8 and update defconfig rockchip: rk3399-orangepi: Sync DT from v6.8 and update defconfig rockchip: rk3399-roc-pc: Sync DT from v6.8 and update defconfig rockchip: rk3399-nanopi-4: Sync DT from v6.8 and update defconfig rockchip: rk3399-rock960: Sync DT from v6.8 and update defconfig rockchip: rk3399-khadas: Sync DT from v6.8 and update defconfig rockchip: rk3399-rock-pi-4: Sync DT from v6.8 and update defconfig rockchip: rk3399-rockpro64: Sync DT from v6.8 and update defconfig rockchip: rk3399-pinebook-pro: Sync DT from v6.8 and update defconfig rockchip: rk3399-pinephone-pro: Sync DT from v6.8 and update defconfig rockchip: rk3399: Drop ethernet0 alias from SoC u-boot.dtsi rockchip: rk3308: Migrate to OF_UPSTREAM rockchip: rk3308: Remove redundant device tree files rockchip: rk3328: Migrate to OF_UPSTREAM rockchip: rk3328: Remove redundant device tree files rockchip: rk3399: Migrate to OF_UPSTREAM rockchip: rk3399: Remove redundant device tree files rockchip: rk356x: Add rk3568-u-boot.dtsi rockchip: rk356x: Migrate to OF_UPSTREAM rockchip: rk356x: Remove redundant device tree files phy: rockchip: usbdp: Find phy-id from the io address phy: rockchip: usbdp: Drop rockchip_u3phy_uboot_init() phy: rockchip: usbdp: Adopt driver to work with upstream DT rockchip: rk3588-rock-5b: Drop usb-typec node from u-boot.dtsi rockchip: rk3588: Update USB3 related nodes in u-boot.dtsi rockchip: rk3588: Migrate to OF_UPSTREAM rockchip: rk3588: Remove redundant device tree files rockchip: rk3328: Add missing bootph-some-ram props clk: rockchip: rk3328: Add SCLK_USB3OTG_REF support Sam Edwards (1): configs: rk3588-turing-rk1: disable SPI flash by default arch/arm/dts/Makefile | 88 - arch/arm/dts/rk3288-vmarc-som.dtsi | 48 + arch/arm/dts/rk3308-evb.dts | 230 -- arch/arm/dts/rk3308-roc-cc.dts | 190 -- arch/arm/dts/rk3308-rock-pi-s.dts | 314 -- arch/arm/dts/rk3308.dtsi | 1888 ----------- arch/arm/dts/rk3328-evb.dts | 289 -- arch/arm/dts/rk3328-nanopi-r2c-plus.dts | 33 - arch/arm/dts/rk3328-nanopi-r2c.dts | 40 - arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +- arch/arm/dts/rk3328-nanopi-r2s.dts | 410 --- .../dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 7 +- arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 42 - arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 7 +- arch/arm/dts/rk3328-orangepi-r1-plus.dts | 374 --- arch/arm/dts/rk3328-roc-cc.dts | 384 --- arch/arm/dts/rk3328-rock-pi-e.dts | 445 --- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 7 +- arch/arm/dts/rk3328-rock64.dts | 394 --- arch/arm/dts/rk3328-u-boot.dtsi | 20 +- arch/arm/dts/rk3328.dtsi | 1944 ----------- arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi | 1 - arch/arm/dts/rk3399-eaidk-610.dts | 939 ------ arch/arm/dts/rk3399-evb-u-boot.dtsi | 29 +- arch/arm/dts/rk3399-evb.dts | 484 --- arch/arm/dts/rk3399-ficus-u-boot.dtsi | 12 +- arch/arm/dts/rk3399-ficus.dts | 170 - arch/arm/dts/rk3399-firefly-u-boot.dtsi | 6 - arch/arm/dts/rk3399-firefly.dts | 937 ------ arch/arm/dts/rk3399-gru-bob.dts | 89 - arch/arm/dts/rk3399-gru-chromebook.dtsi | 400 --- arch/arm/dts/rk3399-gru-kevin.dts | 327 -- arch/arm/dts/rk3399-gru-u-boot.dtsi | 34 +- arch/arm/dts/rk3399-gru.dtsi | 829 ----- arch/arm/dts/rk3399-khadas-edge-captain.dts | 27 - arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi | 7 +- arch/arm/dts/rk3399-khadas-edge-v.dts | 27 - arch/arm/dts/rk3399-khadas-edge.dts | 13 - arch/arm/dts/rk3399-khadas-edge.dtsi | 837 ----- arch/arm/dts/rk3399-leez-p710-u-boot.dtsi | 6 - arch/arm/dts/rk3399-leez-p710.dts | 651 ---- arch/arm/dts/rk3399-nanopc-t4.dts | 137 - arch/arm/dts/rk3399-nanopi-m4-2gb.dts | 55 +- arch/arm/dts/rk3399-nanopi-m4.dts | 66 - arch/arm/dts/rk3399-nanopi-m4b.dts | 52 - arch/arm/dts/rk3399-nanopi-neo4.dts | 50 - arch/arm/dts/rk3399-nanopi-r4s.dts | 133 - arch/arm/dts/rk3399-nanopi4-u-boot.dtsi | 18 +- arch/arm/dts/rk3399-nanopi4.dtsi | 761 ----- arch/arm/dts/rk3399-op1-opp.dtsi | 141 - arch/arm/dts/rk3399-opp.dtsi | 133 - arch/arm/dts/rk3399-orangepi-u-boot.dtsi | 12 + arch/arm/dts/rk3399-orangepi.dts | 894 ----- arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 23 +- arch/arm/dts/rk3399-pinebook-pro.dts | 1121 ------- arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 24 +- arch/arm/dts/rk3399-pinephone-pro.dts | 474 --- arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 37 +- arch/arm/dts/rk3399-puma-haikou.dts | 276 -- arch/arm/dts/rk3399-puma.dtsi | 517 --- arch/arm/dts/rk3399-roc-pc-mezzanine.dts | 111 - arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 31 +- arch/arm/dts/rk3399-roc-pc.dts | 12 - arch/arm/dts/rk3399-roc-pc.dtsi | 843 ----- arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 22 + arch/arm/dts/rk3399-rock-4c-plus.dts | 708 ---- arch/arm/dts/rk3399-rock-4se-u-boot.dtsi | 12 + arch/arm/dts/rk3399-rock-4se.dts | 65 - arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 6 - arch/arm/dts/rk3399-rock-pi-4.dtsi | 790 ----- arch/arm/dts/rk3399-rock-pi-4a.dts | 24 - arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi | 7 + arch/arm/dts/rk3399-rock-pi-4c.dts | 70 - arch/arm/dts/rk3399-rock960-u-boot.dtsi | 13 +- arch/arm/dts/rk3399-rock960.dts | 156 - arch/arm/dts/rk3399-rock960.dtsi | 670 ---- arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 22 +- arch/arm/dts/rk3399-rockpro64.dts | 30 - arch/arm/dts/rk3399-rockpro64.dtsi | 870 ----- arch/arm/dts/rk3399-t-opp.dtsi | 114 - arch/arm/dts/rk3399-u-boot.dtsi | 137 +- arch/arm/dts/rk3399.dtsi | 2714 --------------- arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi | 6 - arch/arm/dts/rk3399pro-rock-pi-n10.dts | 22 - arch/arm/dts/rk3399pro-vmarc-som.dtsi | 467 --- arch/arm/dts/rk3399pro.dtsi | 22 - arch/arm/dts/rk3566-anbernic-rgxx3.dtsi | 788 ----- arch/arm/dts/rk3566-quartz64-a.dts | 838 ----- arch/arm/dts/rk3566-quartz64-b.dts | 737 ----- arch/arm/dts/rk3566-radxa-cm3-io.dts | 281 -- arch/arm/dts/rk3566-radxa-cm3.dtsi | 425 --- arch/arm/dts/rk3566-soquartz-blade.dts | 198 -- arch/arm/dts/rk3566-soquartz-cm4.dts | 196 -- arch/arm/dts/rk3566-soquartz-model-a.dts | 236 -- arch/arm/dts/rk3566-soquartz.dtsi | 684 ---- arch/arm/dts/rk3566.dtsi | 35 - arch/arm/dts/rk3568-bpi-r2-pro.dts | 852 ----- arch/arm/dts/rk3568-evb.dts | 689 ---- arch/arm/dts/rk3568-lubancat-2.dts | 730 ----- arch/arm/dts/rk3568-nanopi-r5c.dts | 112 - arch/arm/dts/rk3568-nanopi-r5s.dts | 136 - arch/arm/dts/rk3568-nanopi-r5s.dtsi | 587 ---- arch/arm/dts/rk3568-odroid-m1.dts | 741 ----- arch/arm/dts/rk3568-pinctrl.dtsi | 3214 ------------------ arch/arm/dts/rk3568-radxa-cm3i.dtsi | 412 --- arch/arm/dts/rk3568-radxa-e25.dts | 236 -- arch/arm/dts/rk3568-rock-3a.dts | 859 ----- arch/arm/dts/rk3568-u-boot.dtsi | 3 + arch/arm/dts/rk3568.dtsi | 267 -- arch/arm/dts/rk356x.dtsi | 1886 ----------- arch/arm/dts/rk3588-coolpi-cm5-evb.dts | 216 -- arch/arm/dts/rk3588-coolpi-cm5.dtsi | 649 ---- arch/arm/dts/rk3588-edgeble-neu6a-io.dts | 23 - arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 31 - arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 89 - arch/arm/dts/rk3588-edgeble-neu6b.dtsi | 389 --- arch/arm/dts/rk3588-evb1-v10.dts | 1080 ------ arch/arm/dts/rk3588-generic-u-boot.dtsi | 4 - arch/arm/dts/rk3588-jaguar.dts | 803 ----- arch/arm/dts/rk3588-nanopc-t6.dts | 916 ------ arch/arm/dts/rk3588-orangepi-5-plus.dts | 847 ----- arch/arm/dts/rk3588-pinctrl.dtsi | 516 --- arch/arm/dts/rk3588-quartzpro64.dts | 1137 ------- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 115 +- arch/arm/dts/rk3588-rock-5b.dts | 776 ----- arch/arm/dts/rk3588-turing-rk1.dts | 21 - arch/arm/dts/rk3588-turing-rk1.dtsi | 612 ---- arch/arm/dts/rk3588-u-boot.dtsi | 36 +- arch/arm/dts/rk3588.dtsi | 341 -- arch/arm/dts/rk3588j.dtsi | 7 - arch/arm/dts/rk3588s-coolpi-4b.dts | 812 ----- arch/arm/dts/rk3588s-orangepi-5.dts | 667 ---- arch/arm/dts/rk3588s-pinctrl.dtsi | 3447 -------------------- arch/arm/dts/rk3588s-rock-5a.dts | 744 ----- arch/arm/dts/rk3588s-u-boot.dtsi | 34 +- arch/arm/dts/rk3588s.dtsi | 2485 -------------- arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi | 21 + arch/arm/dts/rv1108-elgin-r1.dts | 59 - arch/arm/dts/rv1108-evb.dts | 79 - arch/arm/dts/rv1108.dtsi | 581 ---- arch/arm/mach-rockchip/Kconfig | 42 +- configs/anbernic-rgxx3-rk3566_defconfig | 1 + configs/bpi-r2-pro-rk3568_defconfig | 2 +- configs/chromebook_bob_defconfig | 8 +- configs/chromebook_kevin_defconfig | 8 +- configs/coolpi-4b-rk3588s_defconfig | 2 +- configs/coolpi-cm5-evb-rk3588_defconfig | 2 +- configs/eaidk-610-rk3399_defconfig | 15 +- configs/elgin-rv1108_defconfig | 2 +- configs/evb-rk3308_defconfig | 2 +- configs/evb-rk3328_defconfig | 2 +- configs/evb-rk3399_defconfig | 12 +- configs/evb-rk3568_defconfig | 4 +- configs/evb-rk3588_defconfig | 2 +- configs/evb-rv1108_defconfig | 2 +- configs/ficus-rk3399_defconfig | 40 +- configs/firefly-rk3399_defconfig | 15 +- configs/generic-rk3568_defconfig | 1 + configs/generic-rk3588_defconfig | 1 + configs/jaguar-rk3588_defconfig | 2 +- configs/khadas-edge-captain-rk3399_defconfig | 33 +- configs/khadas-edge-rk3399_defconfig | 31 +- configs/khadas-edge-v-rk3399_defconfig | 33 +- configs/leez-rk3399_defconfig | 15 +- configs/lubancat-2-rk3568_defconfig | 2 +- configs/nanopc-t4-rk3399_defconfig | 16 +- configs/nanopc-t6-rk3588_defconfig | 2 +- configs/nanopi-m4-2gb-rk3399_defconfig | 23 +- configs/nanopi-m4-rk3399_defconfig | 24 +- configs/nanopi-m4b-rk3399_defconfig | 24 +- configs/nanopi-neo4-rk3399_defconfig | 17 +- configs/nanopi-r2c-plus-rk3328_defconfig | 2 +- configs/nanopi-r2c-rk3328_defconfig | 2 +- configs/nanopi-r2s-rk3328_defconfig | 2 +- configs/nanopi-r4s-rk3399_defconfig | 17 +- configs/nanopi-r5c-rk3568_defconfig | 2 +- configs/nanopi-r5s-rk3568_defconfig | 2 +- configs/neu6a-io-rk3588_defconfig | 2 +- configs/neu6b-io-rk3588_defconfig | 2 +- configs/odroid-m1-rk3568_defconfig | 2 +- configs/orangepi-5-plus-rk3588_defconfig | 2 +- configs/orangepi-5-rk3588s_defconfig | 2 +- configs/orangepi-r1-plus-lts-rk3328_defconfig | 2 +- configs/orangepi-r1-plus-rk3328_defconfig | 2 +- configs/orangepi-rk3399_defconfig | 16 +- configs/pinebook-pro-rk3399_defconfig | 15 +- configs/pinephone-pro-rk3399_defconfig | 15 +- configs/pinetab2-rk3566_defconfig | 1 + configs/puma-rk3399_defconfig | 16 +- configs/quartz64-a-rk3566_defconfig | 2 +- configs/quartz64-b-rk3566_defconfig | 2 +- configs/quartzpro64-rk3588_defconfig | 2 +- configs/radxa-cm3-io-rk3566_defconfig | 2 +- configs/radxa-e25-rk3568_defconfig | 2 +- configs/roc-cc-rk3308_defconfig | 2 +- configs/roc-cc-rk3328_defconfig | 2 +- configs/roc-pc-mezzanine-rk3399_defconfig | 13 +- configs/roc-pc-rk3399_defconfig | 15 +- configs/rock-3a-rk3568_defconfig | 2 +- configs/rock-4c-plus-rk3399_defconfig | 29 +- configs/rock-4se-rk3399_defconfig | 30 +- configs/rock-pi-4-rk3399_defconfig | 15 +- configs/rock-pi-4c-rk3399_defconfig | 29 +- configs/rock-pi-e-rk3328_defconfig | 2 +- configs/rock-pi-n10-rk3399pro_defconfig | 12 +- configs/rock-pi-s-rk3308_defconfig | 2 +- configs/rock5a-rk3588s_defconfig | 2 +- configs/rock5b-rk3588_defconfig | 2 +- configs/rock64-rk3328_defconfig | 2 +- configs/rock960-rk3399_defconfig | 16 +- configs/rockpro64-rk3399_defconfig | 18 +- configs/soquartz-blade-rk3566_defconfig | 2 +- configs/soquartz-cm4-rk3566_defconfig | 2 +- configs/soquartz-model-a-rk3566_defconfig | 2 +- configs/toybrick-rk3588_defconfig | 1 + configs/turing-rk1-rk3588_defconfig | 16 +- .../clock/rockchip,rk3399-dmc.txt | 42 - drivers/clk/rockchip/clk_rk3328.c | 4 + drivers/clk/rockchip/clk_rk3399.c | 67 +- drivers/phy/rockchip/phy-rockchip-usbdp.c | 126 +- include/dt-bindings/clock/rk3308-cru.h | 387 --- include/dt-bindings/clock/rk3328-cru.h | 393 --- include/dt-bindings/clock/rk3399-cru.h | 749 ----- include/dt-bindings/clock/rk3568-cru.h | 926 ------ include/dt-bindings/clock/rockchip,rk3588-cru.h | 766 ----- include/dt-bindings/power/rk3328-power.h | 19 - include/dt-bindings/power/rk3399-power.h | 53 - include/dt-bindings/power/rk3568-power.h | 32 - include/dt-bindings/power/rk3588-power.h | 69 - include/dt-bindings/reset/rockchip,rk3588-cru.h | 754 ----- 230 files changed, 994 insertions(+), 62636 deletions(-) delete mode 100644 arch/arm/dts/rk3308-evb.dts delete mode 100644 arch/arm/dts/rk3308-roc-cc.dts delete mode 100644 arch/arm/dts/rk3308-rock-pi-s.dts delete mode 100644 arch/arm/dts/rk3308.dtsi delete mode 100644 arch/arm/dts/rk3328-evb.dts delete mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus.dts delete mode 100644 arch/arm/dts/rk3328-nanopi-r2c.dts delete mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts delete mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts delete mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus.dts delete mode 100644 arch/arm/dts/rk3328-roc-cc.dts delete mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts delete mode 100644 arch/arm/dts/rk3328-rock64.dts delete mode 100644 arch/arm/dts/rk3328.dtsi delete mode 100644 arch/arm/dts/rk3399-eaidk-610.dts delete mode 100644 arch/arm/dts/rk3399-evb.dts delete mode 100644 arch/arm/dts/rk3399-ficus.dts delete mode 100644 arch/arm/dts/rk3399-firefly.dts delete mode 100644 arch/arm/dts/rk3399-gru-bob.dts delete mode 100644 arch/arm/dts/rk3399-gru-chromebook.dtsi delete mode 100644 arch/arm/dts/rk3399-gru-kevin.dts delete mode 100644 arch/arm/dts/rk3399-gru.dtsi delete mode 100644 arch/arm/dts/rk3399-khadas-edge-captain.dts delete mode 100644 arch/arm/dts/rk3399-khadas-edge-v.dts delete mode 100644 arch/arm/dts/rk3399-khadas-edge.dts delete mode 100644 arch/arm/dts/rk3399-khadas-edge.dtsi delete mode 100644 arch/arm/dts/rk3399-leez-p710.dts delete mode 100644 arch/arm/dts/rk3399-nanopc-t4.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-m4.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-m4b.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-neo4.dts delete mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts delete mode 100644 arch/arm/dts/rk3399-nanopi4.dtsi delete mode 100644 arch/arm/dts/rk3399-op1-opp.dtsi delete mode 100644 arch/arm/dts/rk3399-opp.dtsi delete mode 100644 arch/arm/dts/rk3399-orangepi.dts delete mode 100644 arch/arm/dts/rk3399-pinebook-pro.dts delete mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts delete mode 100644 arch/arm/dts/rk3399-puma-haikou.dts delete mode 100644 arch/arm/dts/rk3399-puma.dtsi delete mode 100644 arch/arm/dts/rk3399-roc-pc-mezzanine.dts delete mode 100644 arch/arm/dts/rk3399-roc-pc.dts delete mode 100644 arch/arm/dts/rk3399-roc-pc.dtsi delete mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts delete mode 100644 arch/arm/dts/rk3399-rock-4se.dts delete mode 100644 arch/arm/dts/rk3399-rock-pi-4.dtsi delete mode 100644 arch/arm/dts/rk3399-rock-pi-4a.dts delete mode 100644 arch/arm/dts/rk3399-rock-pi-4c.dts delete mode 100644 arch/arm/dts/rk3399-rock960.dts delete mode 100644 arch/arm/dts/rk3399-rock960.dtsi delete mode 100644 arch/arm/dts/rk3399-rockpro64.dts delete mode 100644 arch/arm/dts/rk3399-rockpro64.dtsi delete mode 100644 arch/arm/dts/rk3399-t-opp.dtsi delete mode 100644 arch/arm/dts/rk3399.dtsi delete mode 100644 arch/arm/dts/rk3399pro-rock-pi-n10.dts delete mode 100644 arch/arm/dts/rk3399pro-vmarc-som.dtsi delete mode 100644 arch/arm/dts/rk3399pro.dtsi delete mode 100644 arch/arm/dts/rk3566-anbernic-rgxx3.dtsi delete mode 100644 arch/arm/dts/rk3566-quartz64-a.dts delete mode 100644 arch/arm/dts/rk3566-quartz64-b.dts delete mode 100644 arch/arm/dts/rk3566-radxa-cm3-io.dts delete mode 100644 arch/arm/dts/rk3566-radxa-cm3.dtsi delete mode 100644 arch/arm/dts/rk3566-soquartz-blade.dts delete mode 100644 arch/arm/dts/rk3566-soquartz-cm4.dts delete mode 100644 arch/arm/dts/rk3566-soquartz-model-a.dts delete mode 100644 arch/arm/dts/rk3566-soquartz.dtsi delete mode 100644 arch/arm/dts/rk3566.dtsi delete mode 100644 arch/arm/dts/rk3568-bpi-r2-pro.dts delete mode 100644 arch/arm/dts/rk3568-evb.dts delete mode 100644 arch/arm/dts/rk3568-lubancat-2.dts delete mode 100644 arch/arm/dts/rk3568-nanopi-r5c.dts delete mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dts delete mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dtsi delete mode 100644 arch/arm/dts/rk3568-odroid-m1.dts delete mode 100644 arch/arm/dts/rk3568-pinctrl.dtsi delete mode 100644 arch/arm/dts/rk3568-radxa-cm3i.dtsi delete mode 100644 arch/arm/dts/rk3568-radxa-e25.dts delete mode 100644 arch/arm/dts/rk3568-rock-3a.dts create mode 100644 arch/arm/dts/rk3568-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3568.dtsi delete mode 100644 arch/arm/dts/rk356x.dtsi delete mode 100644 arch/arm/dts/rk3588-coolpi-cm5-evb.dts delete mode 100644 arch/arm/dts/rk3588-coolpi-cm5.dtsi delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io.dts delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6a.dtsi delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6b-io.dts delete mode 100644 arch/arm/dts/rk3588-edgeble-neu6b.dtsi delete mode 100644 arch/arm/dts/rk3588-evb1-v10.dts delete mode 100644 arch/arm/dts/rk3588-jaguar.dts delete mode 100644 arch/arm/dts/rk3588-nanopc-t6.dts delete mode 100644 arch/arm/dts/rk3588-orangepi-5-plus.dts delete mode 100644 arch/arm/dts/rk3588-pinctrl.dtsi delete mode 100644 arch/arm/dts/rk3588-quartzpro64.dts delete mode 100644 arch/arm/dts/rk3588-rock-5b.dts delete mode 100644 arch/arm/dts/rk3588-turing-rk1.dts delete mode 100644 arch/arm/dts/rk3588-turing-rk1.dtsi delete mode 100644 arch/arm/dts/rk3588.dtsi delete mode 100644 arch/arm/dts/rk3588j.dtsi delete mode 100644 arch/arm/dts/rk3588s-coolpi-4b.dts delete mode 100644 arch/arm/dts/rk3588s-orangepi-5.dts delete mode 100644 arch/arm/dts/rk3588s-pinctrl.dtsi delete mode 100644 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