December 2024 - U-Boot

[PATCH v1 0/3] Restore original GPIO uclass logic
by Svyatoslav Ryhel 10 Dec '24

10 Dec '24

Move PMIC GPIO child handling into PMIC's driver by bounding GPIO driver to parent node. Remove gpio-uclass workaround. Svyatoslav Ryhel (3): Revert "drivers: gpio-uclass: support PMIC GPIO children" pmic: max77663: bind children to parent node pmic: palmas: bind sysreset to parent node drivers/gpio/gpio-uclass.c | 20 -------------------- drivers/power/pmic/max77663.c | 9 +++++---- drivers/power/pmic/palmas.c | 5 +++-- 3 files changed, 8 insertions(+), 26 deletions(-) -- 2.43.0

2 6

[PATCH v3] usb: onboard-hub: Update the bind function based on peer-hub property
by Venkatesh Yadav Abbarapu 10 Dec '24

10 Dec '24

As the "peer-hub" property is optional, don't error out just skip the bind function. Fixes: 57e30b09fc ("usb: onboard-hub: Bail out if peer hub is already probed") Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> --- Changes in v2: - Removed the peer_hub variable and used the return value. Changes in v3: - Removed the else condition. --- common/usb_onboard_hub.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/common/usb_onboard_hub.c b/common/usb_onboard_hub.c index 6f28036e09..7fe62b043e 100644 --- a/common/usb_onboard_hub.c +++ b/common/usb_onboard_hub.c @@ -183,7 +183,12 @@ static int usb_onboard_hub_bind(struct udevice *dev) int ret, off; ret = dev_read_phandle_with_args(dev, "peer-hub", NULL, 0, 0, &phandle); - if (ret) { + if (ret == -ENOENT) { + dev_dbg(dev, "peer-hub property not present\n"); + return 0; + } + + if (ret) { dev_err(dev, "peer-hub not specified\n"); return ret; } -- 2.34.1

4 3

[PATCH v4 00/25] efi: Tidy up confusion between pointers and addresses
by Simon Glass 10 Dec '24

10 Dec '24

The EFI-loader implementation converts things back and forth between addresses and pointers, with not much consistency in how this is done. Within most of U-Boot a pointer is a void * and an address is a ulong This convention is very helpful, since it is obvious in common code as to whether you need to call map_sysmem() and friends, or not. As part of cleaning up the EFI memory-management, I found it almost impossible to know in some cases whether something is an address or a pointer. I decided to give up on that and come back to it when this is resolved. This series starts applying the normal ulong/void * convention to the EFI_loader code, so making things easier to follow. For now, u64 is often used instead of ulong, but the effect is the same. The main changes are: - Rather than using the external struct efi_mem_desc data-structure for internal bookkeeping, create a new one, so it can have different semantics - Within efi_memory.c addresses are used, rather than addresses masquerading as pointers. The conversions are done in efi_boottime Link: https://lore.kernel.org/u-boot/20240725135629.3505072-1-sjg@chromium.org/ Changes in v4: - Add new patch to show the address for pool allocations - Combine the various pointer-to-address patches into one Changes in v3: - Adjust comments - Show the returned address rather than the pointer - Put the header-file in its own section - Add comment to struct efi_device_path_memory - Use a pointer for the values in struct efi_device_path_memory Changes in v2: - Fix missing @ - Note that this holds pointers, not addresses - Add a new patch with comments where incorrect addresses are used - Use EFI_PRINT() instead of log_debug() - Rebase on early patch - Add new patch to add the EFI-loader API documentation - Drop the changes to the boottime API - Add new patch to use a separate stuct for memory nodes - Drop patch 'Convert efi_get_memory_map() to return pointers' - Drop patch 'efi_loader: Make more use of ulong' - Significantly expand and redirect the series Simon Glass (25): efi: Define fields in struct efi_mem_desc efi_loader: Fix typos in enum efi_allocate_type efi_loader: Drop extra brackets in efi_mem_carve_out() efi_loader: Add comments where incorrect addresses are used efi_loader: Show the resulting memory address from an alloc efi_loader: Update startimage_exit self-test to check error efi_loader: Move some memory-function comments to header doc: efi: Add the EFI-loader API documentation efi_loader: Use the enum for memory type efi_loader: Use a separate struct for memory nodes efi_loader: Drop virtual_start from priv_mem_desc efi_loader: Drop reserved from priv_mem_desc efi_loader: Use the enum for the memory type in priv_mem_desc efi_loader: Avoid assigning desc in efi_mem_carve_out() efi_loader: Move struct efi_mem_list fields together efi_loader: Rename struct efi_mem_list to mem_node efi_loader: Rename physical_start to base efi_loader: Use correct type in efi_add_runtime_mmio() efi_loader: Show the address for pool allocations efi_loader: Don't try to add sandbox runtime code efi_loader: Update to use addresses internally efi_loader: Correct address-usage in copy_fdt() efi_loader: Drop comments about incorrect addresses efi_bootmgr: Avoid casts in try_load_from_uri_path() efi_loader: Simplify efi_dp_from_mem() arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 +- arch/arm/mach-bcm283x/reset.c | 2 +- doc/api/efi.rst | 6 + include/efi.h | 23 +- include/efi_api.h | 10 + include/efi_loader.h | 102 ++++-- lib/efi_loader/efi_bootbin.c | 3 +- lib/efi_loader/efi_bootmgr.c | 10 +- lib/efi_loader/efi_boottime.c | 53 ++- lib/efi_loader/efi_device_path.c | 18 +- lib/efi_loader/efi_dt_fixup.c | 4 - lib/efi_loader/efi_helper.c | 4 +- lib/efi_loader/efi_image_loader.c | 3 +- lib/efi_loader/efi_memory.c | 301 +++++++----------- lib/efi_loader/efi_runtime.c | 7 +- lib/efi_loader/efi_var_mem.c | 6 +- .../efi_selftest_startimage_exit.c | 6 +- lib/lmb.c | 10 +- 18 files changed, 313 insertions(+), 257 deletions(-) -- 2.43.0

4 47

[PATCH v2 0/7] arm64: zynqmp: Convert platforms to use binman
by Michal Simek 10 Dec '24

10 Dec '24

Hi, I have put togethere couple of patches to convert platforms to use binman. The first patch has been sent separately. The third (SOM description) has been also sent out for ilustration as RFC. The last one is just cherry-pick the patch which has been reverted because our platform wasn't converted to binman yet. v1 of external description https://lore.kernel.org/r/fbed0251437b61a2f7a85596d7403b5b9c8237c1.17283063… RFC for SOM: https://lore.kernel.org/r/de1b8dbabd5ab7f20d7aac217ec4f5074d39f1da.17284627… Thanks, Michal Changes in v2: - Change subject, align commit message - binman - rename variable - Use relative path - Use separate variable in makefile to also handle empty string and default to u-boot.dtb - new patch - new patch - Align fit,fdt-list-val to have shorter lines - Add reference to defconfig - Rename zynqmp-som-binman.dts to zynqmp-binman-som.dts - Use conf instead of config - Change image name from image.bin to qspi.bin - Remove RFC - Change default addresses for BL31/BL32 - new patch - new patch - Rebase on the top of my series which do conversion to binman - Taken from git with all tags Marek Vasut (1): Makefile: Drop SPL_FIT_GENERATOR support Michal Simek (6): binman: Add option for pointing to separate description common: binman: Calling initr_binman() when BINMAN_FDT arm64: zynqmp: Describe empty binman node arm64: zynqmp: Add binman description for SOM arm64: zynqmp: Generate u-boot.itb and QSPI image via binman arm64: zynqmp: Remove mkimage fit script Makefile | 29 +-- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/zynqmp-binman-mini.dts | 10 + arch/arm/dts/zynqmp-binman-som.dts | 225 ++++++++++++++++ arch/arm/dts/zynqmp-binman.dts | 111 ++++++++ arch/arm/dts/zynqmp-u-boot.dtsi | 11 + arch/arm/mach-zynqmp/Kconfig | 14 + arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 240 ------------------ boot/Kconfig | 15 -- common/board_r.c | 7 +- configs/xilinx_zynqmp_kria_defconfig | 3 + configs/xilinx_zynqmp_mini_defconfig | 2 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 3 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 3 + configs/xilinx_zynqmp_mini_nand_defconfig | 2 + .../xilinx_zynqmp_mini_nand_single_defconfig | 2 + configs/xilinx_zynqmp_mini_qspi_defconfig | 3 + configs/xilinx_zynqmp_virt_defconfig | 3 + doc/usage/fit/howto.rst | 4 - lib/Kconfig | 9 + 21 files changed, 418 insertions(+), 282 deletions(-) create mode 100644 arch/arm/dts/zynqmp-binman-mini.dts create mode 100644 arch/arm/dts/zynqmp-binman-som.dts create mode 100644 arch/arm/dts/zynqmp-binman.dts create mode 100644 arch/arm/dts/zynqmp-u-boot.dtsi delete mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh -- 2.43.0

3 27

[PATCH 1/6] Revert "spi: zynq_qspi: Add parallel memories support in QSPI driver"
by Marek Vasut 10 Dec '24

10 Dec '24

This reverts commit 1e36d34b52e7a1ebe5a2a5339d6905540f4253aa. This parallel/stacked support breaks basic SPI NOR support, e.g. this no longer works: => sf probe && sf update 0x50000000 0 0x160000 SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB device 0 offset 0x0, size 0x160000 SPI flash failed in read step Since none of this seems to be in Linux either, revert it all. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Andre Przywara <andre.przywara(a)arm.com> Cc: Ashok Reddy Soma <ashok.reddy.soma(a)amd.com> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Michael Walle <mwalle(a)kernel.org> Cc: Michal Simek <michal.simek(a)amd.com> Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: Pratyush Yadav <p.yadav(a)ti.com> Cc: Quentin Schulz <quentin.schulz(a)cherry.de> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Tudor Ambarus <tudor.ambarus(a)linaro.org> Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> Cc: u-boot(a)lists.denx.de Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- drivers/spi/zynq_qspi.c | 115 ++++------------------------------------ 1 file changed, 11 insertions(+), 104 deletions(-) diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index f5b3fb5c125..e8bc196ce9e 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2013 - 2022, Xilinx, Inc. + * (C) Copyright 2013 Xilinx, Inc. * (C) Copyright 2015 Jagan Teki <jteki(a)openedev.com> - * (C) Copyright 2023, Advanced Micro Devices, Inc. * * Xilinx Zynq Quad-SPI(QSPI) controller driver (master mode only) */ @@ -13,12 +12,10 @@ #include <log.h> #include <malloc.h> #include <spi.h> -#include <spi_flash.h> #include <asm/global_data.h> #include <asm/io.h> #include <linux/bitops.h> #include <spi-mem.h> -#include "../mtd/spi/sf_internal.h" DECLARE_GLOBAL_DATA_PTR; @@ -44,21 +41,6 @@ DECLARE_GLOBAL_DATA_PTR; #define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst */ #define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst */ #define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst */ -#define ZYNQ_QSPI_FR_QOUT_CODE 0x6B /* read instruction code */ - -#define QSPI_SELECT_LOWER_CS BIT(0) -#define QSPI_SELECT_UPPER_CS BIT(1) - -/* - * QSPI Linear Configuration Register - * - * It is named Linear Configuration but it controls other modes when not in - * linear mode also. - */ -#define ZYNQ_QSPI_LCFG_TWO_MEM_MASK 0x40000000 /* QSPI Enable Bit Mask */ -#define ZYNQ_QSPI_LCFG_SEP_BUS_MASK 0x20000000 /* QSPI Enable Bit Mask */ -#define ZYNQ_QSPI_LCFG_U_PAGE 0x10000000 /* QSPI Upper memory set */ -#define ZYNQ_QSPI_LCFG_DUMMY_SHIFT 8 #define ZYNQ_QSPI_TXFIFO_THRESHOLD 1 /* Tx FIFO threshold level*/ #define ZYNQ_QSPI_RXFIFO_THRESHOLD 32 /* Rx FIFO threshold level */ @@ -118,11 +100,7 @@ struct zynq_qspi_priv { int bytes_to_transfer; int bytes_to_receive; unsigned int is_inst; - unsigned int is_parallel; - unsigned int is_stacked; - unsigned int u_page; unsigned cs_change:1; - unsigned is_strip:1; }; static int zynq_qspi_of_to_plat(struct udevice *bus) @@ -133,6 +111,7 @@ static int zynq_qspi_of_to_plat(struct udevice *bus) plat->regs = (struct zynq_qspi_regs *)fdtdec_get_addr(blob, node, "reg"); + return 0; } @@ -167,9 +146,6 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv) /* Disable Interrupts */ writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->idr); - /* Disable linear mode as the boot loader may have used it */ - writel(0x0, &regs->lqspicfg); - /* Clear the TX and RX threshold reg */ writel(ZYNQ_QSPI_TXFIFO_THRESHOLD, &regs->txftr); writel(ZYNQ_QSPI_RXFIFO_THRESHOLD, &regs->rxftr); @@ -187,12 +163,13 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv) confr |= ZYNQ_QSPI_CR_IFMODE_MASK | ZYNQ_QSPI_CR_MCS_MASK | ZYNQ_QSPI_CR_PCS_MASK | ZYNQ_QSPI_CR_FW_MASK | ZYNQ_QSPI_CR_MSTREN_MASK; - - if (priv->is_stacked) - confr |= 0x10; - writel(confr, &regs->cr); + /* Disable the LQSPI feature */ + confr = readl(&regs->lqspicfg); + confr &= ~ZYNQ_QSPI_LQSPICFG_LQMODE_MASK; + writel(confr, &regs->lqspicfg); + /* Enable SPI */ writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); } @@ -203,7 +180,6 @@ static int zynq_qspi_child_pre_probe(struct udevice *bus) struct zynq_qspi_priv *priv = dev_get_priv(bus->parent); priv->max_hz = slave->max_hz; - slave->multi_cs_cap = true; return 0; } @@ -386,8 +362,8 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size) unsigned len, offset; struct zynq_qspi_regs *regs = priv->regs; static const unsigned offsets[4] = { - ZYNQ_QSPI_TXD_00_01_OFFSET, ZYNQ_QSPI_TXD_00_10_OFFSET, - ZYNQ_QSPI_TXD_00_11_OFFSET, ZYNQ_QSPI_TXD_00_00_OFFSET }; + ZYNQ_QSPI_TXD_00_00_OFFSET, ZYNQ_QSPI_TXD_00_01_OFFSET, + ZYNQ_QSPI_TXD_00_10_OFFSET, ZYNQ_QSPI_TXD_00_11_OFFSET }; while ((fifocount < size) && (priv->bytes_to_transfer > 0)) { @@ -409,11 +385,7 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size) return; len = priv->bytes_to_transfer; zynq_qspi_write_data(priv, &data, len); - if ((priv->is_parallel || priv->is_stacked) && - !priv->is_inst && (len % 2)) - len++; - offset = (priv->rx_buf) ? - offsets[3] : offsets[len - 1]; + offset = (priv->rx_buf) ? offsets[0] : offsets[len]; writel(data, &regs->cr + (offset / 4)); } } @@ -518,7 +490,6 @@ static int zynq_qspi_irq_poll(struct zynq_qspi_priv *priv) */ static int zynq_qspi_start_transfer(struct zynq_qspi_priv *priv) { - static u8 current_u_page; u32 data = 0; struct zynq_qspi_regs *regs = priv->regs; @@ -528,34 +499,6 @@ static int zynq_qspi_start_transfer(struct zynq_qspi_priv *priv) priv->bytes_to_transfer = priv->len; priv->bytes_to_receive = priv->len; - if (priv->is_parallel) - writel((ZYNQ_QSPI_LCFG_TWO_MEM_MASK | - ZYNQ_QSPI_LCFG_SEP_BUS_MASK | - (1 << ZYNQ_QSPI_LCFG_DUMMY_SHIFT) | - ZYNQ_QSPI_FR_QOUT_CODE), &regs->lqspicfg); - - if (priv->is_inst && priv->is_stacked && current_u_page != priv->u_page) { - if (priv->u_page) { - /* Configure two memories on shared bus - * by enabling upper mem - */ - writel((ZYNQ_QSPI_LCFG_TWO_MEM_MASK | - ZYNQ_QSPI_LCFG_U_PAGE | - (1 << ZYNQ_QSPI_LCFG_DUMMY_SHIFT) | - ZYNQ_QSPI_FR_QOUT_CODE), - &regs->lqspicfg); - } else { - /* Configure two memories on shared bus - * by enabling lower mem - */ - writel((ZYNQ_QSPI_LCFG_TWO_MEM_MASK | - (1 << ZYNQ_QSPI_LCFG_DUMMY_SHIFT) | - ZYNQ_QSPI_FR_QOUT_CODE), - &regs->lqspicfg); - } - current_u_page = priv->u_page; - } - if (priv->len < 4) zynq_qspi_fill_tx_fifo(priv, priv->len); else @@ -655,8 +598,7 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen, * Assume that the beginning of a transfer with bits to * transmit must contain a device command. */ - if ((dout && flags & SPI_XFER_BEGIN) || - (flags & SPI_XFER_END && !priv->is_strip)) + if (dout && flags & SPI_XFER_BEGIN) priv->is_inst = 1; else priv->is_inst = 0; @@ -666,11 +608,6 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen, else priv->cs_change = 0; - if (flags & SPI_XFER_U_PAGE) - priv->u_page = 1; - else - priv->u_page = 0; - zynq_qspi_transfer(priv); return 0; @@ -734,35 +671,14 @@ static int zynq_qspi_set_mode(struct udevice *bus, uint mode) return 0; } -bool update_stripe(const struct spi_mem_op *op) -{ - if (op->cmd.opcode == SPINOR_OP_BE_4K || - op->cmd.opcode == SPINOR_OP_CHIP_ERASE || - op->cmd.opcode == SPINOR_OP_SE || - op->cmd.opcode == SPINOR_OP_WREAR || - op->cmd.opcode == SPINOR_OP_WRSR - ) - return false; - - return true; -} - static int zynq_qspi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) { - struct udevice *bus = slave->dev->parent; - struct zynq_qspi_priv *priv = dev_get_priv(bus); int op_len, pos = 0, ret, i; unsigned int flag = 0; const u8 *tx_buf = NULL; u8 *rx_buf = NULL; - if ((slave->flags & QSPI_SELECT_LOWER_CS) && - (slave->flags & QSPI_SELECT_UPPER_CS)) - priv->is_parallel = true; - if (slave->flags & SPI_XFER_STACKED) - priv->is_stacked = true; - if (op->data.nbytes) { if (op->data.dir == SPI_MEM_DATA_IN) rx_buf = op->data.buf.in; @@ -787,9 +703,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, if (op->dummy.nbytes) memset(op_buf + pos, 0xff, op->dummy.nbytes); - if (slave->flags & SPI_XFER_U_PAGE) - flag |= SPI_XFER_U_PAGE; - /* 1st transfer: opcode + address + dummy cycles */ /* Make sure to set END bit if no tx or rx data messages follow */ if (!tx_buf && !rx_buf) @@ -800,9 +713,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, if (ret) return ret; - if (priv->is_parallel) - priv->is_strip = update_stripe(op); - /* 2nd transfer: rx or tx data path */ if (tx_buf || rx_buf) { ret = zynq_qspi_xfer(slave->dev, op->data.nbytes * 8, tx_buf, @@ -811,9 +721,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, return ret; } - priv->is_parallel = false; - priv->is_stacked = false; - slave->flags &= ~SPI_XFER_MASK; spi_release_bus(slave); return 0; -- 2.45.2

9 37

[PATCH] mtd: nand: raw: atmel: remove unnecessary return value
by Marcus Folkesson 10 Dec '24

10 Dec '24

The condition 'ret' is always true as it is never set to other than -EIO. Remove 'ret' and the condition for copy. Signed-off-by: Marcus Folkesson <marcus.folkesson(a)gmail.com> --- drivers/mtd/nand/raw/atmel/nand-controller.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index ee4ec6da58..00d7e177b9 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -568,12 +568,9 @@ static void atmel_nfc_copy_to_sram(struct nand_chip *chip, const u8 *buf, struct mtd_info *mtd = nand_to_mtd(chip); struct atmel_nand *nand = to_atmel_nand(chip); struct atmel_hsmc_nand_controller *nc; - int ret = -EIO; nc = to_hsmc_nand_controller(nand->controller); - - if (ret) - memcpy_toio(nc->sram.virt, buf, mtd->writesize); + memcpy_toio(nc->sram.virt, buf, mtd->writesize); if (oob_required) memcpy_toio(nc->sram.virt + mtd->writesize, chip->oob_poi, @@ -586,12 +583,9 @@ static void atmel_nfc_copy_from_sram(struct nand_chip *chip, u8 *buf, struct mtd_info *mtd = nand_to_mtd(chip); struct atmel_nand *nand = to_atmel_nand(chip); struct atmel_hsmc_nand_controller *nc; - int ret = -EIO; nc = to_hsmc_nand_controller(nand->controller); - - if (ret) - memcpy_fromio(buf, nc->sram.virt, mtd->writesize); + memcpy_fromio(buf, nc->sram.virt, mtd->writesize); if (oob_required) memcpy_fromio(chip->oob_poi, nc->sram.virt + mtd->writesize, -- 2.45.1

3 7

[PATCH v5 0/2] riscv: spacemit: add support for bananapi-f3
by Huan Zhou 10 Dec '24

10 Dec '24

Banana Pi F3 board is a industrial grade RISC-V development board, it design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 4G DDR and 16G eMMC onboard. 2x GbE Ethernet port, 4x USB 3.0 and PCIe for M.2 interface, support HDMI and Dual MIPI-CSI Camera. This patch introduces fundamental support for the Banana Pi F3 board, encompassing UART, CPU, and PLIC support. This ensures that U-Boot can operate in serial console mode. Changes in v5: - Formal the name from Bananapif3 -> Banana Pi BPI-F3 - Trailing whitespace - New blank line at EOF in spacemit/index.rst - Link to v4: https://lore.kernel.org/r/20241129-pickup-bpif3-v4-0-e99fabf66e33@gmail.com Changes in v4: - Change uart compatible in k1.dtsi in v3, cause related driver in not implemented in u-boot. - Update doc, show how to validate the patch. - Update maintainer, remove kongyang cause he lefted. - Link to v3: https://lore.kernel.org/r/20241114-pickup-bpif3-v3-0-98a45802ab79@gmail.com Changes in v3: - Add base commit - Clear redifinition warning while building in UART_IIR_ID - Change underscore to dash in bananapi*f3 - Update maintainer - link to v2 https://lore.kernel.org/u-boot/20240718043329.1500-1-seashell11234455@gmail… Changes in v2: - Change license to GPL-2.0-or-later - Add memory node for dts - Add ft_board_setup function for kernel memory init - Use default prompt - links to v1 https://lore.kernel.org/u-boot/20240714150828.736-1-seashell11234455@gmail.… Signed-off-by: Huan Zhou <pericycle.cc(a)gmail.com> Signed-off-by: Kongyang Liu <seashell11234455(a)gmail.com> --- Kongyang Liu (2): riscv: spacemit: bananapi_f3: initial support added doc: spacemit: bananapi_f3: document Banana Pi F3 board arch/riscv/Kconfig | 5 + arch/riscv/cpu/k1/Kconfig | 18 ++ arch/riscv/cpu/k1/Makefile | 6 + arch/riscv/cpu/k1/cpu.c | 9 + arch/riscv/cpu/k1/dram.c | 54 ++++ arch/riscv/dts/Makefile | 1 + arch/riscv/dts/k1-bananapi-f3.dts | 25 ++ arch/riscv/dts/k1.dtsi | 459 +++++++++++++++++++++++++++++++++ board/spacemit/bananapi-f3/Kconfig | 25 ++ board/spacemit/bananapi-f3/MAINTAINERS | 6 + board/spacemit/bananapi-f3/Makefile | 5 + board/spacemit/bananapi-f3/board.c | 9 + configs/bananapi-f3_defconfig | 20 ++ doc/board/index.rst | 1 + doc/board/spacemit/bananapi-f3.rst | 86 ++++++ doc/board/spacemit/index.rst | 9 + include/configs/bananapi-f3.h | 13 + 17 files changed, 751 insertions(+) --- base-commit: 40c45a57974bdb09fffa31dde65ddf69e5de53eb change-id: 20241112-pickup-bpif3-245ab208b9a4 Best regards, -- Huan Zhou <pericycle.cc(a)gmail.com>

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[PATCH v3 0/2] Enable mt35xu512aba_fixups for all mt35xx flashes
by Venkatesh Yadav Abbarapu 10 Dec '24

10 Dec '24

Add SPI_NOR_OCTAL_DTR_READ flags to micron flashes mt35xu01g and mt35xu02g. Changes in v3: - Seperated into two patches, one for nor-ids and other for mt35 fixups. Venkatesh Yadav Abbarapu (2): mtd: spi-nor-ids: Enable DTR for micron flashes mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes drivers/mtd/spi/spi-nor-core.c | 6 +++++- drivers/mtd/spi/spi-nor-ids.c | 6 ++++-- 2 files changed, 9 insertions(+), 3 deletions(-) -- 2.34.1

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[ANN] U-Boot v2025.01-rc4 released
by Tom Rini 09 Dec '24

09 Dec '24

Hey all, Once again it's release day and so here's v2025.01-rc4 and I'll update the -next branch soon. Right now, in terms of regressions I'm tracking there's the Tegra related PMIC issue that Svyatoslav is working on, and seemingly still some SPI related issue that we need a hopefully "simple" patch for, so that we can unbreak platforms that worked previously. Otherwise we might have to revert a bunch of those changes at this point and try again next release. In terms of a changelog, git log --merges v2025.01-rc3..v2025.01-rc4 As always, more details in pull requests (or the tags referenced by them) will result in more details here. At this point we have two more rc releases to go, one on the 23rd and one on the 30th, with the final release on the 6th of January, 2025. Thanks all! -- Tom

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[GIT PULL] Please pull u-boot-imx-next-20241209
by Fabio Estevam 09 Dec '24

09 Dec '24

Hi Tom, Please pull from u-boot-imx/next, thanks. The following changes since commit 39759bf9fe3a5b6d4788164fc046f5f8aee5cbff: Merge patch series "board: ti: k3-am65: covert last board to OF_UPSTREAM" (2024-12-06 16:39:26 -0600) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-next-20241209 for you to fetch changes up to 1c9fe756edba755679e8e4dc525d12e7deda3808: board: dhelectronics: Sync env variable dh_som_serial_number with SN (2024-12-07 09:07:45 -0300) u-boot-imx-next-20241209 -------------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23736 - Add support for the NXP i.MX91 EVK board. - Improve EEPRON suport on i.MX8MP DHCOM board. - Switch phycore_imx8mm to using environment text files and improve environment handling. ---------------------------------------------------------------- Christoph Niedermaier (4): arm64: dts: imx8mp: Add aliases for the access to the EEPROM ID page node arm64: imx8mp: Read values from M24C32-D write-lockable page on DHCOM i.MX8MP lib: hashtable: Prevent recursive calling of callback functions board: dhelectronics: Sync env variable dh_som_serial_number with SN Peng Fan (8): gpio: imx_rgpio2p: Move 8ulp_data to data section imx9: trdc: correct DEBUG usage imx9: gpio: include types.h header imx: Add iMX91 support clk: imx93: support i.MX91 pinctrl: imx93: support i.MX91 arm64: dts: add NXP i.MX91 device tree imx: Support i.MX91 11x11 EVK board Ye Li (3): imx93: Update 9x9 part fuses checking clk: imx: clk-fracn-gppll: Add new PLL rate ddr: imx: Add new rates for i.MX91 Yunus Bas (3): phycore_imx8mm: Switch to using env text files phycore_imx8mm: Move default bootcmd to board env board: phytec: phycore_imx8mm: Add RAUC boot logic to environment arch/arm/dts/imx8mp-dhcom-u-boot.dtsi | 2 + arch/arm/dts/imx91-11x11-evk-u-boot.dtsi | 195 ++ arch/arm/dts/imx91-u-boot.dtsi | 92 + arch/arm/include/asm/arch-imx/cpu.h | 5 + arch/arm/include/asm/arch-imx9/clock.h | 7 + arch/arm/include/asm/arch-imx9/gpio.h | 2 + arch/arm/include/asm/arch-imx9/imx91_pins.h | 770 ++++++++ arch/arm/include/asm/mach-imx/iomux-v3.h | 2 +- arch/arm/include/asm/mach-imx/sys_proto.h | 6 + arch/arm/mach-imx/imx9/Kconfig | 13 + arch/arm/mach-imx/imx9/clock.c | 37 +- arch/arm/mach-imx/imx9/container.cfg | 6 +- arch/arm/mach-imx/imx9/imximage.cfg | 6 +- arch/arm/mach-imx/imx9/soc.c | 47 +- arch/arm/mach-imx/imx9/trdc.c | 2 +- board/dhelectronics/common/dh_common.c | 166 +- board/dhelectronics/common/dh_common.h | 79 +- board/dhelectronics/dh_imx6/dh_imx6.c | 4 +- board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c | 75 +- board/freescale/imx91_evk/Kconfig | 19 + board/freescale/imx91_evk/MAINTAINERS | 7 + board/freescale/imx91_evk/Makefile | 16 + board/freescale/imx91_evk/imx91_evk.c | 33 + board/freescale/imx91_evk/imx91_evk.env | 63 + board/freescale/imx91_evk/lpddr4_timing_1600mts.c | 1995 ++++++++++++++++++++ .../imx91_evk/lpddr4_timing_1600mts_ecc.c | 1995 ++++++++++++++++++++ board/freescale/imx91_evk/lpddr4_timing_2400mts.c | 1995 ++++++++++++++++++++ .../imx91_evk/lpddr4_timing_2400mts_ecc.c | 1995 ++++++++++++++++++++ board/freescale/imx91_evk/spl.c | 167 ++ board/phytec/phycore_imx8mm/phycore_imx8mm.env | 65 + configs/dhsom.config | 1 + configs/imx91_11x11_evk_defconfig | 145 ++ configs/imx91_11x11_evk_inline_ecc_defconfig | 146 ++ configs/phycore-imx8mm_defconfig | 2 - doc/board/nxp/imx91_11x11_evk.rst | 70 + doc/board/nxp/index.rst | 1 + drivers/clk/imx/clk-fracn-gppll.c | 5 +- drivers/clk/imx/clk-imx93.c | 52 +- drivers/cpu/imx8_cpu.c | 10 + drivers/ddr/imx/phy/ddrphy_utils.c | 8 + drivers/gpio/imx_rgpio2p.c | 2 +- drivers/pinctrl/nxp/pinctrl-imx93.c | 1 + .../include/dt-bindings/clock/imx93-clock.h | 6 +- .../src/arm64/freescale/imx91-11x11-evk.dts | 875 +++++++++ dts/upstream/src/arm64/freescale/imx91-pinfunc.h | 770 ++++++++ dts/upstream/src/arm64/freescale/imx91.dtsi | 70 + include/configs/imx91_evk.h | 21 + include/configs/phycore_imx8mm.h | 46 - lib/hashtable.c | 27 +- 49 files changed, 12023 insertions(+), 101 deletions(-) create mode 100644 arch/arm/dts/imx91-11x11-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx91-u-boot.dtsi create mode 100644 arch/arm/include/asm/arch-imx9/imx91_pins.h create mode 100644 board/freescale/imx91_evk/Kconfig create mode 100644 board/freescale/imx91_evk/MAINTAINERS create mode 100644 board/freescale/imx91_evk/Makefile create mode 100644 board/freescale/imx91_evk/imx91_evk.c create mode 100644 board/freescale/imx91_evk/imx91_evk.env create mode 100644 board/freescale/imx91_evk/lpddr4_timing_1600mts.c create mode 100644 board/freescale/imx91_evk/lpddr4_timing_1600mts_ecc.c create mode 100644 board/freescale/imx91_evk/lpddr4_timing_2400mts.c create mode 100644 board/freescale/imx91_evk/lpddr4_timing_2400mts_ecc.c create mode 100644 board/freescale/imx91_evk/spl.c create mode 100644 board/phytec/phycore_imx8mm/phycore_imx8mm.env create mode 100644 configs/imx91_11x11_evk_defconfig create mode 100644 configs/imx91_11x11_evk_inline_ecc_defconfig create mode 100644 doc/board/nxp/imx91_11x11_evk.rst create mode 100644 dts/upstream/src/arm64/freescale/imx91-11x11-evk.dts create mode 100644 dts/upstream/src/arm64/freescale/imx91-pinfunc.h create mode 100644 dts/upstream/src/arm64/freescale/imx91.dtsi create mode 100644 include/configs/imx91_evk.h

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