December 2024 - U-Boot

[PATCH v2] dma: ti: k3-udma: Fix BCDMA probe by adding check for MMR_RFLOW
by Prasanth Babu Mantena 01 Jan '25

01 Jan '25

RFLOW config related MMR does not exist incase of BCDMA. Add check to bypass the RFLOW MMR extraction. Without this, the probe sequence fails checking for the MMR_RFLOW region, which is valid only for packet based DMA and obselete for BCDMA. Fixes: 5abb694d6016 ("dma: ti: k3-udma: Add support for native configuration of chan/flow") Signed-off-by: Prasanth Babu Mantena <p-mantena(a)ti.com> Tested-by: Jonathan Humphreys <j-humphreys(a)ti.com> --- v2 <--> v1 Add Fixes tag. drivers/dma/ti/k3-udma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index dac4023ccfd..3013c4741d0 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -1331,6 +1331,8 @@ static int udma_get_mmrs(struct udevice *dev) continue; if (i == MMR_RCHANRT && ud->rchan_cnt == 0) continue; + if (i == MMR_RFLOW && ud->match_data->type == DMA_TYPE_BCDMA) + continue; ud->mmrs[i] = dev_read_addr_name_ptr(dev, mmr_names[i]); if (!ud->mmrs[i]) -- 2.34.1

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[PATCH 00/10] Cumulative fixes and updates for MediaTek ethernet driver
by Weijie Gao 31 Dec '24

31 Dec '24

This patch series contains fixes and updates for mtk_eth driver. Weijie Gao (10): clk: mediatek: mt7629: fix parent clock of some top clock muxes arm: dts: mt7629: fix sgmii clock selection for ethernet net: mediatek: use correct register field for SGMII speed selection net: mediatek: correct register name of ethsys syscfg1 net: mediatek: fix sgmii selection for mt7622 net: mediatek: fix gmac2 usability for mt7629 net: mediatek: add support for 10GBASE-R net: mediatek: make sgmii/usxgmii optional net: mediatek: don't enable GDMA cpu bridge unconditionally for NETSYSv3 net: mediatek: fix usability with wget command arch/arm/dts/mt7629.dtsi | 4 +- drivers/clk/mediatek/clk-mt7629.c | 6 +- drivers/net/Kconfig | 12 ++ drivers/net/mtk_eth.c | 175 +++++++++++++++++++++++++----- drivers/net/mtk_eth.h | 26 +++-- 5 files changed, 184 insertions(+), 39 deletions(-) -- 2.34.1

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[PATCH v5 0/4] Select CONFIG_64BIT for sandbox64 and x86_64
by Andrew Goodbody 31 Dec '24

31 Dec '24

Picking up a series from Dan Carpenter and applying requested changes for v2. I had previously set CONFIG_64BIT for arm64. This patchset does the same thing for sandbox and x86_64. (Mips and riscv were already doing it). This CONFIG option is used in the Makefile to determine if it's a 32 or 64 bit system for the CHECKER. Makefile 1052 # the checker needs the correct machine size 1053 CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32) Changes in v5: - Previous version mistakenly simplified the change to bloblist.c, so reinstate the full change in order to fix those platforms that broke. Changes in v4: - Add help text to describe new symbol CONFIG_SPL_64BIT - Split the statement in bloblist.c to be more readable Changes in v3: Added a new patch 1/4 to make fixes to the source needed by the sandbox patch 2/4. Updated 3/4 to account for x86 being built with a 64 bit U-Boot proper but a 32 bit SPL. Added another patch 4/4 to fix an incorrect use of CONFIG_PHYS_64BIT which should be CONFIG_64BIT at the request of Tom Rini. Changes in v2: Resubmitted by Andrew Goodbody with changes requested by reviewer Andrew Goodbody (4): sandbox: Correct guard around readq/writeq sandbox: select CONFIG_64BIT for sandbox x86: select CONFIG_64BIT for X86_64 test: lib: Use CONFIG_64BIT to detect 64 bit compile arch/Kconfig | 8 ++++++++ arch/arm/Kconfig | 1 + arch/mips/Kconfig | 4 ++++ arch/riscv/Kconfig | 1 + arch/sandbox/Kconfig | 2 ++ arch/sandbox/include/asm/io.h | 4 ++-- arch/x86/Kconfig | 1 + common/bloblist.c | 13 ++++++++----- include/limits.h | 3 ++- test/lib/str.c | 8 ++++---- 10 files changed, 33 insertions(+), 12 deletions(-) -- 2.39.5

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[PATCH 0/2] Keep the access to dtb_dt_embedded() within fdtdec
by Evgeny Bachinin 31 Dec '24

31 Dec '24

The 1st patch addresses comments from the post-review, available by link [1]. The 2nd patch fixes problems of dtb_dt_embedded() with checkpatch. Links: [1] https://lore.kernel.org/u-boot/CAFLszTgEKamsa6FTnjzrEWQBLkqAR7EBbZqffx09AKg… To: Tom Rini <trini(a)konsulko.com> To: Simon Glass <sjg(a)chromium.org> To: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> To: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> To: Raymond Mao <raymond.mao(a)linaro.org> To: Marek Vasut <marek.vasut+renesas(a)mailbox.org> To: Sughosh Ganu <sughosh.ganu(a)linaro.org> To: Christian Marangi <ansuelsmth(a)gmail.com> To: Lad Prabhakar <prabhakar.mahadev-lad.rj(a)bp.renesas.com> To: Evgeny Bachinin <EABachinin(a)salutedevices.com> Cc: kernel(a)salutedevices.com Cc: evgen89bachinin(a)gmail.com Cc: u-boot(a)lists.denx.de Signed-off-by: Evgeny Bachinin <EABachinin(a)salutedevices.com> --- Tested: * scripts/kernel-doc -v -none include/fdtdec.h * on production board with Amlogic AXG SoC & OF_EMBED=y * CI: https://github.com/u-boot/u-boot/pull/710 --- Evgeny Bachinin (2): fdtdec: encapsulate dtb_dt_embedded() within fdtdec: dtb_dt_embedded: replace ifdefs by IS_ENABLED() common/board_r.c | 4 ++-- include/fdtdec.h | 24 +++++++----------------- lib/fdtdec.c | 26 ++++++++++++++++++++++++-- 3 files changed, 33 insertions(+), 21 deletions(-) --- base-commit: b841e559cd26ffcb20f22e8ee75debed9616c002 change-id: 20241207-dtb_dt_embedded_within_fdtdec-751a40ccf787 Best regards, -- Evgeny Bachinin <EABachinin(a)salutedevices.com>

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[PATCH 0/2] Initial support for PXA1908 and samsung-coreprimevelte
by Duje Mihanović 31 Dec '24

31 Dec '24

Hello, This series adds initial support for Marvell's PXA1908 ARM64 SoC and Samsung's Galaxy Core Prime VE LTE, a smartphone based on said SoC. On this board, U-Boot is used as a secondary bootloader to work around certain quirks of the factory S-Boot. Signed-off-by: Duje Mihanović <duje.mihanovic(a)skole.hr> --- Duje Mihanović (2): arm: mmp: add initial support for PXA1908 SoC board: samsung: add initial support for coreprimevelte board MAINTAINERS | 8 ++ arch/arm/Kconfig | 11 +++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/pxa1908-samsung-coreprimevelte.dts | 74 +++++++++++++++++ arch/arm/dts/pxa1908.dtsi | 106 ++++++++++++++++++++++++ arch/arm/mach-mmp/Kconfig | 12 +++ arch/arm/mach-mmp/Makefile | 1 + arch/arm/mach-mmp/board.c | 82 ++++++++++++++++++ arch/arm/mach-mmp/mmu.c | 30 +++++++ board/samsung/coreprimevelte/Kconfig | 12 +++ board/samsung/coreprimevelte/MAINTAINERS | 6 ++ configs/coreprimevelte_defconfig | 20 +++++ include/configs/pxa1908.h | 12 +++ 14 files changed, 377 insertions(+) --- base-commit: 3391587e3fe22db6c71882f652e13543a4501694 change-id: 20241226-coreprimevelte-1c26acfb58db Best regards, -- Duje Mihanović <duje.mihanovic(a)skole.hr>

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Problem with "Cleanup dma device in spl and move dma channel[0]" series and am64
by Tom Rini 31 Dec '24

31 Dec '24

Hey all, As part of testing the SPI fixes, I tracked down a problem on my AM64X SR1.0 GP to the above series. With the series applied, I get: => sf probe jedec_spi_nor flash@0: non-uniform erase sector maps are not supported yet. SF: Detected s28hs512t with page size 256 Bytes, erase size 256 KiB, total 64 MiB => sf read $loadaddr 0 4000 device 0 offset 0x0, size 0x4000 ti-udma dma-controller@485c0000: k3_dmaring Ring probed rings:288, sci-dev-id:30 ti-udma dma-controller@485c0000: dma-ring-reset-quirk: disabled ............................... (never ends). With the series reverted: => sf probe SF: Detected s28hs512t with page size 256 Bytes, erase size 256 KiB, total 64 MiB => sf read $loadaddr 0 4000 device 0 offset 0x0, size 0x4000 SF: 16384 bytes @ 0x0 Read: OK => -- Tom

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UEFI ConOut with systemd-boot: attributes aren't working
by Kevin P. Fleming 31 Dec '24

31 Dec '24

I've got a couple of Traverse ten64 machines, which have serial consoles and are using U-Boot 2023.07-rc2 (a bit old, granted). I connect to their consoles using Minicom on a Debian machine. If I stop the U-Boot autoboot process, the U-Boot menu itself is displayed as expected, with 'reverse' highlighting on the currently-selected item in the menu. If I continue the boot process, then systemd-boot displays its menu (using the UEFI ConOut interface), but there is no highlighting on the menu items. I've tried both VT102 and ANSI emulation modes in Minicom. Can anyone suggest steps for troubleshooting this?

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[ANN] U-Boot v2025.01-rc6 released
by Tom Rini 31 Dec '24

31 Dec '24

Hey all, It's release day and so here's v2025.01-rc6, and I'll update the -next branch shortly as well. At this point, I've merged what I hope is the last SPI-NOR related patch for this release. We aren't 100% back to how the codebase was for v2024.10 for the non-stacked case, but I think we're OK. In terms of a changelog, git log --merges v2025.01-rc5..v2025.01-rc6 As always, more details in pull requests (or the tags referenced by them) will result in more details here. Unless something else happens, I plan to release v2025.01 on the 6th of January, 2025. Thanks all! -- Tom

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[PATCH] Gitlab: Remove some "rules:when: always" lines
by Tom Rini 31 Dec '24

31 Dec '24

In commit 399f739be6b2 ("CI: allow jobs to be run in merge requests") we added "rules:when: always" to many stages of the pipeline to allow for merge requests to trigger a run. However based on current Gitlab documentation, we should still be triggered on merge requests without this. Furthermore the way we have things written today we always run all stages of the CI rather than failing out early on problems, which is not always useful. Remove these as we should still be fine with merge requests triggering a run. Link: https://docs.gitlab.com/ee/ci/yaml/#rules Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Can you please test this in your setup? I'm actually a little unsure of what your setup needs now that I look at this harder, thanks. Cc: Francesco Dolcini <francesco.dolcini(a)toradex.com> --- .gitlab-ci.yml | 6 ------ 1 file changed, 6 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 57037e243ecb..2f324b0e1a90 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -24,8 +24,6 @@ stages: .buildman_and_testpy_template: &buildman_and_testpy_dfn stage: test.py retry: 2 # QEMU may be too slow, etc. - rules: - - when: always before_script: # Clone uboot-test-hooks - git config --global --add safe.directory "${CI_PROJECT_DIR}" @@ -104,8 +102,6 @@ stages: .world_build: stage: world build - rules: - - when: always build all 32bit ARM platforms: extends: .world_build @@ -157,8 +153,6 @@ build all other platforms: .testsuites: stage: testsuites - rules: - - when: always check for new CONFIG symbols outside Kconfig: extends: .testsuites -- 2.43.0

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[PATCH v6] mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled
by Venkatesh Yadav Abbarapu 31 Dec '24

31 Dec '24

Update the spi_nor_read() function based on the config SPI_FLASH_BAR and update the length and bank calculation by spliting the memory of 16MB size banks only when the address width is 3byte. Fix the read issue for 4byte address width by passing the entire length to the read function. Fixes: 5d40b3d384 ("mtd: spi-nor: Add parallel and stacked memories support") Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> --- Changes in v2: - Update the nor read for parallel configuration and for other case keep the code as is. - Fixed the commit description. - Tested the changes with s25fl128s flash Zynq> sf probe 0 0 0 SF: Detected s25fl128s with page size 256 Bytes, erase size 64 KiB, total 16 MiB Zynq> time sf erase 0x0 0x1000000;mw.b 0x8000 aabbccdd 0x1000000;time Zynq> sf write 0x8000 0x0 0x1000000;mw.b 0x8008000 0x0 0x1000000;time Zynq> sf read 0x8008000 0x0 0x1000000;cmp.b 0x8000 0x8008000 0x1000000 SF: 16777216 bytes @ 0x0 Erased: OK time: 32.464 seconds device 0 whole chip SF: 16777216 bytes @ 0x0 Written: OK time: 15.515 seconds device 0 whole chip SF: 16777216 bytes @ 0x0 Read: OK time: 1.557 seconds Total of 16777216 byte(s) were the same Changes in v3: - Compile out the parallel code in spi_nor_erase() if the SPI_STACKED_PARALLEL is enabled. Changes in v4: - Update the bank calculation only when SPL_FLASH_BAR is enabled. Changes in v5: - Update the parallel code in the spi_nor_read() only if the SPI_STACKED_PARALLEL config is enabled. Changes in v6: - Remove the hardcoded address width for 4byte. - Move the length condition with rem_bank_len under SPI_FLASH_BAR flag. --- drivers/mtd/spi/spi-nor-core.c | 75 ++++++++++++++++++++-------------- 1 file changed, 44 insertions(+), 31 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13bd..6f352c5c0e2 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1130,17 +1130,19 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) goto erase_err; } offset = addr; - if (nor->flags & SNOR_F_HAS_PARALLEL) - offset /= 2; - - if (nor->flags & SNOR_F_HAS_STACKED) { - if (offset >= (mtd->size / 2)) - nor->spi->flags |= SPI_XFER_U_PAGE; - else - nor->spi->flags &= ~SPI_XFER_U_PAGE; + if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) { + if (nor->flags & SNOR_F_HAS_PARALLEL) + offset /= 2; + + if (nor->flags & SNOR_F_HAS_STACKED) { + if (offset >= (mtd->size / 2)) + nor->spi->flags |= SPI_XFER_U_PAGE; + else + nor->spi->flags &= ~SPI_XFER_U_PAGE; + } } #ifdef CONFIG_SPI_FLASH_BAR - ret = write_bar(nor, addr); + ret = write_bar(nor, offset); if (ret < 0) goto erase_err; #endif @@ -1152,7 +1154,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { ret = spi_nor_erase_chip(nor); } else { - ret = spi_nor_erase_sector(nor, addr); + ret = spi_nor_erase_sector(nor, offset); } if (ret < 0) goto erase_err; @@ -1576,11 +1578,12 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { struct spi_nor *nor = mtd_to_spi_nor(mtd); - int ret; loff_t offset = from; - u32 read_len = 0; u32 rem_bank_len = 0; + u32 stack_shift = 0; + size_t read_len; u8 bank; + int ret; bool is_ofst_odd = false; dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); @@ -1593,39 +1596,49 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, } while (len) { - bank = (u32)from / SZ_16M; - if (nor->flags & SNOR_F_HAS_PARALLEL) - bank /= 2; - - rem_bank_len = SZ_16M * (bank + 1); - if (nor->flags & SNOR_F_HAS_PARALLEL) - rem_bank_len *= 2; - rem_bank_len -= from; - + read_len = len; offset = from; - if (nor->flags & SNOR_F_HAS_STACKED) { - if (offset >= (mtd->size / 2)) { - offset = offset - (mtd->size / 2); - nor->spi->flags |= SPI_XFER_U_PAGE; - } else { - nor->spi->flags &= ~SPI_XFER_U_PAGE; + if (CONFIG_IS_ENABLED(SPI_FLASH_BAR)) { + bank = (u32)from / SZ_16M; + if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) { + if (nor->flags & SNOR_F_HAS_PARALLEL) + bank /= 2; + } + rem_bank_len = SZ_16M * (bank + 1); + if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) { + if (nor->flags & SNOR_F_HAS_PARALLEL) + rem_bank_len *= 2; } + rem_bank_len -= from; } - if (nor->flags & SNOR_F_HAS_PARALLEL) - offset /= 2; + if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) { + if (nor->flags & SNOR_F_HAS_STACKED) { + stack_shift = 1; + if (offset >= (mtd->size / 2)) { + offset = offset - (mtd->size / 2); + nor->spi->flags |= SPI_XFER_U_PAGE; + } else { + nor->spi->flags &= ~SPI_XFER_U_PAGE; + } + } + } + + if (CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)) { + if (nor->flags & SNOR_F_HAS_PARALLEL) + offset /= 2; + } #ifdef CONFIG_SPI_FLASH_BAR ret = write_bar(nor, offset); if (ret < 0) return log_ret(ret); -#endif - if (len < rem_bank_len) read_len = len; else read_len = rem_bank_len; +#endif if (read_len == 0) return -EIO; -- 2.34.1

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