November 2024 - U-Boot

[PATCH 00/10] Improve UEFI app support
by Matthew Garrett 11 Dec '24

11 Dec '24

We run a mixed environment including traditional embedded Linux and UEFI. For consistency it's valuable to use U-Boot in both cases, but on UEFI systems we want to run the full Linux kernel UEFI boot stub. This patchset adds support for that, along with various other quality-of-life improvements such as automatically finding partitions based on their GUID, automatic identification of load addresses where the firmware has given us constraints, support for EFI variable access in the EFI app, drivers for EFI network adapters and TPMs, support for embedding DTBs in the EFI app, and a couple of bug fixes. Janis Danisevskis (1): Fix efi_bind_block. Matthew Garrett (9): Add EFI handover support to bootm Add part_find command Add a command to find a load address Hook up EFI env variable support in the EFI app Add EFI network driver Add UEFI TPM2 driver Support separate DTB files with the UEFI app Use the correct ramdisk address Add command to set an environment variable to an EFI variable Makefile | 7 +- arch/x86/config.mk | 2 +- arch/x86/lib/bootm.c | 60 ++++++++---- arch/x86/lib/elf_x86_64_efi.lds | 4 + boot/bootm.c | 5 + cmd/Kconfig | 23 ++++- cmd/Makefile | 3 + cmd/addr_find.c | 87 +++++++++++++++++ cmd/efigetenv.c | 133 ++++++++++++++++++++++++++ cmd/part_find.c | 156 ++++++++++++++++++++++++++++++ drivers/net/Kconfig | 7 ++ drivers/net/Makefile | 1 + drivers/net/efi_net.c | 110 +++++++++++++++++++++ drivers/tpm/Kconfig | 7 ++ drivers/tpm/Makefile | 1 + drivers/tpm/tpm2_efi.c | 97 +++++++++++++++++++ include/asm-generic/sections.h | 1 + include/bootm.h | 6 ++ include/efi.h | 24 +++++ include/efi_tcg2.h | 1 + lib/efi/Makefile | 2 +- lib/efi/efi.c | 1 + lib/efi/efi_app.c | 41 ++++++++ lib/efi/efi_app_init.c | 163 ++++++++++++++++++++++++++++++-- lib/efi/efi_dtb.S | 6 ++ lib/efi/efi_vars.c | 44 +++++++++ lib/fdtdec.c | 3 + 27 files changed, 967 insertions(+), 28 deletions(-) create mode 100644 cmd/addr_find.c create mode 100644 cmd/efigetenv.c create mode 100644 cmd/part_find.c create mode 100644 drivers/net/efi_net.c create mode 100644 drivers/tpm/tpm2_efi.c create mode 100644 lib/efi/efi_dtb.S create mode 100644 lib/efi/efi_vars.c -- 2.47.0

6 56

[PATCH] mtd: spi-nor: Fix the read issue when addr_width is 4byte
by Venkatesh Yadav Abbarapu 11 Dec '24

11 Dec '24

Fix the read issue for 4byte address width by passing the entire length to the read function, split the memory of 16MB size banks only when the address width is 3byte. Also update the size when the configuration is stacked. Fixes: 5d40b3d384 ("mtd: spi-nor: Add parallel and stacked memories support") Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> --- drivers/mtd/spi/spi-nor-core.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..c37a9bce74 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1580,6 +1580,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, loff_t offset = from; u32 read_len = 0; u32 rem_bank_len = 0; + u32 stack_shift = 0; u8 bank; bool is_ofst_odd = false; @@ -1593,18 +1594,20 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, } while (len) { - bank = (u32)from / SZ_16M; - if (nor->flags & SNOR_F_HAS_PARALLEL) - bank /= 2; - - rem_bank_len = SZ_16M * (bank + 1); - if (nor->flags & SNOR_F_HAS_PARALLEL) - rem_bank_len *= 2; - rem_bank_len -= from; - + if (nor->addr_width == 3) { + bank = (u32)from / SZ_16M; + if (nor->flags & SNOR_F_HAS_PARALLEL) + bank /= 2; + + rem_bank_len = SZ_16M * (bank + 1); + if (nor->flags & SNOR_F_HAS_PARALLEL) + rem_bank_len *= 2; + rem_bank_len -= from; + } offset = from; if (nor->flags & SNOR_F_HAS_STACKED) { + stack_shift = 1; if (offset >= (mtd->size / 2)) { offset = offset - (mtd->size / 2); nor->spi->flags |= SPI_XFER_U_PAGE; @@ -1616,6 +1619,9 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, if (nor->flags & SNOR_F_HAS_PARALLEL) offset /= 2; + if (nor->addr_width == 4) + rem_bank_len = (mtd->size >> stack_shift) - offset; + #ifdef CONFIG_SPI_FLASH_BAR ret = write_bar(nor, offset); if (ret < 0) -- 2.17.1

3 2

[PATCH] common: relocate fdt_blob in global_data for FDTSRC_EMBED case
by Evgeny Bachinin 11 Dec '24

11 Dec '24

Patch resolves two kind of bugs, one of which is vulnerability related to KASLR. === Issue briefly === Working with FDT (via non-relocated gd::fdt_blob) from inside bootm command may lead to the reading the garbage instead of FDT nodes. And this can result in various side-effects depending on DTS nodes, being parsed during bootm. But below is my specific story how I faced with this issue due to MESON_RNG probing failure. === Bugs description === 1) Bug is revealed on: * configuration below * U-boot 2024.10 - f919c3a889f ("Prepare v2024.10") It seems, the following patch is a trigger: ea955eea4f ("fdt: automatically add /chosen/kaslr-seed if DM_RNG is enabled") Generally, CONFIG_OF_EMBED=y & CONFIG_RNG_MESON=y are the most valuable ones for reproducing the issue. ``` CONFIG_ARCH_FIXUP_FDT_MEMORY=y CONFIG_CMD_FDT=y CONFIG_DEFAULT_FDT_FILE="" CONFIG_FDT_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_OF_LIBFDT_ASSUME_MASK=0x0 CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIST="meson-axg-our-device-name" CONFIG_OF_REAL=y CONFIG_OF_TRANSLATE=y CONFIG_SUPPORT_OF_CONTROL=y CONFIG_SYS_FDT_PAD=0x3000 CONFIG_TOOLS_OF_LIBFDT=y CONFIG_DM_RNG=y CONFIG_RNG_MESON=y ``` 2) Due to CONFIG_OF_EMBED, the DTS is embedded into U-boot ELF and accessible via __dtb_dt_begin symbol. On early boot stage (board_f.c) the fdtdec_setup() is called only once before U-boot's relocation into top of RAM. fdtdec_setup() initializes gd::fdt_blob for FDTSRC_EMBED case: ``` gd->fdt_blob = dtb_dt_embedded(); gd->fdt_src = FDTSRC_EMBED; ``` 3) Then reloc_fdt() is called in board_f.c But due to CONFIG_OF_EMBED=y the reloc_fdt() does not update gd::fdt_blob value (strictly speaking, it is impossible for CONFIG_OF_EMBED=y, because U-boot ELF has not been relocated yet at this moment). As a result after relocation we get fdt_blob, pointing to DTS address before relocation: ``` # bdinfo <...> relocaddr = 0x000000000fedf000 reloc off = 0x000000000eedf000 <...> fdt_blob = 0x010ce6c0 << points to __dtb_dt_begin before relocation new_fdt = 0x0000000000000000 << empty erroneously fdt_size = 0x0000000000000000 << zero erroneously ``` 4) During bootm command (according to our ITS-config file) the Linux is loaded into 0x01080000 (which is very close to fdt_blob addr 0x010ce6c0). ``` ## Loading kernel from FIT Image at 04000000 ... Trying 'kernel' kernel subimage <...> Load Address: 0x01080000 ``` So Linux image overwrites the gd::fdt_blob memory location in RAM (0x010ce6c0). 5) Issue: Hence any manipulation with DTS (say, via FDT API) inside implementation of bootm command leads to accessing the fdt_blob area with garbage, that can lead to two situations: 5.1) Abort. Call to fdt_off_dt_struct() from fdt_next_tag() :: fdt_offset_ptr():: fdt_offset_ptr_() returns with garbage, that leads to tagp value being out of RAM top addr (256 Mb in our board), causing the abort: ``` Boot cmd: bootm 0x4000000#boot_evt1 bootm_run_states() <...> image_setup_libfdt() fdt_chosen() fdt_kaslrseed() uclass_get_device() uclass_get_device_tail() device_probe() device_of_to_plat() meson_rng_of_to_plat() clk_get_by_name_optional() clk_get_by_name() clk_get_by_name_nodev() ofnode_stringlist_search() fdt_stringlist_search() fdt_getprop() fdt_get_property_namelen_() fdt_first_property_offset() fdt_check_node_offset_() fdt_next_tag(): ``` tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); ``` fdt_next_tag() tagp:0x22890766 fdt_next_tag() ram_top:0x10000000 (tagp OUT of RAM) "Synchronous Abort" handler, esr 0x96000010, far 0x22890766 elr: 000000000108be24 lr : 000000000108be24 (reloc) elr: 000000000ff6fe24 lr : 000000000ff6fe24 x0 : 0000000000000041 x1 : 0000000000000000 x2 : 000000000ff3b57c x3 : 0000000000000012 x4 : 000000000ded2ad5 x5 : 0000000000000020 x6 : 00000000ffffffe8 x7 : 000000000ded2f40 x8 : 00000000ffffffd8 x9 : 000000000000000d x10: 0000000000000006 x11: 000000000001869f x12: 000000000fffffff x13: 000000000fffffff x14: 0000000000000000 x15: 000000000ded2abb x16: 000000000ff3b080 x17: 0000000000000001 x18: 000000000ded3dc0 x19: 0000000022890766 x20: 00000000010cb0f0 x21: 00000000000015e4 x22: 000000000ff8f4d8 x23: 000000000000000b x24: 000000000ded2fbc x25: 000000000ffe2000 x22: 000000000ff8f4d8 x23: 000000000000000b x24: 000000000ded2fbc x25: 000000000ffe2000 x26: 000000000ffe2000 x27: 000000000000000b x28: 000000000ff9cf2d x29: 000000000ded2f40 Code: aa1603e1 91197484 52801742 94004de8 (b9400276) ``` 5.2) Vulnerability situation "KASLR is disabled". Almost the same as in (5.1), but 2 situations happen (depending on the value of garbage): * call to fdt_offset_ptr_() :: fdt_off_dt_struct(fdt) returns not so big garbage, leading to tagp, being inside RAM. * or calculations of absoffset inside fdt_offset_ptr() leads to failure of the one of if() conditions with NULL as retval. Result is fdt_next_tag() interprets the tagp as FDT_END. And we are returning from our callstack via functions' error paths, leading to "No RNG device" and "KASLR disabled due to lack of seed": ``` fdt_kaslrseed() uclass_get_device() <...> device_probe() device_of_to_plat() meson_rng_of_to_plat() clk_get_by_name() clk_get_by_name_nodev() <...> fdt_stringlist_search() fdt_getprop() fdt_get_property_namelen_() fdt_first_property_offset() fdt_check_node_offset_() fdt_next_tag(): ``` tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); ``` fdt_next_tag() tagp:0000000001890677 fdt_next_tag() ram_top:0x10000000 (tagp is inside RAM) uclass_get_device_tail():486 device_probe() ret:-22 No RNG device Starting kernel ... [ 0.000000] Linux version 6.9.12 [ 0.000000] KASLR disabled due to lack of seed ``` Signed-off-by: Evgeny Bachinin <EABachinin(a)salutedevices.com> --- Tested: * on board with Amlogic AXG SoC. * on sandbox: make sure that certain code from patch is called (of course, when CONFIG_OF_EMBED=y) * U-boot CI: https://github.com/u-boot/u-boot/pull/698/checks --- common/board_r.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/common/board_r.c b/common/board_r.c index 62228a723e12f8742437acae380e82f79903a8f5..88dc756b2a5e5a44f55f9b0fd012adc798a8afdb 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -152,6 +152,15 @@ static int initr_reloc_global_data(void) */ gd->env_addr += gd->reloc_off; #endif + + /* + * For CONFIG_OF_EMBED case the FDT is embedded into ELF, available by + * __dtb_dt_begin. After U-boot ELF self-relocation to RAM top address + * it is worth to update fdt_blob in global_data + */ + if (IS_ENABLED(CONFIG_OF_EMBED)) + gd->fdt_blob = dtb_dt_embedded(); + #ifdef CONFIG_EFI_LOADER /* * On the ARM architecture gd is mapped to a fixed register (r9 or x18). --- base-commit: cca05617a8f585f3a98a8fa82f75cc68a530d771 change-id: 20241119-of_embed_fdt_blob_garbage-ea729a8236e1 Best regards, -- Evgeny Bachinin <EABachinin(a)salutedevices.com>

4 6

[PATCH v2 0/7] arm64: zynqmp: Convert platforms to use binman
by Michal Simek 10 Dec '24

10 Dec '24

Hi, I have put togethere couple of patches to convert platforms to use binman. The first patch has been sent separately. The third (SOM description) has been also sent out for ilustration as RFC. The last one is just cherry-pick the patch which has been reverted because our platform wasn't converted to binman yet. v1 of external description https://lore.kernel.org/r/fbed0251437b61a2f7a85596d7403b5b9c8237c1.17283063… RFC for SOM: https://lore.kernel.org/r/de1b8dbabd5ab7f20d7aac217ec4f5074d39f1da.17284627… Thanks, Michal Changes in v2: - Change subject, align commit message - binman - rename variable - Use relative path - Use separate variable in makefile to also handle empty string and default to u-boot.dtb - new patch - new patch - Align fit,fdt-list-val to have shorter lines - Add reference to defconfig - Rename zynqmp-som-binman.dts to zynqmp-binman-som.dts - Use conf instead of config - Change image name from image.bin to qspi.bin - Remove RFC - Change default addresses for BL31/BL32 - new patch - new patch - Rebase on the top of my series which do conversion to binman - Taken from git with all tags Marek Vasut (1): Makefile: Drop SPL_FIT_GENERATOR support Michal Simek (6): binman: Add option for pointing to separate description common: binman: Calling initr_binman() when BINMAN_FDT arm64: zynqmp: Describe empty binman node arm64: zynqmp: Add binman description for SOM arm64: zynqmp: Generate u-boot.itb and QSPI image via binman arm64: zynqmp: Remove mkimage fit script Makefile | 29 +-- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/zynqmp-binman-mini.dts | 10 + arch/arm/dts/zynqmp-binman-som.dts | 225 ++++++++++++++++ arch/arm/dts/zynqmp-binman.dts | 111 ++++++++ arch/arm/dts/zynqmp-u-boot.dtsi | 11 + arch/arm/mach-zynqmp/Kconfig | 14 + arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 240 ------------------ boot/Kconfig | 15 -- common/board_r.c | 7 +- configs/xilinx_zynqmp_kria_defconfig | 3 + configs/xilinx_zynqmp_mini_defconfig | 2 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 3 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 3 + configs/xilinx_zynqmp_mini_nand_defconfig | 2 + .../xilinx_zynqmp_mini_nand_single_defconfig | 2 + configs/xilinx_zynqmp_mini_qspi_defconfig | 3 + configs/xilinx_zynqmp_virt_defconfig | 3 + doc/usage/fit/howto.rst | 4 - lib/Kconfig | 9 + 21 files changed, 418 insertions(+), 282 deletions(-) create mode 100644 arch/arm/dts/zynqmp-binman-mini.dts create mode 100644 arch/arm/dts/zynqmp-binman-som.dts create mode 100644 arch/arm/dts/zynqmp-binman.dts create mode 100644 arch/arm/dts/zynqmp-u-boot.dtsi delete mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh -- 2.43.0

3 27

[PATCH 1/6] Revert "spi: zynq_qspi: Add parallel memories support in QSPI driver"
by Marek Vasut 10 Dec '24

10 Dec '24

This reverts commit 1e36d34b52e7a1ebe5a2a5339d6905540f4253aa. This parallel/stacked support breaks basic SPI NOR support, e.g. this no longer works: => sf probe && sf update 0x50000000 0 0x160000 SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB device 0 offset 0x0, size 0x160000 SPI flash failed in read step Since none of this seems to be in Linux either, revert it all. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Andre Przywara <andre.przywara(a)arm.com> Cc: Ashok Reddy Soma <ashok.reddy.soma(a)amd.com> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Michael Walle <mwalle(a)kernel.org> Cc: Michal Simek <michal.simek(a)amd.com> Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: Pratyush Yadav <p.yadav(a)ti.com> Cc: Quentin Schulz <quentin.schulz(a)cherry.de> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Tudor Ambarus <tudor.ambarus(a)linaro.org> Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> Cc: u-boot(a)lists.denx.de Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- drivers/spi/zynq_qspi.c | 115 ++++------------------------------------ 1 file changed, 11 insertions(+), 104 deletions(-) diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index f5b3fb5c125..e8bc196ce9e 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2013 - 2022, Xilinx, Inc. + * (C) Copyright 2013 Xilinx, Inc. * (C) Copyright 2015 Jagan Teki <jteki(a)openedev.com> - * (C) Copyright 2023, Advanced Micro Devices, Inc. * * Xilinx Zynq Quad-SPI(QSPI) controller driver (master mode only) */ @@ -13,12 +12,10 @@ #include <log.h> #include <malloc.h> #include <spi.h> -#include <spi_flash.h> #include <asm/global_data.h> #include <asm/io.h> #include <linux/bitops.h> #include <spi-mem.h> -#include "../mtd/spi/sf_internal.h" DECLARE_GLOBAL_DATA_PTR; @@ -44,21 +41,6 @@ DECLARE_GLOBAL_DATA_PTR; #define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst */ #define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst */ #define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst */ -#define ZYNQ_QSPI_FR_QOUT_CODE 0x6B /* read instruction code */ - -#define QSPI_SELECT_LOWER_CS BIT(0) -#define QSPI_SELECT_UPPER_CS BIT(1) - -/* - * QSPI Linear Configuration Register - * - * It is named Linear Configuration but it controls other modes when not in - * linear mode also. - */ -#define ZYNQ_QSPI_LCFG_TWO_MEM_MASK 0x40000000 /* QSPI Enable Bit Mask */ -#define ZYNQ_QSPI_LCFG_SEP_BUS_MASK 0x20000000 /* QSPI Enable Bit Mask */ -#define ZYNQ_QSPI_LCFG_U_PAGE 0x10000000 /* QSPI Upper memory set */ -#define ZYNQ_QSPI_LCFG_DUMMY_SHIFT 8 #define ZYNQ_QSPI_TXFIFO_THRESHOLD 1 /* Tx FIFO threshold level*/ #define ZYNQ_QSPI_RXFIFO_THRESHOLD 32 /* Rx FIFO threshold level */ @@ -118,11 +100,7 @@ struct zynq_qspi_priv { int bytes_to_transfer; int bytes_to_receive; unsigned int is_inst; - unsigned int is_parallel; - unsigned int is_stacked; - unsigned int u_page; unsigned cs_change:1; - unsigned is_strip:1; }; static int zynq_qspi_of_to_plat(struct udevice *bus) @@ -133,6 +111,7 @@ static int zynq_qspi_of_to_plat(struct udevice *bus) plat->regs = (struct zynq_qspi_regs *)fdtdec_get_addr(blob, node, "reg"); + return 0; } @@ -167,9 +146,6 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv) /* Disable Interrupts */ writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->idr); - /* Disable linear mode as the boot loader may have used it */ - writel(0x0, &regs->lqspicfg); - /* Clear the TX and RX threshold reg */ writel(ZYNQ_QSPI_TXFIFO_THRESHOLD, &regs->txftr); writel(ZYNQ_QSPI_RXFIFO_THRESHOLD, &regs->rxftr); @@ -187,12 +163,13 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv) confr |= ZYNQ_QSPI_CR_IFMODE_MASK | ZYNQ_QSPI_CR_MCS_MASK | ZYNQ_QSPI_CR_PCS_MASK | ZYNQ_QSPI_CR_FW_MASK | ZYNQ_QSPI_CR_MSTREN_MASK; - - if (priv->is_stacked) - confr |= 0x10; - writel(confr, &regs->cr); + /* Disable the LQSPI feature */ + confr = readl(&regs->lqspicfg); + confr &= ~ZYNQ_QSPI_LQSPICFG_LQMODE_MASK; + writel(confr, &regs->lqspicfg); + /* Enable SPI */ writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr); } @@ -203,7 +180,6 @@ static int zynq_qspi_child_pre_probe(struct udevice *bus) struct zynq_qspi_priv *priv = dev_get_priv(bus->parent); priv->max_hz = slave->max_hz; - slave->multi_cs_cap = true; return 0; } @@ -386,8 +362,8 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size) unsigned len, offset; struct zynq_qspi_regs *regs = priv->regs; static const unsigned offsets[4] = { - ZYNQ_QSPI_TXD_00_01_OFFSET, ZYNQ_QSPI_TXD_00_10_OFFSET, - ZYNQ_QSPI_TXD_00_11_OFFSET, ZYNQ_QSPI_TXD_00_00_OFFSET }; + ZYNQ_QSPI_TXD_00_00_OFFSET, ZYNQ_QSPI_TXD_00_01_OFFSET, + ZYNQ_QSPI_TXD_00_10_OFFSET, ZYNQ_QSPI_TXD_00_11_OFFSET }; while ((fifocount < size) && (priv->bytes_to_transfer > 0)) { @@ -409,11 +385,7 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size) return; len = priv->bytes_to_transfer; zynq_qspi_write_data(priv, &data, len); - if ((priv->is_parallel || priv->is_stacked) && - !priv->is_inst && (len % 2)) - len++; - offset = (priv->rx_buf) ? - offsets[3] : offsets[len - 1]; + offset = (priv->rx_buf) ? offsets[0] : offsets[len]; writel(data, &regs->cr + (offset / 4)); } } @@ -518,7 +490,6 @@ static int zynq_qspi_irq_poll(struct zynq_qspi_priv *priv) */ static int zynq_qspi_start_transfer(struct zynq_qspi_priv *priv) { - static u8 current_u_page; u32 data = 0; struct zynq_qspi_regs *regs = priv->regs; @@ -528,34 +499,6 @@ static int zynq_qspi_start_transfer(struct zynq_qspi_priv *priv) priv->bytes_to_transfer = priv->len; priv->bytes_to_receive = priv->len; - if (priv->is_parallel) - writel((ZYNQ_QSPI_LCFG_TWO_MEM_MASK | - ZYNQ_QSPI_LCFG_SEP_BUS_MASK | - (1 << ZYNQ_QSPI_LCFG_DUMMY_SHIFT) | - ZYNQ_QSPI_FR_QOUT_CODE), &regs->lqspicfg); - - if (priv->is_inst && priv->is_stacked && current_u_page != priv->u_page) { - if (priv->u_page) { - /* Configure two memories on shared bus - * by enabling upper mem - */ - writel((ZYNQ_QSPI_LCFG_TWO_MEM_MASK | - ZYNQ_QSPI_LCFG_U_PAGE | - (1 << ZYNQ_QSPI_LCFG_DUMMY_SHIFT) | - ZYNQ_QSPI_FR_QOUT_CODE), - &regs->lqspicfg); - } else { - /* Configure two memories on shared bus - * by enabling lower mem - */ - writel((ZYNQ_QSPI_LCFG_TWO_MEM_MASK | - (1 << ZYNQ_QSPI_LCFG_DUMMY_SHIFT) | - ZYNQ_QSPI_FR_QOUT_CODE), - &regs->lqspicfg); - } - current_u_page = priv->u_page; - } - if (priv->len < 4) zynq_qspi_fill_tx_fifo(priv, priv->len); else @@ -655,8 +598,7 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen, * Assume that the beginning of a transfer with bits to * transmit must contain a device command. */ - if ((dout && flags & SPI_XFER_BEGIN) || - (flags & SPI_XFER_END && !priv->is_strip)) + if (dout && flags & SPI_XFER_BEGIN) priv->is_inst = 1; else priv->is_inst = 0; @@ -666,11 +608,6 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen, else priv->cs_change = 0; - if (flags & SPI_XFER_U_PAGE) - priv->u_page = 1; - else - priv->u_page = 0; - zynq_qspi_transfer(priv); return 0; @@ -734,35 +671,14 @@ static int zynq_qspi_set_mode(struct udevice *bus, uint mode) return 0; } -bool update_stripe(const struct spi_mem_op *op) -{ - if (op->cmd.opcode == SPINOR_OP_BE_4K || - op->cmd.opcode == SPINOR_OP_CHIP_ERASE || - op->cmd.opcode == SPINOR_OP_SE || - op->cmd.opcode == SPINOR_OP_WREAR || - op->cmd.opcode == SPINOR_OP_WRSR - ) - return false; - - return true; -} - static int zynq_qspi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) { - struct udevice *bus = slave->dev->parent; - struct zynq_qspi_priv *priv = dev_get_priv(bus); int op_len, pos = 0, ret, i; unsigned int flag = 0; const u8 *tx_buf = NULL; u8 *rx_buf = NULL; - if ((slave->flags & QSPI_SELECT_LOWER_CS) && - (slave->flags & QSPI_SELECT_UPPER_CS)) - priv->is_parallel = true; - if (slave->flags & SPI_XFER_STACKED) - priv->is_stacked = true; - if (op->data.nbytes) { if (op->data.dir == SPI_MEM_DATA_IN) rx_buf = op->data.buf.in; @@ -787,9 +703,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, if (op->dummy.nbytes) memset(op_buf + pos, 0xff, op->dummy.nbytes); - if (slave->flags & SPI_XFER_U_PAGE) - flag |= SPI_XFER_U_PAGE; - /* 1st transfer: opcode + address + dummy cycles */ /* Make sure to set END bit if no tx or rx data messages follow */ if (!tx_buf && !rx_buf) @@ -800,9 +713,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, if (ret) return ret; - if (priv->is_parallel) - priv->is_strip = update_stripe(op); - /* 2nd transfer: rx or tx data path */ if (tx_buf || rx_buf) { ret = zynq_qspi_xfer(slave->dev, op->data.nbytes * 8, tx_buf, @@ -811,9 +721,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, return ret; } - priv->is_parallel = false; - priv->is_stacked = false; - slave->flags &= ~SPI_XFER_MASK; spi_release_bus(slave); return 0; -- 2.45.2

9 37

[PATCH] mtd: nand: raw: atmel: remove unnecessary return value
by Marcus Folkesson 10 Dec '24

10 Dec '24

The condition 'ret' is always true as it is never set to other than -EIO. Remove 'ret' and the condition for copy. Signed-off-by: Marcus Folkesson <marcus.folkesson(a)gmail.com> --- drivers/mtd/nand/raw/atmel/nand-controller.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index ee4ec6da58..00d7e177b9 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -568,12 +568,9 @@ static void atmel_nfc_copy_to_sram(struct nand_chip *chip, const u8 *buf, struct mtd_info *mtd = nand_to_mtd(chip); struct atmel_nand *nand = to_atmel_nand(chip); struct atmel_hsmc_nand_controller *nc; - int ret = -EIO; nc = to_hsmc_nand_controller(nand->controller); - - if (ret) - memcpy_toio(nc->sram.virt, buf, mtd->writesize); + memcpy_toio(nc->sram.virt, buf, mtd->writesize); if (oob_required) memcpy_toio(nc->sram.virt + mtd->writesize, chip->oob_poi, @@ -586,12 +583,9 @@ static void atmel_nfc_copy_from_sram(struct nand_chip *chip, u8 *buf, struct mtd_info *mtd = nand_to_mtd(chip); struct atmel_nand *nand = to_atmel_nand(chip); struct atmel_hsmc_nand_controller *nc; - int ret = -EIO; nc = to_hsmc_nand_controller(nand->controller); - - if (ret) - memcpy_fromio(buf, nc->sram.virt, mtd->writesize); + memcpy_fromio(buf, nc->sram.virt, mtd->writesize); if (oob_required) memcpy_fromio(chip->oob_poi, nc->sram.virt + mtd->writesize, -- 2.45.1

3 7

[PATCH v2 0/8] SMBIOS improvements
by Raymond Mao 09 Dec '24

09 Dec '24

Motivations for changes: Current SMBIOS library and command-line tool is not fully matching with the requirements: 1. Missing support for other mandatory types (#7, #9, #16, #17, #19). 2. Only a few platforms support SMBIOS node from the device tree. 3. Values of some fields are hardcoded in the library other than fetching from the device hardware. 4. Embedded data with dynamic length is not supported (E.g. Contained Object Handles in Type #2 and Contained Elements in Type #3) Changes: 1. Refactor the SMBIOS library and command-line tool to better align with the SMBIOS spec. 2. Create an arch-specific driver for all aarch64-based platforms to fetch SMBIOS private data from the device hardware (processor and cache). 3. Create a sysinfo driver to poppulate platform SMBIOS private data. 4. Add generic SMBIOS DTS file for arm64 platforms for those common strings and values which cannot be retrieved from the system registers. Vendors can create their own SMBIOS node using this as an example. For those boards without SMBIOS nodes, this DTS file can be included to have a generic SMBIOS information of the system. 5. Add support for Type #7 (Cache Information) and link its handles to Type #4. Once this patch is acceptted, subsequent patch sets will add other missing types (#9, #16, #17, #19). Tests: To test this with QEMU arm64, please follow the guide on dt_qemu.rst to get a merged DT to run with. ``` qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb ./dts/dt.dtb | grep -v /dts-v1/) \ | dtc - -o merged.dtb qemu-system-arm -machine virt -nographic -bios u-boot.bin -dtb merged.dtb ``` Known issues: It hits the image size limitation on R-CAR board(rcar3_salvator-x). ``` u-boot.img exceeds file size limit: limit: 0x100000 bytes actual: 0x10049d bytes excess: 0x49d bytes ``` This board needs a clean-up to reserve spaces for the changes as SMBIOS is a fundamental feature. Below is the breakdown of the size-growth of the related functions: function old new delta static.smbios_write_type4 252 1052 +800 static.smbios_write_type7 - 764 +764 static.smbios_write_type3 188 488 +300 smbios_get_val_si - 128 +128 static.smbios_write_type2 316 376 +60 sysinfo_get_data - 56 +56 static.smbios_write_type1 380 396 +16 smbios_write_funcs 112 128 +16 ofnode_read_u32 - 12 +12 sysinfo_rcar_ops 40 48 +8 install_smbios_table 468 472 +4 Raymond Mao (8): smbios: Refactor the smbios headfile sysinfo: Add sysinfo API for accessing data area sysinfo: Add sysinfo driver and data structure for smbios smbios: Refactor smbios library armv8: Add arch-specific sysinfo platform driver armv8: Add generic smbios information into the device tree cmd: update smbios cmd configs: Enable sysinfo for QEMU Arm64 arch/arm/cpu/armv8/Makefile | 2 + arch/arm/cpu/armv8/sysinfo.c | 292 +++++++++++++++++++ arch/arm/dts/qemu-arm64.dts | 4 + arch/arm/dts/smbios_generic.dtsi | 82 ++++++ cmd/smbios.c | 346 ++++++++++++++++++++--- configs/qemu_arm64_defconfig | 2 + drivers/misc/Kconfig | 2 +- drivers/sysinfo/smbios.c | 228 +++++++++++++++ drivers/sysinfo/sysinfo-uclass.c | 20 ++ include/smbios.h | 158 ++++++----- include/smbios_def.h | 191 +++++++++++++ include/smbios_plat.h | 79 ++++++ include/sysinfo.h | 125 ++++++++- lib/smbios.c | 462 ++++++++++++++++++++++++++----- test/py/tests/test_smbios.py | 2 +- 15 files changed, 1822 insertions(+), 173 deletions(-) create mode 100644 arch/arm/cpu/armv8/sysinfo.c create mode 100644 arch/arm/dts/smbios_generic.dtsi create mode 100644 include/smbios_def.h create mode 100644 include/smbios_plat.h -- 2.25.1

4 35

[RFC PATCH] zynqmp: Add binman description for SOM
by Michal Simek 09 Dec '24

09 Dec '24

There is necessary to do some steps to compose boot images. These steps were in scripts in layers for a while. That's why introduce description via binman to simplify wiring and remove all scripting around. This should make sure that everybody is up2date with the latest versions. The first step is to create fit image with DTBs with descriptions in configuration node which is written as regular expression to match all SOM versions. Description is there for k24 and k26 in spite of low level psu_init configuration is different. The reason is that it goes to u-boot.itb image which is the same for k24 and k26. u-boot.itb is another image which is generated. It is normally generated via arch/arm/mach-zynqmp/mkimage_fit_atf.sh but this script is supposed to be deprecated. FIT image by purpose is using 64bit addresses to have default option to move images to high DDR (above 4GB). TF-A and TEE are optional components but in the most cases TF-A is present all the time and TEE(OP-TEE) is used by some configurations too. 3rd generated image is boot.bin with updated user field which contains version number. This image can be used with updated Image Selector which supports A/B update mechanisms with rollback protection. 4th image is image.bin which binary file which contains boot.bin and u-boot.itb together and can be programmed via origin Image Selector. This image can be also used for creating one capsule which contains both boot images (in SPL boot flow). Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- Currently I have this for testing purpose only to find missing bits and pieces in binman for cases I want to support. This patch depends on https://lore.kernel.org/r/fbed0251437b61a2f7a85596d7403b5b9c8237c1.17283063… --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-som-binman.dts | 224 +++++++++++++++++++++++++++ arch/arm/mach-zynqmp/Kconfig | 17 ++ configs/xilinx_zynqmp_kria_defconfig | 2 + 4 files changed, 244 insertions(+) create mode 100644 arch/arm/dts/zynqmp-som-binman.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 65176c8fb836..df340cc30701 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -367,6 +367,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kr-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-som-binman.dtb dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini.dtb \ diff --git a/arch/arm/dts/zynqmp-som-binman.dts b/arch/arm/dts/zynqmp-som-binman.dts new file mode 100644 index 000000000000..7f9333b02023 --- /dev/null +++ b/arch/arm/dts/zynqmp-som-binman.dts @@ -0,0 +1,224 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SOMs (k24/k26) + * + * (C) Copyright 2024, Advanced Micro Devices, Inc. + * + * Michal Simek <michal.simek(a)amd.com> + */ + +#include <config.h> + +/dts-v1/; +/ { + binman: binman { + multiple-images; + fit-dtb.blob { + filename = "fit-dtb.blob"; + pad-byte = <0>; + fit { + fit,align = <0x8>; + fit,external-offset = <0x0>; + description = "DTBs for SOMs+CCs"; + fit,fdt-list-val = "zynqmp-smk-k26-revA", "zynqmp-smk-k26-revA-sck-kr-g-revA", "zynqmp-smk-k26-revA-sck-kr-g-revB", "zynqmp-smk-k26-revA-sck-kv-g-revA", "zynqmp-smk-k26-revA-sck-kv-g-revB", "zynqmp-sm-k26-revA-sck-kv-g-revA", "zynqmp-sm-k26-revA-sck-kv-g-revB", "zynqmp-sm-k26-revA-sck-kr-g-revB", "zynqmp-smk-k24-revA-sck-kd-g-revA", "zynqmp-smk-k24-revA-sck-kv-g-revB", "zynqmp-smk-k24-revA-sck-kr-g-revB", "zynqmp-sm-k24-revA-sck-kd-g-revA", "zynqmp-sm-k24-revA-sck-kv-g-revB", "zynqmp-sm-k24-revA-sck-kr-g-revB"; + + images { + @fdt-SEQ { + description = "NAME"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + hash-1 { + algo = "md5"; + }; + }; + }; + configurations { + default = "config-1"; + config-1 { + description = "SOM itself"; + fdt = "fdt-1"; + }; + config-2 { + description = "zynqmp-smk-k26-.*-sck-kr-g-revA"; + fdt = "fdt-2"; + }; + config-3 { + description = "zynqmp-smk-k26-.*-sck-kr-g-.*"; + fdt = "fdt-3"; + }; + config-4 { + description = "zynqmp-smk-k26-.*-sck-kv-g-rev[AZ]"; + fdt = "fdt-4"; + }; + config-5 { + description = "zynqmp-smk-k26-.*-sck-kv-g-.*"; + fdt = "fdt-5"; + }; + config-6 { + description = "zynqmp-sm-k26-.*-sck-kv-g-rev[AZ]"; + fdt = "fdt-6"; + }; + config-7 { + description = "zynqmp-sm-k26-.*-sck-kv-g-.*"; + fdt = "fdt-7"; + }; + config-8 { + description = "zynqmp-sm-k26-.*-sck-kr-g-.*"; + fdt = "fdt-8"; + }; + config-9 { + description = "zynqmp-smk-k24-.*-sck-kd-g-.*"; + fdt = "fdt-9"; + }; + config-10 { + description = "zynqmp-smk-k24-.*-sck-kv-g-.*"; + fdt = "fdt-10"; + }; + config-11 { + description = "zynqmp-smk-k24-.*-sck-kr-g-.*"; + fdt = "fdt-11"; + }; + config-12 { + description = "zynqmp-sm-k24-.*-sck-kd-g-.*"; + fdt = "fdt-12"; + }; + config-13 { + description = "zynqmp-sm-k24-.*-sck-kv-g-.*"; + fdt = "fdt-13"; + }; + config-14 { + description = "zynqmp-sm-k24-.*-sck-kr-g-.*"; + fdt = "fdt-14"; + }; + }; + }; + }; + + /* u-boot.itb generation in a static way */ +#define TEXT_BASE_DOWN (CONFIG_TEXT_BASE & 0xffffffff) +#define TEXT_BASE_UP ((CONFIG_TEXT_BASE >> 32) & 0xffffffff) + +#define BL31_BASE_DOWN (CONFIG_BL31_LOAD_ADDR & 0xffffffff) +#define BL31_BASE_UP ((CONFIG_BL31_LOAD_ADDR >> 32) & 0xffffffff) + +#define BL32_BASE_DOWN (CONFIG_BL32_LOAD_ADDR & 0xffffffff) +#define BL32_BASE_UP ((CONFIG_BL32_LOAD_ADDR >> 32) & 0xffffffff) + + itb { + filename = "u-boot.itb"; + pad-byte = <0>; + + fit { + description = "Configuration for Xilinx ZynqMP SoC"; + fit,align = <0x8>; + fit,external-offset = <0x0>; + images { + uboot { + description = "U-Boot (64-bit)"; + type = "firmware"; + os = "u-boot"; + arch = "arm64"; + compression = "none"; + load = <(TEXT_BASE_UP) (TEXT_BASE_DOWN)>; + entry = <(TEXT_BASE_UP) (TEXT_BASE_DOWN)>; + hash { + algo = "md5"; + }; + u-boot-nodtb { + }; + }; + atf { + description = "Trusted Firmware-A"; + type = "firmware"; + os = "arm-trusted-firmware"; + arch = "arm64"; + compression = "none"; + load = <(BL31_BASE_UP) (BL31_BASE_DOWN)>; + entry = <(BL31_BASE_UP) (BL31_BASE_DOWN)>; + hash { + algo = "md5"; + }; + atf-bl31 { + optional; + }; + }; + tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <(BL32_BASE_UP) (BL32_BASE_DOWN)>; + entry = <(BL32_BASE_UP) (BL32_BASE_DOWN)>; + tee-os { + optional; + }; + }; + fdt { + description = "Multi DTB fit image"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x0 0x100000>; + hash { + algo = "md5"; + }; + fdt-blob { + filename = "fit-dtb.blob"; + type = "blob-ext"; + }; + }; + }; + configurations { + default = "config-1"; + config-1 { + description = "Multi DTB with TF-A"; + firmware = "atf"; + loadables = "tee", "uboot", "fdt"; + }; + }; + }; + }; + + /* boot.bin generated with version string inside */ + bootimage { + filename = "boot.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "spl/boot.bin"; + }; + /* Optional version string at offset 0x70 */ + blob-ext@2 { + offset = <0x70>; + filename = "version.bin"; + overlap; + optional; + }; + /* Optional version string at offset 0x94 */ + blob-ext@3 { + offset = <0x94>; + filename = "version.bin"; + overlap; + optional; + }; + }; + + /* Full QSPI image for recovery app */ + image { + filename = "image.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "boot.bin"; + }; + blob-ext@2 { + offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>; + filename = "u-boot.itb"; + }; + }; + }; +}; diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index aea13622b68a..a74de68c0181 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -11,6 +11,9 @@ config SYS_VENDOR config SYS_SOC default "zynqmp" +config BINMAN + default y + config SYS_MEM_RSVD_FOR_MMU bool "Reserve memory for MMU Table" help @@ -132,6 +135,20 @@ config SPL_ZYNQMP_RESTORE_JTAG even if no eFuses were burnt. This option restores the interface if possible. +config BL31_LOAD_ADDR + hex "Load address of BL31 image (mostly TF-A)" + default 0xfffe5000 + help + The load address for the BL31 image. This value is used to build the + FIT image header that places BL31 in memory where it will run. + +config BL32_LOAD_ADDR + hex "Load address of BL32 image (mostly secure OS)" + default 0x60000000 + help + The load address for the BL32 image. This value is used to build the + FIT image header that places BL32 in memory where it will run. + config ZYNQ_SDHCI_MAX_FREQ default 200000000 diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index 2eff9f35c0f4..1b4c33d2974e 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_FS_LOAD_KERNEL_NAME="" CONFIG_SPL_FS_LOAD_ARGS_NAME="" @@ -233,6 +234,7 @@ CONFIG_VIDEO_ZYNQMP_DPSUB=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y +# CONFIG_BINMAN_FDT is not set CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y -- 2.43.0

3 8

[PATCH v2 00/18] vbe: Series part D
by Simon Glass 07 Dec '24

07 Dec '24

This includes various patches towards implementing the VBE abrec bootmeth in U-Boot. Changes in v2: - Update this to say VPL instead of TPL - Default this option to off to avoid TPL-code-size increases - Drop the unnecessary interior check for CONFIG_IS_ENABLED(DM_MMC) - Update subject to mention that a newline is added too Simon Glass (18): sandbox: Add missing header file bootstd: Add stub for bootdev_setup_for_sibling_blk() gzip: Correct function comment for gunzip() fdtdec: Support separate BSS for all XPL builds tiny-printf: Correct return values tpl: Support numbered aliases in device tree ram: Support driver model in VPL serial: Support debug UART in TPL armv8: Support not having separate BSS arm: cache: Drop a stale comment arm: Fix up a stale comment in sections.c mmc: Support driver model in TPL mmc: Add more debugging for SPL mmc: Log the error when init fails mmc: rockchip: Log some error returns mmc: rockchip: Allow clocks to be missing rockchip: mmc: Fix a missing colon and newline rockchip: Provided SPL control over efuse presence arch/arm/cpu/armv8/u-boot-spl.lds | 12 ++++++++++++ arch/arm/lib/cache.c | 2 -- arch/arm/lib/sections.c | 2 +- arch/sandbox/include/asm/sections.h | 1 + common/spl/spl_mmc.c | 12 ++++++++++++ drivers/core/Kconfig | 8 ++++++++ drivers/misc/Makefile | 2 +- drivers/mmc/Kconfig | 11 +++++++++++ drivers/mmc/mmc.c | 2 +- drivers/mmc/rockchip_dw_mmc.c | 10 ++++------ drivers/mmc/rockchip_sdhci.c | 11 +++++------ drivers/ram/Kconfig | 9 +++++++++ drivers/serial/Kconfig | 7 +++++++ include/bootdev.h | 8 ++++++++ include/gzip.h | 6 ++++-- lib/fdtdec.c | 2 +- lib/tiny-printf.c | 15 ++++++--------- 17 files changed, 91 insertions(+), 29 deletions(-) -- 2.43.0

4 31

[PATCH v2 00/18] vbe: Series part E
by Simon Glass 07 Dec '24

07 Dec '24

This includes various patches towards implementing the VBE abrec bootmeth in U-Boot. It mostly focuses on SPL tweaks and adjusting what fatures are available in VPL. Changes in v2: - Add field names into the message - Fix 'depends on SPL' to depend on TPL - Depend on TPL/VPL as well - Drop patch 'serial: ns16550: Allow clocks to be missing' Simon Glass (18): image: Add a prototype for fit_image_get_phase() boot: Allow FIT to fall back from best-match option bootstd: Avoid sprintf() in SPL when creating bootdevs boot: Respect the load_op in fit_image_load() malloc: Show amount of used space when memory runs out malloc: Provide a simple malloc for VPL Support setting a maximum size for the VPL image spl: Report a loader failure spl: Allow serial to be disabled in any XPL phase spl: Support a relocated stack in any XPL phase spl: Drop use of uintptr_t spl: Drop a duplicate variable in boot_from_devices() spl: Add some more debugging to load_simple_fit() spl: lib: Allow for decompression in any SPL build boot: Allow use of FIT in TPL and VPL lib: Allow crc8 in TPL and VPL boot: Imply CRC8 with VBE hash: Plumb crc8 into the hash functions boot/Kconfig | 71 ++++++++++++++++++++++++++++++++++- boot/Makefile | 4 +- boot/bootdev-uclass.c | 10 ++++- boot/image-fit.c | 29 ++++++++------ common/hash.c | 8 ++++ common/malloc_simple.c | 3 +- common/spl/Kconfig.vpl | 17 +++++++++ common/spl/spl.c | 15 +++++--- common/spl/spl_atf.c | 36 +++++++++--------- common/spl/spl_fit.c | 12 +++++- common/spl/spl_legacy.c | 8 ++-- configs/sandbox_vpl_defconfig | 3 +- include/image.h | 16 +++++++- include/spl.h | 28 +++++++------- include/u-boot/crc.h | 3 ++ lib/Kconfig | 53 ++++++++++++++++++++++++++ lib/Makefile | 8 ++-- lib/crc8.c | 6 +++ 18 files changed, 262 insertions(+), 68 deletions(-) -- 2.43.0

2 21