December 2023 - U-Boot

[PATCH v1] net: sun8i-emac: Add support for fixed-link phy
by Maxim Kiselev 19 Jan '24

19 Jan '24

From: Maksim Kiselev <bigunclemax(a)gmail.com> Based on dt-specs fixed-link doesn't require phy-handle to be used. Fix driver to only read phy related setting when phy-handle is found. Signed-off-by: Maksim Kiselev <bigunclemax(a)gmail.com> --- drivers/net/sun8i_emac.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 04c3274fbe..0e339d69e0 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -834,11 +834,8 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) priv->use_internal_phy = false; offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle"); - if (offset < 0) { - debug("%s: Cannot find PHY address\n", __func__); - return -EINVAL; - } - priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); + if (offset >= 0) + priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); pdata->phy_interface = dev_read_phy_mode(dev); debug("phy interface %d\n", pdata->phy_interface); -- 2.39.2

3 7

[PATCH 1/2] image-host: add a check of the return value of snprintf.
by Hugo Cornelis 19 Jan '24

19 Jan '24

This patch allows to generate a sensible error message when generating binary images using very long filenames. This can happen with Buildroot and Yocto builds. Signed-off-by: Hugo Cornelis <hugo.cornelis(a)essensium.com> --- tools/image-host.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/tools/image-host.c b/tools/image-host.c index ca4950312f..3719f36117 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -378,6 +378,7 @@ static int fit_image_setup_cipher(struct image_cipher_info *info, char *algo_name; char filename[128]; int ret = -1; + int snprintf_return; if (fit_image_cipher_get_algo(fit, noffset, &algo_name)) { fprintf(stderr, "Can't get algo name for cipher in image '%s'\n", @@ -414,8 +415,18 @@ static int fit_image_setup_cipher(struct image_cipher_info *info, } /* Read the key in the file */ - snprintf(filename, sizeof(filename), "%s/%s%s", - info->keydir, info->keyname, ".bin"); + snprintf_return = snprintf(filename, sizeof(filename), "%s/%s%s", + info->keydir, info->keyname, ".bin"); + if (snprintf_return >= sizeof(filename)) { + printf("Can't format the key filename when setting up the cipher: insufficient buffer space\n"); + ret = -1; + goto out; + } + if (snprintf_return < 0) { + printf("Can't format the key filename when setting up the cipher: snprintf error\n"); + ret = -1; + goto out; + } info->key = malloc(info->cipher->key_len); if (!info->key) { fprintf(stderr, "Can't allocate memory for key\n"); @@ -436,8 +447,18 @@ static int fit_image_setup_cipher(struct image_cipher_info *info, if (info->ivname) { /* Read the IV in the file */ - snprintf(filename, sizeof(filename), "%s/%s%s", - info->keydir, info->ivname, ".bin"); + snprintf_return = snprintf(filename, sizeof(filename), "%s/%s%s", + info->keydir, info->ivname, ".bin"); + if (snprintf_return >= sizeof(filename)) { + printf("Can't format the IV filename when setting up the cipher: insufficient buffer space\n"); + ret = -1; + goto out; + } + if (snprintf_return < 0) { + printf("Can't format the IV filename when setting up the cipher: snprintf error\n"); + ret = -1; + goto out; + } ret = fit_image_read_data(filename, (unsigned char *)info->iv, info->cipher->iv_len); } else { -- 2.34.1

3 6

[PATCH v2 00/32] Qualcomm generic board support
by Caleb Connolly 19 Jan '24

19 Jan '24

Historically, Qualcomm boards in U-Boot have all had their own board/qualcomm/xyz directory, their own CONFIG_TARGET_XYZ option, their own hardcoded sysmap-xyz.c file, and their own U-Boot specific devicetree with little/no compatibility with upstream DT. This series makes a few final prepatory changes, and then replaces almost all of the board specific code with generic alternatives. The end result is that all Qualcomm boards both current and future (with the exception of the db410c and db820c) can be supported by a single U-Boot binary by just providing the correct DT. New boards can be added without introducing any addition mach/ or board/ code or config options. Due to the nature of this change, the patch ("mach-snapdragon: generalise board support") has become pretty big, I tried a few different ways to represent this in git history, but the other methods (e.g. adding a stub "generic" target and removing it again) were more confusing and made for much messier git history. The current patch is mostly atomic, but requires regenerating the config. The QCS404 EVB board had some code to enable the USB VBUS regulator, this is dropped in favour of a adding a new vbus-supply property to the dwc3-generic driver. This will also be used by the dragonboard845c in a future patch. This handles the common case of a board requiring some regulator be enabled for USB host mode. A more detailed description of the changes is below. == Memory map == The memory map was historically hardcoded into U-Boot, this meant that U-Boot had to be built for a specific variant of a device. This is changed to instead read the memory map from the DT /memory node. Additionally, most boards mapped addresss 0x0 as valid, as a result if a null pointer access happens then it will cause a bus stall (and board hang). This is fixed so that null pointer accesses will now correctly throw an exception. == DT loading == Previously, boards used the FDT blob embedded into U-Boot (via OF_SEPARATE). However, most Qualcomm boards run U-Boot as a secondary bootloader, so we can instead rely on the first-stage bootloader to populate some useful FDT properties for us (notably the /memory node and KASLR seed) and fetch the DTB that it provides. Combined with the memory map changes above, this let's us entirely avoid configuring the memory map explicitly. == defconfig == Most of the board defconfigs and config headers were quite similar, to simplify maintenance going forward, all the fully generic boards (sdm845 and qcs404-evb so far) are adapted to use the new qcom_defconfig. Going forward, all new Qualcomm boards should be supported by this defconfig. A notable exception is for specific usecases (like U-Boot as the primary bootloader). == The older dragonboards == The db410c and db820c both have some custom board init code, as a result they aren't yet binary compatible. mach-snapdragon is adjusted so that all the necessary config options (e.g. CONFIG_SYS_BOARD) can be set from their defconfigs, this makes it possible to enable support for new boards without introducing additional config options. The db410c can run U-Boot either chainloaded like the other boards, or as a first-stage bootloader replacing aboot. However it was hardcoded to only build for the latter option. This series introduces a new "chainloaded" defconfig to enable easier testing via fastboot. == dynamic environment variables == This series also introduces runtime-allocated load addresses via the lmb allocator. This allows for booting on boards with vastly different memory layouts without any pre-calculation or macro magic in the config header. This feature is based on similar code in mach-apple. The soc, board, and fdtfile environment variables are also generated automatically. Many Qualcomm boards follow a similar scheme for DTB naming such that the name can often be derived from the root compatible properties. This is intended to cover the most common cases and be a simple solution for booting generic distro images without having to explicitly choose the right DTB. The U-Boot DTS can be tweaked if necessary to produce the correct name, the variable can be overwritten, or a bootloader like GRUB can load the devicetree instead. == Upstream DT == All Qualcomm boards have had their devicetree files replaced with the upstream versions. Previous patch series made the necessary driver adjustments to fully support the upstream DT format. All future Qualcomm boards should use upstream DTS by default. Once Sumit's work to import dt-rebasing has been merged, we will drop the imported DT and bindings again. --- I have tested this series on the Dragonboard410c, Dragonboard820c, and Dragonboard845c. I unfortunately don't have access to a QCS404 EVB board to test. This series is based on the qcom-next branch [1] and depends on my PMIC fixes series [2], an integration branch for testing can be found at [3]. The non-qualcomm-specific changes (patches 1 and 2) don't have any dependencies. [1]: https://source.denx.de/u-boot/custodians/u-boot-snapdragon [2]: https://lore.kernel.org/u-boot/20231114-b4-qcom-dt-compat-v3-0-88a92f8f00ba… [3]: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/tree/b4/qcom-c… --- Changes in v2: - Split DTS changes to reduce patch size. - Import full board DTS files from Linux too, and introduce -u-boot.dtsi files where necessary to make any U-Boot specific changes. - Add a pinctrl driver for qcom PMIC GPIOs - Always enable LINUX_KERNEL_IMAGE_HEADER - Link to v1: https://lore.kernel.org/r/20231121-b4-qcom-common-target-v1-0-9492198e0c15@… To: Neil Armstrong <neil.armstrong(a)linaro.org> To: Sumit Garg <sumit.garg(a)linaro.org> To: Ramon Fried <rfried.dev(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> To: Dzmitry Sankouski <dsankouski(a)gmail.com> To: Caleb Connolly <caleb.connolly(a)linaro.org> To: Peng Fan <peng.fan(a)nxp.com> To: Jaehoon Chung <jh80.chung(a)samsung.com> To: Rayagonda Kokatanur <rayagonda.kokatanur(a)broadcom.com> To: Lukasz Majewski <lukma(a)denx.de> To: Sean Anderson <seanga2(a)gmail.com> To: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz(a)gmail.com> To: Stephan Gerhold <stephan(a)gerhold.net> Cc: <u-boot(a)lists.denx.de> --- Caleb Connolly (32): arm: init: export prev_bl_fdt_addr usb: dwc3-generic: support external vbus regulator mmc: msm_sdhci: use modern clock handling dt-bindings: drop msm_sdhci binding clk/qcom: use upstream compatible properties serial: msm: add debug UART serial: msm: fix clock handling gpio: qcom_pmic: 1-based GPIOs gpio: qcom_pmic: add a quirk to skip GPIO configuration gpio: qcom_pmic: add pinctrl driver board: dragonboard410c: add chainloaded config fragment board: dragonboard410c: upstream DT compat board: dragonboard410c: import board code from mach-snapdragon board: dragonboard820c: use LINUX_KERNEL_IMAGE_HEADER mach-snapdragon: generalise board support mach-snapdragon: dynamic load addresses mach-snapdragon: generate fdtfile automatically doc: board/qualcomm: document generic targets dt-bindings: import headers for SDM845 dts: sdm845: import supporting dtsi files dts: sdm845: replace with upstream DTS dt-bindings: import headers for MSM8916 dts: msm8916: import PMIC dtsi files dts: msm8916: replace with upstream DTS dt-bindings: import headers for MSM8996 dts: msm8996: import PMIC dtsi files dts: dragonboard820c: use correct bindings for clocks dts: msm8996: replace with upstream DTS dt-bindings: import headers for qcs404 dts: qcs404-evb: replace with upstream DT board: qcs404-evb: drop board code MAINTAINERS: Qualcomm: add some missing paths MAINTAINERS | 12 +- arch/arm/Kconfig | 4 + arch/arm/dts/Makefile | 9 +- arch/arm/dts/apq8016-sbc.dts | 729 +++ arch/arm/dts/apq8096-db820c-u-boot.dtsi | 10 + arch/arm/dts/apq8096-db820c.dts | 1137 ++++ arch/arm/dts/dragonboard410c-uboot.dtsi | 44 - arch/arm/dts/dragonboard410c.dts | 199 +- arch/arm/dts/dragonboard820c-uboot.dtsi | 32 - arch/arm/dts/dragonboard820c.dts | 151 - arch/arm/dts/dragonboard845c-uboot.dtsi | 26 - arch/arm/dts/dragonboard845c.dts | 48 - arch/arm/dts/msm8916-pm8916.dtsi | 157 + arch/arm/dts/msm8916.dtsi | 2702 +++++++++ arch/arm/dts/msm8996.dtsi | 3884 +++++++++++++ arch/arm/dts/pm8916.dtsi | 178 + arch/arm/dts/pm8994.dtsi | 152 + arch/arm/dts/pm8998.dtsi | 130 + arch/arm/dts/pmi8994.dtsi | 65 + arch/arm/dts/pmi8998.dtsi | 98 + arch/arm/dts/pms405.dtsi | 149 + arch/arm/dts/qcs404-evb-4000-u-boot.dtsi | 26 + arch/arm/dts/qcs404-evb-4000.dts | 96 + arch/arm/dts/qcs404-evb-uboot.dtsi | 30 - arch/arm/dts/qcs404-evb.dts | 390 -- arch/arm/dts/qcs404-evb.dtsi | 389 ++ arch/arm/dts/qcs404.dtsi | 1829 ++++++ arch/arm/dts/sdm845-db845c.dts | 1190 ++++ .../arm/dts/sdm845-samsung-starqltechn-u-boot.dtsi | 16 + arch/arm/dts/sdm845-samsung-starqltechn.dts | 624 +++ arch/arm/dts/sdm845-wcd9340.dtsi | 86 + arch/arm/dts/sdm845.dtsi | 5801 +++++++++++++++++++- arch/arm/dts/starqltechn-uboot.dtsi | 27 - arch/arm/dts/starqltechn.dts | 68 - arch/arm/lib/save_prev_bl_data.c | 5 + arch/arm/mach-snapdragon/Kconfig | 95 +- arch/arm/mach-snapdragon/Makefile | 8 +- arch/arm/mach-snapdragon/board.c | 304 + arch/arm/mach-snapdragon/include/mach/dram.h | 12 - arch/arm/mach-snapdragon/init_sdm845.c | 73 - arch/arm/mach-snapdragon/misc.c | 55 - arch/arm/mach-snapdragon/sysmap-apq8016.c | 31 - arch/arm/mach-snapdragon/sysmap-apq8096.c | 31 - arch/arm/mach-snapdragon/sysmap-qcs404.c | 43 - arch/arm/mach-snapdragon/sysmap-sdm845.c | 31 - board/qualcomm/dragonboard410c/Kconfig | 15 - board/qualcomm/dragonboard410c/Makefile | 3 +- .../dragonboard410c/configs/chainloaded.config | 7 + board/qualcomm/dragonboard410c/dragonboard410c.c | 109 +- .../qualcomm/dragonboard410c/misc.c | 51 +- .../mach => board/qualcomm/dragonboard410c}/misc.h | 1 + board/qualcomm/dragonboard820c/Kconfig | 15 - board/qualcomm/dragonboard820c/Makefile | 1 - board/qualcomm/dragonboard820c/dragonboard820c.c | 39 +- board/qualcomm/dragonboard820c/head.S | 33 - board/qualcomm/dragonboard820c/u-boot.lds | 111 - board/qualcomm/dragonboard845c/Kconfig | 12 - board/qualcomm/qcs404-evb/Kconfig | 15 - board/qualcomm/qcs404-evb/Makefile | 6 - board/qualcomm/qcs404-evb/qcs404-evb.c | 62 - configs/dragonboard410c_defconfig | 8 +- configs/dragonboard820c_defconfig | 8 +- configs/dragonboard845c_defconfig | 29 - configs/qcom_defconfig | 73 + configs/qcs404evb_defconfig | 55 - configs/starqltechn_defconfig | 41 - doc/board/qualcomm/board.rst | 119 + doc/board/qualcomm/debugging.rst | 61 + doc/board/qualcomm/index.rst | 4 +- doc/board/qualcomm/qcs404.rst | 79 - doc/board/qualcomm/sdm845.rst | 162 - doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 - doc/device-tree-bindings/usb/ehci-msm.txt | 10 - drivers/clk/qcom/clock-apq8016.c | 9 +- drivers/clk/qcom/clock-apq8096.c | 7 +- drivers/gpio/qcom_pmic_gpio.c | 232 +- drivers/mmc/msm_sdhci.c | 69 +- drivers/phy/qcom/msm8916-usbh-phy.c | 4 +- drivers/pinctrl/qcom/pinctrl-apq8016.c | 2 +- drivers/serial/Kconfig | 8 + drivers/serial/serial_msm.c | 56 +- drivers/usb/dwc3/dwc3-generic.c | 12 + drivers/usb/host/ehci-msm.c | 24 +- include/configs/dragonboard845c.h | 20 - include/configs/qcom.h | 21 + include/configs/qcs404-evb.h | 20 - include/configs/sdm845.h | 26 - include/dt-bindings/arm/coresight-cti-dt.h | 37 + include/dt-bindings/clock/qcom,camcc-sdm845.h | 116 + include/dt-bindings/clock/qcom,dispcc-sdm845.h | 56 + include/dt-bindings/clock/qcom,gcc-msm8916.h | 179 + include/dt-bindings/clock/qcom,gcc-msm8996.h | 360 ++ include/dt-bindings/clock/qcom,gpucc-sdm845.h | 24 + include/dt-bindings/clock/qcom,lpass-sdm845.h | 15 + include/dt-bindings/clock/qcom,mmcc-msm8996.h | 295 + include/dt-bindings/clock/qcom,rpmcc.h | 174 + include/dt-bindings/clock/qcom,rpmh.h | 37 + include/dt-bindings/clock/qcom,turingcc-qcs404.h | 15 + include/dt-bindings/clock/qcom,videocc-sdm845.h | 35 + include/dt-bindings/dma/qcom-gpi.h | 11 + include/dt-bindings/firmware/qcom,scm.h | 18 + include/dt-bindings/iio/qcom,spmi-vadc.h | 300 + include/dt-bindings/interconnect/qcom,msm8916.h | 100 + .../dt-bindings/interconnect/qcom,msm8996-cbf.h | 12 + include/dt-bindings/interconnect/qcom,msm8996.h | 163 + include/dt-bindings/interconnect/qcom,osm-l3.h | 15 + include/dt-bindings/interconnect/qcom,sdm845.h | 150 + include/dt-bindings/phy/phy-qcom-qmp.h | 20 + include/dt-bindings/phy/phy-qcom-qusb2.h | 37 + include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 164 + include/dt-bindings/pinctrl/qcom,pmic-mpp.h | 106 + include/dt-bindings/power/qcom-rpmpd.h | 412 ++ include/dt-bindings/qcom,q6asm.h | 26 + .../dt-bindings/regulator/qcom,rpmh-regulator.h | 36 + include/dt-bindings/reset/qcom,gcc-msm8916.h | 100 + include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 + include/dt-bindings/reset/qcom,sdm845-pdc.h | 22 + include/dt-bindings/soc/qcom,apr.h | 28 + include/dt-bindings/soc/qcom,rpmh-rsc.h | 14 + include/dt-bindings/sound/apq8016-lpass.h | 9 + include/dt-bindings/sound/qcom,lpass.h | 46 + include/dt-bindings/sound/qcom,q6afe.h | 9 + include/dt-bindings/sound/qcom,q6asm.h | 26 + include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 234 + include/dt-bindings/sound/qcom,wcd9335.h | 15 + include/init.h | 11 + 126 files changed, 23909 insertions(+), 2375 deletions(-) --- base-commit: bcb4a9ddbd21a61b5b421ba374a785757bd28c80 // Caleb (they/them)

5 88

[PATCH V2] board: rockchip: add Powkiddy X55
by Chris Morgan 18 Jan '24

18 Jan '24

From: Chris Morgan <macromorgan(a)hotmail.com> The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device. UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this successfully boots mainline Linux. Changes since V1: - Built on top of this patch series [1] which makes the ADC detect function more generic and also moves the board_rng_seed to a more generic location. - Updated U-Boot specific devicetree to drop redundant values and add nodes required for ADC detection in SPL. - Updated defconfig to add additional options for SPL ADC detection logic as well as drop some drivers that are not needed. Note that CONFIG_DM_PMIC_FAN53555 is used by the tcs,tcs4525 regulator on i2c0 at 0x1c. Additionally the code fails to compile without selecting CONFIG_SPL_ROCKCHIP_BACK_TO_BROM. [1] https://lore.kernel.org/u-boot/20231211232125.171438-1-macroalpha82@gmail.c… Signed-off-by: Chris Morgan <macromorgan(a)hotmail.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi | 67 ++ arch/arm/dts/rk3566-powkiddy-x55.dts | 926 +++++++++++++++++++ arch/arm/mach-rockchip/rk3568/Kconfig | 6 + board/powkiddy/x55/Kconfig | 15 + board/powkiddy/x55/MAINTAINERS | 9 + board/powkiddy/x55/Makefile | 6 + board/powkiddy/x55/x55.c | 42 + configs/powkiddy-x55-rk3566_defconfig | 92 ++ doc/board/index.rst | 1 + doc/board/powkiddy/index.rst | 9 + doc/board/powkiddy/x55.rst | 25 + doc/board/rockchip/rockchip.rst | 1 + include/configs/powkiddy-x55-rk3566.h | 14 + 14 files changed, 1214 insertions(+) create mode 100644 arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-powkiddy-x55.dts create mode 100644 board/powkiddy/x55/Kconfig create mode 100644 board/powkiddy/x55/MAINTAINERS create mode 100644 board/powkiddy/x55/Makefile create mode 100644 board/powkiddy/x55/x55.c create mode 100644 configs/powkiddy-x55-rk3566_defconfig create mode 100644 doc/board/powkiddy/index.rst create mode 100644 doc/board/powkiddy/x55.rst create mode 100644 include/configs/powkiddy-x55-rk3566.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5fc888680b..6e5cb7c3e9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -172,6 +172,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3566-anbernic-rgxx3.dtb \ + rk3566-powkiddy-x55.dtb \ rk3566-quartz64-a.dtb \ rk3566-quartz64-b.dtb \ rk3566-radxa-cm3-io.dtb \ diff --git a/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi new file mode 100644 index 0000000000..1a3089b598 --- /dev/null +++ b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +/ { + chosen { + stdout-path = &uart2; + }; + + rng: rng@fe388000 { + compatible = "rockchip,cryptov2-rng"; + reg = <0x0 0xfe388000 0x0 0x2000>; + status = "okay"; + }; +}; + +&cru { + assigned-clocks = + <&pmucru CLK_RTC_32K>, <&pmucru PLL_PPLL>, + <&pmucru PCLK_PMU>, <&cru PLL_CPLL>, + <&cru PLL_GPLL>, <&cru PLL_VPLL>, + <&cru ACLK_BUS>, <&cru PCLK_BUS>, + <&cru ACLK_TOP_HIGH>, <&cru ACLK_TOP_LOW>, + <&cru HCLK_TOP>, <&cru PCLK_TOP>, + <&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>, + <&cru CPLL_500M>, <&cru CPLL_333M>, + <&cru CPLL_250M>, <&cru CPLL_125M>, + <&cru CPLL_100M>, <&cru CPLL_62P5M>, + <&cru CPLL_50M>, <&cru CPLL_25M>; + assigned-clock-rates = + <32768>, <200000000>, + <100000000>, <1000000000>, + <1200000000>, <126400000>, + <150000000>, <100000000>, + <500000000>, <400000000>, + <150000000>, <100000000>, + <300000000>, <150000000>, + <500000000>, <333333333>, + <250000000>, <125000000>, + <100000000>, <62500000>, + <50000000>, <25000000>; + assigned-clock-parents = + <&pmucru CLK_RTC32K_FRAC>; +}; + +&pmucru { + assigned-clocks = <&pmucru SCLK_32K_IOE>; + assigned-clock-parents = <&pmucru CLK_RTC_32K>; +}; + +/* Move the saradc to a fixed regulator so that it works in SPL. */ +&saradc { + bootph-all; + vref-supply = <&vcc_sys>; + status = "okay"; +}; + +&uart2 { + clock-frequency = <24000000>; + bootph-all; + status = "okay"; +}; + +&vcc_sys { + bootph-all; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3566-powkiddy-x55.dts b/arch/arm/dts/rk3566-powkiddy-x55.dts new file mode 100644 index 0000000000..4786b19fd0 --- /dev/null +++ b/arch/arm/dts/rk3566-powkiddy-x55.dts @@ -0,0 +1,926 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3566.dtsi" + +/ { + model = "Powkiddy x55"; + compatible = "powkiddy,x55", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc2; + mmc3 = &sdmmc1; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc_joystick: adc-joystick { + compatible = "adc-joystick"; + io-channels = <&saradc 0>, <&saradc 1>, + <&saradc 2>, <&saradc 3>; + poll-interval = <60>; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <15 1023>; + linux,code = <ABS_X>; + }; + + axis@1 { + reg = <1>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <1023 15>; + linux,code = <ABS_Y>; + }; + + axis@2 { + reg = <2>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <15 1023>; + linux,code = <ABS_RX>; + }; + + axis@3 { + reg = <3>; + abs-flat = <30>; + abs-fuzz = <20>; + abs-range = <1023 15>; + linux,code = <ABS_RY>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; + + battery: battery { + compatible = "simple-battery"; + charge-full-design-microamp-hours = <4000000>; + charge-term-current-microamp = <300000>; + constant-charge-current-max-microamp = <2000000>; + constant-charge-voltage-max-microvolt = <4300000>; + factory-internal-resistance-micro-ohms = <91000>; + voltage-max-design-microvolt = <4138000>; + voltage-min-design-microvolt = <3400000>; + + ocv-capacity-celsius = <20>; + ocv-capacity-table-0 = <4138000 100>, <4083000 95>, <4059000 90>, <4044000 85>, + <4030000 80>, <4020000 75>, <4006000 70>, <3972000 65>, + <3934000 60>, <3904000 55>, <3878000 50>, <3857000 45>, + <3843000 40>, <3826000 35>, <3801000 30>, <3768000 25>, + <3735000 20>, <3688000 15>, <3621000 10>, <3553000 5>, + <3400000 0>; + }; + + gpio_keys_control: gpio-keys-control { + compatible = "gpio-keys"; + pinctrl-0 = <&btn_pins_ctrl>; + pinctrl-names = "default"; + + button-a { + gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = <BTN_EAST>; + }; + + button-b { + gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; + label = "SOUTH"; + linux,code = <BTN_SOUTH>; + }; + + button-down { + gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + label = "DPAD-DOWN"; + linux,code = <BTN_DPAD_DOWN>; + }; + + button-l1 { + gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>; + label = "TL"; + linux,code = <BTN_TL>; + }; + + button-l2 { + gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; + label = "TL2"; + linux,code = <BTN_TL2>; + }; + + button-left { + gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-right { + gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-select { + gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>; + label = "SELECT"; + linux,code = <BTN_SELECT>; + }; + + button-start { + gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + label = "START"; + linux,code = <BTN_START>; + }; + + button-thumbl { + gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>; + label = "THUMBL"; + linux,code = <BTN_THUMBL>; + }; + + button-thumbr { + gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; + label = "THUMBR"; + linux,code = <BTN_THUMBR>; + }; + + button-r1 { + gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR>; + }; + + button-r2 { + gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR2>; + }; + + button-up { + gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + label = "DPAD-UP"; + linux,code = <BTN_DPAD_UP>; + }; + + button-x { + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + label = "NORTH"; + linux,code = <BTN_NORTH>; + }; + + button-y { + gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; + }; + + gpio_keys_vol: gpio-keys-vol { + compatible = "gpio-keys"; + autorepeat; + pinctrl-0 = <&btn_pins_vol>; + pinctrl-names = "default"; + + button-voldown { + gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; + label = "VOLUMEDOWN"; + linux,code = <KEY_VOLUMEDOWN>; + }; + + button-volup { + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; + label = "VOLUMEUP"; + linux,code = <KEY_VOLUMEUP>; + }; + }; + + gpio_leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + red_led: led-0 { + color = <LED_COLOR_ID_RED>; + default-state = "off"; + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_STATUS; + }; + + green_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_POWER; + }; + + amber_led: led-2 { + color = <LED_COLOR_ID_AMBER>; + gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_CHARGING; + }; + + }; + + hdmi-con { + compatible = "hdmi-connector"; + ddc-i2c-bus = <&i2c5>; + type = "c"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk817 1>; + clock-names = "ext_clock"; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; + }; + + /* Channels reversed for both headphones and speakers. */ + sound { + compatible = "simple-audio-card"; + pinctrl-0 = <&hp_det>; + pinctrl-names = "default"; + simple-audio-card,name = "rk817_ext"; + simple-audio-card,aux-devs = <&spk_amp>; + simple-audio-card,format = "i2s"; + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphones", + "Speaker", "Internal Speakers"; + simple-audio-card,routing = + "MICL", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", + "Internal Speakers", "Speaker Amp OUTL", + "Internal Speakers", "Speaker Amp OUTR", + "Speaker Amp INL", "HPOL", + "Speaker Amp INR", "HPOR"; + simple-audio-card,pin-switches = "Internal Speakers"; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + }; + + spk_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spk_amp_enable_h>; + pinctrl-names = "default"; + sound-name-prefix = "Speaker Amp"; + }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc5v0_host_en>; + pinctrl-names = "default"; + regulator-name = "vcc5v0_host"; + vin-supply = <&dcdc_boost>; + }; + + vcc_lcd: regulator-vcc-lcd { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc_lcd_en>; + pinctrl-names = "default"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_lcd"; + }; + + vcc_sys: regulator-vcc-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + regulator-name = "vcc_sys"; + }; + + vcc_wifi: regulator-vcc-wifi { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&vcc_wifi_h>; + pinctrl-names = "default"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_wifi"; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&cru { + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, + <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; + assigned-clock-rates = <32768>, <1200000000>, + <200000000>, <126400000>; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&dsi_dphy0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ports { + dsi0_in: port@0 { + reg = <0>; + dsi0_in_vp1: endpoint { + remote-endpoint = <&vp1_out_dsi0>; + }; + }; + + dsi0_out: port@1 { + reg = <1>; + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; + + panel: panel@0 { + compatible = "powkiddy,x55-panel", "himax,hx8394"; + reg = <0>; + backlight = <&backlight>; + iovcc-supply = <&vcc_lcd>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_rst>; + reset-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; + rotation = <270>; + vcc-supply = <&vcc_lcd>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c5>; + pinctrl-0 = <&hdmitxm0_cec>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + clock-names = "mclk"; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clocks = <&cru I2S1_MCLKOUT_TX>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + #clock-cells = <1>; + #sound-dai-cells = <0>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + dcdc_boost: BOOST { + regulator-min-microvolt = <4700000>; + regulator-max-microvolt = <5400000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + rk817_charger: charger { + monitored-battery = <&battery>; + rockchip,resistor-sense-micro-ohms = <10000>; + rockchip,sleep-enter-current-microamp = <150000>; + rockchip,sleep-filter-current-microamp = <100000>; + }; + + }; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-name = "vdd_cpu"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c5 { + pinctrl-0 = <&i2c5m1_xfer>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx>, <&i2s1m0_lrcktx>, <&i2s1m0_sdi0>, + <&i2s1m0_sdo0>; + pinctrl-names = "default"; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&pinctrl { + audio-amplifier { + spk_amp_enable_h: spk-amp-enable-h { + rockchip,pins = + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-control { + btn_pins_ctrl: btn-pins-ctrl { + rockchip,pins = + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + btn_pins_vol: btn-pins-vol { + rockchip,pins = + <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-leds { + led_pins: led-pins { + rockchip,pins = + <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hp-detect { + hp_det: hp-det { + rockchip,pins = + <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = + <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = + <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + vcc-lcd { + vcc_lcd_en: vcc-lcd-en { + rockchip,pins = + <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc-wifi { + vcc_wifi_h: vcc-wifi-h { + rockchip,pins = + <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcca1v8_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcca1v8_pmu>; + vccio5-supply = <&vcc2v8_dvp>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; +}; + +&pwm4 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, + <&emmc_datastrobe>, <&emmc_rstnout>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-0 = <&sdmmc0_bus4>, <&sdmmc0_clk>, <&sdmmc0_cmd>, + <&sdmmc0_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-0 = <&sdmmc1_bus4>, <&sdmmc1_cmd>, <&sdmmc1_clk>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_wifi>; + status = "okay"; +}; + +&sdmmc2 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-0 = <&sdmmc2m1_bus4>, <&sdmmc2m1_cmd>, <&sdmmc2m1_clk>, + <&sdmmc2m1_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vqmmc-supply = <&vcc2v8_dvp>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1m0_xfer>, <&uart1m0_ctsn>, <&uart1m0_rtsn>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt"; + device-wake-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_xhci { + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg = <ROCKCHIP_VOP2_EP_MIPI0>; + remote-endpoint = <&dsi0_in_vp1>; + }; +}; diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index baa51349f4..a97da8ae55 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568 help Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC. +config TARGET_POWKIDDY_X55_RK3566 + bool "Powkiddy X55" + help + Powkiddy X55 handheld gaming console with an RK3566 SoC. + config TARGET_QUARTZ64_RK3566 bool "Pine64 Quartz64" help @@ -45,5 +50,6 @@ source "board/rockchip/evb_rk3568/Kconfig" source "board/anbernic/rgxx3_rk3566/Kconfig" source "board/hardkernel/odroid_m1/Kconfig" source "board/pine64/quartz64_rk3566/Kconfig" +source "board/powkiddy/x55/Kconfig" endif diff --git a/board/powkiddy/x55/Kconfig b/board/powkiddy/x55/Kconfig new file mode 100644 index 0000000000..a7b3ed4d0d --- /dev/null +++ b/board/powkiddy/x55/Kconfig @@ -0,0 +1,15 @@ +if TARGET_POWKIDDY_X55_RK3566 + +config SYS_BOARD + default "x55" + +config SYS_VENDOR + default "powkiddy" + +config SYS_CONFIG_NAME + default "powkiddy-x55-rk3566" + +config BOARD_SPECIFIC_OPTIONS + def_bool y + +endif diff --git a/board/powkiddy/x55/MAINTAINERS b/board/powkiddy/x55/MAINTAINERS new file mode 100644 index 0000000000..9ed48f408e --- /dev/null +++ b/board/powkiddy/x55/MAINTAINERS @@ -0,0 +1,9 @@ +X55 +M: Chris Morgan <macromorgan(a)hotmail.com> +S: Maintained +F: board/powkiddy/x55 +F: include/configs/powkiddy-x55-rk3566.h +F: configs/powkiddy-x55-rk3566_defconfig +F: arch/arm/dts/rk3566-powkiddy-x55.dts +F: arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi +F: doc/board/powkiddy/x55.rst diff --git a/board/powkiddy/x55/Makefile b/board/powkiddy/x55/Makefile new file mode 100644 index 0000000000..55c8c16aa1 --- /dev/null +++ b/board/powkiddy/x55/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2023 Chris Morgan <macromorgan(a)hotmail.com> +# + +obj-y += x55.o diff --git a/board/powkiddy/x55/x55.c b/board/powkiddy/x55/x55.c new file mode 100644 index 0000000000..8d98baa24f --- /dev/null +++ b/board/powkiddy/x55/x55.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 Chris Morgan <macromorgan(a)hotmail.com> + */ + +#include <asm/arch-rockchip/boot_mode.h> +#include <asm/io.h> + +#define GPIO4_BASE 0xfe770000 +#define GPIO_SWPORT_DR_L 0x0000 +#define GPIO_SWPORT_DDR_L 0x0008 +#define GPIO_B4 BIT(12) +#define GPIO_B5 BIT(13) +#define GPIO_B6 BIT(14) + +#define GPIO_WRITEMASK(bits) ((bits) << 16) + +/* + * Start LED very early so user knows device is on. Set color + * to red. + */ +void spl_board_init(void) +{ + setup_boot_mode(); + + /* Set GPIO4_B4, GPIO4_B5, and GPIO4_B6 to output. */ + writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | \ + (GPIO_B6 | GPIO_B5 | GPIO_B4), + (GPIO4_BASE + GPIO_SWPORT_DDR_L)); + /* Set GPIO4_B5 and GPIO4_B6 to 0 and GPIO4_B4 to 1. */ + writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B4, + (GPIO4_BASE + GPIO_SWPORT_DR_L)); +} + +int rk_board_late_init(void) +{ + /* Turn off red LED and turn on orange LED. */ + writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B6, + (GPIO4_BASE + GPIO_SWPORT_DR_L)); + + return 0; +} diff --git a/configs/powkiddy-x55-rk3566_defconfig b/configs/powkiddy-x55-rk3566_defconfig new file mode 100644 index 0000000000..f9a513f97c --- /dev/null +++ b/configs/powkiddy-x55-rk3566_defconfig @@ -0,0 +1,92 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3566-powkiddy-x55" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_POWKIDDY_X55_RK3566=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-powkiddy-x55.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ADC=y +CONFIG_SPL_POWER=y +CONFIG_SPL_ATF=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +# CONFIG_NET is not set +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ARM_SMCCC_FEATURES=y +CONFIG_SCMI_FIRMWARE=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_FAN53555=y +CONFIG_PMIC_RK8XX=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y +# CONFIG_RNG_SMCCC_TRNG is not set +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_REGEX=y +# CONFIG_RSA is not set +CONFIG_ERRNO_STR=y +# CONFIG_EFI_LOADER is not set diff --git a/doc/board/index.rst b/doc/board/index.rst index 531e547e7e..dd4bce9981 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -36,6 +36,7 @@ Board-specific doc nxp/index openpiton/index phytec/index + powkiddy/index purism/index qualcomm/index renesas/index diff --git a/doc/board/powkiddy/index.rst b/doc/board/powkiddy/index.rst new file mode 100644 index 0000000000..b0115a73d4 --- /dev/null +++ b/doc/board/powkiddy/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Powkiddy +======== + +.. toctree:: + :maxdepth: 2 + + x55.rst diff --git a/doc/board/powkiddy/x55.rst b/doc/board/powkiddy/x55.rst new file mode 100644 index 0000000000..cd7456883b --- /dev/null +++ b/doc/board/powkiddy/x55.rst @@ -0,0 +1,25 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Powkiddy X55 Handheld Gaming Console +=============================================== + +This allows U-Boot to boot the Powkiddy X55 handheld gaming console. +The X55 is very similar to the other existing Powkiddy RK3566 based +devices, except that ADC channels 0-3 are used for the ADC joysticks. +As a result the same auto detection functionality cannot be used on +this device as the others. + +The indicator LED will change color based on the boot stage. Red means +the device is powered on but has yet to start U-Boot, amber means the +device has started U-Boot and is waiting to boot Linux, and when Linux +has taken over the LED should change to green (or however it has been +configured by the user). + +In the event the device needs to enter Rockchip download mode, a user +can, starting with the power off, hold the left joystick all the way +to the left and then power on the device. At this point the USB-C port +marked DC/OTG should be set to peripheral mode and allow a user to +manipulate the device with the rkdeveloptool tool. + +See :doc:`../rockchip/devicetree/rockchip` for building and flashing +instructions. diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 18d0b6f089..4e290cecdc 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -98,6 +98,7 @@ List of mainline supported Rockchip boards: - Pine64 SOQuartz on Blade (soquartz-blade-rk3566) - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566) - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566) + - Powkiddy X55 (powkiddy-x55-rk3566) - Radxa CM3 IO Board (radxa-cm3-io-rk3566) * rk3568 diff --git a/include/configs/powkiddy-x55-rk3566.h b/include/configs/powkiddy-x55-rk3566.h new file mode 100644 index 0000000000..a25b6de455 --- /dev/null +++ b/include/configs/powkiddy-x55-rk3566.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __POWKIDDY_X55_RK3566_H +#define __POWKIDDY_X55_RK3566_H + +#include <configs/rk3568_common.h> + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#define RK_DNL_ADC_CHAN 0 + +#endif -- 2.34.1

2 2

[UBOOT PATCH v4] test/py: net: Add dhcp abort test
by Love Kumar 18 Jan '24

18 Jan '24

Abort the dhcp request in the middle by pressing ctrl + c on u-boot prompt and validate the abort status. Signed-off-by: Love Kumar <love.kumar(a)amd.com> --- Changes in v2: - Mark CMD_MII command dependency Changes in v3: - Skip the test if PHY device not present Changes in v4: - Setup the network configuration by running dhcp test at the end of test - Add option to skip the test if it is not desired or possible --- test/py/tests/test_net.py | 57 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py index b2241ae6a482..e0749125fd53 100644 --- a/test/py/tests/test_net.py +++ b/test/py/tests/test_net.py @@ -7,6 +7,7 @@ import pytest import u_boot_utils import uuid +import re """ Note: This test relies on boardenv_* containing configuration values to define @@ -30,6 +31,11 @@ env__net_uses_pci = True # set to False. env__net_dhcp_server = True +# False or omitted if a DHCP server is attached to the network, and dhcp abort +# case should be tested. +# If DHCP abort testing is not possible or desired, set this variable to True. +env__dhcp_abort_test_skip = True + # True if a DHCPv6 server is attached to the network, and should be tested. # If DHCPv6 testing is not possible or desired, this variable may be omitted or # set to False. @@ -115,6 +121,57 @@ def test_net_dhcp(u_boot_console): global net_set_up net_set_up = True +(a)pytest.mark.buildconfigspec("cmd_dhcp") +(a)pytest.mark.buildconfigspec("cmd_mii") +def test_net_dhcp_abort(u_boot_console): + """Test the dhcp command by pressing ctrl+c in the middle of dhcp request + + The boardenv_* file may be used to enable/disable this test; see the + comment at the beginning of this file. + """ + + test_dhcp = u_boot_console.config.env.get("env__net_dhcp_server", False) + if not test_dhcp: + pytest.skip("No DHCP server available") + + if u_boot_console.config.env.get("env__dhcp_abort_test_skip", False): + pytest.skip("DHCP abort test is not enabled!") + + u_boot_console.run_command("setenv autoload no") + + # Phy reset before running dhcp command + output = u_boot_console.run_command("mii device") + if not re.search(r"Current device: '(.+?)'", output): + pytest.skip("PHY device does not exist!") + eth_num = re.search(r"Current device: '(.+?)'", output).groups()[0] + u_boot_console.run_command(f"mii device {eth_num}") + output = u_boot_console.run_command("mii info") + eth_addr = hex(int(re.search(r"PHY (.+?):", output).groups()[0], 16)) + u_boot_console.run_command(f"mii modify {eth_addr} 0 0x8000 0x8000") + + u_boot_console.run_command("dhcp", wait_for_prompt=False) + try: + u_boot_console.wait_for("Waiting for PHY auto negotiation to complete") + except: + pytest.skip("Timeout waiting for PHY auto negotiation to complete") + + u_boot_console.wait_for("done") + + # Sending Ctrl-C + output = u_boot_console.run_command( + chr(3), wait_for_echo=False, send_nl=False + ) + + assert "TIMEOUT" not in output + assert "DHCP client bound to address " not in output + assert "Abort" in output + + # Provide a time to recover from Abort - if it is not performed + # There is message like: ethernet@ff0e0000: No link. + u_boot_console.run_command("sleep 1") + # Run the dhcp test to setup the network configuration + test_net_dhcp(u_boot_console) + @pytest.mark.buildconfigspec('cmd_dhcp6') def test_net_dhcp6(u_boot_console): """Test the dhcp6 command. -- 2.25.1

4 5

[PATCH v13 00/24] Modernize U-Boot shell
by Francis Laniel 18 Jan '24

18 Jan '24

Hi! During 2021 summer, Sean Anderson wrote a contribution to add a new shell, based on LIL, to U-Boot [1, 2]. While one of the goals of this contribution was to address the fact actual U-Boot shell, which is based on Busybox hush, is old there was a discussion about adding a new shell versus updating the actual one [3, 4]. So, in this series, with Harald Seiler, we updated the actual U-Boot shell to reflect what is currently in Busybox source code. Basically, this contribution is about taking a snapshot of Busybox shell/hush.c file (as it exists in commit 37460f5da) and adapt it to suit U-Boot needs. This contribution was written to be as backward-compatible as possible to avoid breaking the existing. So, the modern hush flavor offers the same as the actual, that is to say: 1. Variable expansion. 2. Instruction lists (;, && and ||). 3. If, then and else. 4. Loops (for, while and until). No new features offered by Busybox hush were implemented (e.g. functions). It is possible to change the parser at runtime using the "cli" command: => cli print old => cli set modern => cli print modern => cli set old The default parser is the old one. Note that to use both parser, you would need to set both CONFIG_HUSH_MODERN_PARSER and CONFIG_HUSH_OLD_PARSER. In terms of testing, new unit tests were added to ut to ensure the new behavior is the same as the old one and it does not add regression. Nonetheless, if old behavior was buggy and fixed upstream, the fix is then added to U-Boot [5]. In sandbox, all of these tests pass smoothly: => printenv board board=sandbox => ut hush Running 20 hush tests ... Failures: 0 => cli set modern => ut hush Running 20 hush tests ... Failures: 0 Thanks to the effort of Harald Seiler, I was successful booting a board: => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => cli get old => boot ... root@lepotato:~# root@lepotato:~# reboot ... => cli set modern => cli get modern => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => boot ... root@lepotato:~# This contribution indeed adds a lot of code and there were concern about its size [6, 7]. With regard to the amount of code added, the cli_hush_upstream.c is 13030 lines long but it seems a smaller subset is really used: gcc -D__U_BOOT__ -E common/cli_hush_upstream.c | wc -l 2870 Despite this, it is better to still have the whole upstream code for the sake of easing maintenance. With regard to memory size, I conducted some experiments for version 8 of this series and for a subset of arm64 boards and found the worst case to be 4K [8]. Tom Rini conducted more research on this and also found the increase to be acceptable [9]. If you want to review it - your review will really be appreciated - here are some information regarding the commits: * commits marked as "test:" deal with unit tests. * commit "cli: Add Busybox upstream hush.c file." copies Busybox shell/hush.c into U-Boot tree, this explain why this commit contains around 12000 additions. * commit "cli: Port Busybox 2021 hush to U-Boot." modifies previously added file to permit us to use this as new shell. The really good idea of #include'ing Busybox code into a wrapper file to define some particular functions while minimizing modifications to upstream code comes from Harald Seiler. * commit "cmd: Add new parser command" adds a new command which permits selecting parser at runtime. I am not really satisfied with the fact it calls cli_init() and cli_loop() each time the parser is set, so your reviews would be welcomed. * Other commits focus on enabling features we need (e.g. if). Changes since: v2: * Added a small fix to compile sandbox with NO_SDL=1. * Added a command to change parser at runtime. * Added 2021 parser function to all run_command*(). v3: * Various bug fixes pointed by the CI. * Added upstream busybox hush commits until 6th February 2022. v4: * Various cleaning. * Modified python test to accept failure output when the test are designed to fail. * Bumped upstream busybox hush commits until 24h March 2022. v5: * Bumped upstream busybox hush commits until 30th January 2023. * Fix how hush interprets '<' and '>', indeed we needed to escape them but I removed this behavior as tests are handled by test command and not hush itself. This permitted to have the ut fdt to pass. * Fix a problem with how exit was handled. This was reported by the ut exit test. v6: * There was no v6 and I got mixed up with version. v7: * Bumped upstream busybox hush commits until 9th May 2023. * Renamed parser command to change parser at runtime to cli and added documentation. * Added better separation of patches. * Removed code about __gnu_thumb1_case_si as it was merged in another series. * Various cleaning. v8: * Bumped upstream busybox hush commits until 25th May 2023. v9: * Bumped upstream busybox hush commits until 2nd October 2023. v10: * Fixed a build error in commit adding cli command. * Add new CONFIG_HUSH_SELECTABLE to only build cli command if the two shell flavors are selected. v11: * Renamed everything containing 2021 to modern. * Fixed cmd Kconfig indentation. * Set modern parser as default for majority of boards except some. v12: * Rebased on top of 36d3db6c2c06. * Fixed bootflow_scan_menu_boot for modern hush. Francis Laniel (24): test: Add framework to test hush behavior test: hush: Test hush if/else test/py: hush_if_test: Remove the test file test: hush: Test hush variable expansion test: hush: Test hush commands list test: hush: Test hush loops cli: Add Busybox upstream hush.c file cli: Port upstream Busybox hush to U-Boot cli: Add menu for hush parser global_data.h: add GD_FLG_HUSH_OLD_PARSER flag cmd: Add new cli command cli: Enables using modern hush parser as command line parser cli: hush_modern: Enable variables expansion for modern hush cli: hush_modern: Add functions to be called from run_command() cli: add modern hush as parser for run_command*() test: hush: Fix instructions list tests for modern hush test: hush: Fix variable expansion tests for modern hush cli: hush_modern: Enable using < and > as string compare operators cli: hush_modern: Enable if keyword cli: hush_modern: Enable loops test: hush: Fix loop tests for modern hush cli: modern_hush: Add upstream commits up to 2nd October 2023. cmd: Set modern hush as default shell configs: Use old hush for several boards cmd/Kconfig | 21 + cmd/Makefile | 2 + cmd/cli.c | 134 + common/Makefile | 3 +- common/cli.c | 82 +- common/cli_hush_modern.c | 324 + common/cli_hush_upstream.c | 13030 +++++++++++++++++++++++ configs/kmcent2_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + doc/usage/cmd/cli.rst | 74 + doc/usage/index.rst | 1 + include/asm-generic/global_data.h | 8 + include/cli_hush.h | 51 +- include/test/hush.h | 15 + include/test/suites.h | 1 + test/Makefile | 3 + test/boot/bootflow.c | 16 +- test/cmd_ut.c | 6 + test/hush/Makefile | 10 + test/hush/cmd_ut_hush.c | 20 + test/hush/dollar.c | 226 + test/hush/if.c | 316 + test/hush/list.c | 140 + test/hush/loop.c | 91 + test/py/tests/test_hush_if_test.py | 197 - test/py/tests/test_ut.py | 8 +- 37 files changed, 14580 insertions(+), 212 deletions(-) create mode 100644 cmd/cli.c create mode 100644 common/cli_hush_modern.c create mode 100644 common/cli_hush_upstream.c create mode 100644 doc/usage/cmd/cli.rst create mode 100644 include/test/hush.h create mode 100644 test/hush/Makefile create mode 100644 test/hush/cmd_ut_hush.c create mode 100644 test/hush/dollar.c create mode 100644 test/hush/if.c create mode 100644 test/hush/list.c create mode 100644 test/hush/loop.c delete mode 100644 test/py/tests/test_hush_if_test.py Have a nice end of the year and thank you in advance! --- [1] https://lists.denx.de/pipermail/u-boot/2021-July/453347.html [2] https://runtimeterror.com/tech/lil/ [3] https://lists.denx.de/pipermail/u-boot/2021-July/453790.html [4] https://lists.denx.de/pipermail/u-boot/2021-July/453848.html [5] https://lists.denx.de/pipermail/u-boot/2021-August/458569.html [6] https://lists.denx.de/pipermail/u-boot/2023-November/536768.html [7] https://lists.denx.de/pipermail/u-boot/2023-May/518140.html [8] https://lists.denx.de/pipermail/u-boot/2023-May/518147.html [9] https://lists.denx.de/pipermail/u-boot/2023-November/536952.html -- 2.34.1

5 41

[PATCH v2 0/2] rockchip: Use dwc3-generic driver on RK3328 and RK3399
by Jonas Karlman 18 Jan '24

18 Jan '24

This series change to use the dwc3-generic driver on all RK3328 and RK3399 boards. Also switch to use DM_USB_GADGET and remove then obsolete board_usb_init() and dm_usb_gadget_handle_interrupts() functions. First patch change all RK33xx boards to use dwc3-generic driver. Second patch remove obsolete rk3399 usb gadget functions. This has been tested and validated on rockpro64 and rock-pi-4 boards. Changes in v2: - Drop DM_USB_GADGET related changes from first patch - Add DM_USB_GADGET condition to arch Kconfig Jonas Karlman (2): configs: rockchip: Use dwc3-generic driver on RK3328 and RK3399 rockchip: board: Remove dwc3 usb init and gadget handler functions arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/board.c | 30 +------------------ configs/chromebook_bob_defconfig | 2 +- configs/chromebook_kevin_defconfig | 2 +- configs/eaidk-610-rk3399_defconfig | 4 ++- configs/evb-rk3399_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/khadas-edge-captain-rk3399_defconfig | 4 ++- configs/khadas-edge-rk3399_defconfig | 4 ++- configs/khadas-edge-v-rk3399_defconfig | 4 ++- configs/leez-rk3399_defconfig | 4 ++- configs/nanopc-t4-rk3399_defconfig | 3 +- configs/nanopc-t6-rk3588_defconfig | 1 - configs/nanopi-m4-2gb-rk3399_defconfig | 4 ++- configs/nanopi-m4-rk3399_defconfig | 4 ++- configs/nanopi-m4b-rk3399_defconfig | 4 ++- configs/nanopi-neo4-rk3399_defconfig | 4 ++- configs/nanopi-r4s-rk3399_defconfig | 3 +- configs/orangepi-5-plus-rk3588_defconfig | 1 - configs/orangepi-5-rk3588s_defconfig | 1 - configs/orangepi-r1-plus-lts-rk3328_defconfig | 3 +- configs/orangepi-r1-plus-rk3328_defconfig | 3 +- configs/orangepi-rk3399_defconfig | 4 ++- configs/pinebook-pro-rk3399_defconfig | 1 - configs/pinephone-pro-rk3399_defconfig | 1 - configs/puma-rk3399_defconfig | 1 - configs/roc-pc-mezzanine-rk3399_defconfig | 1 - configs/roc-pc-rk3399_defconfig | 1 - configs/rock-4c-plus-rk3399_defconfig | 1 - configs/rock-4se-rk3399_defconfig | 1 - configs/rock-pi-4-rk3399_defconfig | 1 - configs/rock-pi-4c-rk3399_defconfig | 1 - configs/rock-pi-n10-rk3399pro_defconfig | 1 - configs/rock5a-rk3588s_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/rock960-rk3399_defconfig | 3 +- configs/rockpro64-rk3399_defconfig | 1 - drivers/usb/host/Kconfig | 1 - 38 files changed, 44 insertions(+), 65 deletions(-) -- 2.42.0

3 5

[PATCH v7 00/17] Introduce initial TI's J784S4 and AM69 support
by Apurva Nandan 18 Jan '24

18 Jan '24

Hello Everyone! This series will introduce basic support (SD and UART) support for Texas Instruments J784S4 EVM. The J784S4 SoC device tree patches are taken from kernel patch submissions and will be updated as they are accepted and merged to the kernel tree. All other patches are specific to SPL and u-boot and do not have dependency on other trees. Appreciate a review for acceptance to u-boot tree. Here are some of the salient features of the J784S4 automotive grade application processor: The J784S4 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive, ADAS and industrial applications requiring AI at the network edge. This SoC extends the K3 Jacinto 7 family of SoCs with focus on raising performance and integration while providing interfaces, memory architecture and compute performance for multi-sensor, high concurrency applications. Some highlights of this SoC are: * Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs, 4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for deep learning and CNN. * 3D GPU: Automotive grade IMG BXS-4-64 MC1 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one DPI interface. * Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems, Up to 20 MCANs, among other peripherals. See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022) for further details: http://www.ti.com/lit/zip/spruj52 In addtion, the J784S4 EVM board is designed for TI J784S4 SoC. It supports the following interfaces: * 32 GB DDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode * x1 Input Audio Jack, x1 Output Audio Jack * x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port * x2 4L PCIe connector * x1 UHS-1 capable micro-SD card slot * 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash, UFS flash. * x6 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin User Expansion Connector * x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector * x1 15-pin CSI header * x6 MCAN instances Schematics: https://www.ti.com/lit/zip/sprr458 eMMC UDA moode bootlog: https://gist.githubusercontent.com/apurvanandan1997/3cffada252d50a8aa0c00a9… Tested-by: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Tested-by: Enric Balletbo i Serra <eballetbo(a)redhat.com> Changes in v7: 1) Moved to unified memory map in arm64-mmu.c based on https://lore.kernel.org/all/20231128170528.407707-1-afd@ti.com/ 2) Used ARRAY_SIZE in clk-data.c and dev-data.c 3) Removed I2C board detect from j784s4_init.c 4) Rebased to latest next Link to v6: https://lore.kernel.org/all/20231206123753.1486031-1-a-nandan@ti.com/ Changes in v6: 1) Move bootph-all of memory node to u-boot.dtsi 2) Used a while loop for DRAM controller init, instead of hard-coding for 4 DRAM 3) Fixed build error by adding board/ti/j784s4/Kconfig 4) Trimmed out j784s4_evm.h 5) Fixed checkpatch warnings Link to v5: https://patchwork.ozlabs.org/project/uboot/cover/20231130115552.3580995-1-a… Changes in v5: 1) Incorporated Andrew Davis' "Move R5 specific code into new r5/ directory" and "Move board selection to mach-k3" series changes. 2) Incorporated Neha Francis' "Move to using templated FITs" series changes. 3) Synced device tree files with Linux v6.7-rc1 4) Changed ti_mmc to mmc1 target from bootstd 5) Updated doc based on review comments 6) Removed remoteproc support from the series 7) Splitted board files patch into smaller patches 8) Trimmed j784s4.env to necessary variables 9) Used fdtdec_setup_mem_size_base fdtdec_setup_memory_banksize in evm.c 10) Trimmed down evm.c to essential header files. 11) Switched to multi-dtb fit compilation with config fragments Link to v4: https://lore.kernel.org/u-boot/20231001165545.494212-1-a-nandan@ti.com/ Changes in v4: 1) Cleaned up Copyright and SPDX identifiers 2) Synced the device trees to Linux v6.6-rc1 tag 3) Added cleanup patch for sorting SoC JTAG ID entries 4) Removed EEPROM board detect from evm.c and added am69 config fragments 5) Updated MAINTAINERS files and commit messages 6) Removed struct renaming in ti_k3_r5f_rproc driver Link to v3: https://lore.kernel.org/u-boot/20230908110551.861575-1-a-nandan@ti.com/ Changes in v3: 1) Added AM69 SK support in the series 2) Switched from distroboot to bootstd support 3) Added remoteproc support for J784S4 4) Added documentation for both SoCs 5) Added binman support 6) Removed unnecessarry nodes from r5-evm.dts and evm-u-boot.dtsi 7) Added HS device support 8) Added env file for environement variables 9) Removed ti-serdes-mux bindings 10) Cleaned up all files and synced with latest 11) Addressed all previous review comments Note: The base dts files have been sync from next-20230905 linux tag as per review comment received on previous re-roll: https://lore.kernel.org/u-boot/20230321155227.GV8135@bill-the-cat/ Link to v2: https://lore.kernel.org/u-boot/20230321141028.24456-1-hnagalla@ti.com/ Changes in v2: - Refactored environement scripts to 'j784s4.env' and removed scripts not needed for basic board bootup. - Imported the J7874S4 basic device tree files from v6.2 linux kernel. - Moved j784s4 clock definitions and clock data into one patch/commit. - coalesce board commits into one commit. Apurva Nandan (14): arm: dts: Introduce j784s4 dts from linux kernel arm: mach-k3: Add basic support for J784S4 SoC definition arm: mach-k3: Sort SoC JTAG_ID entries soc: ti: k3-socinfo: Add entry for J784S4 SoC arm: mach-k3: j784s4: Add clk and power support drivers: dma: Add support for J784S4 SoC board: ti: j784s4: Add board support for J784S4 EVM board: ti: j748s4: Add board config yaml files board: ti: j784s4: Add boot environment variables arm: dts: Introduce j784s4 u-boot dts files arm: dts: Add bootph-all for memory node configs: j784s4_evm: Add defconfig for j784s4 evm board doc: board: ti: k3: Add J784S4 EVM and AM69 SK documentation board: ti: j784s4: Add MAINTAINERS file Dasnavis Sabiya (3): arm: dts: Introduce am69-sk dts from linux kernel arm: dts: Introduce am69-sk u-boot dts files configs: Add am69_sk_* defconfig fragments arch/arm/dts/Makefile | 4 + arch/arm/dts/k3-am69-r5-sk.dts | 105 + arch/arm/dts/k3-am69-sk-u-boot.dtsi | 31 + arch/arm/dts/k3-am69-sk.dts | 900 ++ arch/arm/dts/k3-j784s4-binman.dtsi | 435 + arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi | 8757 ++++++++++++++++ arch/arm/dts/k3-j784s4-ddr.dtsi | 8858 +++++++++++++++++ arch/arm/dts/k3-j784s4-evm-u-boot.dtsi | 31 + arch/arm/dts/k3-j784s4-evm.dts | 981 ++ arch/arm/dts/k3-j784s4-main.dtsi | 2068 ++++ arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi | 743 ++ arch/arm/dts/k3-j784s4-r5-evm.dts | 105 + arch/arm/dts/k3-j784s4-thermal.dtsi | 101 + arch/arm/dts/k3-j784s4.dtsi | 294 + arch/arm/mach-k3/Kconfig | 17 +- arch/arm/mach-k3/Makefile | 2 + arch/arm/mach-k3/include/mach/hardware.h | 13 +- .../mach-k3/include/mach/j784s4_hardware.h | 60 + arch/arm/mach-k3/include/mach/j784s4_spl.h | 47 + arch/arm/mach-k3/include/mach/spl.h | 4 + arch/arm/mach-k3/j784s4/Kconfig | 34 + arch/arm/mach-k3/j784s4_fdt.c | 15 + arch/arm/mach-k3/j784s4_init.c | 330 + arch/arm/mach-k3/r5/Makefile | 1 + arch/arm/mach-k3/r5/j784s4/Makefile | 7 + arch/arm/mach-k3/r5/j784s4/clk-data.c | 428 + arch/arm/mach-k3/r5/j784s4/dev-data.c | 98 + board/ti/j784s4/Kconfig | 37 + board/ti/j784s4/MAINTAINERS | 25 + board/ti/j784s4/Makefile | 7 + board/ti/j784s4/board-cfg.yaml | 37 + board/ti/j784s4/evm.c | 38 + board/ti/j784s4/j784s4.env | 18 + board/ti/j784s4/pm-cfg.yaml | 13 + board/ti/j784s4/rm-cfg.yaml | 3058 ++++++ board/ti/j784s4/sec-cfg.yaml | 380 + board/ti/j784s4/tifs-rm-cfg.yaml | 2656 +++++ configs/am69_sk_a72.config | 3 + configs/am69_sk_r5.config | 3 + configs/j784s4_evm_a72_defconfig | 180 + configs/j784s4_evm_r5_defconfig | 163 + doc/board/ti/j784s4_evm.rst | 303 + doc/board/ti/k3.rst | 1 + drivers/clk/ti/clk-k3.c | 6 + drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-j784s4.c | 166 + drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 + drivers/firmware/ti_sci_static_data.h | 34 + drivers/power/domain/ti-power-domain.c | 6 + drivers/ram/Kconfig | 2 +- drivers/soc/soc_ti_k3.c | 3 + include/configs/j784s4_evm.h | 15 + include/k3-clk.h | 1 + include/k3-dev.h | 1 + 55 files changed, 31617 insertions(+), 12 deletions(-) create mode 100644 arch/arm/dts/k3-am69-r5-sk.dts create mode 100644 arch/arm/dts/k3-am69-sk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am69-sk.dts create mode 100644 arch/arm/dts/k3-j784s4-binman.dtsi create mode 100644 arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi create mode 100644 arch/arm/dts/k3-j784s4-ddr.dtsi create mode 100644 arch/arm/dts/k3-j784s4-evm-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j784s4-evm.dts create mode 100644 arch/arm/dts/k3-j784s4-main.dtsi create mode 100644 arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j784s4-r5-evm.dts create mode 100644 arch/arm/dts/k3-j784s4-thermal.dtsi create mode 100644 arch/arm/dts/k3-j784s4.dtsi create mode 100644 arch/arm/mach-k3/include/mach/j784s4_hardware.h create mode 100644 arch/arm/mach-k3/include/mach/j784s4_spl.h create mode 100644 arch/arm/mach-k3/j784s4/Kconfig create mode 100644 arch/arm/mach-k3/j784s4_fdt.c create mode 100644 arch/arm/mach-k3/j784s4_init.c create mode 100644 arch/arm/mach-k3/r5/j784s4/Makefile create mode 100644 arch/arm/mach-k3/r5/j784s4/clk-data.c create mode 100644 arch/arm/mach-k3/r5/j784s4/dev-data.c create mode 100644 board/ti/j784s4/Kconfig create mode 100644 board/ti/j784s4/MAINTAINERS create mode 100644 board/ti/j784s4/Makefile create mode 100644 board/ti/j784s4/board-cfg.yaml create mode 100644 board/ti/j784s4/evm.c create mode 100644 board/ti/j784s4/j784s4.env create mode 100644 board/ti/j784s4/pm-cfg.yaml create mode 100644 board/ti/j784s4/rm-cfg.yaml create mode 100644 board/ti/j784s4/sec-cfg.yaml create mode 100644 board/ti/j784s4/tifs-rm-cfg.yaml create mode 100644 configs/am69_sk_a72.config create mode 100644 configs/am69_sk_r5.config create mode 100644 configs/j784s4_evm_a72_defconfig create mode 100644 configs/j784s4_evm_r5_defconfig create mode 100644 doc/board/ti/j784s4_evm.rst create mode 100644 drivers/dma/ti/k3-psil-j784s4.c create mode 100644 include/configs/j784s4_evm.h -- 2.34.1

7 42

[PATCH v2 0/4] rockchip: rk3588: Fix SPI flash bootsource id values
by Jonas Karlman 18 Jan '24

18 Jan '24

The commit fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") added a new BROM_BOOTSOURCE_SPINOR_RK3588 with value 6. At the time the reason for this new bootsource id value 6 was unknown. Since then the following bootsource id values have been observed on different RK3588 devices: - Radxa ROCK 5 Model A - fspim0_pins - rk3588s - Xunlong Orange Pi 5 - fspim0_pins - rk3588s brom_bootdevice_id: 3 - FriendlyElec NanoPC-T6 - fspim1_pins - rk3588 - Xunlong Orange Pi 5 Plus - fspim1_pins - rk3588 brom_bootdevice_id: 4 - Radxa ROCK 5 Model B - fspim2_pins - rk3588 brom_bootdevice_id: 6 It has now been confirmed that the BootRom on RK3588 use different bootsource id values depending on the iomux used by the flash spi controller, and not by the type of spi nor or spi nand flash used. This series adjusts the bootsource enum values, updates the boot_devices array to fix booting from SPI flash on RK3588 devices using fspim1_pins. It also enable building of a bootable SPI image for affected devices. Changes in v2: - Move FSPI M0/M1/M2 enum values from bootrom.h to rk3588.c - Add t-b tag John Clark (1): rockchip: rk3588-nanopc-t6: Build SPI image Jonas Karlman (2): rockchip: rk3588: Fix boot from SPI flash rockchip: rk3588s-orangepi-5: Build SPI image Slawomir Stepien (1): rockchip: rk3588-orangepi-5-plus: Build SPI image arch/arm/include/asm/arch-rockchip/bootrom.h | 1 - arch/arm/mach-rockchip/rk3588/rk3588.c | 16 ++++++++++++++-- configs/nanopc-t6-rk3588_defconfig | 1 + configs/orangepi-5-plus-rk3588_defconfig | 1 + configs/orangepi-5-rk3588s_defconfig | 1 + 5 files changed, 17 insertions(+), 3 deletions(-) -- 2.42.0

2 8

[PATCH v4] dts: rockpro64: Disable usb regulators-always-on
by Shantur Rathore 18 Jan '24

18 Jan '24

USB port regulators should be controlled by PHYs so we remove always-on property and let phy manage the regulator. phy-supply isn't configured for TypeC port in upstream and now that we are removing always-on, we need to add the phy-supply until its fixed upstream. Signed-off-by: Shantur Rathore <i(a)shantur.com> --- Changes in v4: - otg port must be configured with phy-supply instead of host port node Changes in v3: - Split up patches as seperate series Changes in v2: - As requested, added fix for regulator-always-on in RockPro64 arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi index 732727d9b0..0ac9fa9a03 100644 --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -22,6 +22,18 @@ }; }; +&u2phy0_otg { + phy-supply = <&vcc5v0_typec>; +}; + +&vcc5v0_host { + /delete-property/ regulator-always-on; +}; + +&vcc5v0_typec { + /delete-property/ regulator-always-on; +}; + &vdd_center { regulator-min-microvolt = <950000>; regulator-max-microvolt = <950000>; -- 2.40.1

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