October 2023 - U-Boot

[PATCH] bootstd: sata: bootdev scanning for ahci sata with no drive attached
by Tony Dinh 07 Oct '23

07 Oct '23

It's normal to have no SATA drive attached to the controller, so return a successful status when there is no block device found after probing. Note: this patch depends on the previous patch https://patchwork.ozlabs.org/project/uboot/patch/20230917230649.30357-1-mib… Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- drivers/ata/sata.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c index f126b84e05..59c40a829f 100644 --- a/drivers/ata/sata.c +++ b/drivers/ata/sata.c @@ -79,6 +79,11 @@ int sata_rescan(bool verbose) ret = uclass_probe_all(UCLASS_AHCI); + if (verbose && ret == -ENODEV) { + printf("No SATA block device found\n"); + return 0; + } + return ret; } -- 2.39.2

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[PATCH] configs: rockchip: rock-pi-s: use default bootdelay (2s)
by FUKAUMI Naoki 07 Oct '23

07 Oct '23

align with other boards. Signed-off-by: FUKAUMI Naoki <naoki(a)radxa.com> --- configs/rock-pi-s-rk3308_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index cc3274a98b..cd0a996ee7 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -24,7 +24,6 @@ CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_BOOTDELAY=0 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x20000 -- 2.39.2

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[PATCH 2/2] configs: rockchip: add DOS_PARTITION to RK3308 boards defconfig
by Massimo Pegorer 07 Oct '23

07 Oct '23

Without DOS_PARTITION support U-Boot is not able to boot an OS stored into an SD card with MBR partitions table. This is still a quite common case, so add DOS_PARTITION (only for U-Boot proper build) to Rockchip RK3308 EVB and Firefly roc-rk3308-cc board: they are the only RK boards missing of DOS_PARTITION. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss(a)gmail.com> --- configs/evb-rk3308_defconfig | 2 +- configs/roc-cc-rk3308_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index a13a809c1e..c6472a2c9c 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -47,7 +47,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SLEEP is not set -# CONFIG_DOS_PARTITION is not set +# CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 CONFIG_SPL_OF_CONTROL=y diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 9a789b212f..ca92b8f744 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -47,7 +47,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SLEEP is not set -# CONFIG_DOS_PARTITION is not set +# CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 CONFIG_SPL_OF_CONTROL=y -- 2.34.1

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[PATCH] sphinx: Bump urllib3 version
by Tom Rini 06 Oct '23

06 Oct '23

While not a direct issue for us, urllib3 before 1.26.17 is vulnerable to CVE-2023-43804 to bump our version up. Reported-by: GitHub dependabot Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- doc/sphinx/requirements.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index 6ccbe527ee79..23a296d3fca9 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -23,4 +23,4 @@ sphinxcontrib-htmlhelp==2.0.0 sphinxcontrib-jsmath==1.0.1 sphinxcontrib-qthelp==1.0.3 sphinxcontrib-serializinghtml==1.1.5 -urllib3==1.26.9 +urllib3==1.26.17 -- 2.34.1

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[PATCH 0/7] rockchip: Add GMAC support for RK3568 and RK3588
by Jonas Karlman 06 Oct '23

06 Oct '23

This series adds a glue driver, dwc_eth_qos_rockchip, to support GMAC on RK356x and RK3588. rk_gmac_ops used in this series has been ported from mainline linux. Patch 1-3 does some minor cleanup in dwc_eth_qos driver. Patch 4 add glue driver with RK3568 support. Patch 5 add support for RK3588 to glue driver. Patch 6-7 update defconfigs to enable use of the new driver. Dependencies: - "pinctrl: rockchip: Fix drive and input schmitt on RK3568" [1] - "clk: rockchip: rk3568: Add dummy support for GMAC speed clocks" [2] - "net: phy: motorcomm: Add support for YT8511 PHY" [3] - "rockchip: Port IO-domain driver for RK3568 from linux" [4] dhcp and ping commands has been tested on the followin devices: - RK3566: Quartz64 Model A and SOQuartz on Blade - RK3568: ROCK 3 Model A - RK3588: ROCK 5 Model A This series can also be found at [5]. [1] https://patchwork.ozlabs.org/patch/1816600/ [2] https://patchwork.ozlabs.org/patch/1816856/ [3] https://patchwork.ozlabs.org/patch/1817295/ [4] https://patchwork.ozlabs.org/cover/1817469/ [5] https://github.com/Kwiboo/u-boot-rockchip/commits/rk35xx-gmac-v1 Jonas Karlman (7): net: dwc_eth_qos: Drop unused rx_pkt from eqos_priv net: dwc_eth_qos: Return error code when start fails net: dwc_eth_qos: Stop spam of RX packet not available message net: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568 net: dwc_eth_qos_rockchip: Add support for RK3588 configs: rockchip: Enable ethernet driver on RK356x boards configs: rockchip: Enable ethernet driver on RK3588 boards configs/evb-rk3568_defconfig | 5 +- configs/evb-rk3588_defconfig | 5 +- configs/nanopi-r5s-rk3568_defconfig | 3 + configs/neu6a-io-rk3588_defconfig | 2 - configs/neu6b-io-rk3588_defconfig | 2 - configs/odroid-m1-rk3568_defconfig | 3 + configs/quartz64-a-rk3566_defconfig | 3 + configs/quartz64-b-rk3566_defconfig | 3 + configs/radxa-cm3-io-rk3566_defconfig | 6 +- configs/rock-3a-rk3568_defconfig | 5 +- configs/rock5a-rk3588s_defconfig | 6 +- configs/soquartz-blade-rk3566_defconfig | 3 + configs/soquartz-cm4-rk3566_defconfig | 3 + configs/soquartz-model-a-rk3566_defconfig | 3 + drivers/net/Kconfig | 8 + drivers/net/Makefile | 1 + drivers/net/dwc_eth_qos.c | 33 +- drivers/net/dwc_eth_qos.h | 3 +- drivers/net/dwc_eth_qos_rockchip.c | 522 ++++++++++++++++++++++ 19 files changed, 585 insertions(+), 34 deletions(-) create mode 100644 drivers/net/dwc_eth_qos_rockchip.c -- 2.41.0

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[PATCH 1/1] riscv: remove dram_init_banksize()
by Heinrich Schuchardt 06 Oct '23

06 Oct '23

Remove dram_init_banksize() on the architecture level. Limiting used RAM to under 4 GiB is only necessary for CPUs which have a DMA issue. SoC specific code already exists for FU540, FU740, JH7110. Not all RISC-V boards will have memory below 4 GiB. A weak implementation of dram_init_banksize() exists in common/board_f.c. See the discussion in https://lore.kernel.org/u-boot/545fe813-cb1e-469c-a131-0025c77aeaa2@canonic… Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- arch/riscv/cpu/generic/dram.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c index 94d8018407..1b51bae9b6 100644 --- a/arch/riscv/cpu/generic/dram.c +++ b/arch/riscv/cpu/generic/dram.c @@ -20,19 +20,3 @@ int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); } - -phys_addr_t board_get_usable_ram_top(phys_size_t total_size) -{ - /* - * Ensure that we run from first 4GB so that all - * addresses used by U-Boot are 32bit addresses. - * - * This in-turn ensures that 32bit DMA capable - * devices work fine because DMA mapping APIs will - * provide 32bit DMA addresses only. - */ - if (gd->ram_top >= SZ_4G) - return SZ_4G - 1; - - return gd->ram_top; -} -- 2.40.1

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[PATCH v2 0/2] Enable split mode in binman
by Neha Malcom Francis 06 Oct '23

06 Oct '23

This series extends the functionality of ti-secure-rom entry type in binman to support enabling of split mode vs. the default lockstep mode via changing the field in the x509 certificate. A DONOTMERGE patch is added to give an example of how this can be done via the binman.dtsi Changes since v2: - Udit: - included TRM link in commit message - added DONOTMERGE patch showing example Neha Malcom Francis (2): binman: openssl: x509: ti_secure_rom: Add support for bootcore_opts DONOTMERGE: arm: dts: k3-j7200-binman: Enable split mode for MCU R5 arch/arm/dts/k3-j7200-binman.dtsi | 3 +++ tools/binman/btool/openssl.py | 6 ++++-- tools/binman/etype/ti_secure_rom.py | 12 ++++++++++-- tools/binman/etype/x509_cert.py | 3 ++- tools/binman/test/297_ti_secure_rom.dts | 1 + 5 files changed, 20 insertions(+), 5 deletions(-) -- 2.34.1

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[PATCH 1/1] [u-boot][master][PATCH v4] pico-imx7d: add baseboard SD card boot detect
by egyszeregy＠freemail.hu 06 Oct '23

06 Oct '23

From: Benjamin Szőke <egyszeregy(a)freemail.hu> Take over codes from Techenxion to support mmc autodetect boot for pico-imx7d. Signed-off-by: Benjamin Szőke <egyszeregy(a)freemail.hu> --- board/technexion/pico-imx7d/pico-imx7d.c | 57 +++++++++++++++ board/technexion/pico-imx7d/spl.c | 91 ++++++++++++++++++++++-- include/configs/pico-imx7d.h | 4 +- 3 files changed, 144 insertions(+), 8 deletions(-) diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index 6e98b85b28..a3fa915b49 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -5,6 +5,7 @@ #include <init.h> #include <net.h> +#include <command.h> #include <asm/arch/clock.h> #include <asm/arch/crm_regs.h> #include <asm/arch/imx-regs.h> @@ -13,6 +14,7 @@ #include <asm/global_data.h> #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> #include <miiphy.h> @@ -129,6 +131,49 @@ int board_phy_config(struct phy_device *phydev) } #endif +#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX) +int check_mmc_autodetect(void) +{ + char *autodetect_str = env_get("mmcautodetect"); + + if ((autodetect_str != NULL) && + (strcmp(autodetect_str, "yes") == 0)) { + return 1; + } + + return 0; +} + +void board_late_mmc_init(void) +{ + int dev_no = 0; + char cmd[32]; + + if (!check_mmc_autodetect()) + return; + + switch (get_boot_device()) { + case SD3_BOOT: + case MMC3_BOOT: + env_set("bootdev", "MMC3"); + dev_no = 2; + break; + case SD1_BOOT: + env_set("bootdev", "SD1"); + dev_no = 0; + break; + default: + printf("Wrong boot device!"); + } + + /* Set mmcdev env */ + env_set_ulong("mmcdev", dev_no); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} +#endif + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart5_pads, ARRAY_SIZE(uart5_pads)); @@ -176,6 +221,12 @@ int board_late_init(void) set_wdog_reset(wdog); +#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX) +#if defined(CONFIG_ENV_IS_IN_MMC) || defined(CONFIG_ENV_IS_NOWHERE) + board_late_mmc_init(); +#endif /* CONFIG_ENV_IS_IN_MMC or CONFIG_ENV_IS_NOWHERE */ +#endif + /* * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), * since we use PMIC_PWRON to reset the board. @@ -210,3 +261,9 @@ int board_ehci_hcd_init(int port) } return 0; } + +/* This should be defined for each board */ +__weak int mmc_map_to_kernel_blk(int dev_no) +{ + return dev_no; +} diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index c6b21aaa42..2fe76145be 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -15,6 +15,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch-mx7/mx7-ddr.h> #include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> #include <asm/gpio.h> #include <asm/sections.h> #include <fsl_esdhc_imx.h> @@ -159,7 +160,20 @@ void reset_cpu(void) #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) -static iomux_v3_cfg_t const usdhc3_pads[] = { +#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 0) +/* EMMC/SD */ +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#define USDHC3_CD_GPIO IMX_GPIO_NR(1, 14) +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -173,20 +187,83 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -static struct fsl_esdhc_cfg usdhc_cfg[1] = { +static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, + {USDHC1_BASE_ADDR}, }; int board_mmc_getcd(struct mmc *mmc) { - /* Assume uSDHC3 emmc is always present */ - return 1; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); /* Assume uSDHC1 sd is always present */ + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC3_CD_GPIO); /* Assume uSDHC3 emmc is always present */ + break; + } + + return ret; } int board_mmc_init(struct bd_info *bis) { - imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); + int ret; + u32 index = 0; + + /* + * Following map is done: + * (USDHC) (Physical Port) + * usdhc3 SOM MicroSD/MMC + * usdhc1 Carrier board MicroSD + * Always set boot USDHC as mmc0 + */ + + imx_iomux_v3_setup_multiple_pads( + usdhc3_emmc_pads, ARRAY_SIZE(usdhc3_emmc_pads)); + gpio_direction_input(USDHC3_CD_GPIO); + + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); + gpio_direction_input(USDHC1_CD_GPIO); + + switch (get_boot_device()) { + case SD1_BOOT: + usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + case MMC3_BOOT: + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 8; + usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + case SD3_BOOT: + default: + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + } + + for (index = 0; index < CFG_SYS_FSL_USDHC_NUM; ++index) { + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + if (ret) + return ret; + } + + return 0; } #endif diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 096e5bbe66..f797bd51af 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -13,7 +13,7 @@ #define CFG_MXC_UART_BASE UART5_IPS_BASE_ADDR /* MMC Config */ -#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ @@ -79,9 +79,11 @@ "name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \ "fastboot_partition_alias_system=rootfs\0" \ "setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \ + "mmcautodetect=yes\0" \ PICO_BOOT_ENV #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 2) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(PXE, pxe, na) \ -- 2.42.0.windows.2

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[RFC PATCH v2 0/4] mtd: ubi: Enable accessing RO filesystems in UBI vols
by Sam Edwards 06 Oct '23

06 Oct '23

Hi list, This is the second version of my RFC patchset to treat static UBI volumes as DM block devices, allowing users to access read-only filesystems (SquashFS, EROFS) contained within such volumes. This is a rebased and updated version, as requested by Heiko. Previously, we have agreed on a syntax, which my downstream is now starting to use: => ls ubi 0:rootfs /boot => ls ubi 0:2 /boot This is still not yet ready for mainline inclusion, because the actual UBI DM access is happening in disk/part.c, which is not "clean" with the way the DM/legacy switching is currently plumbed. I'm still looking for guidance on how to name/implement block functions for looking up a *subvolume* block device by type+parentidx+{name,ID}. Changes v1->v2: - Rebased onto next post-2023.10's release. - Fix NULL dereference caused by passing NULL to `blk_create_device` - Parse UBI index/volume numbers with `dectoul` instead of `hextoul`, to match Linux's behavior of treating these numbers as decimal. - Do not treat a valid decimal number as a volume name, even if the volume ID doesn't exist, to match Linux's behavior of always treating decimal numbers as volume IDs. Cheers, Sam Sam Edwards (4): mtd: ubi: register UBI attachments as DM devices mtd: ubi: bind block device driver for static volumes disk: part: fall-through if "ubi" requested but ubifs not mounted HACK: enable access to `ubi 0:volname` block devices cmd/ubi.c | 11 +++ disk/part.c | 69 +++++++++++-- drivers/mtd/ubi/Makefile | 1 + drivers/mtd/ubi/ubi-uclass.c | 185 +++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/ubi_uboot.h | 5 + 6 files changed, 264 insertions(+), 8 deletions(-) create mode 100644 drivers/mtd/ubi/ubi-uclass.c -- 2.41.0

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[PATCH v4 0/2] J7200 device tree sync from v6.6-rc1 to u-boot
by Reid Tonking 05 Oct '23

05 Oct '23

This series tries to sync device tree files from Linux v6.6-rc1 while making changes to the u-boot.dtsi and r5-common-proc-board.dts files in order to remove duplicate nodes and achieve successful boot. DMA fixes [0] are currently being upstreamed to Linux. They'll be fixed in U-boot post their merge in Linux. Previous version of patch no longer boots in next branch due to a recent change with how bootph-pre-ram now works [2]. Changes have been in this version to avoid future issues with that. Boot log is included in [1] [0]: https://lore.kernel.org/all/20230810174356.3322583-1-vigneshr@ti.com/ [1]: https://gist.github.com/reidt1/3bc6c5a0230346a5136aa857485b2cdb [2]: https://lore.kernel.org/u-boot/CAPnjgZ3MgWX8T0A0SofphEr_Xd77pE3hte9DNye1RuB… --- Changes in v4: - Changed bootph-pre-ram to bootph-all in response to [2] - Removed serdes.h from series since it has been added already - Rebased off of "ec6f06bddc configs: Resync with savedefconfig" - Removed reviewed-by on patch 2 due to changes - Link to v3: https://lore.kernel.org/u-boot/20230918171813.11407-3-reidt@ti.com/ Reid Tonking (2): arm: mach-k3: j7200: Add mcu_timer0 id to the dev list arm: dts: j7200: dts sync with Linux 6.6-rc1 .../k3-j7200-common-proc-board-u-boot.dtsi | 208 +++---- arch/arm/dts/k3-j7200-common-proc-board.dts | 186 +++--- arch/arm/dts/k3-j7200-main.dtsi | 535 +++++++++++++++++- arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 286 +++++++++- .../arm/dts/k3-j7200-r5-common-proc-board.dts | 311 +--------- arch/arm/dts/k3-j7200-som-p0.dtsi | 154 +++-- arch/arm/dts/k3-j7200-thermal.dtsi | 47 ++ arch/arm/dts/k3-j7200.dtsi | 30 +- arch/arm/mach-k3/j7200/dev-data.c | 1 + 9 files changed, 1212 insertions(+), 546 deletions(-) create mode 100644 arch/arm/dts/k3-j7200-thermal.dtsi -- 2.34.1

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