October 2023 - U-Boot

[PATCH] clk: stm32mp1: Add support for USART1 clock
by Anatolij Gustschin 04 Oct '23

04 Oct '23

Add USART1 clock parents and mux configuration. This allows support for configuring the USART1 as the serial console in SPL and U-Boot via device tree. Without this patch the SPL with usart1 serial console enabled crashes because it can not find the clock specified in the device tree for usart1. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- drivers/clk/stm32/clk-stm32mp1.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c index 6150287694..f3ac8c7583 100644 --- a/drivers/clk/stm32/clk-stm32mp1.c +++ b/drivers/clk/stm32/clk-stm32mp1.c @@ -72,6 +72,7 @@ DECLARE_GLOBAL_DATA_PTR; #define RCC_PLL2CSGR 0xA4 #define RCC_I2C46CKSELR 0xC0 #define RCC_SPI6CKSELR 0xC4 +#define RCC_UART1CKSELR 0xC8 #define RCC_CPERCKSELR 0xD0 #define RCC_STGENCKSELR 0xD4 #define RCC_DDRITFCR 0xD8 @@ -317,6 +318,7 @@ enum stm32mp1_parent_sel { _SPI45_SEL, _SPI6_SEL, _RTC_SEL, + _UART1_SEL, _PARENT_SEL_NB, _UNKNOWN_SEL = 0xff, }; @@ -557,6 +559,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 0, SPI6_K, _SPI6_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL), + STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 4, USART1_K, _UART1_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 16, BSEC, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 20, STGEN_K, _STGEN_SEL), @@ -602,6 +605,8 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { static const u8 i2c12_parents[] = {_PCLK1, _PLL4_R, _HSI_KER, _CSI_KER}; static const u8 i2c35_parents[] = {_PCLK1, _PLL4_R, _HSI_KER, _CSI_KER}; static const u8 i2c46_parents[] = {_PCLK5, _PLL3_Q, _HSI_KER, _CSI_KER}; +static const u8 uart1_parents[] = {_PCLK5, _PLL3_Q, _HSI_KER, _CSI_KER, + _PLL4_Q, _HSE_KER}; static const u8 uart6_parents[] = {_PCLK2, _PLL4_Q, _HSI_KER, _CSI_KER, _HSE_KER}; static const u8 uart24_parents[] = {_PCLK1, _PLL4_Q, _HSI_KER, _CSI_KER, @@ -659,6 +664,7 @@ static const struct stm32mp1_clk_sel stm32mp1_clk_sel[_PARENT_SEL_NB] = { STM32MP1_CLK_PARENT(_RTC_SEL, RCC_BDCR, RCC_BDCR_RTCSRC_SHIFT, (RCC_BDCR_RTCSRC_MASK >> RCC_BDCR_RTCSRC_SHIFT), rtc_parents), + STM32MP1_CLK_PARENT(_UART1_SEL, RCC_UART1CKSELR, 0, 0x7, uart1_parents), }; #ifdef STM32MP1_CLOCK_TREE_INIT @@ -786,6 +792,7 @@ char * const stm32mp1_clk_parent_sel_name[_PARENT_SEL_NB] = { [_SPI1_SEL] = "SPI1", [_SPI45_SEL] = "SPI45", [_RTC_SEL] = "RTC", + [_UART1_SEL] = "UART1", }; static const struct stm32mp1_clk_data stm32mp1_data = { -- 2.17.1

2 2

[PATCH v1 0/2] ARM: amlogic: Add A1 SPIFC support
by Igor Prusov 04 Oct '23

04 Oct '23

A1 family boards have new version of SPIFC controller, that is incompatible with meson_spifc driver. This series ports A1 SPIFC driver from Linux and enables it for ad401 board. Igor Prusov (2): spi: add support for Amlogic A1 SPI Flash Controller ARM: amlogic: ad401: enable SPIFC configs/ad401_defconfig | 1 + drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/meson_spifc_a1.c | 384 +++++++++++++++++++++++++++++++++++ 4 files changed, 394 insertions(+) create mode 100644 drivers/spi/meson_spifc_a1.c -- 2.34.1

2 3

[PATCH v3 0/3] bootstage support for risc-v
by Chanho Park 04 Oct '23

04 Oct '23

This adds to support bootstage for risc-v. timer_get_boot_us function is required to record each boot stages with microsecond timestamp. Changes from v2: - Add a Leo's RB tag of 1/3 patch - Add a description of the calculation formula - Correct the divisor value typo of 3/3 patch Chanho Park (3): riscv: bootstage: correct bootstage_report guard riscv: timer: add timer_get_boot_us for BOOTSTAGE timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE arch/riscv/lib/bootm.c | 2 +- drivers/timer/riscv_aclint_timer.c | 23 +++++++++++++++++++++++ drivers/timer/riscv_timer.c | 22 ++++++++++++++++++++++ 3 files changed, 46 insertions(+), 1 deletion(-) -- 2.39.2

3 7

[PATCH 1/2] ram: stm32mp1: Only print RAM config with CONFIG_SPL_DISPLAY_PRINT
by Harald Seiler 04 Oct '23

04 Oct '23

Ensure that the RAM configuration line is only printed when CONFIG_SPL_DISPLAY_PRINT is set. Signed-off-by: Harald Seiler <hws(a)denx.de> --- drivers/ram/stm32mp1/stm32mp1_ram.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index a6c19af9722..2808d07c3ae 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -126,7 +126,8 @@ static int stm32mp1_ddr_setup(struct udevice *dev) dev_dbg(dev, "no st,mem-name\n"); return -EINVAL; } - printf("RAM: %s\n", config.info.name); + if (CONFIG_IS_ENABLED(DISPLAY_PRINT)) + printf("RAM: %s\n", config.info.name); for (idx = 0; idx < ARRAY_SIZE(param); idx++) { ret = ofnode_read_u32_array(node, param[idx].name, -- 2.41.0

2 2

[PATCH v3] arm64: versal: Add SelectMAP boot mode identification
by Polak, Leszek 04 Oct '23

04 Oct '23

The SelectMAP configuration interface provides an 8-bit, 16-bit or 32-bit bidirectional data bus interface to the Versal FPGA configuration logic that can be used for both configuration and readback. A connected microcontoller to the SelectMAP interface can load boot image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot. This commit adds the missing identification of the SelectMAP mode. Signed-off-by: Polak, Leszek <LPolak(a)arri.de> Reviewed-by: Stefan Roese <sr(a)denx.de> Cc: Michal Simek <michal.simek(a)amd.com> Cc: Stefan Roese <sr(a)denx.de> --- v2: - Drop assignment of 'mode' as selectmap is not be supported by distro boot v3: - Changed E-Mail/Name to be the same as git setup --- arch/arm/mach-versal-net/include/mach/hardware.h | 1 + arch/arm/mach-versal/include/mach/hardware.h | 1 + board/xilinx/versal-net/board.c | 3 +++ board/xilinx/versal/board.c | 4 ++++ 4 files changed, 9 insertions(+) diff --git a/arch/arm/mach-versal-net/include/mach/hardware.h b/arch/arm/mach-versal-net/include/mach/hardware.h index 9bddb8b007..767cdd3686 100644 --- a/arch/arm/mach-versal-net/include/mach/hardware.h +++ b/arch/arm/mach-versal-net/include/mach/hardware.h @@ -66,6 +66,7 @@ struct crp_regs { #define EMMC_MODE 0x00000006 #define USB_MODE 0x00000007 #define OSPI_MODE 0x00000008 +#define SELECTMAP_MODE 0x0000000A #define SD1_LSHFT_MODE 0x0000000E /* SD1 Level shifter */ #define JTAG_MODE 0x00000000 #define BOOT_MODE_USE_ALT 0x100 diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index 000af974e8..9d1c2f0dcf 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -82,6 +82,7 @@ struct crp_regs { #define EMMC_MODE 0x00000006 #define USB_MODE 0x00000007 #define OSPI_MODE 0x00000008 +#define SELECTMAP_MODE 0x0000000A #define SD1_LSHFT_MODE 0x0000000E /* SD1 Level shifter */ #define JTAG_MODE 0x00000000 #define BOOT_MODE_USE_ALT 0x100 diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index f0d2224b33..651b7d24d7 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -260,6 +260,9 @@ int board_late_init(void) mode = "mmc"; bootseq = dev_seq(dev); break; + case SELECTMAP_MODE: + puts("SELECTMAP_MODE\n"); + break; case SD_MODE: puts("SD_MODE\n"); if (uclass_get_device_by_name(UCLASS_MMC, diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 60bf37d3c9..26b4c7bf39 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -182,6 +182,9 @@ int board_late_init(void) mode = "mmc"; bootseq = dev_seq(dev); break; + case SELECTMAP_MODE: + puts("SELECTMAP_MODE\n"); + break; case SD_MODE: puts("SD_MODE\n"); if (uclass_get_device_by_name(UCLASS_MMC, @@ -298,6 +301,7 @@ enum env_location env_get_location(enum env_operation op, int prio) return ENVL_SPI_FLASH; return ENVL_NOWHERE; case JTAG_MODE: + case SELECTMAP_MODE: default: return ENVL_NOWHERE; } -- 2.34.1

2 1

[PATCH v2 00/32] spl: Preparation for Universal Payload
by Simon Glass 04 Oct '23

04 Oct '23

This series tidies up SPL a little and adds some core ofnode functions needed to support Universal Payload. It also includes a few minor fix-ups for sandbox. For SPL the changes include CONFIG naming, removing various #ifdefs and tidying up the FIT code. One notable piece of the ofnode improvements is support for flattening a livetree. This should be useful in future as we move FDT fixups to use the ofnode API. Changes in v2: - Rename based on Tom's feedback - Improve readability by moving the size part to the header file - Explicitly copy two maintainers as it seems only Mario was auto-cc'd - Change the approach to use the header file - Use the same condition for both pieces to avoid possible problems - No changes as it still seems unclear what should be done Michal Simek (1): dm: core: support reading a single indexed u64 value Simon Glass (31): spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_... spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR spl: Avoid #ifdef with CONFIG_SPL_SYS_MALLOC spl: mx6: powerpc: Drop the condition on timer_init() spl: Drop #ifdefs for BOARD_INIT and watchdog spl: Avoid #ifdef with CONFIG_SPL_PAYLOAD_ARGS_ADDR spl: Drop the switch() statement for OS selection spl: Avoid an #ifdef when printing gd->malloc_ptr spl: Remove #ifdefs with BOOTSTAGE spl: Rename spl_load_fit_image() to load_simple_fit() spl: Move the full FIT code to spl_fit.c spl: Use the correct FIT_..._PROP constants spl: Move bloblist writing until the image is known dm: core: Reverse the argument order in ofnode_copy_props() dm: core: Ensure we run flattree tests on ofnode dm: core: Tidy up comments in the ofnode tests dm: core: Add a function to create an empty tree dm: core: Add a way to copy a node dm: core: Add a way to delete a node dm: core: Add a way to convert a devicetree to a dtb dm: core: Support writing a boolean dm: core: Support writing a 64-bit value dm: core: Add tests for oftree_path() sandbox: Move reading the RAM buffer into a better place sandbox: Init the EC properly even if no state file is available sandbox: Only read the state if we have a state file sandbox: Move the bloblist down a little in memory bloblist: Support initing from multiple places fdt: Allow the devicetree to come from a bloblist command: Include a required header in command.h pci: serial: Support reading PCI-register size with base Kconfig | 2 +- README | 2 +- arch/arm/cpu/armv7/ls102xa/fdt.c | 2 +- .../armv8/fsl-layerscape/doc/README.falcon | 2 +- arch/sandbox/cpu/start.c | 27 +- arch/sandbox/cpu/state.c | 2 + arch/sandbox/dts/test.dts | 7 +- boot/vbe_request.c | 2 +- boot/vbe_simple_os.c | 2 +- common/Kconfig | 2 +- common/bloblist.c | 15 +- common/board_f.c | 4 +- common/spl/Kconfig | 16 +- common/spl/Kconfig.nxp | 2 +- common/spl/spl.c | 222 ++++----------- common/spl/spl_ext.c | 4 +- common/spl/spl_fat.c | 4 +- common/spl/spl_fit.c | 127 +++++++-- common/spl/spl_mmc.c | 2 +- common/spl/spl_nand.c | 10 +- common/spl/spl_nor.c | 8 +- common/spl/spl_spi.c | 2 +- common/spl/spl_ubi.c | 2 +- common/spl/spl_xip.c | 2 +- configs/am335x_baltos_defconfig | 4 +- configs/am335x_boneblack_vboot_defconfig | 4 +- configs/am335x_evm_defconfig | 4 +- configs/am335x_evm_spiboot_defconfig | 4 +- configs/am335x_guardian_defconfig | 4 +- configs/am335x_hs_evm_defconfig | 4 +- configs/am335x_hs_evm_uart_defconfig | 4 +- configs/am335x_igep003x_defconfig | 4 +- configs/am335x_pdu001_defconfig | 4 +- configs/am335x_shc_defconfig | 4 +- configs/am335x_shc_ict_defconfig | 4 +- configs/am335x_shc_netboot_defconfig | 4 +- configs/am335x_shc_sdboot_defconfig | 4 +- configs/am335x_sl50_defconfig | 4 +- configs/am3517_evm_defconfig | 6 +- configs/am43xx_evm_defconfig | 4 +- configs/am43xx_evm_rtconly_defconfig | 4 +- configs/am43xx_evm_usbhost_boot_defconfig | 4 +- configs/am43xx_hs_evm_defconfig | 4 +- configs/am57xx_evm_defconfig | 4 +- configs/am57xx_hs_evm_defconfig | 4 +- configs/am57xx_hs_evm_usb_defconfig | 4 +- configs/am62ax_evm_r5_defconfig | 6 +- configs/am62x_evm_r5_defconfig | 8 +- configs/am64x_evm_a53_defconfig | 4 +- configs/am64x_evm_r5_defconfig | 8 +- configs/am65x_evm_a53_defconfig | 4 +- configs/am65x_evm_r5_defconfig | 8 +- configs/am65x_evm_r5_usbdfu_defconfig | 8 +- configs/am65x_evm_r5_usbmsc_defconfig | 8 +- configs/am65x_hs_evm_a53_defconfig | 4 +- configs/am65x_hs_evm_r5_defconfig | 8 +- configs/apalis-tk1_defconfig | 8 +- configs/apalis_imx6_defconfig | 2 +- configs/apalis_t30_defconfig | 8 +- configs/axm_defconfig | 8 +- configs/beaver_defconfig | 8 +- configs/bitmain_antminer_s9_defconfig | 4 +- configs/brppt1_mmc_defconfig | 4 +- configs/brppt2_defconfig | 2 +- configs/brsmarc1_defconfig | 4 +- configs/brxre1_defconfig | 4 +- configs/cardhu_defconfig | 8 +- configs/cei-tk1-som_defconfig | 8 +- configs/cgtqmx8_defconfig | 8 +- configs/chiliboard_defconfig | 4 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/cm_t43_defconfig | 4 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_t20_defconfig | 8 +- configs/colibri_t30_defconfig | 8 +- configs/da850evm_defconfig | 8 +- configs/da850evm_nand_defconfig | 8 +- configs/dalmore_defconfig | 8 +- configs/deneb_defconfig | 8 +- configs/devkit8000_defconfig | 8 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 4 +- configs/display5_factory_defconfig | 4 +- configs/dra7xx_evm_defconfig | 4 +- configs/dra7xx_hs_evm_defconfig | 4 +- configs/dra7xx_hs_evm_usb_defconfig | 4 +- configs/draco_defconfig | 6 +- configs/endeavoru_defconfig | 8 +- configs/etamin_defconfig | 6 +- .../gardena-smart-gateway-at91sam_defconfig | 4 +- configs/ge_b1x5v2_defconfig | 2 +- configs/giedi_defconfig | 8 +- configs/grouper_common_defconfig | 8 +- configs/gwventana_emmc_defconfig | 4 +- configs/gwventana_nand_defconfig | 4 +- configs/harmony_defconfig | 8 +- configs/igep00x0_defconfig | 6 +- configs/imx28_xea_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 4 +- configs/imx6q_bosch_acc_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 4 +- configs/imx6qdl_icore_mipi_defconfig | 4 +- configs/imx6qdl_icore_mmc_defconfig | 4 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 4 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx6ulz_smm_m2_defconfig | 2 +- configs/imx7_cm_defconfig | 2 +- configs/imx8mm-cl-iot-gate-optee_defconfig | 8 +- configs/imx8mm-cl-iot-gate_defconfig | 8 +- configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 8 +- configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 8 +- configs/imx8mm-mx8menlo_defconfig | 8 +- configs/imx8mm_beacon_defconfig | 8 +- configs/imx8mm_beacon_fspi_defconfig | 8 +- configs/imx8mm_data_modul_edm_sbc_defconfig | 8 +- configs/imx8mm_evk_defconfig | 8 +- configs/imx8mm_evk_fspi_defconfig | 8 +- configs/imx8mm_phg_defconfig | 8 +- configs/imx8mm_venice_defconfig | 6 +- configs/imx8mn_beacon_2g_defconfig | 8 +- configs/imx8mn_beacon_defconfig | 8 +- configs/imx8mn_beacon_fspi_defconfig | 8 +- configs/imx8mn_bsh_smm_s2_defconfig | 8 +- configs/imx8mn_bsh_smm_s2pro_defconfig | 8 +- configs/imx8mn_ddr4_evk_defconfig | 8 +- configs/imx8mn_evk_defconfig | 8 +- configs/imx8mn_var_som_defconfig | 8 +- configs/imx8mn_venice_defconfig | 8 +- configs/imx8mp-icore-mx8mp-edimm2.2_defconfig | 8 +- configs/imx8mp_beacon_defconfig | 8 +- configs/imx8mp_data_modul_edm_sbc_defconfig | 8 +- configs/imx8mp_dhcom_pdk2_defconfig | 8 +- configs/imx8mp_dhcom_pdk3_defconfig | 8 +- configs/imx8mp_evk_defconfig | 8 +- configs/imx8mp_rsb3720a1_4G_defconfig | 8 +- configs/imx8mp_rsb3720a1_6G_defconfig | 8 +- configs/imx8mp_venice_defconfig | 8 +- configs/imx8mq_cm_defconfig | 8 +- configs/imx8mq_evk_defconfig | 8 +- configs/imx8mq_phanbell_defconfig | 8 +- configs/imx8mq_reform2_defconfig | 8 +- configs/imx8qm_mek_defconfig | 8 +- configs/imx8qxp_mek_defconfig | 8 +- configs/imx8ulp_evk_defconfig | 8 +- configs/imx93_11x11_evk_defconfig | 8 +- configs/imx93_11x11_evk_ld_defconfig | 8 +- configs/iot2050_defconfig | 4 +- configs/j7200_evm_a72_defconfig | 4 +- configs/j7200_evm_r5_defconfig | 8 +- configs/j721e_evm_a72_defconfig | 4 +- configs/j721e_evm_r5_defconfig | 8 +- configs/j721s2_evm_a72_defconfig | 4 +- configs/j721s2_evm_r5_defconfig | 8 +- configs/jetson-tk1_defconfig | 8 +- configs/k2e_evm_defconfig | 4 +- configs/k2g_evm_defconfig | 4 +- configs/k2hk_evm_defconfig | 4 +- configs/k2l_evm_defconfig | 4 +- configs/kontron-sl-mx6ul_defconfig | 2 +- configs/kontron-sl-mx8mm_defconfig | 8 +- configs/kontron_pitx_imx8m_defconfig | 8 +- configs/kontron_sl28_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/librem5_defconfig | 8 +- configs/liteboard_defconfig | 2 +- configs/ls1021aiot_sdcard_defconfig | 6 +- configs/ls1021aqds_nand_defconfig | 6 +- configs/ls1021aqds_sdcard_ifc_defconfig | 6 +- configs/ls1021aqds_sdcard_qspi_defconfig | 6 +- configs/ls1021atsn_sdcard_defconfig | 6 +- ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 6 +- configs/ls1021atwr_sdcard_ifc_defconfig | 6 +- configs/ls1021atwr_sdcard_qspi_defconfig | 6 +- configs/ls1043aqds_nand_defconfig | 6 +- configs/ls1043aqds_sdcard_ifc_defconfig | 2 +- configs/ls1043aqds_sdcard_qspi_defconfig | 2 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 6 +- configs/ls1043ardb_nand_defconfig | 6 +- .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig | 2 +- configs/ls1046aqds_nand_defconfig | 2 +- configs/ls1046aqds_sdcard_ifc_defconfig | 2 +- configs/ls1046aqds_sdcard_qspi_defconfig | 2 +- configs/ls1046ardb_emmc_defconfig | 2 +- configs/ls1046ardb_qspi_spl_defconfig | 4 +- .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1046ardb_sdcard_defconfig | 2 +- configs/ls1088aqds_sdcard_ifc_defconfig | 2 +- configs/ls1088aqds_sdcard_qspi_defconfig | 2 +- ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 2 +- configs/ls1088ardb_sdcard_qspi_defconfig | 2 +- configs/ls2080aqds_nand_defconfig | 2 +- configs/ls2080aqds_sdcard_defconfig | 2 +- configs/ls2080ardb_nand_defconfig | 2 +- configs/mccmon6_nor_defconfig | 4 +- configs/mccmon6_sd_defconfig | 2 +- configs/medcom-wide_defconfig | 8 +- configs/msc_sm2s_imx8mp_defconfig | 8 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6memcal_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/myir_mys_6ulx_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/nyan-big_defconfig | 8 +- configs/omap35_logic_defconfig | 6 +- configs/omap35_logic_somlv_defconfig | 6 +- configs/omap3_beagle_defconfig | 4 +- configs/omap3_evm_defconfig | 4 +- configs/omap3_logic_defconfig | 6 +- configs/omap3_logic_somlv_defconfig | 6 +- configs/omap4_panda_defconfig | 4 +- configs/omap4_sdp4430_defconfig | 4 +- configs/omapl138_lcdk_defconfig | 8 +- configs/openpiton_riscv64_spl_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/paz00_defconfig | 8 +- configs/pcm058_defconfig | 2 +- configs/phycore-am335x-r2-regor_defconfig | 4 +- configs/phycore-am335x-r2-wega_defconfig | 4 +- configs/phycore-imx8mm_defconfig | 8 +- configs/phycore-imx8mp_defconfig | 8 +- configs/phycore_pcl063_defconfig | 2 +- configs/phycore_pcl063_ull_defconfig | 2 +- configs/pico-dwarf-imx6ul_defconfig | 2 +- configs/pico-dwarf-imx7d_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_bl33_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-imx8mq_defconfig | 8 +- configs/pico-nymph-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/plutux_defconfig | 8 +- configs/pxm2_defconfig | 6 +- configs/qemu-riscv32_spl_defconfig | 2 +- configs/qemu-riscv64_spl_defconfig | 2 +- configs/rastaban_defconfig | 6 +- configs/ringneck-px30_defconfig | 2 +- configs/riotboard_defconfig | 4 +- configs/rut_defconfig | 6 +- configs/sama5d27_giantboard_defconfig | 4 +- configs/sama5d27_som1_ek_mmc1_defconfig | 4 +- configs/sama5d27_som1_ek_mmc_defconfig | 4 +- configs/sama5d27_som1_ek_qspiflash_defconfig | 4 +- configs/sama5d27_wlsom1_ek_mmc_defconfig | 4 +- .../sama5d27_wlsom1_ek_qspiflash_defconfig | 4 +- configs/sama5d2_icp_mmc_defconfig | 4 +- configs/sama5d2_xplained_emmc_defconfig | 4 +- configs/sama5d2_xplained_mmc_defconfig | 4 +- configs/sama5d2_xplained_qspiflash_defconfig | 4 +- configs/sama5d2_xplained_spiflash_defconfig | 4 +- configs/sama5d3_xplained_mmc_defconfig | 4 +- configs/sama5d3_xplained_nandflash_defconfig | 4 +- configs/sama5d3xek_mmc_defconfig | 4 +- configs/sama5d3xek_nandflash_defconfig | 4 +- configs/sama5d3xek_spiflash_defconfig | 4 +- configs/sama5d4_xplained_mmc_defconfig | 4 +- configs/sama5d4_xplained_nandflash_defconfig | 4 +- configs/sama5d4_xplained_spiflash_defconfig | 4 +- configs/sama5d4ek_mmc_defconfig | 4 +- configs/sama5d4ek_nandflash_defconfig | 4 +- configs/sama5d4ek_spiflash_defconfig | 4 +- configs/seaboard_defconfig | 8 +- configs/seeed_npi_imx6ull_defconfig | 2 +- configs/sifive_unleashed_defconfig | 2 +- configs/sifive_unmatched_defconfig | 2 +- configs/smartweb_defconfig | 4 +- configs/sniper_defconfig | 6 +- configs/socfpga_agilex_atf_defconfig | 8 +- configs/socfpga_agilex_defconfig | 8 +- configs/socfpga_agilex_vab_defconfig | 8 +- configs/socfpga_arria10_defconfig | 8 +- configs/socfpga_chameleonv3_defconfig | 8 +- configs/socfpga_n5x_atf_defconfig | 8 +- configs/socfpga_n5x_defconfig | 8 +- configs/socfpga_n5x_vab_defconfig | 8 +- configs/socfpga_stratix10_atf_defconfig | 8 +- configs/socfpga_stratix10_defconfig | 8 +- configs/starfive_visionfive2_defconfig | 8 +- configs/stm32746g-eval_spl_defconfig | 2 +- configs/stm32f746-disco_spl_defconfig | 2 +- configs/stm32f769-disco_spl_defconfig | 2 +- ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 8 +- ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 8 +- ...-microgea-stm32mp1-microdev2-of7_defconfig | 8 +- ...mp15-microgea-stm32mp1-microdev2_defconfig | 8 +- configs/stm32mp15_basic_defconfig | 8 +- configs/stm32mp15_dhcom_basic_defconfig | 8 +- configs/stm32mp15_dhcor_basic_defconfig | 8 +- configs/syzygy_hub_defconfig | 6 +- configs/taurus_defconfig | 8 +- configs/tec-ng_defconfig | 8 +- configs/tec_defconfig | 8 +- configs/thuban_defconfig | 6 +- configs/topic_miami_defconfig | 4 +- configs/topic_miamilite_defconfig | 4 +- configs/topic_miamiplus_defconfig | 4 +- configs/transformer_t30_defconfig | 8 +- configs/trimslice_defconfig | 8 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/venice2_defconfig | 8 +- configs/ventana_defconfig | 8 +- configs/verdin-am62_r5_defconfig | 8 +- configs/verdin-imx8mm_defconfig | 8 +- configs/verdin-imx8mp_defconfig | 8 +- configs/vining_2000_defconfig | 2 +- configs/vyasa-rk3288_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/x3_t30_defconfig | 8 +- configs/xilinx_zynq_virt_defconfig | 6 +- configs/xilinx_zynqmp_mini_emmc0_defconfig | 8 +- configs/xilinx_zynqmp_mini_emmc1_defconfig | 8 +- configs/xilinx_zynqmp_mini_qspi_defconfig | 8 +- configs/xilinx_zynqmp_virt_defconfig | 10 +- configs/zynq_cse_nand_defconfig | 8 +- configs/zynq_cse_nor_defconfig | 8 +- configs/zynq_cse_qspi_defconfig | 8 +- doc/arch/sandbox/sandbox.rst | 4 +- doc/develop/devicetree/control.rst | 3 + doc/develop/falcon.rst | 2 +- drivers/core/Kconfig | 6 +- drivers/core/fdtaddr.c | 6 +- drivers/core/of_access.c | 81 +++++- drivers/core/ofnode.c | 213 +++++++++++++- drivers/core/read.c | 6 +- drivers/core/util.c | 2 +- drivers/misc/cros_ec_sandbox.c | 9 +- drivers/pci/pci-uclass.c | 2 +- drivers/pci/pci_mvebu.c | 3 +- drivers/pci/pci_tegra.c | 2 +- drivers/pci/pcie_mediatek.c | 4 +- drivers/serial/Kconfig | 2 +- drivers/serial/ns16550.c | 15 +- dts/Kconfig | 8 + include/asm-generic/global_data.h | 11 + include/bloblist.h | 23 ++ include/bootstage.h | 26 ++ include/command.h | 3 + include/configs/socfpga_common.h | 2 +- include/configs/socfpga_soc64_common.h | 2 +- include/dm/fdtaddr.h | 3 +- include/dm/of_access.h | 37 +++ include/dm/ofnode.h | 114 +++++++- include/dm/read.h | 8 +- include/fdtdec.h | 3 +- include/ns16550.h | 4 +- include/of_live.h | 18 ++ include/serial.h | 2 + include/spl.h | 28 +- include/system-constants.h | 20 +- lib/fdtdec.c | 44 ++- lib/of_live.c | 141 ++++++++++ test/dm/ofnode.c | 266 ++++++++++++++++-- test/dm/pci.c | 14 +- test/lib/kconfig.c | 4 +- 371 files changed, 2067 insertions(+), 1138 deletions(-) -- 2.42.0.515.g380fc7ccd1-goog

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[PATCH] linker_list: Fix ll_entry_get alignment
by Sean Anderson 04 Oct '23

04 Oct '23

When ll_entry_get is used on a list entry ll_entry_declare'd in the same file, the lack of alignment on the access will override the ll_entry_declare alignment. This causes GCC to use the default section alignment of 32 bytes. As list entries are not necessarily 32-byte aligned, this will cause a gap in the linker list, corrupting further entries. As a specific example, get_fs_loader uses DM_DRIVER_GET(fs_loader) in the same file where U_BOOT_DRIVER(fs_loader) is present. This causes a crash when walking the driver list. Fix this by adding appropriate alignment to all accesses. Fixes: 42ebaae3a33 ("common: Implement support for linker-generated arrays") Signed-off-by: Sean Anderson <seanga2(a)gmail.com> --- include/linker_lists.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/linker_lists.h b/include/linker_lists.h index f9a2ee0c762..e0c8a01b9ba 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -209,7 +209,8 @@ */ #define ll_entry_get(_type, _name, _list) \ ({ \ - extern _type _u_boot_list_2_##_list##_2_##_name; \ + extern _type __aligned(4) \ + _u_boot_list_2_##_list##_2_##_name; \ _type *_ll_result = \ &_u_boot_list_2_##_list##_2_##_name; \ _ll_result; \ @@ -229,7 +230,7 @@ * @_list: name of the list */ #define ll_entry_ref(_type, _name, _list) \ - ((_type *)&_u_boot_list_2_##_list##_2_##_name) + ((_type __aligned(4) *)&_u_boot_list_2_##_list##_2_##_name) /** * ll_start() - Point to first entry of first linker-generated array -- 2.37.1

2 4

[PATCH] scripts/Makefile.lib: also consider $(CONFIG_SYS_BOARD)-u-boot.dtsi
by Rasmus Villemoes 04 Oct '23

04 Oct '23

I have a couple of boards, e.g. foo21, bar33, each with a few different revisions, so I have foo21-revA.dts foo21-revB.dts bar33-revA.dts bar33-revB.dts Now the necessary U-Boot specific additions for the foo21 boards doesn't depend on the revision (likely for bar33), so I just want to have and maintain one foo21-u-boot.dtsi But currently I need to add dummy files foo21-revA-u-boot.dtsi and foo21-revB-u-boot.dtsi each just containing '#include foo21-u-boot.dtsi'. And similarly for bar33, and all those files become quite unwieldy as more revisions need to be supported. It's quite natural to look for a file named after CONFIG_SYS_BOARD, with lower precedence of course than a -u-boot.dtsi file with the same basename as the .dts, but higher than CONFIG_SYS_SOC. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- Of course, this can cause unwanted changes for existing boards. But a bit of ad hoc scripting shows that the risk is low: I first grabbed all 'default "foo"' stanzas of all 'config SYS_BOARD' instances, as well as all values of CONFIG_SYS_BOARD set in *_defconfig files. Then I made a list of all existing *-u-boot.dtsi files, and from these removed any where there is a corresponding .dts file. That leaves just imx6ul imx8mm mt7620 mt7621 mt7622 mt7623 mt7628 mt8516 socfpga_arria10 sunxi and inspecting a few of those suggests that they set SYS_SOC to the same as SYS_BOARD, i.e. they were already picking up the .dtsi file due to the SYS_SOC rule. Now, the only way to be really sure is to build the world with/without this patch and check if any .dtb file changes, but I don't have the means to do that. But I do notice that doc/develop/devicetree/control.rst | 1 + scripts/Makefile.lib | 2 ++ 2 files changed, 3 insertions(+) diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst index c71570d64b..831d225fb1 100644 --- a/doc/develop/devicetree/control.rst +++ b/doc/develop/devicetree/control.rst @@ -174,6 +174,7 @@ devicetree for your board, searching for them in the same directory as the main file, in this order:: <orig_filename>-u-boot.dtsi + <CONFIG_SYS_BOARD>-u-boot.dtsi <CONFIG_SYS_SOC>-u-boot.dtsi <CONFIG_SYS_CPU>-u-boot.dtsi <CONFIG_SYS_VENDOR>-u-boot.dtsi diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index ecc15041ee..69f4d560d1 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -160,6 +160,7 @@ ld_flags = $(KBUILD_LDFLAGS) $(ldflags-y) $(LDFLAGS_$(@F)) # Try these files in order to find the U-Boot-specific .dtsi include file u_boot_dtsi_options = $(strip $(wildcard $(dir $<)$(basename $(notdir $<))-u-boot.dtsi) \ + $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_BOARD))-u-boot.dtsi) \ $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \ $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \ $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \ @@ -167,6 +168,7 @@ u_boot_dtsi_options = $(strip $(wildcard $(dir $<)$(basename $(notdir $<))-u-boo u_boot_dtsi_options_raw = $(warning Automatic .dtsi inclusion: options: \ $(dir $<)$(basename $(notdir $<))-u-boot.dtsi \ + $(dir $<)$(subst $\",,$(CONFIG_SYS_BOARD))-u-boot.dtsi \ $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \ $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \ $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \ -- 2.37.2

3 38

[RFC PATCH v2 0/8] ATF and OP-TEE Firewalling for K3 devices.
by Manorit Chawdhry 04 Oct '23

04 Oct '23

K3 devices have firewalls that are used to prevent illegal accesses to memory regions that are deemed secure. The series prevents the illegal accesses to ATF and OP-TEE regions that are present in different K3 devices. AM62AX and AM64X are currently in hold due to some firewall configurations that our System Controller (TIFS) needs to handle. Signed-off-by: Manorit Chawdhry <m-chawdhry(a)ti.com> --- Changes in v2: Andrew: - Make the firewall DTS more readable with CONSTANTS Neha: - Move GetHexOctet to dtoc for common usage - Update the documentation in ti-secure - s/indentifier/identifier/ - Add firewall binman test - Remove slave firewall multiple background regions ( Single firewall region works fine ) - Add a check in the subnodes to check for the node.name 'firewall' - Change firewall indexing with id and region number so that it is easy to purge out firewalls and we don't need to redo the numbering. - Add information for all the firewalls. - Link to v1: https://lore.kernel.org/u-boot/20230905-binman-firewalling-v1-0-3894520bff8… --- Manorit Chawdhry (8): dtoc: openssl: Add GetHexOctet method binman: ti-secure: Add support for firewalling entities binman: ftest: Add test for ti-secure firewall node binman: k3: add k3-security.h and include it in k3-binman.dtsi binman: j721e: Add firewall configurations for atf binman: am62x: Add firewalling configurations binman: j721s2: Add firewall configurations binman: j7200: Add firewall configurations arch/arm/dts/k3-am625-sk-binman.dtsi | 49 +++++++ arch/arm/dts/k3-binman.dtsi | 2 + arch/arm/dts/k3-j7200-binman.dtsi | 137 ++++++++++++++++++ arch/arm/dts/k3-j721e-binman.dtsi | 183 ++++++++++++++++++++++++ arch/arm/dts/k3-j721s2-binman.dtsi | 206 +++++++++++++++++++++++++++ arch/arm/dts/k3-security.h | 58 ++++++++ tools/binman/btool/openssl.py | 16 ++- tools/binman/etype/ti_secure.py | 85 +++++++++++ tools/binman/etype/x509_cert.py | 3 +- tools/binman/ftest.py | 12 ++ tools/binman/test/311_ti_secure_firewall.dts | 28 ++++ tools/dtoc/fdt_util.py | 20 +++ 12 files changed, 796 insertions(+), 3 deletions(-) --- base-commit: 2fe4b54556ea6271237b35de68dc458bfceab94c change-id: 20230724-binman-firewalling-65ecdb23ec0a Best regards, -- Manorit Chawdhry <m-chawdhry(a)ti.com>

3 18

[PATCH v4 0/3] Sign Xilinx ZynqMP SPL/FSBL boot images using binman
by lukas.funke-oss＠weidmueller.com 04 Oct '23

04 Oct '23

From: Lukas Funke <lukas.funke(a)weidmueller.com> This series adds one etype to create a verified boot chain for Xilinx ZynqMP devices. The etype 'xilinx-bootgen' is used to create a bootable, signed image for ZynqMP boards using the Xilinx Bootgen tool. The series also contains the corresponding btool for calling 'bootgen'. The following block shows an example on how to use this functionality: spl { filename = "boot.signed.bin"; xilinx-bootgen { psk-key-name-hint = "psk0"; ssk-key-name-hint = "ssk0"; pmufw-filename = "pmu-firmware.elf"; auth-params = "ppk_select=0", "spk_id=0x00000000"; u-boot-spl-nodtb { }; u-boot-spl-pubkey-dtb { algo = "sha384,rsa4096"; required = "conf"; key-name-hint = "dev"; }; }; }; Changes in v4: - Fixed some typos - Add test to check for missing bootgen tool - Renamed etype from "xilinx-fsbl-auth" to "xilinx-bootgen" - Add detection of missing bintool - Promote 'pmufw-filename' to required property Changes in v3: - Fixed an issue where the build result was not found - Fixed an issue where the version string was not reported correctly - Improved test coverage for xilinx-fsbl-auth etype - Changed etype from entry to section - Changed property name "psk-filename" to "psk-key-name-hint" - Changed property name "ssk-filename" to "ssk-key-name-hint" - Decode spl elf file instead of reading start symbol - Improved test coverage - Improved documentation Changes in v2: - Pass additional 'keysrc_enc' parameter to Bootgen - Added more information and terms to documentation - Fixed typo in dts name - Add 'keysrc-enc' property to pass down to Bootgen - Improved documentation - Use predictable output names for intermediated results Lukas Funke (3): binman: btool: Add Xilinx Bootgen btool binman: ftest: Add test for xilinx-bootgen etype binman: etype: Add xilinx-bootgen etype tools/binman/bintools.rst | 2 +- tools/binman/btool/bootgen.py | 137 +++++++++++ tools/binman/entries.rst | 75 ++++++ tools/binman/etype/xilinx_bootgen.py | 225 ++++++++++++++++++ tools/binman/ftest.py | 75 ++++++ tools/binman/test/307_xilinx_bootgen_sign.dts | 22 ++ .../test/308_xilinx_bootgen_sign_enc.dts | 24 ++ 7 files changed, 559 insertions(+), 1 deletion(-) create mode 100644 tools/binman/btool/bootgen.py create mode 100644 tools/binman/etype/xilinx_bootgen.py create mode 100644 tools/binman/test/307_xilinx_bootgen_sign.dts create mode 100644 tools/binman/test/308_xilinx_bootgen_sign_enc.dts -- 2.30.2

2 8