January 2023 - U-Boot

[PATCH 1/1] cmd: avoid endless loop in sound play command
by Heinrich Schuchardt 03 Jan '23

03 Jan '23

A parameter starting with a hyphen leads to an endless loop in the sound play command. Leave it to dectoul() to handle the hyphen. It will return 0 for a negative number. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- cmd/sound.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/sound.c b/cmd/sound.c index cef71be5e3..0b7f959971 100644 --- a/cmd/sound.c +++ b/cmd/sound.c @@ -48,12 +48,12 @@ static int do_play(struct cmd_tbl *cmdtp, int flag, int argc, ++argv; while (argc || first) { first = false; - if (argc && *argv[0] != '-') { + if (argc) { msec = dectoul(argv[0], NULL); --argc; ++argv; } - if (argc && *argv[0] != '-') { + if (argc) { freq = dectoul(argv[0], NULL); --argc; ++argv; -- 2.37.2

2 1

[PATCH v2 0/2] Initial support for Pinephone Pro
by Peter Robinson 03 Jan '23

03 Jan '23

This adds initial support for the PINE64 Pinephone Pro. It's a rebase to upstream core rk3399 DT pieces, and the addition of the upstream PPP DT from 6.2-rc1 and the U-Boot pieces are based on my work on the Pinebook Pro. Changes v2: - Drop the rk3399.dtsi sync for time being, causing issues around clock/dram - Sync the Pinephone DT to 6.2-rc1 - Update for the CONFIG_SYS_TEXT_BASE -> CONFIG_TEXT_BASE change - usb: ohci: Use a flexible array member for portstatus - Rename CONFIG_DM_VIDEO to CONFIG_VIDEO - Enable DM_REGULATOR_FAN53555 - Don't initialize i2c before relocation Peter Robinson (2): arm64: dts: rk3399: Add upstream Pinephone Pro dts rockchip: Add initial support for the PINE64 Pinephone Pro arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 31 ++ arch/arm/dts/rk3399-pinephone-pro.dts | 474 ++++++++++++++++++ arch/arm/mach-rockchip/rk3399/Kconfig | 8 + board/pine64/pinephone-pro-rk3399/Kconfig | 15 + board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 + board/pine64/pinephone-pro-rk3399/Makefile | 1 + .../pinephone-pro-rk3399.c | 76 +++ configs/pinephone-pro-rk3399_defconfig | 104 ++++ include/configs/pinephone-pro-rk3399.h | 19 + 10 files changed, 737 insertions(+) create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c create mode 100644 configs/pinephone-pro-rk3399_defconfig create mode 100644 include/configs/pinephone-pro-rk3399.h -- 2.39.0

2 3

[PATCH 0/3] cmd: pxe: support INITRD and FDT selection with FIT
by Patrick Delaunay 03 Jan '23

03 Jan '23

Since the commit d5ba6188dfbf ("cmd: pxe_utils: Check fdtcontroladdr in label_boot") the FDT or the FDTDIR label is required in extlinux.conf and the fallback done by bootm command when only the device tree is present in this command parameters is no more performed when FIT is used for kernel. The next file "extlinux.conf" no more selects the device tree in FIT but use the pxe fallback with the device tree of U-Boot. menu title Select the boot mode DEFAULT test LABEL test KERNEL /fitImage This serie restores the possibility to use a FIT in extlinux.conf by using FDT label with the same string. menu title Select the boot mode DEFAULT test LABEL test KERNEL /fitImage FDT /fitImage even when a specific FIT config is used: menu title Select the boot mode DEFAULT test LABEL test KERNEL /fitImage#config FDT /fitImage#config The last commit of the series is only a minor improvement. Patrick Delaunay (3): cmd: pxe: reorder kernel treatment in label_boot cmd: pxe: support INITRD and FDT selection with FIT cmd: pxe: use strdup to copy config boot/pxe_utils.c | 69 +++++++++++++++++++++++++-------------------- doc/README.pxe | 8 ++++++ include/pxe_utils.h | 2 ++ 3 files changed, 49 insertions(+), 30 deletions(-) -- 2.25.1

6 19

[PATCH 0/4] Register at91 OHCI into DM and add SAMA7 USB PHY's
by Sergiu Moga 03 Jan '23

03 Jan '23

This patch series originates from a bigger patch series: https://lists.denx.de/pipermail/u-boot/2022-December/502865.html Register ohci-at91 driver into Driver Model. In order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of the USB 2.0 PHY drivers were required. Cristian Birsan (1): usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv` Sergiu Moga (3): phy: at91: Add support for the USB 2.0 PHY's of SAMA7 usb: ohci-at91: Enable OHCI functionality and register into DM usb: ohci-at91: Add USB PHY functionality drivers/phy/Kconfig | 10 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-sama7-usb.c | 90 +++++++++++++ drivers/phy/phy-sama7-utmi-clk.c | 202 +++++++++++++++++++++++++++++ drivers/usb/host/ohci-at91.c | 215 +++++++++++++++++++++++++++++++ 5 files changed, 518 insertions(+) create mode 100644 drivers/phy/phy-sama7-usb.c create mode 100644 drivers/phy/phy-sama7-utmi-clk.c -- 2.34.1

3 16

[PATCH v1 0/4] arm: s5p4418: migrate to DM_SERIAL
by Stefan Bosch 03 Jan '23

03 Jan '23

This patch-series migrates the S5P4418-SOC and therefore also the s5p4418_nanopi2 board from CONFIG_SERIAL to CONFIG_DM_SERIAL. Stefan Bosch (4): arm: s5p4418: dm_serial: add driver source code arm: s5p4418: dm_serial: add uarts to dts arm: s5p4418: dm_serial: switch to DM_SERIAL arm: s5p4418: dm_serial: remove old code / add DEBUG_UART MAINTAINERS | 1 + arch/arm/cpu/armv7/s5p4418/cpu.c | 29 --------- arch/arm/dts/s5p4418-nanopi2.dts | 6 ++ arch/arm/dts/s5p4418-pinctrl.dtsi | 71 ++++++++++++++++++++ arch/arm/dts/s5p4418.dtsi | 40 ++++++++++++ arch/arm/mach-nexell/Kconfig | 4 +- arch/arm/mach-nexell/clock.c | 2 +- configs/s5p4418_nanopi2_defconfig | 8 ++- drivers/serial/Kconfig | 9 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_s5p4418_pl011.c | 94 +++++++++++++++++++++++++++ include/configs/s5p4418_nanopi2.h | 8 +-- 12 files changed, 235 insertions(+), 38 deletions(-) create mode 100644 drivers/serial/serial_s5p4418_pl011.c -- 2.17.1

2 8

[PATCH] board/pg_wcom: rework defconfig
by Holger Brunck 03 Jan '23

03 Jan '23

Switch off SCSI related config options to get rid of the board removal warning. We don't use this interface. Also disable UBIFS to decrease the image size, as this is also not used. Signed-off-by: Holger Brunck <holger.brunck(a)hitachienergy.com> --- configs/pg_wcom_expu1_defconfig | 6 ++++-- configs/pg_wcom_expu1_update_defconfig | 6 ++++-- configs/pg_wcom_seli8_defconfig | 6 ++++-- configs/pg_wcom_seli8_update_defconfig | 6 ++++-- 4 files changed, 16 insertions(+), 8 deletions(-) diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index b57e588f4e..d6b62340a3 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -17,7 +17,6 @@ CONFIG_SYS_CLK_FREQ=66666666 # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60060000 -CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_COMMON_ETH_INIT=y @@ -62,6 +61,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),128k(redenvred),128k(redenv),1m(redu-boot),-(ubi0);68000000.flash:-(ubi1)" CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set CONFIG_OF_CONTROL=y CONFIG_ENV_SOURCE_FILE="pg-wcom-expu1" CONFIG_ENV_OVERWRITE=y @@ -71,6 +71,7 @@ CONFIG_ENV_ADDR_REDUND=0x60040000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y +# CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 @@ -96,8 +97,9 @@ CONFIG_PHY_GIGE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_QE_FW_ADDR=0x60020000 -CONFIG_SCSI_AHCI_PLAT=y +# CONFIG_SCSI is not set CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_POST=y +CONFIG_LZO=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 9029e7babc..933515bb7d 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60220000 -CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_COMMON_ETH_INIT=y @@ -60,6 +59,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),128k(redenvred),128k(redenv),1m(redu-boot),-(ubi0);68000000.flash:-(ubi1)" CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set CONFIG_OF_CONTROL=y CONFIG_ENV_SOURCE_FILE="pg-wcom-expu1" CONFIG_ENV_OVERWRITE=y @@ -69,6 +69,7 @@ CONFIG_ENV_ADDR_REDUND=0x60200000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y +# CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 @@ -94,8 +95,9 @@ CONFIG_PHY_GIGE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_QE_FW_ADDR=0x60020000 -CONFIG_SCSI_AHCI_PLAT=y +# CONFIG_SCSI is not set CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_POST=y +CONFIG_LZO=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index aa74e1746a..b58199d783 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -17,7 +17,6 @@ CONFIG_SYS_CLK_FREQ=66666666 # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60060000 -CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_COMMON_ETH_INIT=y @@ -62,6 +61,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),128k(redenvred),128k(redenv),1m(redu-boot),-(ubi0);68000000.flash:-(ubi1)" CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set CONFIG_OF_CONTROL=y CONFIG_ENV_SOURCE_FILE="pg-wcom-seli8" CONFIG_ENV_OVERWRITE=y @@ -71,6 +71,7 @@ CONFIG_ENV_ADDR_REDUND=0x60040000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y +# CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 @@ -96,8 +97,9 @@ CONFIG_PHY_GIGE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_QE_FW_ADDR=0x60020000 -CONFIG_SCSI_AHCI_PLAT=y +# CONFIG_SCSI is not set CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_POST=y +CONFIG_LZO=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 2b18a88d44..385073336d 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_ENV_ADDR=0x60220000 -CONFIG_AHCI=y # CONFIG_DEEP_SLEEP is not set CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_KM_COMMON_ETH_INIT=y @@ -60,6 +59,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),128k(redenvred),128k(redenv),1m(redu-boot),-(ubi0);68000000.flash:-(ubi1)" CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set CONFIG_OF_CONTROL=y CONFIG_ENV_SOURCE_FILE="pg-wcom-seli8" CONFIG_ENV_OVERWRITE=y @@ -69,6 +69,7 @@ CONFIG_ENV_ADDR_REDUND=0x60200000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y +# CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 @@ -94,8 +95,9 @@ CONFIG_PHY_GIGE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_QE_FW_ADDR=0x60020000 -CONFIG_SCSI_AHCI_PLAT=y +# CONFIG_SCSI is not set CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_POST=y +CONFIG_LZO=y -- 2.31.1

2 1

[PATCH v2] board: ti: common: board_detect: Fix EEPROM read quirk for 2-byte
by Neha Malcom Francis 03 Jan '23

03 Jan '23

EEPROM detection logic in ti_i2c_eeprom_get() involves figuring out whether addressing is 1-byte or 2-byte. There are currently different behaviours seen across boards as documented in commit bf6376642fe8 ("board: ti: common: board_detect: Fix EEPROM read quirk"). Adding to the list, we see that there are 2-byte EEPROMs that read properly with 1-byte addressing with no offset. For ti_i2c_eeprom_am6_get where eeprom parse operation is dynamic, the earlier commit d2ab2a2bafd5 ("board: ti: common: board_detect: Fix EEPROM read quirk for AM6 style data") tried to resolve this by running ti_i2c_eeprom_get() twice. However this commit along with its former commit fails on J7 platforms where EEPROM successfully return back the header on 1-byte addressing and continues to do so until an offset is introduced. So the second read incorrectly determines the EEPROM as 1-byte addressing. A more generic solution is introduced here to solve this issue: 1-byte read without offset and 1-byte read with offset. If both passes, it follows 1-byte addressing else we proceed with 2-byte addressing check. Tested on J721E, J7200, DRA7xx, AM64x Signed-off-by: Neha Malcom Francis <n-francis(a)ti.com> Fixes: d2ab2a2bafd5 (board: ti: common: board_detect: Fix EEPROM read quirk for AM6 style data) Fixes: bf6376642fe8 (board: ti: common: board_detect: Fix EEPROM read quirk) --- board/ti/common/board_detect.c | 46 +++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 12 deletions(-) Changes since v1: - modified algorithm for boards that do not have CONFIG_DM_I2C enabled as well diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index c37629fe8a..9b32076ab9 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -87,6 +87,8 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, u32 header, u32 size, uint8_t *ep) { int rc; + uint8_t offset_test; + bool one_byte_addressing = true; #if CONFIG_IS_ENABLED(DM_I2C) struct udevice *dev; @@ -114,8 +116,23 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, */ (void)dm_i2c_read(dev, 0, ep, size); + if (*((u32 *)ep) != header) + one_byte_addressing = false; + + /* + * Handle case of bad 2 byte eeproms that responds to 1 byte addressing + * but gets stuck in const addressing when read requests are performed + * on offsets. We perform an offset test to make sure it is not a 2 byte + * eeprom that works with 1 byte addressing but just without an offset + */ + + rc = dm_i2c_read(dev, 0x1, &offset_test, sizeof(offset_test)); + + if (*((u32 *)ep) != (header & 0xFF)) + one_byte_addressing = false; + /* Corrupted data??? */ - if (*((u32 *)ep) != header) { + if (!one_byte_addressing) { /* * read the eeprom header using i2c again, but use only a * 2 byte address (some newer boards need this..) @@ -151,8 +168,23 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, */ (void)i2c_read(dev_addr, 0x0, byte, ep, size); + if (*((u32 *)ep) != header) + one_byte_addressing = false; + + /* + * Handle case of bad 2 byte eeproms that responds to 1 byte addressing + * but gets stuck in const addressing when read requests are performed + * on offsets. We perform an offset test to make sure it is not a 2 byte + * eeprom that works with 1 byte addressing but just without an offset + */ + + rc = i2c_read(dev, 0x1, byte, &offset_test, sizeof(offset_test)); + + if (*((u32 *)ep) != (header & 0xFF)) + one_byte_addressing = false; + /* Corrupted data??? */ - if (*((u32 *)ep) != header) { + if (!one_byte_addressing) { /* * read the eeprom header using i2c again, but use only a * 2 byte address (some newer boards need this..) @@ -444,16 +476,6 @@ int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr, if (rc) return rc; - /* - * Handle case of bad 2 byte eeproms that responds to 1 byte addressing - * but gets stuck in const addressing when read requests are performed - * on offsets. We re-read the board ID to ensure we have sane data back - */ - rc = ti_i2c_eeprom_get(bus_addr, dev_addr, TI_EEPROM_HEADER_MAGIC, - sizeof(board_id), (uint8_t *)&board_id); - if (rc) - return rc; - if (board_id.header.id != TI_AM6_EEPROM_RECORD_BOARD_ID) { pr_err("%s: Invalid board ID record!\n", __func__); return -EINVAL; -- 2.34.1

3 3

[PATCH] Add CONFIG_SYS_NAND_SELF_INIT to Kconfig for NAND DENALI driver
by Jit Loon Lim 03 Jan '23

03 Jan '23

From: "Lokanathan, Raaj" <raaj.lokanathan(a)intel.com> Add the CONFIG_SYS_NAND_SELF_INIT to the Kconfig to follow the changes from mainline. Signed-off-by: Lokanathan, Raaj <raaj.lokanathan(a)intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim(a)intel.com> --- drivers/mtd/nand/raw/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index ce67d1abde..1e889afd01 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -148,6 +148,7 @@ config NAND_DENALI config NAND_DENALI_DT bool "Support Denali NAND controller as a DT device" select NAND_DENALI + select SPL_SYS_NAND_SELF_INIT depends on OF_CONTROL && DM_MTD help Enable the driver for NAND flash on platforms using a Denali NAND -- 2.26.2

2 1

[PATCH] serial: Use -EAGAIN in getc and putc
by Pali Rohár 03 Jan '23

03 Jan '23

U-Boot serial code already handles -EAGAIN value from getc and putc callbacks. So change drivers code to return -EAGAIN when HW is busy instead of doing its own busy loop and waiting until HW is ready. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/serial/serial_arc.c | 8 ++++---- drivers/serial/serial_lpuart.c | 8 ++++---- drivers/serial/serial_mvebu_a3700.c | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c index b2d95bdbe18d..c2fc8a901e25 100644 --- a/drivers/serial/serial_arc.c +++ b/drivers/serial/serial_arc.c @@ -53,8 +53,8 @@ static int arc_serial_putc(struct udevice *dev, const char c) struct arc_serial_plat *plat = dev_get_plat(dev); struct arc_serial_regs *const regs = plat->reg; - while (!(readb(&regs->status) & UART_TXEMPTY)) - ; + if (!(readb(&regs->status) & UART_TXEMPTY)) + return -EAGAIN; writeb(c, &regs->data); @@ -83,8 +83,8 @@ static int arc_serial_getc(struct udevice *dev) struct arc_serial_plat *plat = dev_get_plat(dev); struct arc_serial_regs *const regs = plat->reg; - while (!arc_serial_tstc(regs)) - ; + if (!arc_serial_tstc(regs)) + return -EAGAIN; /* Check for overflow errors */ if (readb(&regs->status) & UART_OVERFLOW_ERR) diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index ff576da516d4..d7259d531b55 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -168,8 +168,8 @@ static void _lpuart_serial_setbrg(struct udevice *dev, static int _lpuart_serial_getc(struct lpuart_serial_plat *plat) { struct lpuart_fsl *base = plat->reg; - while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) - schedule(); + if (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) + return -EAGAIN; barrier(); @@ -181,8 +181,8 @@ static void _lpuart_serial_putc(struct lpuart_serial_plat *plat, { struct lpuart_fsl *base = plat->reg; - while (!(__raw_readb(&base->us1) & US1_TDRE)) - schedule(); + if (!(__raw_readb(&base->us1) & US1_TDRE)) + return -EAGAIN; __raw_writeb(c, &base->ud); } diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c index 0fcd7e88acee..b2017c645565 100644 --- a/drivers/serial/serial_mvebu_a3700.c +++ b/drivers/serial/serial_mvebu_a3700.c @@ -40,8 +40,8 @@ static int mvebu_serial_putc(struct udevice *dev, const char ch) struct mvebu_plat *plat = dev_get_plat(dev); void __iomem *base = plat->base; - while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL) - ; + if (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL) + return -EAGAIN; writel(ch, base + UART_TX_REG); @@ -53,8 +53,8 @@ static int mvebu_serial_getc(struct udevice *dev) struct mvebu_plat *plat = dev_get_plat(dev); void __iomem *base = plat->base; - while (!(readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY)) - ; + if (!(readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY)) + return -EAGAIN; return readl(base + UART_RX_REG) & 0xff; } -- 2.20.1

4 6

[PATCH] serial: Do not write additional \r before \n for dm_serial drivers
by Pali Rohár 03 Jan '23

03 Jan '23

serial-uclass.c code already puts \r before \n for all dm_serial drivers. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/serial/serial_lpuart.c | 3 --- drivers/serial/serial_mpc8xx.c | 3 --- 2 files changed, 6 deletions(-) diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index ff576da516d4..07941c29ed74 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -349,9 +349,6 @@ static void _lpuart32_serial_putc(struct lpuart_serial_plat *plat, struct lpuart_fsl_reg32 *base = plat->reg; u32 stat; - if (c == '\n') - serial_putc('\r'); - while (true) { lpuart_read32(plat->flags, &base->stat, &stat); diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c index aeae6ae6cd25..808a40f503ea 100644 --- a/drivers/serial/serial_mpc8xx.c +++ b/drivers/serial/serial_mpc8xx.c @@ -176,9 +176,6 @@ static int serial_mpc8xx_putc(struct udevice *dev, const char c) cpm8xx_t __iomem *cpmp = &(im->im_cpm); struct serialbuffer __iomem *rtx; - if (c == '\n') - serial_mpc8xx_putc(dev, '\r'); - rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; /* Wait for last character to go. */ -- 2.20.1

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