January 2023 - U-Boot

[u-boot][PATCH v2 0/8] rawnand: omap_gpmc: driver model support
by Roger Quadros 04 Jan '23

04 Jan '23

Hi Michael & Dario, This series adds driver model support for rawnand: omap_gpmc and omap_elm drivers. This will enable the driver to be used on K2/K3 platforms as well. This series along with remaining patches required to get NAND working on AM6x EVM is available here https://github.com/rogerq/u-boot/commits/for-v2023.01/am64-nand-base-2.0 cheers, -roger Changelog: v2: - Fixed build warning and failures for am335x_guardian, chiliboard, and cm_t32 - use __maybe_unused struct nand_chip to fix build warning - make elm_probe() a NOP if ELM_BASE is defined. This should not interfere with existing platforms that don't use Driver Model for ELM driver. Roger Quadros (8): mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbt dt-bindings: mtd: Add ti,gpmc-nand DT binding documentation mtd: rawnand: omap_gpmc: support u-boot driver model mtd: rawnand: omap_gpmc: Add SPL NAND support mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC dt-bindings: mtd: Add ti,elm DT binding documentation mtd: rawnand: omap_elm: u-boot driver model support doc/device-tree-bindings/mtd/ti,elm.yaml | 72 +++ .../mtd/ti,gpmc-nand.yaml | 129 +++++ drivers/mtd/nand/raw/Kconfig | 9 +- drivers/mtd/nand/raw/Makefile | 2 +- drivers/mtd/nand/raw/nand_base.c | 18 +- drivers/mtd/nand/raw/omap_elm.c | 35 +- .../mtd => drivers/mtd/nand/raw}/omap_elm.h | 6 + drivers/mtd/nand/raw/omap_gpmc.c | 441 +++++++++++++----- 8 files changed, 604 insertions(+), 108 deletions(-) create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%) -- 2.34.1

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[PATCH v2 0/3] eficonfig: add vertical scroll support
by Masahisa Kojima 04 Jan '23

04 Jan '23

This series aims to add the vertical scroll for the eficonfig menu. Before adding scroll support, this series does the refactoring of change boot order implementation since it has own menu handling and it should be removed to improve maintenanceability. The eficonfig menu handles file selection for EFI load option and secure boot keys, it likely to enumerate tens of files. User can not select the file without scroll if theare are many files under the target directory. This series only modifies the eficonfig menus. Other menus such as bootmenu is not yet done. We need to enhance the U-Boot menu framework itself if we support other menus. Masahisa Kojima (3): eficonfig: refactor eficonfig_process_common function eficonfig: refactor change boot order implementation eficonfig: add vertical scroll support cmd/eficonfig.c | 383 +++++++++++++++++++++++++++++------------- cmd/eficonfig_sbkey.c | 18 +- include/efi_config.h | 17 +- include/efi_loader.h | 1 + 4 files changed, 296 insertions(+), 123 deletions(-) -- 2.17.1

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[PATCH v3] riscv: ae350: support openSBI 1.0+ which enable FW_PIC
by Rick Chen 04 Jan '23

04 Jan '23

Original openSBI (without FW_PIC) will relocate itself from 0x1000000 to 0x0. After openSBI added FW_PIC codes, it will not relocate any more and always run at 0x1000000. Hence, it may overlap with Kernel memory region. So it is necessary to change openSBI address from 0x1000000 to 0x0. More details can refer to commit cb052d771200 ("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+") Signed-off-by: Rick Chen <rick(a)andestech.com> Reviewed-by: Samuel Holland <samuel(a)sholland.org> --- Changes in v3 - fix typos --- board/AndesTech/ax25-ae350/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 36b67f0b52..4bb33b0793 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -25,7 +25,7 @@ config SPL_TEXT_BASE default 0x800000 config SPL_OPENSBI_LOAD_ADDR - default 0x01000000 + default 0x00000000 config SYS_FDT_BASE hex -- 2.17.1

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[PATCH v4] riscv: ae350: support OpenSBI 1.0+ which enable FW_PIC
by Rick Chen 04 Jan '23

04 Jan '23

Original OpenSBI (without FW_PIC) will relocate itself from 0x1000000 to 0x0. After OpenSBI added FW_PIC codes, it will not relocate any more and always run at 0x1000000. Hence, it may overlap with Kernel memory region. So it is necessary to change OpenSBI address from 0x1000000 to 0x0. More details can refer to commit cb052d771200 ("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+") Signed-off-by: Rick Chen <rick(a)andestech.com> Reviewed-by: Samuel Holland <samuel(a)sholland.org> Reviewed-by: Bin Meng <bmeng(a)tinylab.org> --- Changes in v4 - fix openSBI typo --- board/AndesTech/ax25-ae350/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 36b67f0b52..4bb33b0793 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -25,7 +25,7 @@ config SPL_TEXT_BASE default 0x800000 config SPL_OPENSBI_LOAD_ADDR - default 0x01000000 + default 0x00000000 config SYS_FDT_BASE hex -- 2.17.1

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[PATCH v2] riscv: ax25: bypass malloc when spl fit boots from ram
by Rick Chen 04 Jan '23

04 Jan '23

When fit image boots from ram, the payload will be prepared in the address of SPL_LOAD_FIT_ADDRESS. In spl fit generic flow, it will malloc another memory address and copy whole fit image to this malloc address. But it is un-necessary for booting from RAM. This patch improves this flow by declare the board_spl_fit_buffer_addr() to replace the original one. The larger image size (eq: Kernel Image 10~20MB), it can save more booting time. Also enhance memcpy function by checking source and destination address. If they are the same address, just return and don't copy data anymore. Signed-off-by: Rick Chen <rick(a)andestech.com> --- Changes in v2 - Move spl.c to board level instead of arch level --- arch/riscv/cpu/ax25/Makefile | 1 + arch/riscv/cpu/ax25/spl.c | 31 +++++++++++++++++++++++++++++++ arch/riscv/lib/memcpy.S | 2 ++ 3 files changed, 34 insertions(+) create mode 100644 arch/riscv/cpu/ax25/spl.c diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/ax25/Makefile index 318baccb09..f1c21eadd4 100644 --- a/arch/riscv/cpu/ax25/Makefile +++ b/arch/riscv/cpu/ax25/Makefile @@ -5,3 +5,4 @@ obj-y := cpu.o obj-y += cache.o +obj-y += spl.o diff --git a/arch/riscv/cpu/ax25/spl.c b/arch/riscv/cpu/ax25/spl.c new file mode 100644 index 0000000000..6bf357d26d --- /dev/null +++ b/arch/riscv/cpu/ax25/spl.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + */ +#include <common.h> +#include <cpu_func.h> +#include <hang.h> +#include <init.h> +#include <log.h> +#include <spl.h> +#include <asm/global_data.h> +#include <asm/system.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if CONFIG_IS_ENABLED(RAM_SUPPORT) +struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size) +{ + return (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + offset); +} + +void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len) +{ + void *buf; + + buf = spl_get_load_buffer(0, sectors * bl_len); + + return buf; +} +#endif diff --git a/arch/riscv/lib/memcpy.S b/arch/riscv/lib/memcpy.S index 00672c19ad..9884077c93 100644 --- a/arch/riscv/lib/memcpy.S +++ b/arch/riscv/lib/memcpy.S @@ -9,6 +9,7 @@ /* void *memcpy(void *, const void *, size_t) */ ENTRY(__memcpy) WEAK(memcpy) + beq a0, a1, .copy_end /* Save for return value */ mv t6, a0 @@ -121,6 +122,7 @@ WEAK(memcpy) 2: mv a0, t6 +.copy_end: ret .Lmisaligned_word_copy: -- 2.17.1

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[PATCH v2] riscv: ae350: support openSBI 1.0+ which enable FW_PIC
by Rick Chen 04 Jan '23

04 Jan '23

Original openSBI (without FW_PIC) will relocate itselt from 0x1000000 to 0x0. After openSBI added FW_PIC codes, it will not relocate any more and alaways run at 0x1000000. Hence, it may overlap with Kernel memory region. So it is necessary to change openSBI address from 0x1000000 to 0x0. More details can refer to commit cb052d771200 ("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+") Signed-off-by: Rick Chen <rick(a)andestech.com> --- Changes in v2 - fix typo - describe why is this change a must have --- board/AndesTech/ax25-ae350/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 36b67f0b52..4bb33b0793 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -25,7 +25,7 @@ config SPL_TEXT_BASE default 0x800000 config SPL_OPENSBI_LOAD_ADDR - default 0x01000000 + default 0x00000000 config SYS_FDT_BASE hex -- 2.17.1

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[PATCH 0/4] sunxi: minor cleanups and refactoring
by Andre Przywara 04 Jan '23

04 Jan '23

Just a collection of patches I came up with while trying to refactor and reorganise the Allwinner SPL code. Patch 1/4 aims to replace Tom's patch [1], which made CONFIG_MMC_SUNXI_SLOT a proper Kconfig variable. A closer inspection reveals that we don't really need that at all. Patch 2 and 3 are just random cleanups. Patch 4 is a low hanging fruit in the effort to separate ARM specific code from strictly Allwinner platform routines. It also removes some #ifdef's. Please have a look! Cheers, Andre [1] https://lore.kernel.org/u-boot/20221127152536.1556469-6-trini@konsulko.com/ Andre Przywara (4): sunxi: remove unused CONFIG_MMC_SUNXI_SLOT sunxi: remove bogus mmc_pinmux_setup() prototype sunxi: board: annotate #endif lines sunxi: move arch timer setup out of board/ directory arch/arm/mach-sunxi/Makefile | 4 +++ arch/arm/mach-sunxi/arch_timer.c | 39 +++++++++++++++++++++ arch/arm/mach-sunxi/board.c | 22 +++++++----- arch/arm/mach-sunxi/clock_sun6i.c | 4 +-- board/sunxi/board.c | 58 +++++++------------------------ include/configs/sunxi-common.h | 3 -- scripts/config_whitelist.txt | 1 - 7 files changed, 72 insertions(+), 59 deletions(-) create mode 100644 arch/arm/mach-sunxi/arch_timer.c -- 2.35.5

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[PATCH 1/1] socfpga_de1_soc: Specify Uart clock in dts
by Alexander Daum 03 Jan '23

03 Jan '23

UART output was broken since commit c402e8170245 ("dts: arm: socfpga: merge gen5 devicetrees from linux"), when uart clocks where removed from socfpga.dtsi This patch specifies the uart clock for DE1-SoC board. Signed-off-by: Alexander Daum <alexander.daum(a)mailbox.org> --- arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts index ff1e61e0cb..f4935d0689 100644 --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts @@ -76,6 +76,7 @@ &uart0 { u-boot,dm-pre-reloc; + clock-frequency = <100000000>; }; &watchdog0 { -- 2.39.0

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[PATCH v2 0/3] Register at91 OHCI into DM and add SAMA7 USB PHY's
by Sergiu Moga 03 Jan '23

03 Jan '23

This patch series originates from a bigger patch series: https://lists.denx.de/pipermail/u-boot/2022-December/502865.html Register ohci-at91 driver into Driver Model. In order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of the USB 2.0 PHY drivers were required. v1 -> v2: - squashed previous 3/4 patch into 2/4 patch - used *_bulk API's - re-wrote at91_for_each_port - use dev_read_u32_default for pdata->ports Sergiu Moga (3): phy: at91: Add support for the USB 2.0 PHY's of SAMA7 usb: ohci-at91: Enable OHCI functionality and register into DM usb: ohci-at91: Add USB PHY functionality drivers/phy/Kconfig | 10 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-sama7-usb.c | 90 ++++++++++++++ drivers/phy/phy-sama7-utmi-clk.c | 202 +++++++++++++++++++++++++++++++ drivers/usb/host/Kconfig | 1 + drivers/usb/host/ohci-at91.c | 185 ++++++++++++++++++++++++++++ 6 files changed, 489 insertions(+) create mode 100644 drivers/phy/phy-sama7-usb.c create mode 100644 drivers/phy/phy-sama7-utmi-clk.c -- 2.34.1

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[PATCH 1/2] tee: optee: don't fail probe because of optee-rng
by Etienne Carriere 03 Jan '23

03 Jan '23

Fixes optee-rng driver bind sequence in optee driver to print a warning message but not report an error status when a optee-rng service driver fails to be bound as the optee driver itself is still fully functional. Signed-off-by: Etienne Carriere <etienne.carriere(a)linaro.org> --- drivers/tee/optee/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index 9240277579..604fd1414f 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -834,7 +834,7 @@ static int optee_probe(struct udevice *dev) */ ret = device_bind_driver(dev, "optee-rng", "optee-rng", NULL); if (ret) - return ret; + dev_warn(dev, "ftpm_tee failed to bind: %d\n", ret); } return 0; -- 2.25.1

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