July 2022 - U-Boot

[PATCH 1/3] defconfigs: am57xx_hs_evm: Sync HS and non-HS defconfigs
by Andrew Davis 25 Jul '22

25 Jul '22

Sync new additions to non-HS defconfig with HS defconfig. Signed-off-by: Andrew Davis <afd(a)ti.com> --- configs/am57xx_hs_evm_defconfig | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index aa0b466d95..4b01b60513 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -5,7 +5,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" +CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 @@ -41,6 +41,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y @@ -55,7 +56,7 @@ CONFIG_BOOTP_DNS2=y CONFIG_CMD_AVB=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk" +CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -68,9 +69,15 @@ CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y CONFIG_DWC_AHCI=y +CONFIG_CLK=y +CONFIG_CLK_CDCE9XX=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 -- 2.36.1

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[PATCH] defconfigs: Add a config for AM43xx HS EVM with QSPI Boot support
by Andrew Davis 25 Jul '22

25 Jul '22

On AM43xx HS devices, QSPI boot is XIP and we use a single stage bootloader. Add a defconfig for this. Signed-off-by: Andrew Davis <afd(a)ti.com> --- MAINTAINERS | 1 + configs/am43xx_hs_evm_qspi_defconfig | 74 ++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+) create mode 100644 configs/am43xx_hs_evm_qspi_defconfig diff --git a/MAINTAINERS b/MAINTAINERS index b85629d9b1..39c274c99c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1363,6 +1363,7 @@ F: arch/arm/mach-k3/config_secure.mk F: configs/am335x_hs_evm_defconfig F: configs/am335x_hs_evm_uart_defconfig F: configs/am43xx_hs_evm_defconfig +F: configs/am43xx_hs_evm_qspi_defconfig F: configs/am57xx_hs_evm_defconfig F: configs/am57xx_hs_evm_usb_defconfig F: configs/dra7xx_hs_evm_defconfig diff --git a/configs/am43xx_hs_evm_qspi_defconfig b/configs/am43xx_hs_evm_qspi_defconfig new file mode 100644 index 0000000000..5cf447704d --- /dev/null +++ b/configs/am43xx_hs_evm_qspi_defconfig @@ -0,0 +1,74 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +# CONFIG_SYS_THUMB_BUILD is not set +CONFIG_ARCH_OMAP2PLUS=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_ISW_ENTRY_ADDR=0x300018e0 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x110000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am43x-epos-evm" +CONFIG_AM43XX=y +CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 +CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 +CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 +CONFIG_ENV_OFFSET_REDUND=0x120000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 +CONFIG_QSPI_BOOT=y +CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_BOARD_EARLY_INIT_F=y +# CONFIG_MISC_INIT_R is not set +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_ASKENV=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_DNS2=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_OF_LIST="am4372-generic am437x-sk-evm am437x-idk-evm" +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 +CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 +CONFIG_DM=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_MMC_OMAP_HS=y +CONFIG_SF_DEFAULT_SPEED=48000000 +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_MII=y +CONFIG_DRIVER_TI_CPSW=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_TI_QSPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_OMAP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_OMAP=y +CONFIG_USB_DWC3_PHY_OMAP=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 +CONFIG_USB_GADGET_DOWNLOAD=y -- 2.36.1

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[PATCH 1/2] arm: mach-k3: Only build init files for SPL
by Andrew Davis 25 Jul '22

25 Jul '22

The content of these files are only used in SPL builds. The contents are already ifdef for the same, remove that and only include the whole file in the build when building for SPL. Signed-off-by: Andrew Davis <afd(a)ti.com> --- arch/arm/mach-k3/Makefile | 13 ++++++++----- arch/arm/mach-k3/am625_init.c | 4 ---- arch/arm/mach-k3/am642_init.c | 2 -- arch/arm/mach-k3/am6_init.c | 2 -- arch/arm/mach-k3/j721e_init.c | 2 -- arch/arm/mach-k3/j721s2_init.c | 3 --- 6 files changed, 8 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 8459bef93b..e17ad22141 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -3,16 +3,19 @@ # Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ # Lokesh Vutla <lokeshvutla(a)ti.com> -obj-$(CONFIG_SOC_K3_AM6) += am6_init.o -obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o j721e/ j7200/ -obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o j721s2/ -obj-$(CONFIG_SOC_K3_AM642) += am642_init.o -obj-$(CONFIG_SOC_K3_AM625) += am625_init.o am62x/ +obj-$(CONFIG_SOC_K3_J721E) += j721e/ j7200/ +obj-$(CONFIG_SOC_K3_J721S2) += j721s2/ +obj-$(CONFIG_SOC_K3_AM625) += am62x/ obj-$(CONFIG_ARM64) += arm64-mmu.o obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o obj-$(CONFIG_TI_SECURE_DEVICE) += security.o obj-$(CONFIG_ARM64) += cache.o ifeq ($(CONFIG_SPL_BUILD),y) +obj-$(CONFIG_SOC_K3_AM6) += am6_init.o +obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o +obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o +obj-$(CONFIG_SOC_K3_AM642) += am642_init.o +obj-$(CONFIG_SOC_K3_AM625) += am625_init.o obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o endif obj-y += common.o diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c index 0d9525992b..25b68e057f 100644 --- a/arch/arm/mach-k3/am625_init.c +++ b/arch/arm/mach-k3/am625_init.c @@ -15,8 +15,6 @@ #include <dm/uclass-internal.h> #include <dm/pinctrl.h> -#if defined(CONFIG_SPL_BUILD) - /* * This uninitialized global variable would normal end up in the .bss section, * but the .bss is cleared between writing and reading this variable, so move @@ -267,5 +265,3 @@ u32 spl_boot_device(void) return bootmedia; } - -#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index b16de9c9f0..8428322ed9 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -23,7 +23,6 @@ #include <mmc.h> #include <dm/root.h> -#if defined(CONFIG_SPL_BUILD) #define MCU_CTRL_MMR0_BASE 0x04500000 #define CTRLMMR_MCU_RST_CTRL 0x04518170 @@ -348,7 +347,6 @@ u32 spl_boot_device(void) else return __get_backup_bootmedia(devstat); } -#endif #if defined(CONFIG_SYS_K3_SPL_ATF) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 7992918adc..6e833a6641 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -26,7 +26,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW #ifdef CONFIG_TI_SECURE_DEVICE struct fwl_data main_cbass_fwls[] = { @@ -359,7 +358,6 @@ u32 spl_boot_device(void) else return __get_backup_bootmedia(devstat); } -#endif #ifdef CONFIG_SYS_K3_SPL_ATF diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index e56ca6d0f5..cb9f7eebec 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -24,7 +24,6 @@ #include <mmc.h> #include <remoteproc.h> -#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW #ifdef CONFIG_TI_SECURE_DEVICE struct fwl_data cbass_hc_cfg0_fwls[] = { @@ -384,7 +383,6 @@ u32 spl_boot_device(void) else return __get_backup_bootmedia(main_devstat); } -#endif #ifdef CONFIG_SYS_K3_SPL_ATF diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c index 2e64e44a80..12da8136f9 100644 --- a/arch/arm/mach-k3/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2_init.c @@ -22,8 +22,6 @@ #include <mmc.h> #include <remoteproc.h> -#ifdef CONFIG_SPL_BUILD - static void ctrl_mmr_unlock(void) { /* Unlock all WKUP_CTRL_MMR0 module registers */ @@ -255,7 +253,6 @@ u32 spl_boot_device(void) else return __get_backup_bootmedia(main_devstat); } -#endif #define J721S2_DEV_MCU_RTI0 295 #define J721S2_DEV_MCU_RTI1 296 -- 2.36.1

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[PATCH] arm: dts: db410c/db820c: Fix SPMI addresses
by Stephan Gerhold 25 Jul '22

25 Jul '22

The Qualcomm device trees in U-Boot are currently not consistent with the upstream DTs used in the Linux kernel. While some bindings are similar to the official specification in the Linux kernel, several nodes have subtle differences, e.g. the "compatible"s or the exact specification of memory registers. This means that some of the Qualcomm-related U-Boot drivers are not compatible with the Linux DT (and vice versa). The SPMI node is one such example: the "core" region starts at 0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at 0x0200f800. The end result is normally the same, since the Linux SPMI driver simply adds the 0x800 internally. However, commit f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support") imported this behavior into the U-Boot driver, without adjusting the DB410c/DB820c device trees. This means that the 0x800 offset is now added twice, breaking all SPMI read/write operations: Failed to find PMIC pon node. Check device tree Failed to find pm8916_gpios@c000 node. USB init failed: -6 starting USB... Bus ehci@78d9000: Failed to find pm8916_gpios@c000 node. probe failed, error -6 No working controllers found While the mistake is strictly speaking in the spmi-msm driver, fix the issue by making the SPMI nodes in the DB410c/DB820c consistent with the upstream Linux DT instead. Ideally we should even go a step further by fixing the remaining uses of custom bindings in the U-Boot drivers and moving to using the Linux DTs as-is. This would likely avoid such mistakes in the future and would also make the porting process much easier. Cc: Dzmitry Sankouski <dsankouski(a)gmail.com> Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support") Signed-off-by: Stephan Gerhold <stephan(a)gerhold.net> --- Sorry for sending this literally a few days after the U-Boot release. This change has been sitting in my local U-Boot clone for a couple of months already (it's broken at least since v2022.01) but I got caught up in other work and completely forgot about it. I guess no one else is actively testing U-Boot on DB410c/DB820c. :/ --- arch/arm/dts/dragonboard410c.dts | 9 +++++++-- arch/arm/dts/dragonboard820c.dts | 11 +++++++---- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index 7e56140df2..50523712cb 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -137,9 +137,14 @@ }; }; - spmi@200f000 { + spmi_bus: spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; + reg = <0x0200f000 0x001000>, + <0x02400000 0x400000>, + <0x02c00000 0x400000>, + <0x03800000 0x200000>, + <0x0200a000 0x002100>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; #address-cells = <0x1>; #size-cells = <0x1>; pmic0: pm8916@0 { diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 1114ddd7d3..b72a2471cf 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -93,11 +93,14 @@ clock-frequency = <200000000>; }; - spmi@400f000 { + spmi_bus: spmi@400f000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x400f800 0x200>, - <0x4400000 0x400000>, - <0x4c00000 0x400000>; + reg = <0x0400f000 0x1000>, + <0x04400000 0x800000>, + <0x04c00000 0x800000>, + <0x05800000 0x200000>, + <0x0400a000 0x002100>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; #address-cells = <0x1>; #size-cells = <0x1>; -- 2.37.0

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[PATCH] board: ti: am65x: Do not disable SA2UL in DT
by Andrew Davis 25 Jul '22

25 Jul '22

This is no longer needed as the SA2UL can now be shared with Linux. Leave the SA2UL DT node enabled. Signed-off-by: Andrew Davis <afd(a)ti.com> --- board/ti/am65x/evm.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 7182a8cad1..8a0a506a3e 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -115,16 +115,6 @@ int ft_board_setup(void *blob, struct bd_info *bd) return ret; } -#if defined(CONFIG_TI_SECURE_DEVICE) - /* Make Crypto HW reserved for secure world use */ - ret = fdt_disable_node(blob, "/bus@100000/crypto@4e00000"); - if (ret < 0) - ret = fdt_disable_node(blob, - "/interconnect@100000/crypto@4E00000"); - if (ret) - printf("%s: disabling SA2UL failed %d\n", __func__, ret); -#endif - return 0; } #endif -- 2.36.1

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[PATCH] armv8: mach-k3: correct define checking for AM625/AM642 memory maps
by Matt Ranostay 25 Jul '22

25 Jul '22

Using CONFIG_IS_ENABLED breaks accessing memory map structure when doing a A53 SPL build for AM625 and AM642 platforms. This is due to 'abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y'' in which there is no CONFIG_SPL_SOC_K3_AM625/CONFIG_SPL_SOC_K3_AM642 defined in the configuration. For the A53 SPL builds on these platform to access the memory mapping which it will need for enabling the mmu/cache it must use #if defined(X) checks and not CONFIG_IS_ENABLED. Cc: Suman Anna <s-anna(a)ti.com> Cc: Neha Francis <n-francis(a)ti.com> Signed-off-by: Matt Ranostay <mranostay(a)ti.com> --- arch/arm/mach-k3/arm64-mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c index 12cb89335ad..c43c07ce7fa 100644 --- a/arch/arm/mach-k3/arm64-mmu.c +++ b/arch/arm/mach-k3/arm64-mmu.c @@ -222,7 +222,7 @@ struct mm_region *mem_map = j721s2_mem_map; #endif /* CONFIG_SOC_K3_J721S2 */ -#if (CONFIG_IS_ENABLED(SOC_K3_AM642) || CONFIG_IS_ENABLED(SOC_K3_AM625)) +#if defined(CONFIG_SOC_K3_AM642) || defined(CONFIG_SOC_K3_AM625) /* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */ #define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3) -- 2.36.1

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[PATCH] arm: dts: mt7622: remove default pinctrl of uart0
by Weijie Gao 25 Jul '22

25 Jul '22

Currently u-boot running on mt7622 will print an warning log at beginning: > serial_mtk serial@11002000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 It turns out that the pinctrl uclass can't work properly in board_f stage. Since the uart0 is the default UART device used by bootrom, and will be initialized in both bootrom and tf-a bl2. It's ok not to setup pinctrl for uart0 in u-boot. This patch removes the default pinctrl of uart0 to suppress the unwanted warning. Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- arch/arm/dts/mt7622-bananapi-bpi-r64.dts | 2 -- arch/arm/dts/mt7622-rfb.dts | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts index 4f2f04851d..2ac933a6ac 100644 --- a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts @@ -182,8 +182,6 @@ }; &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; status = "okay"; }; diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts index c2f1ad2011..30a9137407 100644 --- a/arch/arm/dts/mt7622-rfb.dts +++ b/arch/arm/dts/mt7622-rfb.dts @@ -189,8 +189,6 @@ }; &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; status = "okay"; }; -- 2.17.1

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[PATCH] arm: dts: k3-am64-ddr fix typo causing DDR4 register corruption
by Anand Gadiyar 25 Jul '22

25 Jul '22

The entry for DDRSS_PI_321_DATA was accidentally repeated leading to the last few PI registers being incorrectly programmed. Fix this. Reported-by: Bin Liu <b-liu(a)ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr(a)ti.com> Signed-off-by: Anand Gadiyar <gadiyar(a)ti.com> --- arch/arm/dts/k3-am64-ddr.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/dts/k3-am64-ddr.dtsi b/arch/arm/dts/k3-am64-ddr.dtsi index 8324b389e0..d651093521 100644 --- a/arch/arm/dts/k3-am64-ddr.dtsi +++ b/arch/arm/dts/k3-am64-ddr.dtsi @@ -768,7 +768,6 @@ DDRSS_PI_319_DATA DDRSS_PI_320_DATA DDRSS_PI_321_DATA - DDRSS_PI_321_DATA DDRSS_PI_322_DATA DDRSS_PI_323_DATA DDRSS_PI_324_DATA -- 2.34.1

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[PATCH 1/2] board: ti: am335x: Enable spi0 bus on SanCloud BBE Lite
by Paul Barker 25 Jul '22

25 Jul '22

The SanCloud BBE Lite has a Micron Authenta flash device connected to the spi0 bus. Signed-off-by: Paul Barker <paul.barker(a)sancloud.com> --- board/ti/am335x/mux.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index fed737fa099a..7d31adec1421 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -401,8 +401,13 @@ void enable_board_pin_mux(void) configure_module_pin_mux(mmc0_pin_mux_sk_evm); } else if (board_is_bone_lt()) { if (board_is_bben()) { + char subtype_id = board_ti_get_config()[1]; + /* SanCloud Beaglebone LT Enhanced pinmux */ configure_module_pin_mux(rgmii1_pin_mux); + + if (subtype_id == 'L') + configure_module_pin_mux(spi0_pin_mux); } else { /* Beaglebone LT pinmux */ configure_module_pin_mux(mii1_pin_mux); base-commit: 0cc846dafcf6f6270c6587d6fe79011834d6e49a -- 2.25.1

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[PATCH] ti: keystone: Don't select GPIO_EXTRA_HEADER
by Michal Simek 25 Jul '22

25 Jul '22

keystone doesn't have custom gpio.h that's why don't select GPIO_EXTRA_HEADER which points to it. Logic in arch/arm/include/asm/gpio.h is very clear #ifdef CONFIG_GPIO_EXTRA_HEADER #include <asm/arch/gpio.h> #endif #include <asm-generic/gpio.h> Where it is visible that there is no gpio.h in platform headers: $ ls arch/arm/mach-keystone/include/mach/ clock_defs.h clock-k2e.h clock-k2hk.h ddr3.h hardware-k2e.h hardware-k2hk.h i2c_defs.h mon.h mux-k2g.h xhci-keystone.h clock.h clock-k2g.h clock-k2l.h hardware.h hardware-k2g.h hardware-k2l.h mmc_host_def.h msmc.h psc_defs.h Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/arm/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ef79fc3a0a76..ac3c2ab2e593 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -829,7 +829,6 @@ config ARCH_KEYSTONE select CMD_POWEROFF select CPU_V7A select DDR_SPD - select GPIO_EXTRA_HEADER select SUPPORT_SPL select SYS_ARCH_TIMER select SYS_THUMB_BUILD -- 2.36.1

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