July 2022 - U-Boot

Fwd: New Defects reported by Coverity Scan for Das U-Boot
by Heinrich Schuchardt 26 Jul '22

26 Jul '22

Hello Tom, could you, please, have a look at the problems reported by Coverity concerning code introduced by you into U-Boot. For SHA256_Update_recycle() I guess you just have to change the signature of the function to SHA256_Update_recycled (SHA256_CTX *ctx, unsigned char *block, size_t len) Looking at https://scan8.scan.coverity.com/reports.htm#v40863/p10710/fileInstanceId=59… https://scan8.scan.coverity.com/reports.htm#v40863/p10710/fileInstanceId=59… and https://scan8.scan.coverity.com/reports.htm#v40863/p10710/fileInstanceId=59… I think the issues are false positives: Coverity ignores that if the sha256_update() is called will length < 64 sha256_process() will be called with blocks = 0 and will not access the buffer. Best regards Heinrich -------- Forwarded Message -------- Subject: New Defects reported by Coverity Scan for Das U-Boot Date: Tue, 26 Jul 2022 00:49:17 +0000 (UTC) From: scan-admin(a)coverity.com To: xypron.glpk(a)gmx.de Hi, Please find the latest report on new defect(s) introduced to Das U-Boot found with Coverity Scan. 3 new defect(s) introduced to Das U-Boot found with Coverity Scan. 2 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 3 of 3 defect(s) ** CID 355366: (OVERRUN) ________________________________________________________________________________________________________ *** CID 355366: (OVERRUN) /lib/crypt/crypt-sha256.c: 104 in SHA256_Update_recycled() 98 SHA256_Update_recycled (SHA256_CTX *ctx, 99 unsigned char block[32], size_t len) 100 { 101 size_t cnt; 102 for (cnt = len; cnt >= 32; cnt -= 32) 103 SHA256_Update (ctx, block, 32); >>> CID 355366: (OVERRUN) >>> Overrunning buffer pointed to by "(void const *)block" of 32 bytes by passing it to a function which accesses it at byte offset 63. 104 SHA256_Update (ctx, block, cnt); 105 } 106 107 void 108 crypt_sha256crypt_rn (const char *phrase, size_t phr_size, 109 const char *setting, size_t ARG_UNUSED (set_size), /lib/crypt/crypt-sha256.c: 103 in SHA256_Update_recycled() 97 static void 98 SHA256_Update_recycled (SHA256_CTX *ctx, 99 unsigned char block[32], size_t len) 100 { 101 size_t cnt; 102 for (cnt = len; cnt >= 32; cnt -= 32) >>> CID 355366: (OVERRUN) >>> Overrunning buffer pointed to by "(void const *)block" of 32 bytes by passing it to a function which accesses it at byte offset 63. 103 SHA256_Update (ctx, block, 32); 104 SHA256_Update (ctx, block, cnt); 105 } 106 107 void 108 crypt_sha256crypt_rn (const char *phrase, size_t phr_size, ** CID 355365: Memory - corruptions (OVERRUN) ________________________________________________________________________________________________________ *** CID 355365: Memory - corruptions (OVERRUN) /lib/crypt/crypt-sha256.c: 212 in crypt_sha256crypt_rn() 206 characters and it ends at the first `$' character (for 207 compatibility with existing implementations). */ 208 SHA256_Update (ctx, salt, salt_size); 209 210 /* Add for any character in the phrase one byte of the alternate sum. */ 211 for (cnt = phr_size; cnt > 32; cnt -= 32) >>> CID 355365: Memory - corruptions (OVERRUN) >>> Overrunning buffer pointed to by "(void const *)result" of 32 bytes by passing it to a function which accesses it at byte offset 63. 212 SHA256_Update (ctx, result, 32); 213 SHA256_Update (ctx, result, cnt); 214 215 /* Take the binary representation of the length of the phrase and for every 216 1 add the alternate sum, for every 0 the phrase. */ 217 for (cnt = phr_size; cnt > 0; cnt >>= 1) ** CID 355364: (OVERRUN) ________________________________________________________________________________________________________ *** CID 355364: (OVERRUN) /lib/sha256.c: 259 in sha256_finish() 253 PUT_UINT32_BE(low, msglen, 4); 254 255 last = ctx->total[0] & 0x3F; 256 padn = (last < 56) ? (56 - last) : (120 - last); 257 258 sha256_update(ctx, sha256_padding, padn); >>> CID 355364: (OVERRUN) >>> Overrunning array "msglen" of 8 bytes by passing it to a function which accesses it at byte offset 63. 259 sha256_update(ctx, msglen, 8); 260 261 PUT_UINT32_BE(ctx->state[0], digest, 0); 262 PUT_UINT32_BE(ctx->state[1], digest, 4); 263 PUT_UINT32_BE(ctx->state[2], digest, 8); 264 PUT_UINT32_BE(ctx->state[3], digest, 12); /lib/sha256.c: 259 in sha256_finish() 253 PUT_UINT32_BE(low, msglen, 4); 254 255 last = ctx->total[0] & 0x3F; 256 padn = (last < 56) ? (56 - last) : (120 - last); 257 258 sha256_update(ctx, sha256_padding, padn); >>> CID 355364: (OVERRUN) >>> Overrunning array "msglen" of 8 bytes by passing it to a function which accesses it at byte offset 63. 259 sha256_update(ctx, msglen, 8); 260 261 PUT_UINT32_BE(ctx->state[0], digest, 0); 262 PUT_UINT32_BE(ctx->state[1], digest, 4); 263 PUT_UINT32_BE(ctx->state[2], digest, 8); 264 PUT_UINT32_BE(ctx->state[3], digest, 12); ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… To manage Coverity Scan email notifications for "xypron.glpk(a)gmx.de", click https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

1 0

[PATCH v2 0/8] Add support for the i.MXRT1170
by Jesse Taube 26 Jul '22

26 Jul '22

This patchset contains: - i.MXRT1170 clock driver adaption - i.MXRT1170-evk basic support Jesse Taube (8): imx: imxrt1170-evk: Add support for the NXP i.MXRT1170-EVK ARM: dts: imxrt11170-pinfunc: Add pinctrl binding header dt-bindings: imx: Add clock binding for i.MXRT1170 clk: imx: Add i.MXRT11xx pllv3 variant clk: imx: Add initial support for i.MXRT1170 clock driver RAM: Add changes for i.MXRT11xx series ARM: dts: imx: add i.MXRT1170-EVK support ARM: imxrt1170_defconfig: Add i.MXRT1170 defconfig arch/arm/dts/Makefile | 3 +- arch/arm/dts/imxrt1170-evk-u-boot.dtsi | 94 + arch/arm/dts/imxrt1170-evk.dts | 250 +++ arch/arm/dts/imxrt1170-pinfunc.h | 1561 +++++++++++++++++ arch/arm/dts/imxrt1170.dtsi | 257 +++ arch/arm/include/asm/arch-imx/cpu.h | 1 + arch/arm/mach-imx/imxrt/Kconfig | 9 + arch/arm/mach-imx/imxrt/soc.c | 2 + board/freescale/imxrt1170-evk/Kconfig | 22 + board/freescale/imxrt1170-evk/MAINTAINERS | 7 + board/freescale/imxrt1170-evk/Makefile | 6 + board/freescale/imxrt1170-evk/imximage.cfg | 32 + board/freescale/imxrt1170-evk/imxrt1170-evk.c | 80 + configs/imxrt1170-evk_defconfig | 67 + drivers/clk/imx/Kconfig | 16 + drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-imxrt1170.c | 221 +++ drivers/clk/imx/clk-pllv3.c | 56 +- drivers/clk/imx/clk.h | 1 + drivers/ram/imxrt_sdram.c | 9 + include/configs/imxrt1170-evk.h | 37 + include/dt-bindings/clock/imxrt1170-clock.h | 48 + include/dt-bindings/memory/imxrt-sdram.h | 1 + 23 files changed, 2777 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/imxrt1170-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imxrt1170-evk.dts create mode 100644 arch/arm/dts/imxrt1170-pinfunc.h create mode 100644 arch/arm/dts/imxrt1170.dtsi create mode 100644 board/freescale/imxrt1170-evk/Kconfig create mode 100644 board/freescale/imxrt1170-evk/MAINTAINERS create mode 100644 board/freescale/imxrt1170-evk/Makefile create mode 100644 board/freescale/imxrt1170-evk/imximage.cfg create mode 100644 board/freescale/imxrt1170-evk/imxrt1170-evk.c create mode 100644 configs/imxrt1170-evk_defconfig create mode 100644 drivers/clk/imx/clk-imxrt1170.c create mode 100644 include/configs/imxrt1170-evk.h create mode 100644 include/dt-bindings/clock/imxrt1170-clock.h -- 2.36.1

4 13

[PATCH 0/8] U-boot: fs: add generic unaligned read offset handling
by Qu Wenruo 26 Jul '22

26 Jul '22

[CHANGELOG] RFC->v1: - More (manual) testing Unfortunately, in the latest master (75967970850a), the fs-tests.sh always seems to hang at preparing the fs image. Thus still has to do manual testing, tested btrfs, ext4 and fat, with aligned and unaligned read, also added soft link read, all looks fine here. Extra testing is still appreciated. - Two more btrfs specific bug fixes All exposed during manual tests - Remove the tailing unaligned block handling In fact, all fses can easily handle such case, just a min() call is enough. - Remove the support for sandboxfs Since it's using read() calls, really no need to do block alignment check. - Enhanced blocksize check Ensure the returned blocksize is not only non-error, but also non-zero. This patchset can be fetched from github: https://github.com/adam900710/u-boot/tree/fs_unaligned_read [BACKGROUND] Unlike FUSE/Kernel which always pass aligned read range, U-boot fs code just pass the request range to underlying fses. Under most case, this works fine, as U-boot only really needs to read the whole file (aka, 0 for both offset and len, len will be later determined using file size). But if some advanced user/script wants to extract kernel/initramfs from combined image, we may need to do unaligned read in that case. [ADVANTAGE] This patchset will handle unaligned read range in _fs_read(): - Get blocksize of the underlying fs - Read the leading block contianing the unaligned range The full block will be stored in a local buffer, then only copy the bytes in the unaligned range into the destination buffer. If the first block covers the whole range, we just call it aday. - Read the remaining range which starts at block aligned offset For most common case, which is 0 offset and 0 len, the code will not be changed at all. Just one extra get_blocksize() call, and for FAT/Btrfs/EROFS they all have cached blocksize, thus it takes almost no extra cost. Although for EXT4, it doesn't seem to cache the blocksize globally, thus has to do a path resolve and grab the blocksize. [DISADVANTAGE] The involved problem is: - Extra path resolving All those supported fs may have to do one extra path resolve if the read offset is not aligned. For EXT4, it will do one extra path resolve just to grab the blocksize. For data read which starts at offset 0 (the most common case), it should cause *NO* difference in performance. As the extra handling is only for unaligned offset. The common path is not really modified. [SUPPORTED FSES] - Btrfs (manually tested*) - Ext4 (manually tested) - FAT (manually tested) - Erofs - ubifs (unable to test, due to compile failure) *: Failed to get the test cases run, thus have to go sandbox mode, and attach an image with target fs, load the target file (with unaligned range) and compare the result using md5sum. For EXT4/FAT, they may need extra cleanup, as their existing unaligned range handling is no longer needed anymore, cleaning them up should free more code lines than the added one. Just not confident enough to modify them all by myself. [UNSUPPORTED FSES] - Squashfs They don't support non-zero offset, thus it can not handle the block aligned range. Need extra help to add block aligned offset support. - Semihostfs - Sandboxfs They all use read() directly, no need to do alignment check at all. Extra testing/feedback is always appreciated. Qu Wenruo (8): fs: fat: unexport file_fat_read_at() fs: btrfs: fix a bug which no data get read if the length is not 0 fs: btrfs: fix a crash if specified range is beyond file size fs: btrfs: move the unaligned read code to _fs_read() for btrfs fs: ext4: rely on _fs_read() to handle leading unaligned block read fs: fat: rely on higher layer to get block aligned read range fs: ubifs: rely on higher layer to do unaligned read fs: erofs: add unaligned read range handling fs/btrfs/btrfs.c | 33 ++++++++--- fs/btrfs/inode.c | 89 +++-------------------------- fs/erofs/internal.h | 1 + fs/erofs/super.c | 6 ++ fs/ext4/ext4fs.c | 22 +++++++ fs/fat/fat.c | 17 +++++- fs/fs.c | 130 +++++++++++++++++++++++++++++++++++++++--- fs/ubifs/ubifs.c | 13 +++-- include/btrfs.h | 1 + include/erofs.h | 1 + include/ext4fs.h | 1 + include/fat.h | 3 +- include/ubifs_uboot.h | 1 + 13 files changed, 212 insertions(+), 106 deletions(-) -- 2.36.1

4 12

[PATCH v4 00/14] Port manufacturer specific initialization
by Dario Binacchi 26 Jul '22

26 Jul '22

In preparation of re-sync of mtd stack, we opt to move the current stack slowly in order to have a more easy sync and test. We would like to prepare uboot to support no-jedec and no-onfi compliant nand so we need to clean up a bit the code we have now and upstream some of the support. In this series we expect no functional change Tested on: - imx6ull Micron MT29F2G08ABAGAH4 - imx8mn Macronix MX30LF4G18AC Changes in v4: - Add the patch "mtd: nand: Fix MediaTek MT7621 SoC build" to the series. Changes in v3: - Use commit sha1 with 13 digits. - Use commit sha1 with 13 digits. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Fix code style warnings raised by patman. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Fix code style warnings raised by patman. - Add the SPDX-License-Identifier tag. - Use commit sha1 with 13 digits. - Add the SPDX-License-Identifier tag. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Add the SPDX-License-Identifier tag. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Add the SPDX-License-Identifier tag. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Add the SPDX-License-Identifier tag. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Add the SPDX-License-Identifier tag. - Fix code style warnings raised by patman. - Use commit sha1 with 13 digits. - Use commit sha1 with 13 digits. - Wrap commit description to a maximum of 75 chars. Changes in v2: - Use short-commit form. - Remove linux info. Uboot seems that backport without add this extra information. - Use short-commit form. - Remove linux info. Uboot seems that backport without add this extra information. - Use short-commit form. - Remove linux info. Uboot seems that backport without add this extra information. - Use short-commit form. - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_samsung. - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_hynix. - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_toshiba. - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_micron. - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_amd. - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_macronix. - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Use short-commit form. - Remove linux info. Uboot seems that backport without add this extra information. Michael Trimarchi (14): mtd: nand: Get rid of busw parameter mtd: nand: Store nand ID in struct nand_chip mtd: nand: Add manufacturer specific initialization/detection steps mtd: nand: Get rid of mtd variable in function calls mtd: nand: Fix MediaTek MT7621 SoC build mtd: nand: Export symbol nand_decode_ext_id mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c mtd: nand: Move Micron specific init logic in nand_micron.c mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c mtd: nand: Move Macronix specific initialization in nand_macronix.c mtd: nand: toshiba: Retrieve ECC requirements from extended ID mtd: decommission the NAND museum drivers/mtd/nand/raw/Makefile | 10 +- drivers/mtd/nand/raw/mt7621_nand.c | 2 +- drivers/mtd/nand/raw/nand_amd.c | 52 ++++ drivers/mtd/nand/raw/nand_base.c | 370 ++++++++++----------------- drivers/mtd/nand/raw/nand_hynix.c | 85 ++++++ drivers/mtd/nand/raw/nand_ids.c | 24 +- drivers/mtd/nand/raw/nand_macronix.c | 31 +++ drivers/mtd/nand/raw/nand_micron.c | 87 +++++++ drivers/mtd/nand/raw/nand_samsung.c | 90 +++++++ drivers/mtd/nand/raw/nand_toshiba.c | 79 ++++++ include/linux/mtd/rawnand.h | 78 ++++-- 11 files changed, 626 insertions(+), 282 deletions(-) create mode 100644 drivers/mtd/nand/raw/nand_amd.c create mode 100644 drivers/mtd/nand/raw/nand_hynix.c create mode 100644 drivers/mtd/nand/raw/nand_macronix.c create mode 100644 drivers/mtd/nand/raw/nand_micron.c create mode 100644 drivers/mtd/nand/raw/nand_samsung.c create mode 100644 drivers/mtd/nand/raw/nand_toshiba.c -- 2.32.0

3 16

[PATCH 0/7] Add support for cyclic function execution infrastruture
by Stefan Roese 26 Jul '22

26 Jul '22

This patchset adds the basic infrastructure to periodically execute code, e.g. all 100ms. Examples for such functions might be LED blinking etc. The functions that are hooked into this cyclic list should be small timewise as otherwise the execution of the other code that relies on a high frequent polling (e.g. UART rx char ready check) might be delayed too much. This patch also adds the Kconfig option CONFIG_CYCLIC_MAX_CPU_TIME_US, which configures the max allowed time for such a cyclic function. If it's execution time exceeds this time, this cyclic function will get removed from the cyclic list. How is this cyclic functionality executed? This patchset integrates the main function responsible for calling all registered cyclic functions cyclic_run() into the common WATCHDOG_RESET macro. This guarantees that cyclic_run() is executed very often, which is necessary for the cyclic functions to get scheduled and executed at their configured periods. This cyclic infrastructure will be used by a board specific function on the NIC23 MIPS Octeon board, which needs to check periodically, if a PCIe FLR has occurred. Ideas how to continue: One idea is to rename WATCHDOG_RESET to something like SCHEDULE and move the watchdog_reset call into this cyclic infrastructure as well. Or to perhaps move the shell UART RX ready polling to a cyclic function. It's also possible to extend the "cyclic" command, to support the creation of periodically executed shell commands (for testing etc). Thanks, Stefan Aaron Williams (1): mips: octeon_nic23: Add PCIe FLR fixup via cyclic infrastructure Stefan Roese (6): time: Import time_after64() and friends from Linux cyclic: Add basic support for cyclic function execution infrastruture cyclic: Integrate cyclic infrastructure into WATCHDOG_RESET cyclic: Integrate cyclic functionality at bootup in board_r/f cyclic: Add 'cyclic list' command sandbox: Add cyclic demo function MAINTAINERS | 7 + board/Marvell/octeon_nic23/board.c | 197 +++++++++++++++++++++++++++++ board/sandbox/sandbox.c | 15 +++ cmd/Kconfig | 6 + cmd/Makefile | 1 + cmd/cyclic.c | 40 ++++++ common/Kconfig | 22 ++++ common/Makefile | 1 + common/board_f.c | 2 + common/board_r.c | 2 + common/cyclic.c | 112 ++++++++++++++++ configs/octeon_nic23_defconfig | 3 + configs/sandbox_defconfig | 2 + fs/cramfs/uncompress.c | 2 +- include/cyclic.h | 84 ++++++++++++ include/time.h | 19 +++ include/watchdog.h | 23 +++- 17 files changed, 534 insertions(+), 4 deletions(-) create mode 100644 cmd/cyclic.c create mode 100644 common/cyclic.c create mode 100644 include/cyclic.h -- 2.36.1

2 9

[PATCH v2] drivers: xen: unmap Enlighten page before jumping to Linux
by Dmytro Firsov 25 Jul '22

25 Jul '22

This commit fixes issue with usage of Xen hypervisor shared info page. Previously U-boot did not unmap it at the end of OS boot process. Xen did not prevent guest from this. So, it worked, but caused wierd issues - one memory page, that was returned by memalign in U-boot for Enlighten mapping was not unmaped by Xen (shared_info values was not removed from there) and returned to allocator. During the Linux boot, it uses shared_info page as regular RAM page, which leads to hypervisor shared info corruption. So, to fix this issue, as discussed on the xen-devel mailing list, the code should: 1) Unmap the page 2) Populate the area with memory using XENMEM_populate_physmap This patch adds page unmapping via XENMEM_remove_from_physmap, fills hole in address space where page was mapped via XENMEM_populate_physmap and return this address to memory allocator for freeing. Signed-off-by: Dmytro Firsov <dmytro_firsov(a)epam.com> --- Changes in v2: - Reword commit message to be more clear with purpose of the patch - Change BUG() helper to panic() and add error messages - Add struct zeroing during initialization - Fix typo in comment --- drivers/xen/hypervisor.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c index 2560894832..16c7c96c94 100644 --- a/drivers/xen/hypervisor.c +++ b/drivers/xen/hypervisor.c @@ -144,6 +144,36 @@ struct shared_info *map_shared_info(void *p) return HYPERVISOR_shared_info; } +void unmap_shared_info(void) +{ + xen_pfn_t shared_info_pfn = virt_to_pfn(HYPERVISOR_shared_info); + struct xen_remove_from_physmap xrfp = {0}; + struct xen_memory_reservation reservation = {0}; + xen_ulong_t nr_exts = 1; + + xrfp.domid = DOMID_SELF; + xrfp.gpfn = shared_info_pfn; + if (HYPERVISOR_memory_op(XENMEM_remove_from_physmap, &xrfp) != 0) + panic("Failed to unmap HYPERVISOR_shared_info\n"); + + /* + * After removing from physmap there will be a hole in address space on + * HYPERVISOR_shared_info address, so to free memory allocated with + * memalign and prevent exceptions during access to this page we need to + * fill this 4KB hole with XENMEM_populate_physmap before jumping to Linux. + */ + reservation.domid = DOMID_SELF; + reservation.extent_order = 0; + reservation.address_bits = 0; + set_xen_guest_handle(reservation.extent_start, &shared_info_pfn); + reservation.nr_extents = nr_exts; + if (HYPERVISOR_memory_op(XENMEM_populate_physmap, &reservation) != nr_exts) + panic("Failed to populate memory on HYPERVISOR_shared_info addr\n"); + + /* Now we can return this to memory allocator */ + free(HYPERVISOR_shared_info); +} + void do_hypervisor_callback(struct pt_regs *regs) { unsigned long l1, l2, l1i, l2i; @@ -251,4 +281,5 @@ void xen_fini(void) fini_gnttab(); fini_xenbus(); fini_events(); + unmap_shared_info(); } -- 2.25.1

4 4

[PATCH] arm: Remove unused references to CONFIG_SOC_DM*
by Tom Rini 25 Jul '22

25 Jul '22

There are no references to CONFIG_SOC_DM355 / CONFIG_SOC_DM365 / CONFIG_SOC_DM644X / CONFIG_SOC_DM646X and the files these Makefile lines reference have already been dropped. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/mach-davinci/Makefile | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index ed8827407206..ae171e3ee222 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -7,14 +7,9 @@ obj-y += cpu.o misc.o timer.o psc.o pinmux.o reset.o obj-$(CONFIG_DA850_LOWLEVEL) += da850_lowlevel.o -obj-$(CONFIG_SOC_DM355) += dm355.o -obj-$(CONFIG_SOC_DM365) += dm365.o -obj-$(CONFIG_SOC_DM644X) += dm644x.o -obj-$(CONFIG_SOC_DM646X) += dm646x.o obj-$(CONFIG_SOC_DA850) += da850_pinmux.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_FRAMEWORK) += spl.o -obj-$(CONFIG_SOC_DM365) += dm365_lowlevel.o obj-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o endif -- 2.25.1

1 1

[PATCH] spl: Use SPL_TEXT_BASE instead of ISW_ENTRY_ADDR
by Andrew Davis 25 Jul '22

25 Jul '22

The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of SPL_TEXT_BASE. Keystone2 HS devices were not using it right either. Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly. Signed-off-by: Andrew Davis <afd(a)ti.com> --- arch/arm/Kconfig | 15 --------------- arch/arm/mach-omap2/config_secure.mk | 4 ++-- common/spl/Kconfig | 4 +++- configs/am335x_hs_evm_defconfig | 2 +- configs/am335x_hs_evm_uart_defconfig | 2 +- configs/am43xx_evm_usbhost_boot_defconfig | 2 +- configs/am43xx_hs_evm_defconfig | 3 +-- configs/am57xx_hs_evm_usb_defconfig | 2 +- configs/dra7xx_hs_evm_usb_defconfig | 2 +- configs/k2e_evm_defconfig | 2 +- configs/k2e_hs_evm_defconfig | 1 - configs/k2g_evm_defconfig | 2 +- configs/k2g_hs_evm_defconfig | 1 - configs/k2hk_evm_defconfig | 2 +- configs/k2hk_hs_evm_defconfig | 1 - configs/k2l_evm_defconfig | 2 +- configs/k2l_hs_evm_defconfig | 1 - 17 files changed, 15 insertions(+), 33 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d4fc83318a..0d4903a2eb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2149,21 +2149,6 @@ config TI_SECURE_DEVICE authenticated) and the code. See the doc/README.ti-secure file for further details. -if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE -config ISW_ENTRY_ADDR - hex "Address in memory or XIP address of bootloader entry point" - default 0x402F4000 if AM43XX - default 0x402F0400 if AM33XX - default 0x40301350 if OMAP54XX - help - After any reset, the boot ROM searches the boot media for a valid - boot image. For non-XIP devices, the ROM then copies the image into - internal memory. For all boot modes, after the ROM processes the - boot image it eventually computes the entry point address depending - on the device type (secure/non-secure), boot media (xip/non-xip) and - image headers. -endif - config SYS_KWD_CONFIG string "kwbimage config file path" depends on ARCH_KIRKWOOD || ARCH_MVEBU diff --git a/arch/arm/mach-omap2/config_secure.mk b/arch/arm/mach-omap2/config_secure.mk index ebdc00fded..0629afd0ee 100644 --- a/arch/arm/mach-omap2/config_secure.mk +++ b/arch/arm/mach-omap2/config_secure.mk @@ -6,11 +6,11 @@ ifneq ($(TI_SECURE_DEV_PKG),) ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh),) ifneq ($(CONFIG_SPL_BUILD),) cmd_mkomapsecimg = $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh \ - $(patsubst u-boot-spl_HS_%,%,$(@F)) $< $@ $(CONFIG_ISW_ENTRY_ADDR) \ + $(patsubst u-boot-spl_HS_%,%,$(@F)) $< $@ $(CONFIG_SPL_TEXT_BASE) \ $(if $(KBUILD_VERBOSE:1=), >/dev/null) else cmd_mkomapsecimg = $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh \ - $(patsubst u-boot_HS_%,%,$(@F)) $< $@ $(CONFIG_ISW_ENTRY_ADDR) \ + $(patsubst u-boot_HS_%,%,$(@F)) $< $@ $(CONFIG_SYS_TEXT_BASE) \ $(if $(KBUILD_VERBOSE:1=), >/dev/null) endif else diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 908d7d17fd..7e79df4eaf 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -256,7 +256,9 @@ config SPL_LDSCRIPT config SPL_TEXT_BASE hex "SPL Text Base" - default ISW_ENTRY_ADDR if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE + default 0x402F4000 if AM43XX + default 0x402F0400 if AM33XX + default 0x40301350 if OMAP54XX default 0x10060 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN9I default 0x20060 if SUN50I_GEN_H6 default 0x00060 if ARCH_SUNXI diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index bb03e487f8..e10f0fdf39 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0x40300350 +CONFIG_SPL_TEXT_BASE=0x40300350 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index ac451026b0..7da2defb09 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0x40301950 +CONFIG_SPL_TEXT_BASE=0x40301950 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 0a4b9a99ce..eb52c6349a 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y -CONFIG_ISW_ENTRY_ADDR=0x40300350 +CONFIG_SPL_TEXT_BASE=0x40300350 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index c401d5619a..2c10f36b53 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -3,12 +3,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0x403018e0 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" -CONFIG_SPL_TEXT_BASE=0x403018E0 +CONFIG_SPL_TEXT_BASE=0x403018e0 CONFIG_AM43XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 1c37b63540..7773b60c3b 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0x40306d50 +CONFIG_SPL_TEXT_BASE=0x40306d50 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DM_GPIO=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index cd4b8bbce0..e96cfe4fd7 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0x40306d50 +CONFIG_SPL_TEXT_BASE=0x40306d50 CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 58c8c13b15..ad6c8f8a34 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -4,7 +4,7 @@ CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y -CONFIG_ISW_ENTRY_ADDR=0xC100000 +CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SYS_TEXT_BASE=0xC000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 1845bec517..8f8d558075 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0xC100000 CONFIG_SYS_TEXT_BASE=0xC000060 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index b96d1fc7c1..93c454b344 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -4,7 +4,7 @@ CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y -CONFIG_ISW_ENTRY_ADDR=0xC0A0000 +CONFIG_SPL_TEXT_BASE=0xC0A0000 CONFIG_SYS_TEXT_BASE=0xC000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index ef92bef10c..33fd445420 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0xC0A0000 CONFIG_SYS_TEXT_BASE=0xC000060 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index cfe5978e55..c9a53bb770 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -4,7 +4,7 @@ CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y -CONFIG_ISW_ENTRY_ADDR=0xC200000 +CONFIG_SPL_TEXT_BASE=0xC200000 CONFIG_SYS_TEXT_BASE=0xC000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 5caf3db2fe..87addbd8ab 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0xC200000 CONFIG_SYS_TEXT_BASE=0xC000060 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 47d5bd14ac..356b3b8045 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -4,7 +4,7 @@ CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y -CONFIG_ISW_ENTRY_ADDR=0xC100000 +CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SYS_TEXT_BASE=0xC000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 5c44ca922c..9aa47f3b2a 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KEYSTONE=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_ISW_ENTRY_ADDR=0xC100000 CONFIG_SYS_TEXT_BASE=0xC000060 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 -- 2.36.1

2 2

[PATCH 1/2] k3_gen_x509_cert: Make SWRV configurable for anti-rollback protection
by Andrew Davis 25 Jul '22

25 Jul '22

From: Yogesh Siraswar <yogeshs(a)ti.com> The x509 certificate SWRV is currently hard-coded to 0. This need to be updated to 1 for j721e 1.1, j7200 and am64x. It is don't care for other k3 devices. Added new config K3_X509_SWRV to k3. Default is set to 1. Signed-off-by: Yogesh Siraswar <yogeshs(a)ti.com> Reviewed-by: Dave Gerlach <d-gerlach(a)ti.com> --- arch/arm/mach-k3/Kconfig | 6 ++++++ arch/arm/mach-k3/config.mk | 5 ++++- tools/k3_gen_x509_cert.sh | 11 +++++++++-- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 57f693e9a1..9383fa478e 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -176,6 +176,12 @@ config K3_DM_FW bootloader, it makes RM and PM services not being available during R5 SPL execution time. +config K3_X509_SWRV + int "SWRV for X509 certificate used for boot images" + default 1 + help + SWRV for X509 certificate used for boot images + source "board/ti/am65x/Kconfig" source "board/ti/am64x/Kconfig" source "board/ti/am62x/Kconfig" diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index da458bcfb2..4feb57992d 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -28,6 +28,9 @@ else KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY)) endif +# X509 SWRV default +SWRV = $(CONFIG_K3_X509_SWRV) + # tiboot3.bin is mandated by ROM and ROM only supports R5 boot. # So restrict tiboot3.bin creation for CPU_V7R. ifdef CONFIG_CPU_V7R @@ -42,7 +45,7 @@ image_check: $(obj)/u-boot-spl.bin FORCE tiboot3.bin: image_check FORCE $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \ - -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY) + -o $@ -l $(CONFIG_SPL_TEXT_BASE) -r $(SWRV) -k $(KEY) INPUTS-y += tiboot3.bin endif diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh index 298cec1313..24cfc4e5fb 100755 --- a/tools/k3_gen_x509_cert.sh +++ b/tools/k3_gen_x509_cert.sh @@ -13,6 +13,7 @@ LOADADDR=0x41c00000 BOOTCORE_OPTS=0 BOOTCORE=16 DEBUG_TYPE=0 +SWRV=1 gen_degen_template() { cat << 'EOF' > degen-template.txt @@ -70,7 +71,7 @@ cat << 'EOF' > x509-template.txt shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL [ swrv ] - swrv = INTEGER:0 + swrv = INTEGER:TEST_SWRV # [ encryption ] # initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV @@ -153,8 +154,9 @@ options_help[o]="output_file:Name of the final output file. default to $OUTPUT" options_help[c]="core_id:target core id on which the image would be running. Default to $BOOTCORE" options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR" options_help[d]="debug_type: Debug type, set to 4 to enable early JTAG. Default to $DEBUG_TYPE" +options_help[r]="SWRV: Software Rev for X509 certificate" -while getopts "b:k:o:c:l:d:h" opt +while getopts "b:k:o:c:l:d:h:r:" opt do case $opt in b) @@ -175,6 +177,9 @@ do d) DEBUG_TYPE=$OPTARG ;; + r) + SWRV=$OPTARG + ;; h) usage exit 0 @@ -230,6 +235,7 @@ gen_cert() { #echo " IMAGE_SIZE = $BIN_SIZE" #echo " CERT_TYPE = $CERTTYPE" #echo " DEBUG_TYPE = $DEBUG_TYPE" + echo " SWRV = $SWRV" sed -e "s/TEST_IMAGE_LENGTH/$BIN_SIZE/" \ -e "s/TEST_IMAGE_SHA_VAL/$SHA_VAL/" \ -e "s/TEST_CERT_TYPE/$CERTTYPE/" \ @@ -237,6 +243,7 @@ gen_cert() { -e "s/TEST_BOOT_CORE/$BOOTCORE/" \ -e "s/TEST_BOOT_ADDR/$ADDR/" \ -e "s/TEST_DEBUG_TYPE/$DEBUG_TYPE/" \ + -e "s/TEST_SWRV/$SWRV/" \ x509-template.txt > $TEMP_X509 openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -sha512 } -- 2.36.1

2 3

[PATCH] arm: mach-k3: Remove ROM firewalls on GP devices
by Andrew Davis 25 Jul '22

25 Jul '22

This isn't strictly needed as these firewalls should all be disabled on GP, but it also doesn't hurt, so do this unconditionally to remove this use of CONFIG_TI_SECURE_DEVICE. Signed-off-by: Andrew Davis <afd(a)ti.com> --- arch/arm/mach-k3/am6_init.c | 4 ---- arch/arm/mach-k3/j721e_init.c | 4 ---- 2 files changed, 8 deletions(-) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 7992918adc..ded034140f 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -28,7 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW -#ifdef CONFIG_TI_SECURE_DEVICE struct fwl_data main_cbass_fwls[] = { { "MMCSD1_CFG", 2057, 1 }, { "MMCSD0_CFG", 2058, 1 }, @@ -45,7 +44,6 @@ struct fwl_data main_cbass_fwls[] = { { "MCU_CPSW0", 1220, 1 }, }; #endif -#endif static void ctrl_mmr_unlock(void) { @@ -238,10 +236,8 @@ void board_init_f(ulong dummy) preloader_console_init(); /* Disable ROM configured firewalls right after loading sysfw */ -#ifdef CONFIG_TI_SECURE_DEVICE remove_fwl_configs(main_cbass_fwls, ARRAY_SIZE(main_cbass_fwls)); remove_fwl_configs(mcu_cbass_fwls, ARRAY_SIZE(mcu_cbass_fwls)); -#endif #else /* Prepare console output */ preloader_console_init(); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index e56ca6d0f5..2000e8e29c 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -26,7 +26,6 @@ #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW -#ifdef CONFIG_TI_SECURE_DEVICE struct fwl_data cbass_hc_cfg0_fwls[] = { { "PCIE0_CFG", 2560, 8 }, { "PCIE1_CFG", 2561, 8 }, @@ -64,7 +63,6 @@ struct fwl_data cbass_hc_cfg0_fwls[] = { { "WKUP_CTRL_MMR0", 131, 16 }, }; #endif -#endif static void ctrl_mmr_unlock(void) { @@ -255,7 +253,6 @@ void board_init_f(ulong dummy) preloader_console_init(); /* Disable ROM configured firewalls right after loading sysfw */ -#ifdef CONFIG_TI_SECURE_DEVICE remove_fwl_configs(cbass_hc_cfg0_fwls, ARRAY_SIZE(cbass_hc_cfg0_fwls)); remove_fwl_configs(cbass_hc0_fwls, ARRAY_SIZE(cbass_hc0_fwls)); remove_fwl_configs(cbass_rc_cfg0_fwls, ARRAY_SIZE(cbass_rc_cfg0_fwls)); @@ -263,7 +260,6 @@ void board_init_f(ulong dummy) remove_fwl_configs(infra_cbass0_fwls, ARRAY_SIZE(infra_cbass0_fwls)); remove_fwl_configs(mcu_cbass0_fwls, ARRAY_SIZE(mcu_cbass0_fwls)); remove_fwl_configs(wkup_cbass0_fwls, ARRAY_SIZE(wkup_cbass0_fwls)); -#endif #else /* Prepare console output */ preloader_console_init(); -- 2.36.1

2 2