May 2022 - U-Boot

[PATCH] arm: tegra: Update some DT compatibles
by Peter Robinson 03 May '22

03 May '22

Some of the DT compatibles have changed upstream so add new DT compatibles to ensure things continue to keep working if the device trees are updated. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- drivers/i2c/tegra_i2c.c | 1 + drivers/video/tegra124/dp.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 1e744845423..2394e9d0fb4 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -514,6 +514,7 @@ static const struct dm_i2c_ops tegra_i2c_ops = { static const struct udevice_id tegra_i2c_ids[] = { { .compatible = "nvidia,tegra114-i2c", .data = TYPE_114 }, + { .compatible = "nvidia,tegra124-i2c", .data = TYPE_114 }, { .compatible = "nvidia,tegra20-i2c", .data = TYPE_STD }, { .compatible = "nvidia,tegra20-i2c-dvc", .data = TYPE_DVC }, { } diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c index 8f5116fe7c8..ee4f09a0c49 100644 --- a/drivers/video/tegra124/dp.c +++ b/drivers/video/tegra124/dp.c @@ -1609,6 +1609,7 @@ static int dp_tegra_probe(struct udevice *dev) static const struct udevice_id tegra_dp_ids[] = { { .compatible = "nvidia,tegra124-dpaux" }, + { .compatible = "nvidia,tegra210-dpaux" }, { } }; -- 2.36.0

1 0

[PATCH 1/2] ARM: tegra: XUSB padctl: Add new lines for errors
by Peter Robinson 03 May '22

03 May '22

Add new lines for error messages to make them easier to read. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- arch/arm/mach-tegra/xusb-padctl-common.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index e56e27c8b6e..8bdd44ad7ac 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, len = ofnode_read_string_count(node, "nvidia,lanes"); if (len < 0) { - pr_err("failed to parse \"nvidia,lanes\" property"); + pr_err("failed to parse \"nvidia,lanes\" property\n"); return -EINVAL; } @@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,lanes", i, &group->pins[i]); if (ret) { - pr_err("failed to read string from \"nvidia,lanes\" property"); + pr_err("failed to read string from \"nvidia,lanes\" property\n"); return -EINVAL; } } @@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,function", 0, &group->func); if (ret) { - pr_err("failed to parse \"nvidia,func\" property"); + pr_err("failed to parse \"nvidia,func\" property\n"); return -EINVAL; } @@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode); if (err < 0) { - pr_err("failed to parse group %s", group->name); + pr_err("failed to parse group %s\n", group->name); return err; } @@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_config_parse_dt(padctl, config, subnode); if (err < 0) { - pr_err("failed to parse entry %s: %d", + pr_err("failed to parse entry %s: %d\n", config->name, err); continue; } @@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]); if (err < 0) { - pr_err("failed to parse DT: %d", err); + pr_err("failed to parse DT: %d\n", err); continue; } -- 2.36.0

1 1

[PATCH v1] imx: imx8qm-rom7720: switch to binman
by Oliver Graute 03 May '22

03 May '22

Switch to use binman to pack images Signed-off-by: Oliver Graute <oliver.graute(a)kococonnector.com> --- arch/arm/dts/imx8qm-rom7720-a1.dts | 1 + arch/arm/dts/imx8qm-u-boot.dtsi | 133 ++++++++++++++++++ arch/arm/mach-imx/imx8/Kconfig | 1 + .../advantech/imx8qm_rom7720_a1/imximage.cfg | 4 +- configs/imx8qm_rom7720_a1_4G_defconfig | 2 +- doc/board/advantech/imx8qm-rom7720-a1.rst | 3 +- 6 files changed, 139 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/imx8qm-u-boot.dtsi diff --git a/arch/arm/dts/imx8qm-rom7720-a1.dts b/arch/arm/dts/imx8qm-rom7720-a1.dts index d1f2fff869..332d441c6d 100644 --- a/arch/arm/dts/imx8qm-rom7720-a1.dts +++ b/arch/arm/dts/imx8qm-rom7720-a1.dts @@ -10,6 +10,7 @@ /memreserve/ 0x80000000 0x00020000; #include "fsl-imx8qm.dtsi" +#include "imx8qm-u-boot.dtsi" / { model = "Advantech iMX8QM Qseven series"; diff --git a/arch/arm/dts/imx8qm-u-boot.dtsi b/arch/arm/dts/imx8qm-u-boot.dtsi new file mode 100644 index 0000000000..5da420ece6 --- /dev/null +++ b/arch/arm/dts/imx8qm-u-boot.dtsi @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + */ + +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + u-boot-spl-ddr { + align = <4>; + align-size = <4>; + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x100000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + fit,fdt-list = "of-list"; + #address-cells = <1>; + + images { + uboot { + arch = "arm64"; + compression = "none"; + description = "U-Boot (64-bit)"; + load = <CONFIG_SYS_TEXT_BASE>; + type = "standalone"; + + uboot_blob { + filename = "u-boot-nodtb.bin"; + type = "blob-ext"; + }; + }; + + atf { + arch = "arm64"; + compression = "none"; + description = "ARM Trusted Firmware"; + entry = <0x00910000>; + load = <0x00091000>; + type = "firmware"; + + atf_blob { + filename = "bl31.bin"; + type = "blob-ext"; + }; + }; + + scfw { + arch = "arm64"; + compression = "none"; + description = "System Controler Firmware"; + type = "firmware"; + + scfw_blob { + filename = "mx8qm-val-scfw-tcm.bin"; + type = "blob-ext"; + }; + }; + + seco { + arch = "arm64"; + compression = "none"; + description = "Seco Firmware"; + type = "firmware"; + + seco_blob { + filename = "mx8qm-ahab-container.img"; + type = "blob-ext"; + }; + }; + + fdt { + filename = "imx8qm-rom7720-a1"; + type = "flat_dt"; + compression = "none"; + + uboot_fdt_blob { + filename = "u-boot.dtb"; + type = "blob-ext"; + }; + }; + }; + + configurations { + default = "conf"; + + conf { + filename = "imx8qm-rom7720-a1"; + fdt = "fdt"; + firmware = "uboot"; + loadables = "atf"; + }; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl { + filename = "spl.bin"; + offset = <0x0>; + type = "blob-ext"; + }; + }; +}; diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index b43739e5c6..b42b985cdf 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -81,6 +81,7 @@ config TARGET_CONGA_QMX8 config TARGET_IMX8QM_ROM7720_A1 bool "Support i.MX8QM ROM-7720-A1" + select BINMAN select BOARD_LATE_INIT select SUPPORT_SPL select IMX8QM diff --git a/board/advantech/imx8qm_rom7720_a1/imximage.cfg b/board/advantech/imx8qm_rom7720_a1/imximage.cfg index e324c7ca37..58eeef54f6 100644 --- a/board/advantech/imx8qm_rom7720_a1/imximage.cfg +++ b/board/advantech/imx8qm_rom7720_a1/imximage.cfg @@ -5,8 +5,8 @@ #define __ASSEMBLY__ -/* Boot from SD, sector size 0x400 */ -BOOT_FROM SD 0x400 +BOOT_FROM sd + /* SoC type IMX8QM */ SOC_TYPE IMX8QM /* Append seco container image */ diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index fb43fa1962..26afa4f8d7 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -18,7 +18,7 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=3 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/doc/board/advantech/imx8qm-rom7720-a1.rst b/doc/board/advantech/imx8qm-rom7720-a1.rst index bd4be1dbeb..953cf01fde 100644 --- a/doc/board/advantech/imx8qm-rom7720-a1.rst +++ b/doc/board/advantech/imx8qm-rom7720-a1.rst @@ -57,8 +57,7 @@ Build U-Boot $ export ATF_LOAD_ADDR=0x80000000 $ export BL33_LOAD_ADDR=0x80020000 $ make imx8qm_rom7720_a1_4G_defconfig - $ make u-boot.bin - $ make flash.bin + $ make Flash the binary into the SD card --------------------------------- -- 2.17.1

3 2

[PATCH v2] imx: imx8qm-rom7720: switch to binman
by Oliver Graute 03 May '22

03 May '22

Switch to use binman to pack images Signed-off-by: Oliver Graute <oliver.graute(a)kococonnector.com> --- Changes for v2 - just rebased to master arch/arm/dts/imx8qm-rom7720-a1.dts | 1 + arch/arm/dts/imx8qm-u-boot.dtsi | 133 ++++++++++++++++++ arch/arm/mach-imx/imx8/Kconfig | 1 + .../advantech/imx8qm_rom7720_a1/imximage.cfg | 4 +- configs/imx8qm_rom7720_a1_4G_defconfig | 2 +- doc/board/advantech/imx8qm-rom7720-a1.rst | 3 +- 6 files changed, 139 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/imx8qm-u-boot.dtsi diff --git a/arch/arm/dts/imx8qm-rom7720-a1.dts b/arch/arm/dts/imx8qm-rom7720-a1.dts index d1f2fff869..332d441c6d 100644 --- a/arch/arm/dts/imx8qm-rom7720-a1.dts +++ b/arch/arm/dts/imx8qm-rom7720-a1.dts @@ -10,6 +10,7 @@ /memreserve/ 0x80000000 0x00020000; #include "fsl-imx8qm.dtsi" +#include "imx8qm-u-boot.dtsi" / { model = "Advantech iMX8QM Qseven series"; diff --git a/arch/arm/dts/imx8qm-u-boot.dtsi b/arch/arm/dts/imx8qm-u-boot.dtsi new file mode 100644 index 0000000000..5da420ece6 --- /dev/null +++ b/arch/arm/dts/imx8qm-u-boot.dtsi @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + */ + +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + u-boot-spl-ddr { + align = <4>; + align-size = <4>; + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x100000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + fit,fdt-list = "of-list"; + #address-cells = <1>; + + images { + uboot { + arch = "arm64"; + compression = "none"; + description = "U-Boot (64-bit)"; + load = <CONFIG_SYS_TEXT_BASE>; + type = "standalone"; + + uboot_blob { + filename = "u-boot-nodtb.bin"; + type = "blob-ext"; + }; + }; + + atf { + arch = "arm64"; + compression = "none"; + description = "ARM Trusted Firmware"; + entry = <0x00910000>; + load = <0x00091000>; + type = "firmware"; + + atf_blob { + filename = "bl31.bin"; + type = "blob-ext"; + }; + }; + + scfw { + arch = "arm64"; + compression = "none"; + description = "System Controler Firmware"; + type = "firmware"; + + scfw_blob { + filename = "mx8qm-val-scfw-tcm.bin"; + type = "blob-ext"; + }; + }; + + seco { + arch = "arm64"; + compression = "none"; + description = "Seco Firmware"; + type = "firmware"; + + seco_blob { + filename = "mx8qm-ahab-container.img"; + type = "blob-ext"; + }; + }; + + fdt { + filename = "imx8qm-rom7720-a1"; + type = "flat_dt"; + compression = "none"; + + uboot_fdt_blob { + filename = "u-boot.dtb"; + type = "blob-ext"; + }; + }; + }; + + configurations { + default = "conf"; + + conf { + filename = "imx8qm-rom7720-a1"; + fdt = "fdt"; + firmware = "uboot"; + loadables = "atf"; + }; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl { + filename = "spl.bin"; + offset = <0x0>; + type = "blob-ext"; + }; + }; +}; diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index b43739e5c6..b42b985cdf 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -81,6 +81,7 @@ config TARGET_CONGA_QMX8 config TARGET_IMX8QM_ROM7720_A1 bool "Support i.MX8QM ROM-7720-A1" + select BINMAN select BOARD_LATE_INIT select SUPPORT_SPL select IMX8QM diff --git a/board/advantech/imx8qm_rom7720_a1/imximage.cfg b/board/advantech/imx8qm_rom7720_a1/imximage.cfg index e324c7ca37..58eeef54f6 100644 --- a/board/advantech/imx8qm_rom7720_a1/imximage.cfg +++ b/board/advantech/imx8qm_rom7720_a1/imximage.cfg @@ -5,8 +5,8 @@ */ -/* Boot from SD, sector size 0x400 */ -BOOT_FROM SD 0x400 +BOOT_FROM sd + /* SoC type IMX8QM */ SOC_TYPE IMX8QM /* Append seco container image */ diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index fb43fa1962..26afa4f8d7 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -18,7 +18,7 @@ CONFIG_SPL=y CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" diff --git a/doc/board/advantech/imx8qm-rom7720-a1.rst b/doc/board/advantech/imx8qm-rom7720-a1.rst index bd4be1dbeb..953cf01fde 100644 --- a/doc/board/advantech/imx8qm-rom7720-a1.rst +++ b/doc/board/advantech/imx8qm-rom7720-a1.rst @@ -57,8 +57,7 @@ Build U-Boot $ export ATF_LOAD_ADDR=0x80000000 $ export BL33_LOAD_ADDR=0x80020000 $ make imx8qm_rom7720_a1_4G_defconfig - $ make u-boot.bin - $ make flash.bin + $ make Flash the binary into the SD card --------------------------------- -- 2.17.1

1 0

[PATCH] xilinx: Handle board_get_usable_ram_top(0) properly
by Michal Simek 03 May '22

03 May '22

board_get_usable_ram_top() was designed for getting the top most location for U-Boot allocation that's why function itself supports via total_size parameter to find out where the right location for U-Boot is. But function itself is also reused by different (EFI) which is passing total_size as 0 to find out where the usable ram top is. For this case doesn't make sense (a waste time) to call any lmb functions. That's why simply return gd->ram_top. And gd->ram_top is filled already based on previous call for U-Boot iself. The same solution is also used by stm32mp by commit 92b611e8b003 ("stm32mp: correctly handle board_get_usable_ram_top(0)") and commit c8510e397fad ("stm32mp: Fix board_get_usable_ram_top()"). Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- board/xilinx/versal/board.c | 3 +++ board/xilinx/zynqmp/zynqmp.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 2e2807eee463..a88f5bb177e2 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -256,6 +256,9 @@ ulong board_get_usable_ram_top(ulong total_size) phys_addr_t reg; struct lmb lmb; + if (!total_size) + return gd->ram_top; + /* found enough not-reserved memory to relocated U-Boot */ lmb_init(&lmb); lmb_add(&lmb, gd->ram_base, gd->ram_size); diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 41ecc9559c4b..e311aa772cce 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -516,6 +516,9 @@ ulong board_get_usable_ram_top(ulong total_size) phys_addr_t reg; struct lmb lmb; + if (!total_size) + return gd->ram_top; + if (!IS_ALIGNED((ulong)gd->fdt_blob, 0x8)) panic("Not 64bit aligned DT location: %p\n", gd->fdt_blob); -- 2.36.0

1 1

[PATCH] Revert "arm64: xilinx: Set CONFIG_ZYNQMP_FIRMWARE config for mini emmc"
by Michal Simek 03 May '22

03 May '22

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> This reverts commit 122ca834f2f4a9d70abeece3d1ff200a3556ab24. Disable CONFIG_ZYNQMP_FIRMWARE config from zynqmp & versal mini emmc defconfig files, as mini emmc does not use any firmware. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/xilinx_versal_mini_emmc0_defconfig | 1 - configs/xilinx_versal_mini_emmc1_defconfig | 1 - configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 - configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 - 4 files changed, 4 deletions(-) diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index ab14118fdcdf..9d2f97576bbd 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -56,7 +56,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_ZYNQMP_FIRMWARE=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_ARM_DCC=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index cab3d21cb71e..7efb9287561a 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -56,7 +56,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_ZYNQMP_FIRMWARE=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_ARM_DCC=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index e176175251f3..b40527715669 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_ZYNQMP_FIRMWARE=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index f5b35fbb71cc..5fa1337d761c 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_ZYNQMP_FIRMWARE=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y -- 2.36.0

2 1

[PATCH V2] imx: drop CONFIG_MXC_UART_BASE
by Peng Fan (OSS) 03 May '22

03 May '22

From: Peng Fan <peng.fan(a)nxp.com> Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL, the legacy macro no need to be defined. Reviewed-by: Heiko Schocher <hs(a)denx.de> Reviewed-by: Fabio Estevam <festevam(a)denx.de> Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- V2: Add R-b Drop comments add imx8mn_bsh_smm_s2_common.h include/configs/aristainetos2.h | 2 -- include/configs/imx8mm_evk.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/mx7dsabresd.h | 1 - include/configs/somlabs_visionsom_6ull.h | 1 - include/configs/tbs2910.h | 3 --- include/configs/verdin-imx8mm.h | 3 --- include/configs/verdin-imx8mp.h | 3 --- 10 files changed, 18 deletions(-) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 8ee97f1d4e3..27adae5d6bf 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -14,10 +14,8 @@ #define CONFIG_HOSTNAME "aristainetos2" #if (CONFIG_SYS_BOARD_VERSION == 5) -#define CONFIG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" #elif (CONFIG_SYS_BOARD_VERSION == 6) -#define CONFIG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" #endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 42b78485cfc..7dd66527c3d 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -68,7 +68,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 6387576c2da..57be38d9433 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -45,8 +45,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 -#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 034132225c6..b20e0a5553d 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -75,7 +75,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index cc8d65cb54e..cbdd490a300 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -80,7 +80,6 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index aaad232f0e4..62e62c6701f 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -12,7 +12,6 @@ #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR #ifdef CONFIG_IMX_BOOTAUX /* Set to QSPI1 A flash at default */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index d4761296c75..e6aad386efe 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -16,7 +16,6 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index b7a94812f35..5d8cb34ad9a 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -24,9 +24,6 @@ #define CONFIG_SYS_BOOTMAPSZ 0x10000000 -/* Serial console */ -#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ - /* Framebuffer */ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index da3dc95f9ee..e0f0347fcf4 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -83,9 +83,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -/* UART */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 7b7407752c1..370bcb4e46f 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -100,9 +100,6 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G) -/* UART */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K #define CONFIG_SYS_MAXARGS 64 -- 2.36.0

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[PATCH 00/15] imx8m: convert to DM_SERIAL
by Peng Fan (OSS) 03 May '22

03 May '22

From: Peng Fan <peng.fan(a)nxp.com> This patchset is to convert some i.MX8M boards to DM SERIAL Note: this is based on my experience on i.MX8M*-EVK from NXP, I not have the following boards. If possible, please test. Peng Fan (15): imx: imx8mp_rsb3720a1: convert to DM_SERIAL imx: imx8m[m/n/p]_venice: Enable SPL_DM_SERIAL imx: imx8mm_mx8menlo: Enable DM_SERIAL imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIAL imx: imx8mm-cl-iot-gate: Enable DM_SERIAL imx: imx8mm_icore: Enable SPL_DM_SERIAL imx: imx8m[m/p]_phycore: Enable DM_SERIAL imx: imx8mn_var_som: enable DM_SERIAL imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL imx: kontron-sl-mx8mm: enable DM_SERIAL imx: imx8mn_bsh_smm_s2: drop CONFIG_MXC_UART_BASE imx: dts: move common changes to imx8mq-u-boot.dtsi imx: imx8mq-cm: enable CONFIG_DM_SERIAL imx: imx8mq-pico: enable CONFIG_DM_SERIAL imx: imx8mq-phandle: enable CONFIG_DM_SERIAL arch/arm/dts/imx8mq-cm-u-boot.dtsi | 8 +++++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 24 ------------------- arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 8 +++++++ arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi | 9 +++++++ arch/arm/dts/imx8mq-u-boot.dtsi | 24 +++++++++++++++++++ .../imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 8 ------- board/beacon/imx8mm/spl.c | 12 ++-------- board/beacon/imx8mn/spl.c | 11 ++------- board/compulab/imx8mm-cl-iot-gate/spl.c | 12 ++-------- board/data_modul/imx8mm_edm_sbc/spl.c | 12 ++-------- board/engicam/imx8mm/spl.c | 14 +++-------- board/gateworks/venice/spl.c | 22 ++--------------- board/kontron/sl-mx8mm/spl.c | 12 ++-------- board/menlo/mx8menlo/mx8menlo.c | 9 ------- board/phytec/phycore_imx8mm/spl.c | 12 ++-------- board/phytec/phycore_imx8mp/spl.c | 8 ------- board/variscite/imx8mn_var_som/spl.c | 11 ++------- configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 - configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 - configs/imx8mm_data_modul_edm_sbc_defconfig | 1 - configs/imx8mm_venice_defconfig | 1 - configs/imx8mn_beacon_2g_defconfig | 1 - configs/imx8mn_beacon_defconfig | 1 - configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 - configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 - configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/kontron-sl-mx8mm_defconfig | 1 + configs/phycore-imx8mm_defconfig | 1 + configs/phycore-imx8mp_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + include/configs/imx8mm-cl-iot-gate.h | 2 -- include/configs/imx8mm-mx8menlo.h | 3 --- include/configs/imx8mm_beacon.h | 2 -- include/configs/imx8mm_data_modul_edm_sbc.h | 2 -- include/configs/imx8mm_icore_mx8mm.h | 3 --- include/configs/imx8mm_venice.h | 3 --- include/configs/imx8mn_beacon.h | 2 -- include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 3 --- include/configs/imx8mp_rsb3720.h | 2 -- include/configs/imx8mp_venice.h | 3 --- include/configs/kontron-sl-mx8mm.h | 1 - include/configs/phycore_imx8mm.h | 3 --- include/configs/phycore_imx8mp.h | 3 --- 53 files changed, 80 insertions(+), 193 deletions(-) create mode 100644 arch/arm/dts/imx8mq-pico-pi-u-boot.dtsi -- 2.36.0

9 28

[RFC PATCH] efi_loader: add sha384/512 on certificate revocation
by Ilias Apalodimas 02 May '22

02 May '22

Currently we don't support sha384/512 for the X.509 certificate To-Be-Signed contents. Moreover if we come across such a hash we skip the check and approve the image, although the image might needs to be rejected. It's worth noting here that efi_hash_regions() can now be reused from efi_signature_lookup_digest() and add sha348/512 support there as well Signed-off-by: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> --- include/efi_api.h | 6 ++++ lib/efi_loader/efi_signature.c | 62 ++++++++++++++++++++++++++-------- 2 files changed, 53 insertions(+), 15 deletions(-) diff --git a/include/efi_api.h b/include/efi_api.h index 982c2001728d..b9a04958f9ba 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -1873,6 +1873,12 @@ struct efi_system_resource_table { #define EFI_CERT_X509_SHA256_GUID \ EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, \ 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed) +#define EFI_CERT_X509_SHA384_GUID \ + EFI_GUID(0x7076876e, 0x80c2, 0x4ee6, \ + 0xaa, 0xd2, 0x28, 0xb3, 0x49, 0xa6, 0x86, 0x5b) +#define EFI_CERT_X509_SHA512_GUID \ + EFI_GUID(0x446dbf63, 0x2502, 0x4cda, \ + 0xbc, 0xfa, 0x24, 0x65, 0xd2, 0xb0, 0xfe, 0x9d) #define EFI_CERT_TYPE_PKCS7_GUID \ EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a, 0xa9, \ 0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7) diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c index 79ed077ae7dd..392eae6c0d64 100644 --- a/lib/efi_loader/efi_signature.c +++ b/lib/efi_loader/efi_signature.c @@ -24,6 +24,8 @@ const efi_guid_t efi_guid_sha256 = EFI_CERT_SHA256_GUID; const efi_guid_t efi_guid_cert_rsa2048 = EFI_CERT_RSA2048_GUID; const efi_guid_t efi_guid_cert_x509 = EFI_CERT_X509_GUID; const efi_guid_t efi_guid_cert_x509_sha256 = EFI_CERT_X509_SHA256_GUID; +const efi_guid_t efi_guid_cert_x509_sha384 = EFI_CERT_X509_SHA384_GUID; +const efi_guid_t efi_guid_cert_x509_sha512 = EFI_CERT_X509_SHA512_GUID; const efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID; static u8 pkcs7_hdr[] = { @@ -124,23 +126,32 @@ struct pkcs7_message *efi_parse_pkcs7_header(const void *buf, * Return: true on success, false on error */ static bool efi_hash_regions(struct image_region *regs, int count, - void **hash, size_t *size) + void **hash, size_t size) { + char hash_algo[16]; + int ret; + + /* basic sanity checking */ + if (!size) + return false; + + ret = snprintf(hash_algo, sizeof(hash_algo), "sha%ld", size * 8); + if (ret >= sizeof(hash_algo)) + return false; + if (!*hash) { - *hash = calloc(1, SHA256_SUM_LEN); + *hash = calloc(1, size); if (!*hash) { EFI_PRINT("Out of memory\n"); return false; } } - if (size) - *size = SHA256_SUM_LEN; - hash_calculate("sha256", regs, count, *hash); + hash_calculate(hash_algo, regs, count, *hash); #ifdef DEBUG EFI_PRINT("hash calculated:\n"); print_hex_dump(" ", DUMP_PREFIX_OFFSET, 16, 1, - *hash, SHA256_SUM_LEN, false); + *hash, size, false); #endif return true; @@ -190,7 +201,7 @@ bool efi_signature_lookup_digest(struct efi_image_regions *regs, struct efi_signature_store *siglist; struct efi_sig_data *sig_data; void *hash = NULL; - size_t size = 0; + size_t size = SHA256_SUM_LEN; bool found = false; bool hash_done = false; @@ -216,7 +227,7 @@ bool efi_signature_lookup_digest(struct efi_image_regions *regs, continue; if (!hash_done && - !efi_hash_regions(regs->reg, regs->num, &hash, &size)) { + !efi_hash_regions(regs->reg, regs->num, &hash, size)) { EFI_PRINT("Digesting an image failed\n"); break; } @@ -263,7 +274,7 @@ static bool efi_lookup_certificate(struct x509_certificate *cert, struct efi_sig_data *sig_data; struct image_region reg[1]; void *hash = NULL, *hash_tmp = NULL; - size_t size = 0; + size_t size = SHA256_SUM_LEN; bool found = false; EFI_PRINT("%s: Enter, %p, %p\n", __func__, cert, db); @@ -278,7 +289,7 @@ static bool efi_lookup_certificate(struct x509_certificate *cert, /* calculate hash of TBSCertificate */ reg[0].data = cert->tbs; reg[0].size = cert->tbs_size; - if (!efi_hash_regions(reg, 1, &hash, &size)) + if (!efi_hash_regions(reg, 1, &hash, size)) goto out; EFI_PRINT("%s: searching for %s\n", __func__, cert->subject); @@ -300,7 +311,7 @@ static bool efi_lookup_certificate(struct x509_certificate *cert, cert_tmp->subject); reg[0].data = cert_tmp->tbs; reg[0].size = cert_tmp->tbs_size; - if (!efi_hash_regions(reg, 1, &hash_tmp, NULL)) + if (!efi_hash_regions(reg, 1, &hash_tmp, size)) goto out; x509_free_certificate(cert_tmp); @@ -377,6 +388,26 @@ out: return verified; } +/** guid_to_sha_len - return the sha size in bytes for a given guid + * used of EFI security databases + * + * @guid: guid to check + * + * Return: len or 0 if no match is found + */ +static int guid_to_sha_len(efi_guid_t *guid) +{ + int size = 0; + + if (!guidcmp(guid, &efi_guid_cert_x509_sha256)) + size = SHA256_SUM_LEN; + else if (!guidcmp(guid, &efi_guid_cert_x509_sha384)) + size = SHA384_SUM_LEN; + else if (!guidcmp(guid, &efi_guid_cert_x509_sha512)) + size = SHA512_SUM_LEN; + + return size; +} /** * efi_signature_check_revocation - check revocation with dbx * @sinfo: Signer's info @@ -400,7 +431,7 @@ static bool efi_signature_check_revocation(struct pkcs7_signed_info *sinfo, struct efi_sig_data *sig_data; struct image_region reg[1]; void *hash = NULL; - size_t size = 0; + size_t size = SHA256_SUM_LEN; time64_t revoc_time; bool revoked = false; @@ -411,13 +442,14 @@ static bool efi_signature_check_revocation(struct pkcs7_signed_info *sinfo, EFI_PRINT("Checking revocation against %s\n", cert->subject); for (siglist = dbx; siglist; siglist = siglist->next) { - if (guidcmp(&siglist->sig_type, &efi_guid_cert_x509_sha256)) + size = guid_to_sha_len(&siglist->sig_type); + if (!size) continue; /* calculate hash of TBSCertificate */ reg[0].data = cert->tbs; reg[0].size = cert->tbs_size; - if (!efi_hash_regions(reg, 1, &hash, &size)) + if (!efi_hash_regions(reg, 1, &hash, size)) goto out; for (sig_data = siglist->sig_data_list; sig_data; @@ -500,7 +532,7 @@ bool efi_signature_verify(struct efi_image_regions *regs, */ if (!msg->data && !efi_hash_regions(regs->reg, regs->num, - (void **)&sinfo->sig->digest, NULL)) { + (void **)&sinfo->sig->digest, SHA256_SUM_LEN)) { EFI_PRINT("Digesting an image failed\n"); goto out; } -- 2.32.0

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[PATCH] powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs
by Pali Rohár 02 May '22

02 May '22

This reduce usage of per-board custom settings. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- arch/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/Kconfig b/arch/Kconfig index 7ecb375b6b5a..920dadea5dcc 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -369,6 +369,9 @@ config SYS_IMMR default 0xF0000000 if ARCH_MPC8313 default 0xE0000000 if MPC83xx && !ARCH_MPC8313 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 + default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \ + ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \ + ARCH_P2020 default SYS_CCSRBAR_DEFAULT help Address for the Internal Memory-Mapped Registers (IMMR) window used -- 2.20.1

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