May 2022 - U-Boot

[PATCH] mtd: rawnand: fsl_elbc: Fix DM support in DTS code path
by Pali Rohár 02 May '22

02 May '22

For proper DM support it is required to fill also mtd->dev member. Otherwise DM would not see nand device at all. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/mtd/nand/raw/fsl_elbc_nand.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c index e734139b5ea5..b0e3eb607ed4 100644 --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c @@ -668,7 +668,7 @@ static void fsl_elbc_ctrl_init(void) elbc_ctrl->addr = NULL; } -static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode flash_node) +static int fsl_elbc_chip_init(int devnum, u8 *addr, struct udevice *dev) { struct mtd_info *mtd; struct nand_chip *nand; @@ -716,7 +716,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode flash_node) elbc_ctrl->chips[priv->bank] = priv; /* fill in nand_chip structure */ - nand->flash_node = flash_node; + mtd->dev = dev; + nand->flash_node = dev ? dev_ofnode(dev) : ofnode_null(); /* set up function call table */ nand->read_byte = fsl_elbc_read_byte; @@ -827,14 +828,14 @@ void board_nand_init(void) int i; for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - fsl_elbc_chip_init(i, (u8 *)base_address[i], ofnode_null()); + fsl_elbc_chip_init(i, (u8 *)base_address[i], NULL); } #else static int fsl_elbc_nand_probe(struct udevice *dev) { - return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev_ofnode(dev)); + return fsl_elbc_chip_init(0, (void *)dev_read_addr(dev), dev); } static const struct udevice_id fsl_elbc_nand_dt_ids[] = { -- 2.20.1

1 0

[PATCH] ARM: mvebu: x530: set MPP55 to gpio
by Chris Packham 02 May '22

02 May '22

MPP55 is used as a reset connected to the L3 switch chip. This doesn't matter for u-boot as it doesn't use the L3 switch but it is useful to be able to toggle the switch in/out of reset for the OS. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- I sent this out a while back but it was part of a series that has been dropped for the time being. There's not reason to hold this change up behind the other so I'm sending it as a standalong change. board/alliedtelesis/x530/x530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c index c0ec2afa3011..cbf4533e78de 100644 --- a/board/alliedtelesis/x530/x530.c +++ b/board/alliedtelesis/x530/x530.c @@ -93,7 +93,7 @@ int board_early_init_f(void) writel(0x55550550, MVEBU_MPP_BASE + 0x0c); writel(0x55555555, MVEBU_MPP_BASE + 0x10); writel(0x00100565, MVEBU_MPP_BASE + 0x14); - writel(0x40000000, MVEBU_MPP_BASE + 0x18); + writel(0x00000000, MVEBU_MPP_BASE + 0x18); writel(0x00004444, MVEBU_MPP_BASE + 0x1c); return 0; -- 2.36.0

2 2

[PATCH] arm: mvebu: clearfog_defconfig: enable setexpr command
by Josef Schlehofer 02 May '22

02 May '22

This command is useful in U-boot scripts and it is being used by OpenWrt bootscript for this board [1]. Otherwise shell scripting commands are enabled by default in cmd/Kconfig. [1] https://github.com/openwrt/openwrt/blob/852126680e21edc71c0c66561ae5a6d7479… [2] https://source.denx.de/u-boot/u-boot/-/blob/e95afa56753cebcd20a5114b6d121f2… Fixes: 0299c90f396c5b2971a4bac596339f4b03661c27 ("arm: mvebu: Add SolidRun ClearFog Armada 38x initial support") Signed-off-by: Josef Schlehofer <pepe.schlehofer(a)gmail.com> --- configs/clearfog_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 880f16a6e0..1e9c389deb 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y -- 2.34.1

2 2

[PATCH] arm: mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names
by Pali Rohár 02 May '22

02 May '22

This is A385 register. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 97292456f148..6132c8f94369 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -43,8 +43,8 @@ DECLARE_GLOBAL_DATA_PTR; #define OMNIA_I2C_EEPROM_CHIP_LEN 2 #define OMNIA_I2C_EEPROM_MAGIC 0x0341a034 -#define SYS_RSTOUT_MASK MVEBU_REGISTER(0x18260) -#define SYS_RSTOUT_MASK_WD BIT(10) +#define A385_SYS_RSTOUT_MASK MVEBU_REGISTER(0x18260) +#define A385_SYS_RSTOUT_MASK_WD BIT(10) #define A385_WDT_GLOBAL_CTRL MVEBU_REGISTER(0x20300) #define A385_WDT_GLOBAL_RATIO_MASK GENMASK(18, 16) @@ -187,7 +187,7 @@ static void enable_a385_watchdog(unsigned int timeout_minutes) setbits_32(A385_WD_RSTOUT_UNMASK, A385_WD_RSTOUT_UNMASK_GLOBAL); /* Unmask reset for watchdog */ - clrbits_32(SYS_RSTOUT_MASK, SYS_RSTOUT_MASK_WD); + clrbits_32(A385_SYS_RSTOUT_MASK, A385_SYS_RSTOUT_MASK_WD); } static bool disable_mcu_watchdog(void) -- 2.20.1

2 2

[PATCH] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet
by Tony Dinh 02 May '22

02 May '22

The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet. - Use uclass mvgbe to bring up the network. And remove ad-hoc code. - Remove CONFIG_RESET_PHY_R. - Enable CONFIG_PHY_MARVELL to properly configure the network. - Add phy mode RGMII to kirkwood-nsa310s.dts - Miscellaneous changes: Move constants to .c file and remove header file board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs, use BIT macro, add/cleanup comments, and cosmetic changes. Note that this patch is depended on the following patch: https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mib… Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- arch/arm/dts/kirkwood-nsa310s.dts | 1 + board/zyxel/nsa310s/nsa310s.c | 119 +++++++++--------------------- board/zyxel/nsa310s/nsa310s.h | 46 ------------ configs/nsa310s_defconfig | 6 +- include/configs/nsa310s.h | 11 +-- 5 files changed, 41 insertions(+), 142 deletions(-) delete mode 100644 board/zyxel/nsa310s/nsa310s.h diff --git a/arch/arm/dts/kirkwood-nsa310s.dts b/arch/arm/dts/kirkwood-nsa310s.dts index e1c9c9080c..09ee76c2a2 100644 --- a/arch/arm/dts/kirkwood-nsa310s.dts +++ b/arch/arm/dts/kirkwood-nsa310s.dts @@ -306,6 +306,7 @@ status = "okay"; ethernet0-port@0 { phy-handle = <&ethphy0>; + phy-mode = "rgmii"; }; }; diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c index b71de4e11f..b3ea660891 100644 --- a/board/zyxel/nsa310s/nsa310s.c +++ b/board/zyxel/nsa310s/nsa310s.c @@ -1,22 +1,49 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2015, 2021 Tony Dinh <mibodhi(a)gmail.com> + * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi(a)gmail.com> * Copyright (C) 2015 Gerald Kerma <dreagle(a)doukki.net> */ #include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/global_data.h> #include <asm/io.h> -#include "nsa310s.h" +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +/* + * low GPIO's + */ +#define HDD1_GREEN_LED BIT(16) +#define HDD1_RED_LED BIT(13) +#define USB_GREEN_LED BIT(15) +#define USB_POWER BIT(21) +#define SYS_GREEN_LED BIT(28) +#define SYS_ORANGE_LED BIT(29) + +#define COPY_GREEN_LED BIT(22) +#define COPY_RED_LED BIT(23) + +#define PIN_USB_GREEN_LED 15 +#define PIN_USB_POWER 21 + +#define NSA310S_OE_LOW (~(0)) +#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER) + +/* + * high GPIO's + */ +#define HDD2_GREEN_LED BIT(2) +#define HDD2_POWER BIT(1) + +#define NSA310S_OE_HIGH (~(0)) +#define NSA310S_VAL_HIGH (HDD2_POWER) + int board_early_init_f(void) { /* @@ -80,87 +107,7 @@ int board_init(void) return 0; } -static int fdt_get_phy_addr(const char *path) -{ - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; -} - -#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) +int board_eth_init(struct bd_info *bis) { - u16 reg; - u16 phyaddr; - char *name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(eth0_path); - if (phyaddr < 0) - return; - - /* set RGMII delay */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); - miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg); - reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL); - miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg); - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); - - /* reset PHY */ - if (miiphy_reset(name, phyaddr)) - return; - - /* - * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318) - * and has an MCU attached to the LED[2] via tristate interrupt - */ - - /* switch to LED register page */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG); - /* read out LED polarity register */ - miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg); - /* clear 4, set 5 - LED2 low, tri-state */ - reg &= ~(MV88E1318_LED2_4); - reg |= (MV88E1318_LED2_5); - /* write back LED polarity register */ - miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg); - /* jump back to page 0, per the PHY chip documenation. */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); - - /* set PHY back to auto-negotiation mode */ - miiphy_write(name, phyaddr, 0x4, 0x1e1); - miiphy_write(name, phyaddr, 0x9, 0x300); - /* downshift */ - miiphy_write(name, phyaddr, 0x10, 0x3860); - miiphy_write(name, phyaddr, 0x0, 0x9140); - - printf("MV88E1318 PHY initialized on %s\n", name); + return cpu_eth_init(bis); } -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/zyxel/nsa310s/nsa310s.h b/board/zyxel/nsa310s/nsa310s.h deleted file mode 100644 index d8bd9a586f..0000000000 --- a/board/zyxel/nsa310s/nsa310s.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2015 - * Gerald Kerma <dreagle(a)doukki.net> - * Tony Dinh <mibodhi(a)gmail.com> - */ - -#ifndef __NSA310S_H -#define __NSA310S_H - -/* low GPIO's */ -#define HDD1_GREEN_LED (1 << 16) -#define HDD1_RED_LED (1 << 13) -#define USB_GREEN_LED (1 << 15) -#define USB_POWER (1 << 21) -#define SYS_GREEN_LED (1 << 28) -#define SYS_ORANGE_LED (1 << 29) - -#define COPY_GREEN_LED (1 << 22) -#define COPY_RED_LED (1 << 23) - -#define PIN_USB_GREEN_LED 15 -#define PIN_USB_POWER 21 - -#define NSA310S_OE_LOW (~(0)) -#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER) - -/* high GPIO's */ -#define HDD2_GREEN_LED (1 << 2) -#define HDD2_POWER (1 << 1) - -#define NSA310S_OE_HIGH (~(0)) -#define NSA310S_VAL_HIGH (HDD2_POWER) - -/* PHY related */ -#define MV88E1318_PGADR_REG 22 -#define MV88E1318_MAC_CTRL_PG 2 -#define MV88E1318_MAC_CTRL_REG 21 -#define MV88E1318_RGMII_TX_CTRL (1 << 4) -#define MV88E1318_RGMII_RX_CTRL (1 << 5) -#define MV88E1318_LED_PG 3 -#define MV88E1318_LED_POL_REG 17 -#define MV88E1318_LED2_4 (1 << 4) -#define MV88E1318_LED2_5 (1 << 5) - -#endif /* __NSA310S_H */ diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index d003b7ee0a..fc29162abc 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 @@ -17,9 +18,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="nsa310s => " +CONFIG_SYS_PROMPT="NSA310s> " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)" @@ -49,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=1 # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 485a3fe42d..1e6b8d8b0e 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2015, 2021 Tony Dinh <mibodhi(a)gmail.com> + * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi(a)gmail.com> * Copyright (C) 2015 * Gerald Kerma <dreagle(a)doukki.net> * Luka Perkov <luka.perkov(a)sartura.hr> @@ -11,8 +11,6 @@ #include "mv-common.h" -/* environment variables configuration */ - /* default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -24,14 +22,11 @@ "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" /* Ethernet driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 1 -#endif /* CONFIG_CMD_NET */ -/* SATA driver configuration */ -#ifdef CONFIG_SATA +/* Support large HDDs for USB and SATA */ #define CONFIG_LBA48 -#endif /* CONFIG_SATA */ +#define CONFIG_SYS_64BIT_LBA #endif /* _CONFIG_NSA310S_H */ -- 2.30.2

2 1

[PATCH] net: marvell: mvgbe: Set PHY page 0 before phy_connect
by Tony Dinh 02 May '22

02 May '22

For most Kirkwood boards, the PHY page is already set to page 0 (in register 22) before phy_connect is invoked. But some board like the Zyxel NSA310S (which uses the network chip MV88E1318S), the PHY page is not set to page 0. There seems to be some bad data remained in register 22 when the uclass MVGBE about to invoke phy_connect(). This patch enables the uclass MVGBE to always set the PHY page to 0 before phy_connect. For reference, please see this discussion: [RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet. https://lists.denx.de/pipermail/u-boot/2022-April/480946.html This patch has been tested with the following Kirkwood boards: NSA310S (88F6702, network chip MV88E1318S) Sheevaplug (88F6281, network chip MV88E1318) Pogo V4 (88F6192, network chip 88E1116R) GF Home(88F6281, network chip 88E1116R) Dreamplug (88F6281, network chip MV88E1318) Dell Kace M300 (88F6282, network chip MV88E1318) - out of tree u-boot Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- drivers/net/mvgbe.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 954bf86121..d2db1e584a 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR; #define MV_PHY_ADR_REQUEST 0xee #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi) +#define MVGBE_PGADR_REG 22 #if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII) static int smi_wait_ready(struct mvgbe_device *dmvgbe) @@ -745,6 +746,9 @@ static struct phy_device *__mvgbe_phy_init(struct eth_device *dev, miiphy_write(dev->name, MV_PHY_ADR_REQUEST, MV_PHY_ADR_REQUEST, phyid); + /* Make sure the selected PHY page is 0 before connecting */ + miiphy_write(dev->name, phyid, MVGBE_PGADR_REG, 0); + phydev = phy_connect(bus, phyid, dev, phy_interface); if (!phydev) { printf("phy_connect failed\n"); -- 2.30.2

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[PATCH 1/5] arm: mvebu: turris_omnia: Fix RESET button message
by Pali Rohár 02 May '22

02 May '22

Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 83cfc80d1930..97292456f148 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -488,7 +488,7 @@ static void handle_reset_button(void) /* Ensure bootcmd_rescue is used by distroboot */ env_set("boot_targets", "rescue"); - printf("RESET button was pressed, overwriting bootcmd!\n"); + printf("RESET button was pressed, overwriting boot_targets!\n"); } else { /* * In case the user somehow managed to save environment with -- 2.20.1

3 18

[PATCH u-boot-marvell 0/8] Turris Omnia: Add support for configuring mSATA and WWAN slots via env variables
by Pali Rohár 02 May '22

02 May '22

Some mPCIe cards are broken and their PIN 43 incorrectly that card is mSATA. U-Boot SPL on Turris Omnia is using PIN 43 for configuring PCIe vs SATA functionality on SerDes. Allow to configure functionality via additional env variable "omnia_msata_slot" which may override PIN 43. To force PCIe mode for broken MiniPCIe cards, call U-Boot commands: => setenv omnia_msata_slot pcie => saveenv => reset PCI-SIG in PCIe Mini CEM 2.1 spec added support for USB3.0 mode to mPCIe cards. PCIe and USB3.0 functions share same pins (like SATA pins on mSATA with PCIe on mPCIe) and therefore only one function may be active at the same time. This mode was introduced by PCI-SIG specially for LTE/5G modems. One mPCIe slot on Turris Omnia is connected to A385 CPU SerDes which can be configured for PCIe or USB3.0 function. It is the slot with SIM card suitable for cellular modems. As PCIe Mini CEM 2.1 spec say that detection of PCIe vs USB3.0 functionality is platform specific, add a new U-Boot variable "omnia_wwan_slot" for configuring functionality in this slot. By default PCIe is used like before. To set this WWAN slot to USB3.0 mode, call U-Boot commands: => setenv omnia_wwan_slot usb3 => saveenv => reset Pali Rohár (8): env: sf: Allow to use env_sf_init_addr() at any stage arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function arm: mvebu: turris_omnia: Enable ENV support in SPL arm: mvebu: turris_omnia: Define only one serdes map variable arm: mvebu: turris_omnia: Allow to configure mSATA slot via env variable arm: mvebu: turris_omnia: Extract code for disabling sata/pcie arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN MiniPCIe slot board/CZ.NIC/turris_omnia/turris_omnia.c | 207 +++++++++++++++++------ configs/turris_omnia_defconfig | 1 + env/sf.c | 22 +-- 3 files changed, 163 insertions(+), 67 deletions(-) -- 2.20.1

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SquashFS not compiling due to missing __udivmoddi4 (x86)
by Sean Nyekjaer 02 May '22

02 May '22

Hi, I'm trying to build Squashfs for u-boot for x86. Looks like we are missing some libgcc helper function. ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read': /home/sean/development/siemens/u-boot/fs/squashfs/sqfs.c:1443: undefined reference to `__udivmoddi4' ld.bfd: /home/sean/development/siemens/u-boot/fs/squashfs/sqfs.c:1521: undefined reference to `__udivmoddi4' I can fix this by adding the function from arch/arc/lib/libgcc2.c to arch/x86/lib/div64.c, but I'm not sure it's the right way to do it :) Any hints? /Sean

2 1

[PATCH] configs: drop CONFIG_SPL_ABORT_ON_RAW_IMAGE
by Peng Fan (OSS) 02 May '22

02 May '22

From: Peng Fan <peng.fan(a)nxp.com> CONFIG_SPL_RAW_IMAGE_SUPPORT default y has been used to replace CONFIG_SPL_ABORT_ON_RAW_IMAGE for quite some time, so drop CONFIG_SPL_ABORT_ON_RAW_IMAGE. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- include/configs/capricorn-common.h | 1 - include/configs/cgtqmx8.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_beacon.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_beacon.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/imx8ulp_evk.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - 26 files changed, 26 deletions(-) diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 364bd50b591..aa4c9818638 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -26,7 +26,6 @@ #define CONFIG_MALLOC_F_ADDR 0x00120000 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 6da0483ef09..183170e833c 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -25,7 +25,6 @@ #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* Flat Device Tree Definitions */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index fcb46c16605..e6c220bf0a8 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -27,7 +27,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x912000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 4c9b5491f78..a9ca13a9da4 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -24,7 +24,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index ff98095d27d..b5c445df9ce 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -25,7 +25,6 @@ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 7dd66527c3d..98be481fce7 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -26,7 +26,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 1a439370c09..34993cafdaf 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -25,7 +25,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ # define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -# define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index c3e92b76141..ba8379db784 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -24,7 +24,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index c16dda5e22c..57b99d5a110 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -25,7 +25,6 @@ #define CONFIG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index b20e0a5553d..c0e9b0e9872 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 41062b139f8..6f36440b4f2 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index cbdd490a300..55691821f90 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index f2d9fa8cbf9..7c2babbb0ae 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -39,7 +39,6 @@ * set \ */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #if defined(CONFIG_NAND_BOOT) #define CONFIG_SPL_NAND_MXS diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 5242b56ad8c..161f2e8d366 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 989486aa6dc..34d64f7ae45 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -26,7 +26,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index f7929e5867e..98257e8ba81 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -27,7 +27,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index f6410114b76..19381b6b778 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -24,7 +24,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* ENET Config */ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 61d56e269ac..ddcd6cf2319 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -26,7 +26,6 @@ #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #ifdef CONFIG_AHAB_BOOT diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 26dc4ded030..dee6852df4c 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -24,7 +24,6 @@ #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #ifdef CONFIG_AHAB_BOOT diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 05df43b39b4..190bbb8c13c 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -23,7 +23,6 @@ #define CONFIG_MALLOC_F_ADDR 0x22040000 -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index e8e92920dcb..d519935b064 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -28,7 +28,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PFUZE100 diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 564b8125ba3..b70c31ca633 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -27,7 +27,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 3e4315f2b81..95d70bb92d1 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 95845276e7b..1de54e6431c 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -24,7 +24,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* ENET Config */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 3d7f5a3380e..a8fb5c63b7f 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -26,7 +26,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index b166e750c27..d6bb552e875 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -25,7 +25,6 @@ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE #define CONFIG_POWER_PCA9450 -- 2.36.0

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