March 2022 - U-Boot

[PATCH 0/7] Add Gateworks System Controller driver
by Tim Harvey 12 Apr '22

12 Apr '22

This series Adds a driver for the Gateworks System Controller (GSC) present on boards from Gateworks Corporation. Patches 1-4 are gw_ventana cleanups to prepare for using the DM_I2C based driver. Patch 5 is for the driver itself Patch 6 moves gw_ventana over to using the GSC driver Patch 7 moves venice over to using the GSC driver Tim Tim Harvey (7): board: gateworks: gw_ventana: convert to DM_I2C board: gateworks: gw_ventana: move SPL uart config out of common board: gateworks: gw_ventana: move GPIO config out of common board: gateworks: gw_ventana: move ft_early_fixups out of common drivers: misc: add Gateworks System Controller driver board: gateworks: gw_ventana: use comomn GSC driver board: gateworks: venice: use common GSC driver MAINTAINERS | 6 + arch/arm/dts/imx8mm-venice-u-boot.dtsi | 4 + arch/arm/dts/imx8mm-venice.dts | 7 + arch/arm/dts/imx8mn-venice-u-boot.dtsi | 4 + arch/arm/dts/imx8mn-venice.dts | 7 + arch/arm/mach-imx/imx8m/Kconfig | 4 + arch/arm/mach-imx/mx6/Kconfig | 2 + board/gateworks/gw_ventana/Kconfig | 8 - board/gateworks/gw_ventana/Makefile | 2 +- board/gateworks/gw_ventana/common.c | 527 +------------ board/gateworks/gw_ventana/common.h | 14 +- board/gateworks/gw_ventana/eeprom.c | 224 +++++- .../gw_ventana/{ventana_eeprom.h => eeprom.h} | 16 +- board/gateworks/gw_ventana/gsc.c | 425 ----------- board/gateworks/gw_ventana/gsc.h | 71 -- board/gateworks/gw_ventana/gw_ventana.c | 290 ++++++-- board/gateworks/gw_ventana/gw_ventana_spl.c | 311 +++++++- board/gateworks/venice/Makefile | 2 +- board/gateworks/venice/eeprom.c | 353 +++++++++ board/gateworks/venice/{gsc.h => eeprom.h} | 26 +- board/gateworks/venice/gsc.c | 700 ------------------ board/gateworks/venice/spl.c | 53 +- board/gateworks/venice/venice.c | 27 +- configs/gwventana_emmc_defconfig | 4 +- configs/gwventana_gw5904_defconfig | 4 +- configs/gwventana_nand_defconfig | 4 +- configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_venice_defconfig | 3 +- drivers/misc/Kconfig | 8 + drivers/misc/Makefile | 1 + drivers/misc/gsc.c | 633 ++++++++++++++++ include/configs/gw_ventana.h | 3 - include/gsc.h | 21 + scripts/config_whitelist.txt | 1 - 34 files changed, 1866 insertions(+), 1900 deletions(-) rename board/gateworks/gw_ventana/{ventana_eeprom.h => eeprom.h} (82%) delete mode 100644 board/gateworks/gw_ventana/gsc.c delete mode 100644 board/gateworks/gw_ventana/gsc.h create mode 100644 board/gateworks/venice/eeprom.c rename board/gateworks/venice/{gsc.h => eeprom.h} (55%) delete mode 100644 board/gateworks/venice/gsc.c create mode 100644 drivers/misc/gsc.c create mode 100644 include/gsc.h -- 2.17.1

2 10

[PATCH 1/2] arm: imx: imx8mm_beacon: Remove unnecessary configs
by Adam Ford 12 Apr '22

12 Apr '22

Because the Beacon imx8mm board uses device tree for MMC/SD and Ethernet, there is no need to have some of the config options. It's handled by the device tree. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index e4805951fa..7c17f14964 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -99,14 +99,4 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) - -/* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 - -/* FEC*/ -#define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC -#define IMX_FEC_BASE 0x30BE0000 - #endif -- 2.34.1

3 5

[PATCH] warp7: Remove UART initialization code
by Fabio Estevam 12 Apr '22

12 Apr '22

From: Fabio Estevam <festevam(a)denx.de> With DM_SERIAL selected, it is no longer needed board code to initialize the UART. Describe the nodes that require dm-pre-reloc, which allows the DM model to configure the UART pinctrl early. Remove the now unneeded board UART initialization. Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- arch/arm/dts/imx7s-warp-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/imx7s.dtsi | 2 +- board/warp7/warp7.c | 20 -------------------- configs/warp7_defconfig | 1 + 4 files changed, 18 insertions(+), 21 deletions(-) diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-u-boot.dtsi index 6319840b1ce3..bc4b5745fc7c 100644 --- a/arch/arm/dts/imx7s-warp-u-boot.dtsi +++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi @@ -8,3 +8,19 @@ stdout-path = &uart1; }; }; + +&aips3 { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart1 { + u-boot,dm-pre-reloc; +}; + +&soc { + u-boot,dm-pre-reloc; +}; + +&uart1 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/imx7s.dtsi b/arch/arm/dts/imx7s.dtsi index 483824fc06e6..cf0206dd0f08 100644 --- a/arch/arm/dts/imx7s.dtsi +++ b/arch/arm/dts/imx7s.dtsi @@ -184,7 +184,7 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; - soc { + soc: soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c index c5c5433048dd..95b8e82dd1cc 100644 --- a/board/warp7/warp7.c +++ b/board/warp7/warp7.c @@ -27,9 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \ - PAD_CTL_HYS) - int dram_init(void) { gd->ram_size = PHYS_SDRAM_SIZE; @@ -46,23 +43,6 @@ static iomux_v3_cfg_t const wdog_pads[] = { MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), }; -static iomux_v3_cfg_t const uart1_pads[] = { - MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), - MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -}; - -int board_early_init_f(void) -{ - setup_iomux_uart(); - - return 0; -} - #ifdef CONFIG_DM_PMIC int power_init_board(void) { diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index a76565edfd4a..be69174217b0 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" +# CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y -- 2.25.1

3 2

[PATCH] arm: imx: parse-container: add some missing end of line
by Clément Péron 12 Apr '22

12 Apr '22

Some printf() have strings that doesn't terminate with end of line and make the output hard to read. Signed-off-by: Clément Péron <peron.clem(a)gmail.com> --- arch/arm/mach-imx/parse-container.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/parse-container.c b/arch/arm/mach-imx/parse-container.c index 039a4c7303..a4214d5376 100644 --- a/arch/arm/mach-imx/parse-container.c +++ b/arch/arm/mach-imx/parse-container.c @@ -142,12 +142,12 @@ static int read_auth_container(struct spl_image_info *spl_image, return -EIO; if (container->tag != 0x87 && container->version != 0x0) { - printf("Wrong container header"); + printf("Wrong container header\n"); return -ENOENT; } if (!container->num_images) { - printf("Wrong container, no image found"); + printf("Wrong container, no image found\n"); return -ENOENT; } -- 2.32.0

4 3

[PATCH] ARM: dts: net: dwc_eth_qos: Fix i.MX8MP compatible string
by Marek Vasut 12 Apr '22

12 Apr '22

The correct compatible string for i.MX8MP variant of DWC EQoS MAC is "nxp,imx8mp-dwmac-eqos", use it. Drop the two current users of the current wrong compatible string to avoid breaking them. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/dts/imx8mp-evk-u-boot.dtsi | 1 - arch/arm/dts/imx8mp-verdin-u-boot.dtsi | 1 - drivers/net/dwc_eth_qos.c | 2 +- 3 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index ab849ebaaca..7c3789273da 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -112,7 +112,6 @@ }; &eqos { - compatible = "fsl,imx-eqos"; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; diff --git a/arch/arm/dts/imx8mp-verdin-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-u-boot.dtsi index a57ad45ed63..26140a79ebe 100644 --- a/arch/arm/dts/imx8mp-verdin-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-verdin-u-boot.dtsi @@ -30,7 +30,6 @@ }; &eqos { - compatible = "fsl,imx-eqos"; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 22dad5b2030..ea0c2cfa5b2 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -2032,7 +2032,7 @@ static const struct udevice_id eqos_ids[] = { #endif #if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX) { - .compatible = "fsl,imx-eqos", + .compatible = "nxp,imx8mp-dwmac-eqos", .data = (ulong)&eqos_imx_config }, #endif -- 2.34.1

5 4

[PATCH] pmic: pca9450: Add PCA9450C compatible string
by Marek Vasut 12 Apr '22

12 Apr '22

Add DT compatible string for PCA9450C PMIC. This is a variant of the PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator, and is software-wise compatible with the PCA9450B. This variant of the PCA9450 is designed for use as companion PMIC for i.MX8MP. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/power/pmic/pca9450.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index a886647f193..2394b196c56 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -83,6 +83,7 @@ static struct dm_pmic_ops pca9450_ops = { static const struct udevice_id pca9450_ids[] = { { .compatible = "nxp,pca9450a", .data = 0x25, }, { .compatible = "nxp,pca9450b", .data = 0x25, }, + { .compatible = "nxp,pca9450c", .data = 0x25, }, { } }; -- 2.34.1

4 3

[PATCH] imx: imx8mm/imx8mn_beacon: Remove redundant code
by Adam Ford 12 Apr '22

12 Apr '22

The Ethernet controller and PHY use the device tree info to configure themselves, so it's not necessary to manually do it in the board file. This permits the removal of a bunch of headers as well. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c index c228bbf777..204235a3f8 100644 --- a/board/beacon/imx8mm/imx8mm_beacon.c +++ b/board/beacon/imx8mm/imx8mm_beacon.c @@ -1,52 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Compass Electronics Group, LLC + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks */ -#include <common.h> -#include <miiphy.h> -#include <netdev.h> #include <asm/global_data.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <asm/io.h> - DECLARE_GLOBAL_DATA_PTR; -#if IS_ENABLED(CONFIG_FEC_MXC) -static int setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} -#endif - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; } diff --git a/board/beacon/imx8mn/imx8mn_beacon.c b/board/beacon/imx8mn/imx8mn_beacon.c index 6397dac872..204235a3f8 100644 --- a/board/beacon/imx8mn/imx8mn_beacon.c +++ b/board/beacon/imx8mn/imx8mn_beacon.c @@ -1,52 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Compass Electronics Group, LLC + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks */ -#include <common.h> -#include <miiphy.h> -#include <netdev.h> - -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> #include <asm/global_data.h> -#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; -#if IS_ENABLED(CONFIG_FEC_MXC) -static int setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} -#endif - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; } -- 2.34.1

4 3

[PATCH v1 1/1] Makefile.lib: Re-use $(UBOOTINCLUDE) in dtc_cpp_flags
by Andy Shevchenko 12 Apr '22

12 Apr '22

As in ASL case use same basic set of the inclusions. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- scripts/Makefile.lib | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index c14da10de780..2ff39d39dc8a 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -185,12 +185,10 @@ u_boot_dtsi = $(strip $(u_boot_dtsi_options_debug) \ # Modified for U-Boot dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \ + $(UBOOTINCLUDE) \ -I$(srctree)/arch/$(ARCH)/dts \ -I$(srctree)/arch/$(ARCH)/dts/include \ - -Iinclude \ -I$(srctree)/include \ - -I$(srctree)/arch/$(ARCH)/include \ - -include $(srctree)/include/linux/kconfig.h \ -D__ASSEMBLY__ \ -undef -D__DTS__ -- 2.35.1

2 1

[PATCH] include/linux/byteorder: fix cpu_to_be32_array()
by Heinrich Schuchardt 12 Apr '22

12 Apr '22

In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int counter to a size_t parameter. Correct the type of the counter. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/linux/byteorder/generic.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/byteorder/generic.h b/include/linux/byteorder/generic.h index 8fae186d1a..bee0ff6033 100644 --- a/include/linux/byteorder/generic.h +++ b/include/linux/byteorder/generic.h @@ -190,7 +190,7 @@ static inline void be64_add_cpu(__be64 *var, u64 val) static inline void cpu_to_be32_array(__be32 *dst, const u32 *src, size_t len) { - int i; + size_t i; for (i = 0; i < len; i++) dst[i] = cpu_to_be32(src[i]); @@ -198,7 +198,7 @@ static inline void cpu_to_be32_array(__be32 *dst, const u32 *src, size_t len) static inline void be32_to_cpu_array(u32 *dst, const __be32 *src, size_t len) { - int i; + size_t i; for (i = 0; i < len; i++) dst[i] = be32_to_cpu(src[i]); -- 2.31.1

2 4

[PATCH v11 00/14] Add CAAM driver model support
by Gaurav Jain 12 Apr '22

12 Apr '22

This patchset adds the support for following: 1) CAAM Driver model for all i.MX, layerscape, PPC platforms. 2) Added crypto node in device tree files. 3) fix build issue for mx6sabre: Remove SPL DTB related configs and SPL_OF_CONTROL. i.MX platforms: i.MX6, i.MX7, i.MX7ULP, i.MX8MM/MN/MP/MQ, i.MX8QM/QXP Layerscape platforms: LS1021, LS1012, LS1028, LS1043, LS1046, LS1088, LS2088, LX2160, LX2162 Powerpc platforms: P3041, P4080, P5040, P2041, T1024, T1042, T2080, T4240 changes since v10: - rebase to latest master - iMX8M: removed JR0 disablement code for imx8m. changes since v9: - added IS_ENABLED(CONFIG_FSL_CAAM) check before probing CAAM driver. - FSL_CAAM enablement is moved to defconfigs for layerscape, powerpc. changes since v8: - rebase to latest master - removed patch "crypto/fsl: Improve hwrng performance in kernel". - moved FSL_CAAM config to board defconfig for Layerscape platforms. - moved MISC config select to "config FSL_CAAM" as "select MISC if DM". changes since v7: - rebase to latest master - corrected the order of include files as per coding style in jr.c. https://www.denx.de/wiki/U-Boot/CodingStyle - added brackets around #defines for -ve number in jr.h - added comments for struct caam_regs in jr.h changes since v6: - rebase to latest master - added caam_jr_ioctl() operation which calls run_descriptor_jr(). - removed CONFIG_ARCH_IMX8 config from JR driver. - removed FSL_BLOB config changes since v5: - rebase to latest master - updated BIT() macro for JRDID in drivers/crypto/fsl/jr.h - removed auto select FSL_BLOB from CMD_BLOB config. - removed patch for blob key encryption key(bkek), random number generation. - updated patch description for improving hwrng performance in kernel. - removed sec_init() from kontron/sl28. - for LS1028A architecture, enable CAAM only for LS1028AQDS and LS1028ARDB. changes since v4: - rebase to latest master - updated caam_jr_probe() with livetree APIs. - imx8m: moved jr0 disable code to *-uboot.dtsi files. changes since v3: - rebase to latest master - fixed build error when new file arch/powerpc/include/asm/u-boot-ppc.h is included from assembly files. - removed arch/arm/dts/fsl-ls1028a.dtsi as it is conflicting with the series https://lore.kernel.org/u-boot/20211013161427.612033-1-michael@walle.cc/ Gaurav Jain (13): crypto/fsl: Add support for CAAM Job ring driver model i.MX8M: crypto: updated device tree for supporting DM in SPL crypto/fsl: i.MX8M: Enable Job ring driver model. i.MX6: Enable Job ring driver model. i.MX7: Enable Job ring driver model. i.MX7ULP: Enable Job ring driver model. i.MX8: Add crypto node in device tree crypto/fsl: i.MX8: Enable Job ring driver model. Layerscape: Add crypto node in device tree Layerscape: Enable Job ring driver model. PPC: Add crypto node in device tree PPC: Enable Job ring driver model. update CAAM MAINTAINER Ye Li (1): mx6sabre: Remove unnecessary SPL configs MAINTAINERS | 6 + arch/arm/Kconfig | 9 +- arch/arm/cpu/armv7/ls102xa/cpu.c | 18 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 11 +- arch/arm/dts/fsl-imx8dx.dtsi | 61 ++- arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 34 +- arch/arm/dts/fsl-imx8qm.dtsi | 61 ++- arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 34 +- arch/arm/dts/fsl-ls1012a.dtsi | 46 ++- arch/arm/dts/fsl-ls1043a.dtsi | 45 ++- arch/arm/dts/fsl-ls1046a.dtsi | 44 +++ arch/arm/dts/fsl-ls1088a.dtsi | 39 ++ arch/arm/dts/fsl-ls2080a.dtsi | 39 ++ arch/arm/dts/fsl-lx2160a.dtsi | 41 +- arch/arm/dts/imx7ulp.dtsi | 24 ++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 18 +- arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 18 +- arch/arm/dts/imx8mp-evk-u-boot.dtsi | 18 +- arch/arm/dts/ls1021a.dtsi | 40 ++ arch/arm/include/asm/arch-imx8/imx-regs.h | 5 +- arch/arm/mach-imx/cmd_dek.c | 1 + arch/arm/mach-imx/imx8/Kconfig | 7 + arch/arm/mach-imx/imx8/cpu.c | 18 +- arch/arm/mach-imx/imx8m/Kconfig | 13 + arch/arm/mach-imx/imx8m/soc.c | 11 +- arch/arm/mach-imx/mx6/Kconfig | 10 + arch/arm/mach-imx/mx6/soc.c | 13 +- arch/arm/mach-imx/mx7/Kconfig | 1 + arch/arm/mach-imx/mx7/soc.c | 12 +- arch/arm/mach-imx/mx7ulp/Kconfig | 2 + arch/arm/mach-imx/mx7ulp/soc.c | 18 + arch/powerpc/cpu/mpc85xx/cpu_init.c | 19 +- arch/powerpc/dts/p2041si-post.dtsi | 1 + arch/powerpc/dts/p3041si-post.dtsi | 1 + arch/powerpc/dts/p4080si-post.dtsi | 1 + arch/powerpc/dts/p5040si-post.dtsi | 1 + arch/powerpc/dts/qoriq-sec4.0-0.dtsi | 74 ++++ arch/powerpc/dts/qoriq-sec4.2-0.dtsi | 83 ++++ arch/powerpc/dts/qoriq-sec5.2-0.dtsi | 92 +++++ arch/powerpc/dts/t1023si-post.dtsi | 1 + arch/powerpc/dts/t1042si-post.dtsi | 1 + arch/powerpc/dts/t2080si-post.dtsi | 1 + arch/powerpc/dts/t4240si-post.dtsi | 1 + arch/powerpc/include/asm/u-boot-ppc.h | 17 + arch/powerpc/include/asm/u-boot.h | 1 + board/freescale/imx8mm_evk/spl.c | 10 +- board/freescale/imx8mn_evk/spl.c | 9 +- board/freescale/imx8mp_evk/spl.c | 14 +- board/freescale/imx8mq_evk/spl.c | 8 +- board/freescale/imx8qm_mek/spl.c | 6 +- board/freescale/imx8qxp_mek/spl.c | 6 +- board/freescale/ls1012afrdm/ls1012afrdm.c | 7 +- board/freescale/ls1012aqds/ls1012aqds.c | 6 +- board/freescale/ls1012ardb/ls1012ardb.c | 6 +- board/freescale/ls1021aiot/ls1021aiot.c | 6 +- board/freescale/ls1021aqds/ls1021aqds.c | 6 +- board/freescale/ls1021atsn/ls1021atsn.c | 7 +- board/freescale/ls1021atwr/ls1021atwr.c | 8 +- board/freescale/ls1028a/ls1028a.c | 6 +- board/freescale/ls1043ardb/ls1043ardb.c | 6 +- board/freescale/ls1046afrwy/ls1046afrwy.c | 7 +- board/freescale/ls1046aqds/ls1046aqds.c | 7 +- board/freescale/ls1046ardb/ls1046ardb.c | 6 +- board/freescale/ls1088a/ls1088a.c | 4 - board/freescale/ls2080aqds/ls2080aqds.c | 6 +- board/freescale/ls2080ardb/ls2080ardb.c | 9 +- board/freescale/lx2160a/lx2160a.c | 5 - board/kontron/sl28/sl28.c | 3 - configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/ls1021aiot_qspi_defconfig | 1 + configs/ls1021aiot_sdcard_defconfig | 1 + configs/ls1021aqds_ddr4_nor_defconfig | 1 + configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_defconfig | 1 + configs/ls1043aqds_lpuart_defconfig | 1 + configs/ls1043aqds_nand_defconfig | 1 + configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + configs/ls1046afrwy_tfa_defconfig | 1 + configs/ls1046aqds_defconfig | 1 + configs/ls1046aqds_lpuart_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + configs/mx6sabreauto_defconfig | 2 - configs/mx6sabresd_defconfig | 4 - drivers/crypto/fsl/Kconfig | 3 +- drivers/crypto/fsl/jr.c | 364 ++++++++++++------ drivers/crypto/fsl/jr.h | 31 +- include/fsl_sec.h | 12 +- 155 files changed, 1413 insertions(+), 253 deletions(-) create mode 100644 arch/powerpc/dts/qoriq-sec4.0-0.dtsi create mode 100644 arch/powerpc/dts/qoriq-sec4.2-0.dtsi create mode 100644 arch/powerpc/dts/qoriq-sec5.2-0.dtsi create mode 100644 arch/powerpc/include/asm/u-boot-ppc.h -- 2.17.1

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