March 2022 - U-Boot

[PATCH 1/2] ARM: imx: imx8m: Add 933 MHz PLL settings
by Marek Vasut 12 Apr '22

12 Apr '22

Add settings for operating PLL at 933 MHz. This setting is useful in case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 76132defc21..4db55f86081 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -48,6 +48,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) #ifdef CONFIG_SPL_BUILD static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), + PLL_1443X_RATE(933000000U, 311, 4, 1, 0), PLL_1443X_RATE(800000000U, 300, 9, 0, 0), PLL_1443X_RATE(750000000U, 250, 8, 0, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0), -- 2.34.1

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[PATCH] mtd: nand: mxs_nand_spl: Remove the page aligned access
by Ye Li 12 Apr '22

12 Apr '22

The mxs_nand_spl driver can support to read from page unaligned offset, so don't need to set bl_len to ask spl_load_simple_fit to handle the page unaligned access. Actually spl_load_simple_fit has two parts of reading: spl_simple_fit_read and spl_load_fit_image. The spl_load_fit_image can handle the page unaligned offset, but the spl_simple_fit_read can't do it. spl_simple_fit_read requires the FIT location at page aligned offset. Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl to use page unaligned read by driver. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/mtd/nand/raw/mxs_nand_spl.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index 9e0b8afb..59a67ee 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -283,11 +283,6 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) return 0; } -struct mtd_info *nand_get_mtd(void) -{ - return mtd; -} - int nand_default_bbt(struct mtd_info *mtd) { return 0; -- 2.7.4

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[PATCH] pinctrl: nxp: don't automatically select DEVRES
by Angus Ainslie 12 Apr '22

12 Apr '22

If we select DEVRES here then it breaks building an imx8m SPL without DEVRES support. Signed-off-by: Angus Ainslie <angus(a)akkea.ca> --- drivers/pinctrl/nxp/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig index 4fb0916a37..3657e9deb9 100644 --- a/drivers/pinctrl/nxp/Kconfig +++ b/drivers/pinctrl/nxp/Kconfig @@ -92,7 +92,6 @@ config PINCTRL_IMX8 config PINCTRL_IMX8M bool "IMX8M pinctrl driver" depends on ARCH_IMX8M && PINCTRL_FULL - select DEVRES select PINCTRL_IMX help Say Y here to enable the imx8m pinctrl driver -- 2.25.1

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[PATCH 0/2] enable DM_SERIAL on imx8mn-evk and imx8mn-ddr4-evk
by Heiko Thiery 12 Apr '22

12 Apr '22

I was only able to test it on a 8MNANOD3L-EVK board. Please help testing this change on the other 2 eval boards (8MNANOLPD4-EVK, 8MNANOD4-EVK). Heiko Thiery (2): ARM: imx: imx8mn-evk: enable DM_SERIAL ARM: imx: imx8mn-ddr4-evk: enable DM_SERIAL configs/imx8mn_ddr4_evk_defconfig | 2 ++ configs/imx8mn_evk_defconfig | 2 ++ 2 files changed, 4 insertions(+) -- 2.30.2

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[PATCH 1/5] imx8mm-cl-iot-gate: Add SPL EEPROM support
by Fabio Estevam 12 Apr '22

12 Apr '22

From: Fabio Estevam <festevam(a)denx.de> imx8mm-cl-iot-gate supports multiple DDR sizes and models. The DDR type can be retrieved from the EEPROM, so add SPL code that can be used to get the DDR information. Based on the original code from Compulab's U-Boot. Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- board/compulab/imx8mm-cl-iot-gate/Makefile | 2 +- .../compulab/imx8mm-cl-iot-gate/eeprom_spl.c | 130 ++++++++++++++++++ 2 files changed, 131 insertions(+), 1 deletion(-) create mode 100644 board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c diff --git a/board/compulab/imx8mm-cl-iot-gate/Makefile b/board/compulab/imx8mm-cl-iot-gate/Makefile index 3a2bfc4dc4b1..3800b21a6fd0 100644 --- a/board/compulab/imx8mm-cl-iot-gate/Makefile +++ b/board/compulab/imx8mm-cl-iot-gate/Makefile @@ -8,6 +8,6 @@ obj-y += imx8mm-cl-iot-gate.o ifdef CONFIG_SPL_BUILD -obj-y += spl.o +obj-y += spl.o eeprom_spl.o obj-y += ddr/ endif diff --git a/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c new file mode 100644 index 000000000000..ee6d2bb0016a --- /dev/null +++ b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* (C) Copyright 2019 CompuLab, Ltd. <www.compulab.co.il> */ + +#include <common.h> +#include <i2c.h> +#include <linux/kernel.h> +#include <asm/arch/imx8mq_pins.h> +#include <asm/mach-imx/gpio.h> +#include <asm-generic/gpio.h> +#include <asm/setup.h> +#include <linux/delay.h> + +#ifdef CONFIG_SPL_BUILD + +#define CONFIG_SYS_I2C_EEPROM_ADDR_P1 0x51 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + +static iomux_v3_cfg_t const eeprom_pads[] = { + IMX8MQ_PAD_GPIO1_IO13__GPIO1_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define EEPROM_WP_GPIO IMX_GPIO_NR(1, 13) + +static void cl_eeprom_we(int enable) +{ + static int done; + + if (done) { + gpio_direction_output(EEPROM_WP_GPIO, enable); + return; + } + + imx_iomux_v3_setup_multiple_pads(eeprom_pads, ARRAY_SIZE(eeprom_pads)); + gpio_request(EEPROM_WP_GPIO, "eeprom_wp"); + gpio_direction_output(EEPROM_WP_GPIO, enable); + done = 1; +} + +static int cl_eeprom_read(uint offset, uchar *buf, int len) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(1, CONFIG_SYS_I2C_EEPROM_ADDR_P1, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev); + if (ret) { + printf("%s: Cannot find EEPROM: %d\n", __func__, ret); + return ret; + } + + return dm_i2c_read(dev, offset, buf, len); +} + +static int cl_eeprom_write(uint offset, uchar *buf, int len) +{ + struct udevice *dev; + int ret; + + cl_eeprom_we(1); + + ret = i2c_get_chip_for_busnum(1, CONFIG_SYS_I2C_EEPROM_ADDR_P1, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev); + if (ret) { + printf("%s: Cannot find EEPROM: %d\n", __func__, ret); + return ret; + } + + return dm_i2c_write(dev, offset, buf, len); +} + +/* Reserved for fututre use area */ +#define BOARD_DDRINFO_OFFSET 0x40 +#define BOARD_DDR_SIZE 4 +static u32 board_ddrinfo = 0xdeadbeef; + +#define BOARD_DDRSUBIND_OFFSET 0x44 +#define BOARD_DDRSUBIND_SIZE 1 +static u8 board_ddrsubind = 0xff; + +#define BOARD_OSIZE_OFFSET 0x80 +#define BOARD_OSIZE_SIZE 4 +static u32 board_osize = 0xdeadbeef; + +#define BOARD_DDRINFO_VALID(A) ((A) != 0xdeadbeef) + +u32 cl_eeprom_get_ddrinfo(void) +{ + if (!BOARD_DDRINFO_VALID(board_ddrinfo)) { + if (cl_eeprom_read(BOARD_DDRINFO_OFFSET, (uchar *)&board_ddrinfo, BOARD_DDR_SIZE)) + return 0; + } + return board_ddrinfo; +}; + +u32 cl_eeprom_set_ddrinfo(u32 ddrinfo) +{ + if (cl_eeprom_write(BOARD_DDRINFO_OFFSET, (uchar *)&ddrinfo, BOARD_DDR_SIZE)) + return 0; + + board_ddrinfo = ddrinfo; + + return board_ddrinfo; +}; + +u8 cl_eeprom_get_subind(void) +{ + if (cl_eeprom_read(BOARD_DDRSUBIND_OFFSET, (uchar *)&board_ddrsubind, BOARD_DDRSUBIND_SIZE)) + return 0xff; + + return board_ddrsubind; +}; + +u8 cl_eeprom_set_subind(u8 ddrsubind) +{ + if (cl_eeprom_write(BOARD_DDRSUBIND_OFFSET, (uchar *)&ddrsubind, BOARD_DDRSUBIND_SIZE)) + return 0xff; + board_ddrsubind = ddrsubind; + + return board_ddrsubind; +}; + +/* override-size ifaces */ +u32 cl_eeprom_get_osize(void) +{ + if (cl_eeprom_read(BOARD_OSIZE_OFFSET, (uchar *)&board_osize, BOARD_OSIZE_SIZE)) + return 0; + + return board_osize; +}; +#endif -- 2.25.1

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[PATCH v5 0/9] imx8mm: add pwm-imx backlight support
by Tommaso Merciai 12 Apr '22

12 Apr '22

Hi, This series add support for pwm/backlight on i.MX8MM evk, separe also CONFIG_DM_PWM pwm-imx implementation from non dm implementation moving pwm-imx-util into pwm-imx with driver refactoring. 1. add pwm ctrl registers fields for i.MX8MM SOC 2. add pwm_regs struct for i.MX8MM SOC 3. add pwm clocks support for i.MX8MM SOC 4. move pwm-imx-util into pwm-imx 5. get and enable per/ipg clock using dm 6. introduce pwm_dm_imx_get_parms 7. separe dm from non dm implementation into pwm-imx driver 8. add pwm1/backlight dts support for imx8mm_evk 9. add pwm backlight configs support for imx8mm_evk Tommaso Merciai (9): arch: mach-imx: imx8m: add pwm ctrl registers fields defines arch: mach-imx: imx8m: add pwm_regs struct in imx-regs clk: imx8mm: add pwm clocks support drivers: pwm: pwm-imx: move pwm-imx-util into pwm-imx driver: pwm: pwm-imx: get and enable per/ipg clock using dm driver: pwm: pwm-imx: introduce pwm_dm_imx_get_parms driver: pwm: pwm-imx: separe dm from non dm implementation arm: dts: imx8mm_evk: add pwm1/backlight support configs: imx8mm_evk: add pwm backlight support arch/arm/dts/imx8mm-evk.dtsi | 21 +++ arch/arm/include/asm/arch-imx8m/imx-regs.h | 17 +++ configs/imx8mm_evk_defconfig | 4 + drivers/clk/imx/clk-imx8mm.c | 28 ++++ drivers/pwm/Makefile | 2 +- drivers/pwm/pwm-imx-util.c | 80 ----------- drivers/pwm/pwm-imx-util.h | 15 -- drivers/pwm/pwm-imx.c | 155 +++++++++++++++++++-- 8 files changed, 212 insertions(+), 110 deletions(-) delete mode 100644 drivers/pwm/pwm-imx-util.c delete mode 100644 drivers/pwm/pwm-imx-util.h -- 2.25.1

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[PATCH] imx8ulp: Disable SPL exception vector
by Ye Li 12 Apr '22

12 Apr '22

Disable SPL exception vector which causes issue to ROM patch execution when SPL calling ROM API. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- arch/arm/mach-imx/imx8ulp/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-imx/imx8ulp/Kconfig b/arch/arm/mach-imx/imx8ulp/Kconfig index 963fc93..d8b5ef7 100644 --- a/arch/arm/mach-imx/imx8ulp/Kconfig +++ b/arch/arm/mach-imx/imx8ulp/Kconfig @@ -2,7 +2,6 @@ if ARCH_IMX8ULP config IMX8ULP bool - select ARMV8_SPL_EXCEPTION_VECTORS config SYS_SOC default "imx8ulp" -- 2.7.4

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[PATCH] ARM: imx: Decode ECSPI env location from i.MX8M ROMAPI tables
by Marek Vasut 12 Apr '22

12 Apr '22

Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables. This is necessary to correctly identify env is in SPI NOR when the system boots from SPI NOR attached to ECSPI. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/include/asm/mach-imx/sys_proto.h | 1 + arch/arm/mach-imx/imx8m/soc.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 0c0c7814fb2..309f8d17959 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -159,6 +159,7 @@ enum boot_dev_type_e { BT_DEV_TYPE_MMC = 2, BT_DEV_TYPE_NAND = 3, BT_DEV_TYPE_FLEXSPINOR = 4, + BT_DEV_TYPE_SPI_NOR = 6, BT_DEV_TYPE_USB = 0xE, BT_DEV_TYPE_MEM_DEV = 0xF, diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 1a5a391443d..ccbbe545810 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -597,6 +597,9 @@ enum boot_device get_boot_device(void) case BT_DEV_TYPE_FLEXSPINOR: boot_dev = QSPI_BOOT; break; + case BT_DEV_TYPE_SPI_NOR: + boot_dev = SPI_NOR_BOOT; + break; case BT_DEV_TYPE_USB: boot_dev = USB_BOOT; break; @@ -1335,6 +1338,7 @@ enum env_location env_get_location(enum env_operation op, int prio) switch (dev) { case QSPI_BOOT: + case SPI_NOR_BOOT: if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) return ENVL_SPI_FLASH; return ENVL_NOWHERE; -- 2.35.1

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[PATCH v1] arm: dts: imx8mn_var_som: Set atf-bl31 blob entry type
by Ariel D'Alessandro 12 Apr '22

12 Apr '22

Configure binman ATF blob entry type to use the path from the BL31 environment variable, if defined. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro(a)collabora.com> --- arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi index ce475885df6..6e37622cca7 100644 --- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi @@ -200,7 +200,7 @@ atf_blob { filename = "bl31.bin"; - type = "blob-ext"; + type = "atf-bl31"; }; }; -- 2.34.1

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[PATCH v7 0/3] Add a clock driver for the imx8mq
by Angus Ainslie 12 Apr '22

12 Apr '22

This is a DM clock driver for the imx8mq based on the linux kernel driver and the u-boot imx8mm clock driver. It also removes some code duplication in the imx8m[nmp] clock drivers. Changes since v6 Fixed unused variable warning Changes since v5 Added UART clocks Added video clocks Added DRAM clocks Changes since v4 Rebased onto [1] so patch 4 of 4 was dropped. Added CLK_COMPOSITE_CCF Fixed const* clock definitions Changes since v3: Fixed driver spelling Moved rate macros out of the header into the dot c Changes since v2: Added kernel commit IDs Re-factored rate table code to remove duplication Remove duplicate code by creating a common clk-imx8m Changes since v1: More verbose clock driver description Added forgotten dt-bindings Synced PLL frequencies with mainline kernel [1] https://patchwork.ozlabs.org/project/uboot/patch/20220320203446.740178-2-se… Angus Ainslie (3): dt-bindings: imx8mq-clock: add mainline definitions clk: imx8mq: Add a clock driver for the imx8mq clk: imx8m: reduce rate table duplication drivers/clk/imx/Kconfig | 18 + drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-imx8mm.c | 60 +-- drivers/clk/imx/clk-imx8mn.c | 60 +-- drivers/clk/imx/clk-imx8mp.c | 65 +-- drivers/clk/imx/clk-imx8mq.c | 503 +++++++++++++++++++++++ drivers/clk/imx/clk-pll14xx.c | 61 +++ drivers/clk/imx/clk.h | 4 + include/dt-bindings/clock/imx8mq-clock.h | 16 +- 9 files changed, 623 insertions(+), 166 deletions(-) create mode 100644 drivers/clk/imx/clk-imx8mq.c -- 2.25.1

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