January 2022 - U-Boot

[PATCH] gpio: da8xx_gpio: Fix gpio name with address
by chaochao2021666＠163.com 17 Jan '22

17 Jan '22

From: chao zeng <chao.zeng(a)siemens.com> The GPIO bank numbers do not appear in the device tree, so make the gpio name based on the address (ie gpio@42110000_25 vs 25) Signed-off-by: chao zeng <chao.zeng(a)siemens.com> --- drivers/gpio/da8xx_gpio.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index d106e9846d..b310f2dbf6 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -545,12 +545,20 @@ static int davinci_gpio_of_to_plat(struct udevice *dev) { struct davinci_gpio_plat *plat = dev_get_plat(dev); fdt_addr_t addr; + char name[18], *str; addr = dev_read_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; plat->base = addr; + + sprintf(name, "gpio@%4x_", (unsigned int)plat->base); + str = strdup(name); + if (!str) + return -ENOMEM; + plat->port_name = str; + return 0; } -- 2.34.1

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[PATCH] dma: ti: k3-udma: Fix rflow reservation for PKTDMA
by Vignesh Raghavendra 17 Jan '22

17 Jan '22

Driver has a bug in that it uses rflow_in_use bitmap when setting up free rflow range from TISCI but use rflow_map for reservation in __udma_reserve_rflow() Fix this by dropping rflow_in_use bitmap array and use rflow_map for PKTDMA. BCDMA does not need rflow_in_use either. This fixes CPSW3g not able to get DMA channels at R5 SPL on AM64x Signed-off-by: Vignesh Raghavendra <vigneshr(a)ti.com> --- drivers/dma/ti/k3-udma.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 411edef3a7..86603d43f1 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -165,7 +165,6 @@ struct udma_dev { unsigned long *rchan_map; unsigned long *rflow_map; unsigned long *rflow_map_reserved; - unsigned long *rflow_in_use; unsigned long *tflow_map; struct udma_bchan *bchans; @@ -1448,15 +1447,11 @@ static int bcdma_setup_resources(struct udma_dev *ud) sizeof(unsigned long), GFP_KERNEL); ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans), GFP_KERNEL); - /* BCDMA do not really have flows, but the driver expect it */ - ud->rflow_in_use = devm_kcalloc(dev, BITS_TO_LONGS(ud->rchan_cnt), - sizeof(unsigned long), - GFP_KERNEL); ud->rflows = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rflows), GFP_KERNEL); if (!ud->bchan_map || !ud->tchan_map || !ud->rchan_map || - !ud->rflow_in_use || !ud->bchans || !ud->tchans || !ud->rchans || + !ud->bchans || !ud->tchans || !ud->rchans || !ud->rflows) return -ENOMEM; @@ -1535,16 +1530,16 @@ static int pktdma_setup_resources(struct udma_dev *ud) sizeof(unsigned long), GFP_KERNEL); ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans), GFP_KERNEL); - ud->rflow_in_use = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt), - sizeof(unsigned long), - GFP_KERNEL); + ud->rflow_map = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt), + sizeof(unsigned long), + GFP_KERNEL); ud->rflows = devm_kcalloc(dev, ud->rflow_cnt, sizeof(*ud->rflows), GFP_KERNEL); ud->tflow_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tflow_cnt), sizeof(unsigned long), GFP_KERNEL); if (!ud->tchan_map || !ud->rchan_map || !ud->tflow_map || !ud->tchans || - !ud->rchans || !ud->rflows || !ud->rflow_in_use) + !ud->rchans || !ud->rflows || !ud->rflow_map) return -ENOMEM; /* Get resource ranges from tisci */ @@ -1592,12 +1587,12 @@ static int pktdma_setup_resources(struct udma_dev *ud) rm_res = tisci_rm->rm_ranges[RM_RANGE_RFLOW]; if (IS_ERR(rm_res)) { /* all rflows are assigned exclusively to Linux */ - bitmap_zero(ud->rflow_in_use, ud->rflow_cnt); + bitmap_zero(ud->rflow_map, ud->rflow_cnt); } else { - bitmap_fill(ud->rflow_in_use, ud->rflow_cnt); + bitmap_fill(ud->rflow_map, ud->rflow_cnt); for (i = 0; i < rm_res->sets; i++) { rm_desc = &rm_res->desc[i]; - bitmap_clear(ud->rflow_in_use, rm_desc->start, + bitmap_clear(ud->rflow_map, rm_desc->start, rm_desc->num); dev_dbg(dev, "ti-sci-res: rflow: %d:%d\n", rm_desc->start, rm_desc->num); -- 2.34.1

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[PATCH] ARM: mach-k3: sysfw-loader: Copy sysfw.itb to OCRAM in OSPI/SPI bootmode
by Vignesh Raghavendra 17 Jan '22

17 Jan '22

In case of xSPI bootmode OSPI flash is in DDR mode and needs to be accessed in multiple of 16bit accesses Hence we cannot parse sysfw.itb FIT image directly on OSPI flash via MMIO window. So, copy the image to internal on-chip RAM before parsing the image. Moreover, board cfg data maybe modified by ROM/TIFS in case of HS platform and thus cannot reside in OSPI/xSPI and needs to be copied over to internal OCRAM. This unblocks OSPI/xSPI boot on HS platforms Signed-off-by: Vignesh Raghavendra <vigneshr(a)ti.com> Reviewed-by: Dave Gerlach <d-gerlach(a)ti.com> Tested-by: Keerthy <j-keerthy(a)ti.com> --- arch/arm/mach-k3/sysfw-loader.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c index 9ce576186c..5e48c36ccd 100644 --- a/arch/arm/mach-k3/sysfw-loader.c +++ b/arch/arm/mach-k3/sysfw-loader.c @@ -22,6 +22,7 @@ #include <dm/uclass-internal.h> #include <spi_flash.h> +#include <asm/io.h> #include <asm/arch/sys_proto.h> #include "common.h" @@ -335,6 +336,14 @@ static void *k3_sysfw_get_spi_addr(void) return (void *)(addr + CONFIG_K3_SYSFW_IMAGE_SPI_OFFS); } + +static void k3_sysfw_spi_copy(u32 *dst, u32 *src, size_t len) +{ + size_t i; + + for (i = 0; i < len / sizeof(*dst); i++) + *dst++ = *src++; +} #endif void k3_sysfw_loader(bool rom_loaded_sysfw, @@ -344,6 +353,9 @@ void k3_sysfw_loader(bool rom_loaded_sysfw, struct spl_image_info spl_image = { 0 }; struct spl_boot_device bootdev = { 0 }; struct ti_sci_handle *ti_sci; +#if CONFIG_IS_ENABLED(SPI_LOAD) + void *sysfw_spi_base; +#endif int ret = 0; if (rom_loaded_sysfw) { @@ -394,9 +406,11 @@ void k3_sysfw_loader(bool rom_loaded_sysfw, #endif #if CONFIG_IS_ENABLED(SPI_LOAD) case BOOT_DEVICE_SPI: - sysfw_load_address = k3_sysfw_get_spi_addr(); - if (!sysfw_load_address) + sysfw_spi_base = k3_sysfw_get_spi_addr(); + if (!sysfw_spi_base) ret = -ENODEV; + k3_sysfw_spi_copy(sysfw_load_address, sysfw_spi_base, + CONFIG_K3_SYSFW_IMAGE_SIZE_MAX); break; #endif #if CONFIG_IS_ENABLED(YMODEM_SUPPORT) -- 2.34.1

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[PATCH] omap: timer: implement timer_get_boot_us
by Christian Gmeiner 17 Jan '22

17 Jan '22

To make the OMAP DM timer driver useful for the timing of bootstages, we need to implement timer_get_boot_us(..). Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com> --- drivers/timer/omap-timer.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c index 721e385fd1..25a6108fef 100644 --- a/drivers/timer/omap-timer.c +++ b/drivers/timer/omap-timer.c @@ -83,6 +83,27 @@ static int omap_timer_of_to_plat(struct udevice *dev) return 0; } +#if CONFIG_IS_ENABLED(BOOTSTAGE) +ulong timer_get_boot_us(void) +{ + u64 ticks = 0; + u32 rate = 1; + u64 us; + int ret; + + ret = dm_timer_init(); + if (!ret) { + /* The timer is available */ + rate = timer_get_rate(gd->timer); + timer_get_count(gd->timer, &ticks); + } else { + return 0; + } + + us = (ticks * 1000) / rate; + return us; +} +#endif static const struct timer_ops omap_timer_ops = { .get_count = omap_timer_get_count, -- 2.33.1

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[PATCH] arm: mach-k3: am642_init: Unlock MCU PADCFG regs
by Christian Gmeiner 17 Jan '22

17 Jan '22

From: Michael Liebert <liebert(a)ibv-augsburg.de> Currently only the PADCFG registers of the main domain are unlocked. Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured by u-boot or Linux. Signed-off-by: Michael Liebert <liebert(a)ibv-augsburg.de> Tested-by: Christian Gmeiner <christian.gmeiner(a)gmail.com> --- arch/arm/mach-k3/am642_init.c | 3 +++ arch/arm/mach-k3/include/mach/am64_hardware.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index 533905daeb..958fa05af4 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -37,6 +37,9 @@ static void ctrl_mmr_unlock(void) mmr_unlock(CTRL_MMR0_BASE, 3); mmr_unlock(CTRL_MMR0_BASE, 5); mmr_unlock(CTRL_MMR0_BASE, 6); + + /* Unlock all MCU_PADCFG_MMR1 module registers */ + mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); } /* diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h index 96383437d5..e06e1f9532 100644 --- a/arch/arm/mach-k3/include/mach/am64_hardware.h +++ b/arch/arm/mach-k3/include/mach/am64_hardware.h @@ -12,6 +12,8 @@ #define PADCFG_MMR1_BASE 0xf0000 +#define MCU_PADCFG_MMR1_BASE 0x04080000 + #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078 #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3 -- 2.33.1

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[PATCH] configs: am43xx_hs_evm: Add SPL_USB_STORAGE Support
by Amjad Ouled-Ameur 17 Jan '22

17 Jan '22

Enable CONFIG_SPL_USB_STORAGE to support UBS MSC boot support. Signed-off-by: Faiz Abbas <faiz_abbas(a)ti.com> Signed-off-by: Amjad Ouled-Ameur <aouledameur(a)baylibre.com> --- configs/am43xx_hs_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 3ff2e5b62204..d4bebd2c01e9 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_BASE=y CONFIG_SPL_NET=y CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" CONFIG_SPL_USB_HOST=y +CONFIG_SPL_USB_STORAGE=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 -- 2.25.1

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[PATCH 0/1] Provide a fix for wrong QSPI clock calculation on AM4372
by Stefan Mätje 17 Jan '22

17 Jan '22

The attached patch fixes the QSPI clock calculation on AM4372. The fixed prescaler of 4 in the PRCM unit was missing. That results in QSPI frequencies being too low. Added Tom Rini on cc: because he is the TI ARM maintainer. There is no base commit because the patch stems from an older patched U-Boot version being used here. But it should apply cleanly to the current mainline U-Boot tree. PS.: I'm not on the list. Any questions should sent to me directly. Best regards, Stefan Mätje Stefan Mätje (1): Fix wrong QSPI clock calculation for AM4372 drivers/spi/ti_qspi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.25.1

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[PATCH] nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine
by David Rivshin 17 Jan '22

17 Jan '22

From: David Rivshin <DRivshin(a)allworx.com> In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin(a)allworx.com> --- drivers/mtd/nand/raw/omap_gpmc.c | 45 +++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c index 97fd5690f5..5cfabe5c3c 100644 --- a/drivers/mtd/nand/raw/omap_gpmc.c +++ b/drivers/mtd/nand/raw/omap_gpmc.c @@ -506,19 +506,45 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, /* check calculated ecc */ for (i = 0; i < ecc->bytes && !ecc_flag; i++) { if (calc_ecc[i] != 0x00) - ecc_flag = 1; + goto not_ecc_match; } - if (!ecc_flag) - return 0; + return 0; +not_ecc_match: - /* check for whether its a erased-page */ - ecc_flag = 0; - for (i = 0; i < ecc->bytes && !ecc_flag; i++) { + /* check for whether it's an erased-page */ + for (i = 0; i < ecc->bytes; i++) { if (read_ecc[i] != 0xff) - ecc_flag = 1; + goto not_erased; + } + for (i = 0; i < SECTOR_BYTES; i++) { + if (dat[i] != 0xff) + goto not_erased; + } + return 0; +not_erased: + + /* + * Check for whether it's an erased page with a correctable + * number of bitflips. Erased pages have all 1's in the data, + * so we just compute the number of 0 bits in the data and + * see if it's under the correction threshold. + * + * NOTE: The check for a perfect erased page above is faster for + * the more common case, even though it's logically redundant. + */ + for (i = 0; i < ecc->bytes; i++) + error_count += hweight8(~read_ecc[i]); + + for (i = 0; i < SECTOR_BYTES; i++) + error_count += hweight8(~dat[i]); + + if (error_count <= ecc->strength) { + memset(read_ecc, 0xFF, ecc->bytes); + memset(dat, 0xFF, SECTOR_BYTES); + debug("nand: %u bit-flip(s) corrected in erased page\n", + error_count); + return error_count; } - if (!ecc_flag) - return 0; /* * while reading ECC result we read it in big endian. @@ -538,6 +564,7 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, } /* use elm module to check for errors */ elm_config(bch_type); + error_count = 0; err = elm_check_error(calc_ecc, bch_type, &error_count, error_loc); if (err) return err; base-commit: d80bb749fab53da72c4a0e09b8c2d2aaa3103c91 -- 2.31.1

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[PATCH] board: ti: am335x: Choose CPSW or PRUSS configuration based on jumper setting
by Amjad Ouled-Ameur 17 Jan '22

17 Jan '22

The am335x-ice-v2 board's Ethernet ports can be configured in 'MII' or 'RMII' mode to be connected to 'PRUSS' or 'CPSW' Ethernet subsystems. This patch sets the environment variable 'ice_mii' to 'mii' or 'rmii' accordingly. Based on that we choose the appropriate board devicetree i.e. 'am335x-ice-v2.dtb' or 'am335x-ice-v2-prueth.dtb'. Since there are 2 Ethernet ports with 2 modes, there can be 4 configurations but for now we consider both ports in different modes to be an invalid configuration and prevent boot in that case. Signed-off-by: Roger Quadros <rogerq(a)ti.com> [Amjad: use overlay instead of using new am335x-ice-v2-prueth.dtb] Signed-off-by: Amjad Ouled-Ameur <aouledameur(a)baylibre.com> --- This depends on the currently in-review patch [0]. [0]: 20211022155526.54368-1-aouledameur(a)baylibre.com board/ti/am335x/board.c | 17 +++++++++++++++++ include/configs/am335x_evm.h | 5 ++++- include/configs/ti_armv7_common.h | 1 + 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index e8555de9c937..b50e7a0fa466 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -11,6 +11,7 @@ #include <dm.h> #include <env.h> #include <errno.h> +#include <hang.h> #include <image.h> #include <init.h> #include <malloc.h> @@ -691,6 +692,8 @@ done: } #endif +static bool prueth_is_mii = true; + /* * Basic board specific setup. Pinmux has been handled already. */ @@ -710,6 +713,8 @@ int board_init(void) if (board_is_icev2()) { int rv; u32 reg; + bool eth0_is_mii = true; + bool eth1_is_mii = true; REQUEST_AND_SET_GPIO(GPIO_PR1_MII_CTRL); /* Make J19 status available on GPIO1_26 */ @@ -740,6 +745,7 @@ int board_init(void) writel(reg, GPIO0_IRQSTATUS1); /* clear irq */ /* RMII mode */ printf("ETH0, CPSW\n"); + eth0_is_mii = false; } else { /* MII mode */ printf("ETH0, PRU\n"); @@ -752,12 +758,21 @@ int board_init(void) /* RMII mode */ printf("ETH1, CPSW\n"); gpio_set_value(GPIO_MUX_MII_CTRL, 1); + eth1_is_mii = false; } else { /* MII mode */ printf("ETH1, PRU\n"); cdce913_data.pdiv2 = 4; /* 25MHz PHY clk */ } + if (eth0_is_mii != eth1_is_mii) { + printf("Unsupported Ethernet port configuration\n"); + printf("Both ports must be set as RMII or MII\n"); + hang(); + } + + prueth_is_mii = eth0_is_mii; + /* disable rising edge IRQs */ reg = readl(GPIO0_RISINGDETECT) & ~BIT(11); writel(reg, GPIO0_RISINGDETECT); @@ -852,6 +867,8 @@ int board_late_init(void) if (is_valid_ethaddr(mac_addr)) eth_env_set_enetaddr("eth1addr", mac_addr); } + + env_set("ice_mii", prueth_is_mii ? "mii" : "rmii"); #endif if (!env_get("serial#")) { diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 7fb1b3a3e3fa..0f340806efc9 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -143,7 +143,10 @@ "if test $board_name = A335X_SK; then " \ "setenv fdtfile am335x-evmsk.dtb; fi; " \ "if test $board_name = A335_ICE; then " \ - "setenv fdtfile am335x-icev2.dtb; fi; " \ + "setenv fdtfile am335x-icev2.dtb; " \ + "if test $ice_mii = mii; then " \ + "setenv pxe_label_override Pruss; fi;" \ + "fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ "init_console=" \ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index fa48cd2818ce..797e1211980d 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -37,6 +37,7 @@ "fdtaddr=0x88000000\0" \ "dtboaddr=0x89000000\0" \ "fdt_addr_r=0x88000000\0" \ + "fdtoverlay_addr_r=0x89000000\0" \ "rdaddr=0x88080000\0" \ "ramdisk_addr_r=0x88080000\0" \ "scriptaddr=0x80000000\0" \ -- 2.25.1

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[PATCH V3] sf: Querying write-protect status before operating the flash
by chaochao2021666＠163.com 17 Jan '22

17 Jan '22

From: chao zeng <chao.zeng(a)siemens.com> When operating the write-protection flash,spi_flash_std_write() and spi_flash_std_erase() would return wrong result.The flash is protected, but write or erase the flash would show "OK". Check the flash write protection state before operating the flash and give a prompt to show it has been locked if the write-protection has enbale Signed-off-by: chao zeng <chao.zeng(a)siemens.com> --- Changes for V2: - Return 0 not ENOPROTOOPT to refelect the flash feature - Output prompt information Changes for V3: - Modify output information - Delete return statement --- drivers/mtd/spi/sf_probe.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index f461082e03..f9e879aec5 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -109,6 +109,9 @@ static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, struct mtd_info *mtd = &flash->mtd; size_t retlen; + if (flash->flash_is_locked && flash->flash_is_locked(flash, offset, len)) + printf("SF: Operate on the protected area.Writes will be ignored\n"); + return mtd->_write(mtd, offset, len, &retlen, buf); } @@ -127,6 +130,9 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) instr.addr = offset; instr.len = len; + if (flash->flash_is_locked && flash->flash_is_locked(flash, offset, len)) + printf("SF: Operate on the protected area.Erase will be ignored\n"); + return mtd->_erase(mtd, &instr); } -- 2.33.1

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