January 2022 - U-Boot

[PATCH v4 0/2] Add support of the FXL6408 GPIO expander
by Oleksandr Suvorov 07 Feb '22

07 Feb '22

Add support of the Fairchild's FXL6408 i2c gpio expander and enable this driver for Toradex Colibri iMX8QXP SoM. Changes in v4: - fix misuse of MF_ID_x instead of FW_REV_x in fxl6408_probe(). - fix kernel doc formatting. - sort headers. - fix hex numbers style. - explicitly claim values of enum io_direction. - simplify fxl6408_get_function(). - make variable naming better in fxl6408_probe(). Changes in v3: - fix a warning: "drivers/gpio/gpio-fxl6408.c:348:15: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘int’ [-Wformat=]" - add Tested-by record. Changes in v2: - Kconfig: add better description for the config option. - gpio-fxl6408.c: -- improve registers' naming. -- fix code style (comments, etc.). -- reimplement fxl6408_read() reducing number of parameters. -- change return value of fxl6408_is_output() to bool. -- replace IS_ERR_VALUE() macros with simple x < 0 where it's possible. -- fxl6408_set_direction(): fix type of parameter "dir". -- fix return error codes to avoid using the predefined in the driver model ones. -- removed extra debug code. -- expand TODO list. Oleksandr Suvorov (2): GPIO: fxl6408: Add support for FXL6408 GPIO expander colibri-imx8x: add on-module gpio expander fxl6408 arch/arm/dts/fsl-imx8qxp-colibri.dts | 27 ++ configs/colibri-imx8x_defconfig | 1 + drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-fxl6408.c | 380 +++++++++++++++++++++++++++ 5 files changed, 416 insertions(+) create mode 100644 drivers/gpio/gpio-fxl6408.c -- 2.33.1

4 6

[PATCH] ARM: dts: at91: sama7g5ek: disable slew rate for GMACs non MDIO pins
by Codrin Ciubotariu 07 Feb '22

07 Feb '22

Non GMAC's MDIO pins should have slew rate disabled for R(G)MII modes. Set them accordingly in DT. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu(a)microchip.com> --- arch/arm/dts/sama7g5ek.dts | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 6adb044258..ac6f23f64e 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -125,7 +125,9 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>; + pinctrl-0 = <&pinctrl_gmac0_default + &pinctrl_gmac0_mdio_default + &pinctrl_gmac0_txc_default>; phy-mode = "rgmii-id"; status = "okay"; @@ -138,7 +140,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac1_default>; + pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_mdio_default>; phy-mode = "rmii"; status = "okay"; @@ -235,14 +237,20 @@ <PIN_PA15__G0_TXEN>, <PIN_PA30__G0_RXCK>, <PIN_PA18__G0_RXDV>, - <PIN_PA22__G0_MDC>, - <PIN_PA23__G0_MDIO>, <PIN_PA25__G0_125CK>; + slew-rate = <0>; + bias-disable; + }; + + pinctrl_gmac0_mdio_default: gmac0_mdio_default { + pinmux = <PIN_PA22__G0_MDC>, + <PIN_PA23__G0_MDIO>; bias-disable; }; pinctrl_gmac0_txc_default: gmac0_txc_default { pinmux = <PIN_PA24__G0_TXCK>; + slew-rate = <0>; bias-pull-up; }; @@ -254,8 +262,13 @@ <PIN_PD25__G1_RX0>, <PIN_PD26__G1_RX1>, <PIN_PD27__G1_RXER>, - <PIN_PD24__G1_RXDV>, - <PIN_PD28__G1_MDC>, + <PIN_PD24__G1_RXDV>; + slew-rate = <0>; + bias-disable; + }; + + pinctrl_gmac1_mdio_default: gmac1_mdio_default { + pinmux = <PIN_PD28__G1_MDC>, <PIN_PD29__G1_MDIO>; bias-disable; }; -- 2.32.0

3 3

[PATCH 1/2] lmb: Fix lmb property's defination under struct lmb
by Michal Simek 07 Feb '22

07 Feb '22

From: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Under struct lmb {} the lmb property's should be defined only if CONFIG_LMB_MEMORY_REGIONS is defined. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/lmb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/lmb.h b/include/lmb.h index ab277ca80004..1476d78c2823 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -68,7 +68,7 @@ struct lmb_region { struct lmb { struct lmb_region memory; struct lmb_region reserved; -#if !IS_ENABLED(CONFIG_LMB_USE_MAX_REGIONS) +#if IS_ENABLED(CONFIG_LMB_MEMORY_REGIONS) struct lmb_property memory_regions[CONFIG_LMB_MEMORY_REGIONS]; struct lmb_property reserved_regions[CONFIG_LMB_RESERVED_REGIONS]; #endif -- 2.34.1

4 7

[PATCH v4] apalis/colibri_imx6: move setting bootcmd to defconfig
by Oleksandr Suvorov 07 Feb '22

07 Feb '22

Move setting the default boot command to the apalis/colibri_imx6_defconfig. It allows replacing the command without code modification. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov(a)foundries.io> Reviewed-by: Peng Fan <peng.fan(a)nxp.com> Reviewed-by: Igor Opaniuk <igor.opaniuk(a)foundries.io> Acked-by: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> --- Changes in v4: - add an acked-by record. Changes in v3: - fix Peng Fan's e-mail address. Changes in v2: - fix spaces after semicolon. - add reviewed-by records. configs/apalis_imx6_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + include/configs/apalis_imx6.h | 4 ---- include/configs/colibri_imx6.h | 4 ---- 4 files changed, 2 insertions(+), 8 deletions(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index a0e85ba23a4..f64b1ca4378 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -23,6 +23,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 +CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 47b1cfb1917..373d6476ddc 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -22,6 +22,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 +CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 12de0105c6c..ade479cb943 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -133,10 +133,6 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run distro_bootcmd ; " \ - "usb start ; " \ - "setenv stdout serial,vidconsole; " \ - "setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off vmalloc=400M\0" \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 804a144a03e..f91d6b49ea8 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -115,10 +115,6 @@ #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run distro_bootcmd; " \ - "usb start ; " \ - "setenv stdout serial,vidconsole; " \ - "setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ -- 2.31.1

3 2

[PATCH] arm64: zynqmp: Remove SOM *u-boot.dtsi
by Michal Simek 07 Feb '22

07 Feb '22

Disable mmc from u-boot.dtsi file because it was there only for kv260 board. With kr260 this is not needed because we will switch to full DT per board with SD/EMMC there too. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi | 21 -------------------- arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi | 21 -------------------- 2 files changed, 42 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi delete mode 100644 arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi diff --git a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi deleted file mode 100644 index 467df9f23a1c..000000000000 --- a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx ZynqMP K26/KV260 SD wiring - * - * (C) Copyright 2020 - 2021, Xilinx, Inc. - * - * Michal Simek <michal.simek(a)xilinx.com> - */ - -/* SD0 only supports 3.3V, no level shifter */ -&sdhci1 { /* on CC - MIO 39 - 51 */ - status = "okay"; - no-1-8-v; - disable-wp; - broken-cd; - xlnx,mio-bank = <1>; - /* Do not run SD in HS mode from bootloader */ - sdhci-caps-mask = <0 0x200000>; - sdhci-caps = <0 0>; - max-frequency = <19000000>; -}; diff --git a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi deleted file mode 100644 index 34e6328fb66f..000000000000 --- a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx ZynqMP Z2-VSOM - * - * (C) Copyright 2020 - 2021, Xilinx, Inc. - * - * Michal Simek <michal.simek(a)xilinx.com> - */ - -/* SD0 only supports 3.3V, no level shifter */ -&sdhci1 { /* FIXME - on CC - MIO 39 - 51 */ - status = "okay"; - no-1-8-v; - disable-wp; - broken-cd; - xlnx,mio-bank = <1>; - /* Do not run SD in HS mode from bootloader */ - sdhci-caps-mask = <0 0x200000>; - sdhci-caps = <0 0>; - max-frequency = <19000000>; -}; -- 2.34.1

2 1

[PATCH v2] power: zynqmp: Add power domain driver for ZynqMP
by Michal Simek 07 Feb '22

07 Feb '22

Driver should be enabled by CONFIG_POWER_DOMAIN=y and CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node but it uses zynqmp firmware DT node that's why there is a need to bind driver when firmware node is found. Driver itself is simple. It is sending pmufw config object overlay for enabling access to device which is done in ...domain_request(). In ...domain_on() capabilities are passed and node is requested. This should be bare minimum of required to get power domain driver working. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v2: - s/binded/bound/ - Reported by gvb MAINTAINERS | 1 + drivers/firmware/firmware-zynqmp.c | 18 +++++ drivers/power/domain/Kconfig | 9 +++ drivers/power/domain/Makefile | 1 + drivers/power/domain/zynqmp-power-domain.c | 91 ++++++++++++++++++++++ include/zynqmp_firmware.h | 31 ++++++++ 6 files changed, 151 insertions(+) create mode 100644 drivers/power/domain/zynqmp-power-domain.c diff --git a/MAINTAINERS b/MAINTAINERS index 64648c29219f..fca5227d0b93 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -628,6 +628,7 @@ F: drivers/mtd/nand/raw/zynq_nand.c F: drivers/net/phy/xilinx_phy.c F: drivers/net/zynq_gem.c F: drivers/phy/phy-zynqmp.c +F: drivers/power/domain/zynqmp-power-domain.c F: drivers/serial/serial_zynq.c F: drivers/reset/reset-zynqmp.c F: drivers/rtc/zynqmp_rtc.c diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 839203ec82a1..5a618e490725 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -8,6 +8,7 @@ #include <common.h> #include <cpu_func.h> #include <dm.h> +#include <dm/lists.h> #include <log.h> #include <zynqmp_firmware.h> #include <asm/cache.h> @@ -226,8 +227,25 @@ static const struct udevice_id zynqmp_firmware_ids[] = { { } }; +static int zynqmp_firmware_bind(struct udevice *dev) +{ + int ret; + struct udevice *child; + + if (IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) { + ret = device_bind_driver_to_node(dev, "zynqmp_power_domain", + "zynqmp_power_domain", + dev_ofnode(dev), &child); + if (ret) + printf("zynqmp power domain driver is not bound\n"); + } + + return dm_scan_fdt_dev(dev); +} + U_BOOT_DRIVER(zynqmp_firmware) = { .id = UCLASS_FIRMWARE, .name = "zynqmp_firmware", .of_match = zynqmp_firmware_ids, + .bind = zynqmp_firmware_bind, }; diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig index 9aea5fcdf082..93d2599d83c2 100644 --- a/drivers/power/domain/Kconfig +++ b/drivers/power/domain/Kconfig @@ -88,4 +88,13 @@ config TI_POWER_DOMAIN help Generic power domain implementation for TI K3 devices. +config ZYNQMP_POWER_DOMAIN + bool "Enable the Xilinx ZynqMP Power domain driver" + depends on POWER_DOMAIN && ZYNQMP_FIRMWARE + help + Generic power domain implementation for Xilinx ZynqMP devices. + The driver should be enabled when system starts in very minimal + configuration and it is extended at run time. Then enabling + the driver will ensure that PMUFW enable access to requested IP. + endmenu diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile index 530ae35671a2..7c8af67dbd64 100644 --- a/drivers/power/domain/Makefile +++ b/drivers/power/domain/Makefile @@ -16,3 +16,4 @@ obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o obj-$(CONFIG_TI_SCI_POWER_DOMAIN) += ti-sci-power-domain.o obj-$(CONFIG_TI_POWER_DOMAIN) += ti-power-domain.o +obj-$(CONFIG_ZYNQMP_POWER_DOMAIN) += zynqmp-power-domain.o diff --git a/drivers/power/domain/zynqmp-power-domain.c b/drivers/power/domain/zynqmp-power-domain.c new file mode 100644 index 000000000000..0a6cb67a8acc --- /dev/null +++ b/drivers/power/domain/zynqmp-power-domain.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021, Xilinx. Inc. + */ + +#include <common.h> +#include <dm.h> +#include <log.h> +#include <malloc.h> +#include <misc.h> +#include <power-domain-uclass.h> +#include <linux/bitops.h> + +#include <zynqmp_firmware.h> + +#define NODE_ID_LOCATION 5 + +static unsigned int xpm_configobject[] = { + /**********************************************************************/ + /* HEADER */ + 2, /* Number of remaining words in the header */ + 1, /* Number of sections included in config object */ + PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay*/ + /**********************************************************************/ + /* SLAVE SECTION */ + + PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */ + 1, /* Number of slaves */ + + 0, /* Node ID which will be changed below */ + PM_SLAVE_FLAG_IS_SHAREABLE, + PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | + PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | + PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */ +}; + +static int zynqmp_pm_request_node(const u32 node, const u32 capabilities, + const u32 qos, const enum zynqmp_pm_request_ack ack) +{ + return xilinx_pm_request(PM_REQUEST_NODE, node, capabilities, + qos, ack, NULL); +} + +static int zynqmp_power_domain_request(struct power_domain *power_domain) +{ + /* Record power domain id */ + xpm_configobject[NODE_ID_LOCATION] = power_domain->id; + + zynqmp_pmufw_load_config_object(xpm_configobject, sizeof(xpm_configobject)); + + return 0; +} + +static int zynqmp_power_domain_free(struct power_domain *power_domain) +{ + /* nop now */ + return 0; +} + +static int zynqmp_power_domain_on(struct power_domain *power_domain) +{ + return zynqmp_pm_request_node(power_domain->id, + ZYNQMP_PM_CAPABILITY_ACCESS, + ZYNQMP_PM_MAX_QOS, + ZYNQMP_PM_REQUEST_ACK_BLOCKING); +} + +static int zynqmp_power_domain_off(struct power_domain *power_domain) +{ + /* nop now */ + return 0; +} + +struct power_domain_ops zynqmp_power_domain_ops = { + .request = zynqmp_power_domain_request, + .rfree = zynqmp_power_domain_free, + .on = zynqmp_power_domain_on, + .off = zynqmp_power_domain_off, +}; + +static int zynqmp_power_domain_probe(struct udevice *dev) +{ + return 0; +} + +U_BOOT_DRIVER(zynqmp_power_domain) = { + .name = "zynqmp_power_domain", + .id = UCLASS_POWER_DOMAIN, + .probe = zynqmp_power_domain_probe, + .ops = &zynqmp_power_domain_ops, +}; diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index cfd92d3fe567..19c004e91993 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -371,4 +371,35 @@ void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size); int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); +/* Type of Config Object */ +#define PM_CONFIG_OBJECT_TYPE_BASE 0x1U +#define PM_CONFIG_OBJECT_TYPE_OVERLAY 0x2U + +/* Section Id */ +#define PM_CONFIG_SLAVE_SECTION_ID 0x102U +#define PM_CONFIG_SET_CONFIG_SECTION_ID 0x107U + +/* Flag Option */ +#define PM_SLAVE_FLAG_IS_SHAREABLE 0x1U +#define PM_MASTER_USING_SLAVE_MASK 0x2U + +/* IPI Mask for Master */ +#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK 0x00000001 +#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK 0x00000100 +#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK 0x00000200 + +enum zynqmp_pm_request_ack { + ZYNQMP_PM_REQUEST_ACK_NO = 1, + ZYNQMP_PM_REQUEST_ACK_BLOCKING = 2, + ZYNQMP_PM_REQUEST_ACK_NON_BLOCKING = 3, +}; + +/* Node capabilities */ +#define ZYNQMP_PM_CAPABILITY_ACCESS 0x1U +#define ZYNQMP_PM_CAPABILITY_CONTEXT 0x2U +#define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U +#define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U + +#define ZYNQMP_PM_MAX_QOS 100U + #endif /* _ZYNQMP_FIRMWARE_H_ */ -- 2.34.1

2 2

[PATCH 0/4] Zynq qspi updates
by Ashok Reddy Soma 07 Feb '22

07 Feb '22

This patch series does below updates to zynq qspi driver. 1. Fix typecast to rxbuf in zynq_qspi_read_data() 2. Fix data abort issue incase of un-aligned writes 3. Add a check for baudrate and if not in limits set to default 4. Add zynq_qspi_exec_op() to avoid spi_mem_exec_op() from spi-mem framework. Siva Durga Prasad Paladugu (3): spi: zynq_qspi: Typecast rxbuf properly spi: zynq_qspi: Read only one byte at a time from txbuf spi: zynq_qspi: Add a check for baudrate and set default if not in limits T Karthik Reddy (1): spi: zynq_qspi: Add SPI memory operations to zynq qspi drivers/spi/zynq_qspi.c | 91 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 83 insertions(+), 8 deletions(-) -- 2.17.1

2 5

[PATCH 0/2] EFI: Add CAPSULE_FLAG_INITIATE_RESET support
by Masami Hiramatsu 07 Feb '22

07 Feb '22

Hi, This is the patchset for adding CAPSULE_FLAG_INITIATE_RESET support to EFU capsule support, according to Takahiro's comment. The first patch is the core patch to add supporting the CAPSULE_FLAG_INITIATE_RESET. The system reset soon after applying the capsule file which has this flag. The rest of capsule files on disk will be applied after reboot. The second one adding "--flags reset" option to mkeficapsule tool. This might better be rebased on top of Takahiro's work, but in this version I made this series on top of the latest master branch. Thank you, --- Masami Hiramatsu (2): EFI: Support CAPSULE_FLAGS_INITIATE_RESET for capsule update mkeficapsule: Support "--flags reset" option lib/efi_loader/efi_capsule.c | 13 +++++++++++++ tools/mkeficapsule.c | 26 ++++++++++++++++++++++---- 2 files changed, 35 insertions(+), 4 deletions(-) -- Masami Hiramatsu <masami.hiramatsu(a)linaro.org>

3 9

[PATCH v2 0/4] QEMU spike machine support for U-Boot
by Anup Patel 06 Feb '22

06 Feb '22

We can use same U-Boot binary compiled using qemu-riscv64_smode_defconfig on QEMU virt machine and QEMU spike machine. To achieve this, we need HTIF console support for U-Boot QEMU RISC-V board hence this series. To test this series with latest OpenSBI, we can use the following command: qemu-system-riscv64 -M spike -m 256M -display none -serial stdio \ -bios opensbi/build/platform/generic/firmware/fw_jump.bin -kernel \ ./u-boot/u-boot.bin These patch can be found in qemu_riscv_htif_v2 branch at: https://github.com/avpatel/u-boot.git Changes since v1: - Use ofnode_by_compatible() in PATCH3 - Updated QEMU RISC-V documentation in PATCH4 Anup Patel (4): serial: Add RISC-V HTIF console driver riscv: qemu: Enable HTIF console support riscv: qemu: Implement is_flash_available() for MTD NOR doc: qemu-riscv: Update documentation for QEMU spike machine board/emulation/qemu-riscv/Kconfig | 1 + board/emulation/qemu-riscv/qemu-riscv.c | 12 ++ doc/board/emulation/qemu-riscv.rst | 48 ++++--- drivers/serial/Kconfig | 8 ++ drivers/serial/Makefile | 1 + drivers/serial/serial_htif.c | 178 ++++++++++++++++++++++++ 6 files changed, 232 insertions(+), 16 deletions(-) create mode 100644 drivers/serial/serial_htif.c -- 2.25.1

4 10

[PATCH v1 1/2] imx: imx8qm_rom7720: Increase CONFIG_SYS_BOOTM_LEN to 64MB
by Oliver Graute 05 Feb '22

05 Feb '22

Increase CONFIG_SYS_BOOTM_LEN to 64MB Signed-off-by: Oliver Graute <oliver.graute(a)kococonnector.com> --- include/configs/imx8qm_rom7720.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 666e497b0b..31d861481f 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -21,6 +21,8 @@ #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 +#define CONFIG_SYS_BOOTM_LEN SZ_64M + /* FUSE command */ /* Boot M4 */ -- 2.17.1

2 1