January 2022 - U-Boot

[PATCH v1] mmc: fsl_esdhc_imx: fix watermark level in dma
by Marcel Ziswiler 09 Feb '22

09 Feb '22

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Seems that we need the waterlevel setting not only for PIO mode as without this at least the i.MX 8M Mini won't boot anymore when being written by such a U-Boot. Corruption has also been observed both on the i.MX 6 as well as i.MX 8M Mini when using ums on the eMMC. Fix this by setting the watermark level again regardless of whether in DMA or PIO mode. Fixes: 41c6a22fc296 ("mmc: fsl_esdhc_imx: simplify esdhc_setup_data()") Signed-off-by: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> --- drivers/mmc/fsl_esdhc_imx.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 9299635f50..efa5ed0af7 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -336,9 +336,8 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, } } - if (IS_ENABLED(CONFIG_SYS_FSL_ESDHC_USE_PIO)) - esdhc_setup_watermark_level(priv, data); - else + esdhc_setup_watermark_level(priv, data); + if (!IS_ENABLED(CONFIG_SYS_FSL_ESDHC_USE_PIO)) esdhc_setup_dma(priv, data); /* Calculate the timeout period for data transactions */ -- 2.34.1

3 5

[PATCH] dm: Use parenthesis for the device_get_ops macro argument
by Sughosh Ganu 08 Feb '22

08 Feb '22

Use parenthesis for the device_get_ops macro argument. This prevents errors when using an expression for the parameter. Signed-off-by: Sughosh Ganu <sughosh.ganu(a)linaro.org> --- include/dm/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dm/device.h b/include/dm/device.h index f790041706..77c27ba92e 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -212,7 +212,7 @@ struct udevice_rt { #define DM_MAX_SEQ_STR 3 /* Returns the operations for a device */ -#define device_get_ops(dev) (dev->driver->ops) +#define device_get_ops(dev) ((dev)->driver->ops) #if CONFIG_IS_ENABLED(OF_PLATDATA_RT) u32 dev_get_flags(const struct udevice *dev); -- 2.17.1

2 2

[PATCH v2 1/1] sandbox: fix build failure with musl and SDL
by Heinrich Schuchardt 08 Feb '22

08 Feb '22

sdl.c is compiled against the SDL library. Trying to redefine wchar_t with -fshort-wchar is not necessary and leads to build failures when compiling against musl. Cc: Milan P. Stanić <mps(a)arvanta.net> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- v2: fix a build error with clang by adding -fno-lto for building sdl.o A better longterm solution will be to eliminate -fshort-wchar completely. This will require replacing %ls printf() codes by something that gcc does not check, e.g. %pS. Further all L"" strings must be replaced by u"" strings. --- arch/sandbox/Makefile | 7 +++++++ arch/sandbox/cpu/Makefile | 11 ++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/sandbox/Makefile b/arch/sandbox/Makefile index f6cf859f24..a335f8acfd 100644 --- a/arch/sandbox/Makefile +++ b/arch/sandbox/Makefile @@ -4,3 +4,10 @@ head-y := arch/sandbox/cpu/start.o arch/sandbox/cpu/os.o head-$(CONFIG_SANDBOX_SDL) += arch/sandbox/cpu/sdl.o libs-y += arch/sandbox/cpu/ libs-y += arch/sandbox/lib/ + +# sdl.c fails to compile with -fshort-wchar using musl. +cmd_cc_sdl.o = $(CC) $(filter-out -nostdinc -fshort-wchar, \ + $(patsubst -I%,-idirafter%,$(c_flags))) -fno-lto -c -o $@ $< + +$(obj)/sdl.o: $(src)/sdl.c FORCE + $(call if_changed_dep,cc_sdl.o) diff --git a/arch/sandbox/cpu/Makefile b/arch/sandbox/cpu/Makefile index de7fe7f391..7c5c52652f 100644 --- a/arch/sandbox/cpu/Makefile +++ b/arch/sandbox/cpu/Makefile @@ -7,7 +7,7 @@ obj-y := cache.o cpu.o state.o extra-y := start.o os.o -extra-$(CONFIG_SANDBOX_SDL) += sdl.o +extra-$(CONFIG_SANDBOX_SDL) += sdl.o obj-$(CONFIG_SPL_BUILD) += spl.o obj-$(CONFIG_ETH_SANDBOX_RAW) += eth-raw-os.o @@ -19,8 +19,6 @@ cmd_cc_os.o = $(CC) $(filter-out -nostdinc, \ $(obj)/os.o: $(src)/os.c FORCE $(call if_changed_dep,cc_os.o) -$(obj)/sdl.o: $(src)/sdl.c FORCE - $(call if_changed_dep,cc_os.o) # eth-raw-os.c is built in the system env, so needs standard includes # CFLAGS_REMOVE_eth-raw-os.o cannot be used to drop header include path @@ -30,3 +28,10 @@ cmd_cc_eth-raw-os.o = $(CC) $(filter-out -nostdinc, \ $(obj)/eth-raw-os.o: $(src)/eth-raw-os.c FORCE $(call if_changed_dep,cc_eth-raw-os.o) + +# sdl.c fails to build with -fshort-wchar using musl +cmd_cc_sdl.o = $(CC) $(filter-out -nostdinc -fshort-wchar, \ + $(patsubst -I%,-idirafter%,$(c_flags))) -fno-lto -c -o $@ $< + +$(obj)/sdl.o: $(src)/sdl.c FORCE + $(call if_changed_dep,cc_sdl.o) -- 2.33.1

2 4

[RFC PATCH] dts: automatically build necessary .dtb files
by Rasmus Villemoes 08 Feb '22

08 Feb '22

When building for a custom board, it is quite common to maintain a private branch which include some defconfig and .dts files. But to hook up those .dts files requires modifying a file "belonging" to upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch to a newer upstream then often results in a conflict which, while it is trivial to resolve by hand, makes it harder to have a CI do "try to build our board against latest upstream". The .config usually includes information on precisely what .dtb(s) are needed, so to avoid having to modify the Makefile, simply add the files in (SPL_)OF_LIST to dtb-y. A technicality is that (SPL_)OF_LIST is not always defined, so rework the Kconfig symbols so that (SPL_)OF_LIST is always defined (when (SPL_)OF_CONTROL), but only prompted for in the cases which used to be their "depends on". nios2 and microblaze already have something like this in their dts/Makefile, and the rationale in commit 41f59f68539 is similar to the above. So this simply generalizes existing practice. Followup patches could remove the logic in those two makefiles, just as there's potential for moving some common boilerplate from all the arch/*/dts/Makefile files to the new scripts/Makefile.dts. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- arch/arc/dts/Makefile | 2 ++ arch/arm/dts/Makefile | 2 ++ arch/m68k/dts/Makefile | 2 ++ arch/microblaze/dts/Makefile | 2 ++ arch/mips/dts/Makefile | 2 ++ arch/nds32/dts/Makefile | 2 ++ arch/nios2/dts/Makefile | 2 ++ arch/powerpc/dts/Makefile | 2 ++ arch/riscv/dts/Makefile | 2 ++ arch/sandbox/dts/Makefile | 2 ++ arch/sh/dts/Makefile | 2 ++ arch/x86/dts/Makefile | 2 ++ arch/xtensa/dts/Makefile | 2 ++ dts/Kconfig | 8 ++++---- scripts/Makefile.dts | 3 +++ 15 files changed, 33 insertions(+), 4 deletions(-) create mode 100644 scripts/Makefile.dts diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index 515fe1fe53..532a8131c5 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -8,6 +8,8 @@ dtb-$(CONFIG_TARGET_EMSDP) += emsdp.dtb dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb hsdk-4xd.dtb dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b3e2a9c9d7..ef58be0381 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1163,6 +1163,8 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) # Add any required device tree compiler flags here diff --git a/arch/m68k/dts/Makefile b/arch/m68k/dts/Makefile index fdd435bc34..7988522eb9 100644 --- a/arch/m68k/dts/Makefile +++ b/arch/m68k/dts/Makefile @@ -18,6 +18,8 @@ dtb-$(CONFIG_TARGET_M5373EVB) += M5373EVB.dtb dtb-$(CONFIG_TARGET_AMCORE) += amcore.dtb dtb-$(CONFIG_TARGET_STMARK2) += stmark2.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/microblaze/dts/Makefile b/arch/microblaze/dts/Makefile index 4690dc1b9f..427a8f9aac 100644 --- a/arch/microblaze/dts/Makefile +++ b/arch/microblaze/dts/Makefile @@ -2,6 +2,8 @@ dtb-y += $(shell echo $(CONFIG_DEFAULT_DEVICE_TREE)).dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index 215283cfa0..95144b24dc 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -34,6 +34,8 @@ dtb-$(CONFIG_SOC_JR2) += jr2_pcb110.dtb jr2_pcb111.dtb serval2_pcb112.dtb dtb-$(CONFIG_SOC_SERVALT) += servalt_pcb116.dtb dtb-$(CONFIG_SOC_SERVAL) += serval_pcb105.dtb serval_pcb106.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) # Add any required device tree compiler flags here diff --git a/arch/nds32/dts/Makefile b/arch/nds32/dts/Makefile index a8e23ad9ad..5a09e3b45b 100644 --- a/arch/nds32/dts/Makefile +++ b/arch/nds32/dts/Makefile @@ -2,6 +2,8 @@ dtb-$(CONFIG_TARGET_ADP_AG101P) += ag101p.dtb dtb-$(CONFIG_TARGET_ADP_AE3XX) += ae3xx.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/nios2/dts/Makefile b/arch/nios2/dts/Makefile index 0014acfdfb..2b29fa90f6 100644 --- a/arch/nios2/dts/Makefile +++ b/arch/nios2/dts/Makefile @@ -2,6 +2,8 @@ dtb-y += $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%).dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index ceaa8ce5c8..6f0e4d69f2 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -29,6 +29,8 @@ dtb-$(CONFIG_TARGET_TUXX1) += kmtuxa1.dtb dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) # Add any required device tree compiler flags here diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index b6e9166767..45b6381139 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -8,6 +8,8 @@ dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile index 3e5dc67d53..6cbc9bbcaa 100644 --- a/arch/sandbox/dts/Makefile +++ b/arch/sandbox/dts/Makefile @@ -8,6 +8,8 @@ endif dtb-$(CONFIG_UT_DM) += test.dtb dtb-$(CONFIG_CMD_EXTENSION) += overlay0.dtbo overlay1.dtbo +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/sh/dts/Makefile b/arch/sh/dts/Makefile index e423bfd566..144fd3e7d2 100644 --- a/arch/sh/dts/Makefile +++ b/arch/sh/dts/Makefile @@ -1,5 +1,7 @@ dtb-y += sh7751-r2dplus.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) # Add any required device tree compiler flags here diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index be209aaaf8..8c1c366546 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -22,6 +22,8 @@ dtb-y += bayleybay.dtb \ slimbootloader.dtb \ baytrail_som-db5800-som-6867.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/xtensa/dts/Makefile b/arch/xtensa/dts/Makefile index 06ee25d2da..fbbdefaf2c 100644 --- a/arch/xtensa/dts/Makefile +++ b/arch/xtensa/dts/Makefile @@ -2,6 +2,8 @@ dtb-$(CONFIG_XTFPGA) += ml605.dtb ml605_nommu.dtb kc705.dtb kc705_nommu.dtb +include $(srctree)/scripts/Makefile.dts + targets += $(dtb-y) DTC_FLAGS += diff --git a/dts/Kconfig b/dts/Kconfig index b7c4a2fec0..446d709715 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -132,8 +132,8 @@ config DEFAULT_DEVICE_TREE $ make DEVICE_TREE=<device-tree-name> config OF_LIST - string "List of device tree files to include for DT control" - depends on SPL_LOAD_FIT || MULTI_DTB_FIT + string "List of device tree files to include for DT control" if SPL_LOAD_FIT || MULTI_DTB_FIT + depends on OF_CONTROL default DEFAULT_DEVICE_TREE help This option specifies a list of device tree files to use for DT @@ -240,8 +240,8 @@ config SPL_MULTI_DTB_FIT capabilities, pad configurations). config SPL_OF_LIST - string "List of device tree files to include for DT control in SPL" - depends on SPL_MULTI_DTB_FIT + string "List of device tree files to include for DT control in SPL" if SPL_MULTI_DTB_FIT + depends on SPL_OF_CONTROL default OF_LIST help This option specifies a list of device tree files to use for DT diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts new file mode 100644 index 0000000000..2561025da8 --- /dev/null +++ b/scripts/Makefile.dts @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +dtb-y += $(patsubst %,%.dtb,$(subst ",,$(CONFIG_$(SPL_)OF_LIST))) -- 2.31.1

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[PATCH v2 00/25] SIERRA: Add support for Mulitlink Configuration
by Aswath Govindraju 08 Feb '22

08 Feb '22

The following series of patches add support for PCIe + QSGMII multilink configuration on J721e EVM. The PHY lanes are configured in U-Boot and, PCIe driver in Kernel and QSGMII driver in the ethernet firmware use them. Notes: - Patches 1 -8 and 13 - 22 are ported from upstream kernel v5.17-rc1 - Patch 24, syncs with linux kernel dt, with the following patch https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=608996 Changes since v1: - Fixed the logic for skipping multilink configuration in patch 23 - Fixed the offset calcualation for SIERRA_PHY_PCS_LANE_CDB_OFFSET and SIERRA_PHY_PMA_LANE_CDB_OFFSET in patches 18 and 21. Aswath Govindraju (8): phy: cadence: Sierra: Add a UCLASS_PHY device for links phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as a clock phy: ti: phy-j721e-wiz.c: Fix the condition for setting P_ENABLE_FORCE board: ti: j721e: evm.c: Add support for probing SerDes0 arm: dts: k3-j721e: Add support for PLL_CMNLC clocks in SerDes0 phy: cadence: Sierra: Add support for skipping configuration arm: dts: k3-j721e: Add support for multilink PCIe + QSGMII include: configs: j721e_evm: Add support to boot ethfw core in j721e Kishon Vijay Abraham I (6): phy: cadence: Sierra: Fix PHY power_on sequence phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodes phy: cadence: Sierra: Move all clk_get_*() to a separate function phy: cadence: Sierra: Move all reset_control_get*() to a separate function phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy" phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callback Sanket Parmar (1): phy: cadence: sierra: Fix for USB3 U1/U2 state Swapnil Jakhade (10): phy: cadence: Sierra: Prepare driver to add support for multilink configurations dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode phy: cadence: Sierra: Add support to get SSC type from device tree. phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation phy: cadence: Sierra: Add PHY PCS common register configurations phy: cadence: Sierra: Check cmn_ready assertion during PHY power on phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation phy: cadence: Sierra: Update single link PCIe register configuration phy: cadence: Sierra: Add support for PHY multilink configurations phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration .../k3-j721e-common-proc-board-u-boot.dtsi | 15 + arch/arm/dts/k3-j721e-common-proc-board.dts | 14 +- .../arm/dts/k3-j721e-r5-common-proc-board.dts | 32 + board/ti/j721e/evm.c | 37 + configs/j721e_evm_a72_defconfig | 2 +- drivers/phy/cadence/phy-cadence-sierra.c | 1537 +++++++++++++++-- drivers/phy/ti/phy-j721e-wiz.c | 2 +- include/configs/j721e_evm.h | 19 +- include/dt-bindings/phy/phy-cadence.h | 4 + 9 files changed, 1494 insertions(+), 168 deletions(-) -- 2.17.1

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[PATCH] soc: soc_ti_k3: update j721e revision numbering
by Bryan Brattlof 08 Feb '22

08 Feb '22

There is a 4 bit VARIANT number inside the JTAGID register that TI increments any time a new variant for a chip is produced. Each family of TI's SoCs uses a different versioning scheme based off that VARIANT number. CC: Dave Gerlach <d-gerlach(a)ti.com> Signed-off-by: Bryan Brattlof <bb(a)ti.com> --- drivers/soc/soc_ti_k3.c | 40 +++++++++++++++++++++++++++------------- 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index 9abed7d490a2c..7a126857cd709 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -15,9 +15,6 @@ #define J7200 0xbb6d #define AM64X 0xbb38 -#define REV_SR1_0 0 -#define REV_SR2_0 1 - #define JTAG_ID_VARIANT_SHIFT 28 #define JTAG_ID_VARIANT_MASK (0xf << 28) #define JTAG_ID_PARTNO_SHIFT 12 @@ -55,25 +52,42 @@ static const char *get_family_string(u32 idreg) return family; } +static char *j721e_rev_string_map[] = { + "1.0", "1.1", +}; + +static char *am65x_rev_string_map[] = { + "1.0", "2.0", +}; + static const char *get_rev_string(u32 idreg) { - const char *revision; u32 rev; + u32 soc; rev = (idreg & JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT; + soc = (idreg & JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; - switch (rev) { - case REV_SR1_0: - revision = "1.0"; - break; - case REV_SR2_0: - revision = "2.0"; - break; + switch (soc) { + case J721E: + if (rev > ARRAY_SIZE(j721e_rev_string_map)) + goto bail; + return j721e_rev_string_map[rev]; + + case AM65X: + if (rev > ARRAY_SIZE(am65x_rev_string_map)) + goto bail; + return am65x_rev_string_map[rev]; + + case AM64X: + case J7200: default: - revision = "Unknown Revision"; + if (!rev) + return "1.0"; }; - return revision; +bail: + return "Unknown Revision"; } static int soc_ti_k3_get_family(struct udevice *dev, char *buf, int size) -- 2.17.1

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[PATCH v4 00/20] J721S2: Add initial support
by Aswath Govindraju 08 Feb '22

08 Feb '22

The J721S2 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive ADAS applications and industrial applications requiring AI at the network edge. This SoC extends the Jacinto 7 family of SoCs with focus on lowering system costs and power while providing interfaces, memory architecture and compute performance for single and multi-sensor applications. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP. * 3D GPU: Automotive grade IMG BXS-4-64 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface. * Two Ethernet ports with RGMII support. * Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems, * Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL management. * Chips and Media Wave521CL H.264/H.265 encode/decode engine See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021) for further details: http://www.ti.com/lit/pdf/spruj28 bootlog: - https://pastebin.ubuntu.com/p/NkwRvJH5Gg/ Notes: - Patches 12, 13, 14, 15 and 16 are synced from upstream kernel v5.17-rc1 tag Changes since v3: - Fixed the MMU mapping to standard in patch 5 based on the comments received from Suman. Changes since v2: - Removed the redundant config K3_J721S2_DDRSS and instead used K3_J721E_DDRSS - Formatted the Kconfig files to remove extra lines - Added dts files in the MAINTAINERS baord folder Changes since v1: - Removed unused serial aliases - Assigned serial2 alias for main uart8 instance - Moved aliases to respective board files Aswath Govindraju (10): ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instance ram: k3-ddrss: Add support for multiple instances of DDR subsystems ram: k3-ddrss: Add support for configuring MSMC subsystem in case of Multiple DDR subsystems dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 arm: dts: Add initial support for J721S2 SoC arm: dts: Add initial support for J721S2 System on Module arm: dts: Add support for A72 specific J721S2 Common Processor Board arm: dts: k3-j721s2: Add r5 specific dt support arm: dts: k3-j721s2-ddr: Add DDR support David Huang (9): arm: K3: Add basic support for J721S2 SoC definition drivers: dma: Add support for J721S2 clk: clk-k3: Add support for J721S2 SoC power: domain: ti: Add support for J721S2 SoC ram: k3-ddrss: Add support for J721S2 SoC soc: ti: k3-socinfo: Add entry for J721S2 SoC board: ti: j721s2: Add board support for J721S2 configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig configs: j721s2_evm_a72_defconfig: Add A72 specific defconfig Nishanth Menon (1): remoteproc: k3_system_controller: Support optional boot_notification channel arch/arm/dts/Makefile | 2 + .../k3-j721s2-common-proc-board-u-boot.dtsi | 149 + arch/arm/dts/k3-j721s2-common-proc-board.dts | 430 ++ arch/arm/dts/k3-j721s2-ddr-evm-lp4-4266.dtsi | 4387 ++++++++++++++++ arch/arm/dts/k3-j721s2-ddr.dtsi | 4440 +++++++++++++++++ arch/arm/dts/k3-j721s2-main.dtsi | 937 ++++ arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 302 ++ .../dts/k3-j721s2-r5-common-proc-board.dts | 198 + arch/arm/dts/k3-j721s2-som-p0.dtsi | 173 + arch/arm/dts/k3-j721s2.dtsi | 167 + arch/arm/mach-k3/Kconfig | 15 +- arch/arm/mach-k3/Makefile | 1 + arch/arm/mach-k3/arm64-mmu.c | 41 + arch/arm/mach-k3/include/mach/hardware.h | 4 + .../mach-k3/include/mach/j721s2_hardware.h | 60 + arch/arm/mach-k3/include/mach/j721s2_spl.h | 46 + arch/arm/mach-k3/include/mach/spl.h | 4 + arch/arm/mach-k3/j721s2/Makefile | 5 + arch/arm/mach-k3/j721s2/clk-data.c | 403 ++ arch/arm/mach-k3/j721s2/dev-data.c | 85 + arch/arm/mach-k3/j721s2_init.c | 312 ++ board/ti/j721s2/Kconfig | 63 + board/ti/j721s2/MAINTAINERS | 16 + board/ti/j721s2/Makefile | 8 + board/ti/j721s2/evm.c | 180 + configs/j721s2_evm_a72_defconfig | 207 + configs/j721s2_evm_r5_defconfig | 171 + .../remoteproc/k3-system-controller.txt | 3 + drivers/clk/ti/clk-k3.c | 5 + drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-j721s2.c | 167 + drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 + drivers/firmware/ti_sci_static_data.h | 40 +- drivers/power/domain/ti-power-domain.c | 5 + drivers/ram/Kconfig | 2 +- drivers/ram/k3-ddrss/k3-ddrss.c | 296 +- drivers/ram/k3-ddrss/lpddr4_structs_if.h | 1 + drivers/remoteproc/k3_system_controller.c | 20 +- drivers/soc/soc_ti_k3.c | 4 + include/configs/j721s2_evm.h | 191 + include/dt-bindings/mux/ti-serdes.h | 22 + include/dt-bindings/pinctrl/k3.h | 3 + include/k3-clk.h | 1 + include/k3-dev.h | 1 + 45 files changed, 13510 insertions(+), 61 deletions(-) create mode 100644 arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j721s2-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j721s2-ddr-evm-lp4-4266.dtsi create mode 100644 arch/arm/dts/k3-j721s2-ddr.dtsi create mode 100644 arch/arm/dts/k3-j721s2-main.dtsi create mode 100644 arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j721s2-r5-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j721s2-som-p0.dtsi create mode 100644 arch/arm/dts/k3-j721s2.dtsi create mode 100644 arch/arm/mach-k3/include/mach/j721s2_hardware.h create mode 100644 arch/arm/mach-k3/include/mach/j721s2_spl.h create mode 100644 arch/arm/mach-k3/j721s2/Makefile create mode 100644 arch/arm/mach-k3/j721s2/clk-data.c create mode 100644 arch/arm/mach-k3/j721s2/dev-data.c create mode 100644 arch/arm/mach-k3/j721s2_init.c create mode 100644 board/ti/j721s2/Kconfig create mode 100644 board/ti/j721s2/MAINTAINERS create mode 100644 board/ti/j721s2/Makefile create mode 100644 board/ti/j721s2/evm.c create mode 100644 configs/j721s2_evm_a72_defconfig create mode 100644 configs/j721s2_evm_r5_defconfig create mode 100644 drivers/dma/ti/k3-psil-j721s2.c create mode 100644 include/configs/j721s2_evm.h -- 2.17.1

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i.MX8M Mini Hangs at ATF when booting from USB
by Adam Ford 08 Feb '22

08 Feb '22

I have a situation where the same Flash.bin file can boot an MMC card, but hang when booting over USB. In both cases, I can see the FIT file is loaded, and the various items are identified and placed in their respective folders memory locations. The only difference I can see is that when jumping to 0x920000 (ATF), the USB booting hangs and ATF doesn't appear to execute. Is there some special command that I need to issue to unlock this memory to execute from it when booting from USB? I am calling enable_tzc380 from SPL, and I read the first 100 bytes and last 100 bytes and compared it to my bl31.bin file, and it appears to match, so I know I can read from it. U-Boot SPL 2022.01-00836-g3cc200c91a-dirty (Jan 30 2022 - 07:31:51 -0600) No pmic WDT: Not starting watchdog@30280000 Trying to boot from USB SDP USB EHCI 1.00 SDP: initialize... SDP: handle requests... Downloading file of size 832080 to 0x40400000... done Jumping to header at 0x40400000 Header Tag is not an IMX image Found header at 0x40417c00 firmware: 'uboot' External data: dst=40200000, offset=3000, size=9ddd8 fdt: 'fdt-1' External data: dst=4029de00, offset=aaea0, size=87b0 loadables: 'atf' External data: dst=920000, offset=a0dd8, size=a0c6 image entry point: 0x920000 <hang>

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[PATCH] crypto/fsl: Fallback to SW sha1/256 is misaligned buffers
by Christian Sørensen 08 Feb '22

08 Feb '22

Problem: With U-Boot 2021.10, we currently cannot load a fitImage on our imx7d board, due to misaligned buffers. Reason: Commit 92055e138f28 ("image: Drop if/elseif hash selection in calculate_hash()") changed the way the FIT were verified. Previously, SW sha1/256 were always used. Due to that commit, that can now be done in hardware. caam_hash requires both the input, pbuf, and output buffer, pout, to be aligned. E.g. for the kernel data, pbuf will be the data start address for the kernel. The data start address is dependent on how the FIT is constructed and what address the FIT is loaded to. I.e.; it is fairly likely that we have a case of pbuf to not be aligned. pout is even more likely to not be aligned since it is simply a stack variable declared in fit_image_check_hash in common/image-fit.c. So to rely upon both of these buffers to be aligned, makes errors fairly likely. Solution: I wont propose copying the entire input buffer due to its size, so instead just fallback to use the sw sha1/sha256 if buffers is misaligned. Signed-off-by: Christian Sørensen <yocto(a)bsorensen.net> --- drivers/crypto/fsl/fsl_hash.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 8b5c26db07..48dd10883e 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -16,6 +16,9 @@ #include <hw_sha.h> #include <asm/cache.h> #include <linux/errno.h> +#include <u-boot/sha1.h> +#include <u-boot/sha256.h> +#include <image.h> #define CRYPTO_MAX_ALG_NAME 80 #define SHA1_DIGEST_SIZE 20 @@ -176,8 +179,12 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { - puts("Error: Address arguments are not aligned\n"); - return -EINVAL; + printf("Fallback to SW hash due to misaligned buffers\n"); + if (algo == SHA1) + sha1_csum_wd(pbuf, buf_len, pout, CHUNKSZ_SHA1); + else + sha256_csum_wd(pbuf, buf_len, pout, CHUNKSZ_SHA256); + return 0; } size = ALIGN(buf_len, ARCH_DMA_MINALIGN); -- 2.25.1

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[PATCH 0/1] Introduce new sign binman's option
by Ivan Mikhaylov 07 Feb '22

07 Feb '22

From: Ivan Mikhaylov <ivan.mikhaylov(a)siemens.com> This patch introduces prototype of new sign binman's option. It doesn't looks good for now but it shows how sign process can be done. Just enhancing sign procedure, as example from: mkimage -G privateky -r -o sha256,rsa4096 -F fit(a)0x280000.fit binman replace -i flash.bin -f fit(a)0x280000.fit fit@0x280000 into: binman sign -i flash.bin -k privatekey -a sha256,rsa4096 -f fit(a)0x280000.fit fit@0x280000 1. Is it needed at all? I think, it improves the way of signing, maybe there is some other opinions on this spot? 2. I hope, that `mkimage sign` can be replaced with python code instead of tools.Run. 3. And what things/cases should be covered in case of approval of such option? Tests? 4. Also this option may cover cases like for TI's K3 architectures, it may replace things like tools/k3_gen_x509_cert.sh with binman sign option. Also this patch refers on https://lists.denx.de/pipermail/u-boot/2021-November/468282.html with algo option for mkimage. Ivan Mikhaylov (1): binman: add sign option for binman tools/binman/cmdline.py | 13 +++++++++++++ tools/binman/control.py | 27 ++++++++++++++++++++++++++- 2 files changed, 39 insertions(+), 1 deletion(-) --

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