August 2021 - U-Boot

[PATCH v2 0/6] dwc3-generic: Add Layerscape support
by Ran Wang 03 Oct '21

03 Oct '21

Hello, The purpose of this patch set is to switch from driver xhci-fsl to dwc3-generic for DWC3 IP on Layerscape platforms. Whith this change, now user can enable USB device mode by merely updating property 'dr_mode' accordingly. I also port some DWC3's errata workaorunds from driver xhci-fsl (by referring to Linux kernel mainline version implemenattion). Besides that, I fixed a PHY init problem which observed on Lyerscape platforms (such as LS1088ardb). Regards, Ran Change in v2: - Remove [2/7] usb: dwc3: add disable receiver detection in P3 quirk, because I found it causes Linux kenrel fail to detect USB device, need further check. Ran Wang (6): usb: dwc3: Add frame length adjustment quirk usb: dwc3: Enable undefined length INCR burst type usb: dwc3-generic: fix dwc3_setup_phy() return -ENOTSUPP causing init failure usb: dwc3-generic: Add support for the layerscape configs: ls1088a: add usb mass storage (device mode) support arm: dts: ls1088a: change dwc3 compatible to match dwc3-generic driver arch/arm/dts/fsl-ls1088a.dtsi | 38 ++++++--- configs/ls1088aqds_defconfig | 5 ++ configs/ls1088aqds_qspi_defconfig | 5 ++ configs/ls1088aqds_sdcard_ifc_defconfig | 5 ++ configs/ls1088aqds_sdcard_qspi_defconfig | 5 ++ configs/ls1088aqds_tfa_defconfig | 5 ++ configs/ls1088ardb_qspi_defconfig | 5 ++ configs/ls1088ardb_sdcard_qspi_defconfig | 5 ++ configs/ls1088ardb_tfa_defconfig | 5 ++ drivers/usb/dwc3/core.c | 130 +++++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 20 +++++ drivers/usb/dwc3/dwc3-generic.c | 3 +- 12 files changed, 220 insertions(+), 11 deletions(-) -- 2.7.4

2 8

[PATCH] Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
by Tom Rini 02 Oct '21

02 Oct '21

We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin(a)synopsys.com> Cc: Anup Patel <anup.patel(a)wdc.com> Cc: Atish Patra <atish.patra(a)wdc.com> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Cc: Leo <ycliang(a)andestech.com> Cc: Palmer Dabbelt <palmer(a)dabbelt.com> Cc: Paul Walmsley <paul.walmsley(a)sifive.com> Cc: Rick Chen <rick(a)andestech.com> Cc: Sean Anderson <seanga2(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- I'm Cc'ing a bunch of RISC-V folks since that's where I'm least confident and just put it per-board for now. --- arch/Kconfig | 25 +++++++++++++++++++++++++ arch/arc/include/asm/cache.h | 3 --- arch/arm/Kconfig | 15 --------------- arch/mips/Kconfig | 26 +++----------------------- arch/mips/include/asm/cache.h | 12 +----------- arch/mips/mach-bmips/Kconfig | 20 ++++++++++---------- arch/mips/mach-mtmips/Kconfig | 4 ++-- arch/mips/mach-pic32/Kconfig | 2 +- arch/powerpc/cpu/mpc83xx/Kconfig | 6 ++++++ arch/powerpc/cpu/mpc85xx/Kconfig | 15 +++++++++++++++ arch/powerpc/cpu/mpc8xx/Kconfig | 2 ++ arch/powerpc/include/asm/cache.h | 7 ------- arch/riscv/Kconfig | 2 ++ arch/sandbox/include/asm/cache.h | 1 - arch/x86/include/asm/cache.h | 7 +------ include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/amcore.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/cobra5272.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/mx7ulp_evk.h | 2 -- include/configs/rk3188_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/sifive-unmatched.h | 2 -- include/configs/sipeed-maix.h | 1 - include/configs/stmark2.h | 1 - 35 files changed, 68 insertions(+), 103 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index b6f9e177b645..25f4a15b19f9 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -7,6 +7,27 @@ config HAVE_ARCH_IOREMAP config NEEDS_MANUAL_RELOC bool +config SYS_CACHE_SHIFT_4 + bool + +config SYS_CACHE_SHIFT_5 + bool + +config SYS_CACHE_SHIFT_6 + bool + +config SYS_CACHE_SHIFT_7 + bool + +config SYS_CACHELINE_SIZE + int + default 128 if SYS_CACHE_SHIFT_7 + default 64 if SYS_CACHE_SHIFT_6 + default 32 if SYS_CACHE_SHIFT_5 + default 16 if SYS_CACHE_SHIFT_4 + # Fall-back for MIPS + default 32 if MIPS + config LINKER_LIST_ALIGN int default 32 if SANDBOX @@ -29,6 +50,7 @@ config ARC select DM select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL + select SYS_CACHE_SHIFT_7 select TIMER config ARM @@ -44,6 +66,7 @@ config M68K select NEEDS_MANUAL_RELOC select SYS_BOOT_GET_CMDLINE select SYS_BOOT_GET_KBD + select SYS_CACHE_SHIFT_4 select SUPPORT_OF_CONTROL config MICROBLAZE @@ -122,6 +145,7 @@ config SANDBOX select SPI select SUPPORT_OF_CONTROL select SYSRESET_CMD_POWEROFF + select SYS_CACHE_SHIFT_4 select IRQ select SUPPORT_EXTENSION_SCAN imply BITREVERSE @@ -188,6 +212,7 @@ config X86 select OF_CONTROL select PCI select SUPPORT_OF_CONTROL + select SYS_CACHE_SHIFT_6 select TIMER select USE_PRIVATE_LIBGCC select X86_TSC_TIMER diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index ab61846b5ab9..a48e1aec6889 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -16,9 +16,6 @@ */ #define ARCH_DMA_MINALIGN 128 -/* CONFIG_SYS_CACHELINE_SIZE is used a lot in drivers */ -#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN - #if defined(ARC_MMU_ABSENT) #define CONFIG_ARC_MMU_VER 0 #elif defined(CONFIG_ARC_MMU_V2) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d692139199c4..e478b9088a09 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -332,21 +332,6 @@ config SYS_ARM_ARCH default 4 if CPU_SA1100 default 8 if ARM64 -config SYS_CACHE_SHIFT_5 - bool - -config SYS_CACHE_SHIFT_6 - bool - -config SYS_CACHE_SHIFT_7 - bool - -config SYS_CACHELINE_SIZE - int - default 128 if SYS_CACHE_SHIFT_7 - default 64 if SYS_CACHE_SHIFT_6 - default 32 if SYS_CACHE_SHIFT_5 - choice prompt "Select the ARM data write cache policy" default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 6b1f10d9a0eb..fa221f1d042c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -22,7 +22,7 @@ config TARGET_MALTA select DYNAMIC_IO_PORT_BASE select MIPS_CM select MIPS_INSERT_BOOT_CONFIG - select MIPS_L1_CACHE_SHIFT_6 + select SYS_CACHE_SHIFT_6 select MIPS_L2_CACHE select OF_CONTROL select OF_ISA_BUS @@ -132,7 +132,7 @@ config TARGET_BOSTON select DM select DM_SERIAL select MIPS_CM - select MIPS_L1_CACHE_SHIFT_6 + select SYS_CACHE_SHIFT_6 select MIPS_L2_CACHE select OF_BOARD_SETUP select OF_CONTROL @@ -153,7 +153,7 @@ config TARGET_XILFPGA select DM_ETH select DM_GPIO select DM_SERIAL - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select OF_CONTROL select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 @@ -566,26 +566,6 @@ config SYS_CACHE_SIZE_AUTO so if you know the cache configuration for your system at compile time it would be beneficial to configure it. -config MIPS_L1_CACHE_SHIFT_4 - bool - -config MIPS_L1_CACHE_SHIFT_5 - bool - -config MIPS_L1_CACHE_SHIFT_6 - bool - -config MIPS_L1_CACHE_SHIFT_7 - bool - -config MIPS_L1_CACHE_SHIFT - int - default "7" if MIPS_L1_CACHE_SHIFT_7 - default "6" if MIPS_L1_CACHE_SHIFT_6 - default "5" if MIPS_L1_CACHE_SHIFT_5 - default "4" if MIPS_L1_CACHE_SHIFT_4 - default "5" - config MIPS_L2_CACHE bool help diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h index 00696e672de0..d3e8a8cd414f 100644 --- a/arch/mips/include/asm/cache.h +++ b/arch/mips/include/asm/cache.h @@ -6,17 +6,7 @@ #ifndef __MIPS_CACHE_H__ #define __MIPS_CACHE_H__ -#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#define ARCH_DMA_MINALIGN (L1_CACHE_BYTES) - -/* - * CONFIG_SYS_CACHELINE_SIZE is still used in various drivers primarily for - * DMA buffer alignment. Satisfy those drivers by providing it as a synonym - * of ARCH_DMA_MINALIGN for now. - */ -#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN +#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE #ifndef __ASSEMBLY__ /** diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig index b259a931c9fb..01d919f2dbe9 100644 --- a/arch/mips/mach-bmips/Kconfig +++ b/arch/mips/mach-bmips/Kconfig @@ -21,7 +21,7 @@ choice config SOC_BMIPS_BCM3380 bool "BMIPS BCM3380 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -31,7 +31,7 @@ config SOC_BMIPS_BCM3380 config SOC_BMIPS_BCM6318 bool "BMIPS BCM6318 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -41,7 +41,7 @@ config SOC_BMIPS_BCM6318 config SOC_BMIPS_BCM6328 bool "BMIPS BCM6328 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -51,7 +51,7 @@ config SOC_BMIPS_BCM6328 config SOC_BMIPS_BCM6338 bool "BMIPS BCM6338 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -61,7 +61,7 @@ config SOC_BMIPS_BCM6338 config SOC_BMIPS_BCM6348 bool "BMIPS BCM6348 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -71,7 +71,7 @@ config SOC_BMIPS_BCM6348 config SOC_BMIPS_BCM6358 bool "BMIPS BCM6358 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -81,7 +81,7 @@ config SOC_BMIPS_BCM6358 config SOC_BMIPS_BCM6368 bool "BMIPS BCM6368 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -91,7 +91,7 @@ config SOC_BMIPS_BCM6368 config SOC_BMIPS_BCM6362 bool "BMIPS BCM6362 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -101,7 +101,7 @@ config SOC_BMIPS_BCM6362 config SOC_BMIPS_BCM63268 bool "BMIPS BCM63268 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -112,7 +112,7 @@ config SOC_BMIPS_BCM63268 config SOC_BMIPS_BCM6838 bool "BMIPS BCM6838 family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index 8756cadb0b63..747988aed74c 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -39,7 +39,7 @@ choice config SOC_MT7620 bool "MT7620" - select MIPS_L1_CACHE_SHIFT_5 + select SYS_CACHE_SHIFT_5 select SYS_MIPS_CACHE_INIT_RAM_LOAD select PINCTRL_MT7620 select MT7620_SERIAL @@ -54,7 +54,7 @@ config SOC_MT7620 config SOC_MT7628 bool "MT7628" - select MIPS_L1_CACHE_SHIFT_5 + select SYS_CACHE_SHIFT_5 select MIPS_INIT_STACK_IN_SRAM select MIPS_SRAM_INIT select SYS_MIPS_CACHE_INIT_RAM_LOAD diff --git a/arch/mips/mach-pic32/Kconfig b/arch/mips/mach-pic32/Kconfig index 5f13bf14ed6b..2afa972074c1 100644 --- a/arch/mips/mach-pic32/Kconfig +++ b/arch/mips/mach-pic32/Kconfig @@ -9,7 +9,7 @@ choice config SOC_PIC32MZDA bool "Microchip PIC32MZ[DA] family" - select MIPS_L1_CACHE_SHIFT_4 + select SYS_CACHE_SHIFT_4 select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 083febe5bb3d..7c922b230964 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -131,6 +131,7 @@ config MPC83XX_LDP_PIN config ARCH_MPC830X bool select MPC83XX_SDHC_SUPPORT + select SYS_CACHE_SHIFT_5 config ARCH_MPC8308 bool @@ -154,6 +155,7 @@ config ARCH_MPC831X select MPC83XX_PCI_SUPPORT select MPC83XX_TSEC1_SUPPORT select MPC83XX_TSEC2_SUPPORT + select SYS_CACHE_SHIFT_5 config ARCH_MPC8313 bool @@ -165,9 +167,11 @@ config ARCH_MPC832X bool select MPC83XX_QUICC_ENGINE select MPC83XX_PCI_SUPPORT + select SYS_CACHE_SHIFT_5 config ARCH_MPC834X bool + select SYS_CACHE_SHIFT_5 config ARCH_MPC8349 bool @@ -184,6 +188,7 @@ config ARCH_MPC8360 select MPC83XX_PCI_SUPPORT select MPC83XX_LDP_PIN select MPC83XX_SECOND_I2C + select SYS_CACHE_SHIFT_5 config ARCH_MPC837X bool @@ -196,6 +201,7 @@ config ARCH_MPC837X select MPC83XX_SATA_SUPPORT select MPC83XX_LDP_PIN select MPC83XX_SECOND_I2C + select SYS_CACHE_SHIFT_5 select FSL_ELBC config SYS_IMMR diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 395423582a8e..dfa0902aae8f 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -48,6 +48,7 @@ config TARGET_MPC8548CDS bool "Support MPC8548CDS" select ARCH_MPC8548 select FSL_VIA + select SYS_CACHE_SHIFT_5 config TARGET_P1010RDB_PA bool "Support P1010RDB_PA" @@ -322,6 +323,7 @@ config ARCH_MPC8540 config ARCH_MPC8544 bool select FSL_LAW + select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A005125 select FSL_PCIE_RESET select SYS_FSL_HAS_DDR2 @@ -356,6 +358,7 @@ config ARCH_MPC8560 config ARCH_P1010 bool select FSL_LAW + select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 @@ -401,6 +404,7 @@ config ARCH_P1011 config ARCH_P1020 bool select FSL_LAW + select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_ELBC_A001 @@ -496,6 +500,7 @@ config ARCH_P1025 config ARCH_P2020 bool select FSL_LAW + select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 @@ -516,6 +521,7 @@ config ARCH_P2041 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 select SYS_FSL_ERRATUM_A005275 @@ -540,6 +546,7 @@ config ARCH_P3041 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 @@ -569,6 +576,7 @@ config ARCH_P4080 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004580 @@ -607,6 +615,7 @@ config ARCH_P5040 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004699 @@ -630,11 +639,13 @@ config ARCH_P5040 config ARCH_QEMU_E500 bool + select SYS_CACHE_SHIFT_5 config ARCH_T1024 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008378 select SYS_FSL_ERRATUM_A008109 @@ -657,6 +668,7 @@ config ARCH_T1040 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008044 select SYS_FSL_ERRATUM_A008378 @@ -679,6 +691,7 @@ config ARCH_T1042 bool select E500MC select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A008044 select SYS_FSL_ERRATUM_A008378 @@ -702,6 +715,7 @@ config ARCH_T2080 select E500MC select E6500 select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A006379 select SYS_FSL_ERRATUM_A006593 @@ -730,6 +744,7 @@ config ARCH_T4240 select E500MC select E6500 select FSL_LAW + select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_47 select SYS_FSL_ERRATUM_A004468 select SYS_FSL_ERRATUM_A005871 diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig index f11231737656..936cbda11bc3 100644 --- a/arch/powerpc/cpu/mpc8xx/Kconfig +++ b/arch/powerpc/cpu/mpc8xx/Kconfig @@ -19,9 +19,11 @@ choice config MPC866 bool "MPC866" + select SYS_CACHE_SHIFT_4 config MPC885 bool "MPC885" + select SYS_CACHE_SHIFT_4 endchoice diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index ac8eeb4caa5a..f753ddf799ee 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -25,13 +25,6 @@ */ #define ARCH_DMA_MINALIGN L1_CACHE_BYTES -/* - * For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too - */ -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES -#endif - #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define L1_CACHE_PAGES 8 diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 4b0c3dffa6b1..691ed1138245 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -22,9 +22,11 @@ config TARGET_SIFIVE_UNLEASHED config TARGET_SIFIVE_UNMATCHED bool "Support SiFive Unmatched Board" + select SYS_CACHE_SHIFT_6 config TARGET_SIPEED_MAIX bool "Support Sipeed Maix Board" + select SYS_CACHE_SHIFT_6 config TARGET_OPENPITON_RISCV64 bool "Support RISC-V cores on OpenPiton SoC" diff --git a/arch/sandbox/include/asm/cache.h b/arch/sandbox/include/asm/cache.h index 9348a13e73da..609a835967b8 100644 --- a/arch/sandbox/include/asm/cache.h +++ b/arch/sandbox/include/asm/cache.h @@ -19,6 +19,5 @@ #else #define ARCH_DMA_MINALIGN 16 #endif -#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN #endif /* __SANDBOX_CACHE_H__ */ diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 145b8784de1e..256a3c01ed98 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -7,13 +7,8 @@ #define __X86_CACHE_H__ /* - * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise - * use 64-bytes, a safe default for x86. + * Use CONFIG_SYS_CACHELINE_SIZE (which is set to 64-bytes) for DMA alignment. */ -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE 64 -#endif - #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE static inline void wbinvd(void) diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 1b8312bbc07d..efd4d760ee74 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -138,7 +138,6 @@ env/embedded.o(.text*); /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index d061f4587082..9a988540dfd4 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -154,7 +154,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 1a1a11076543..eea718c5345e 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -104,7 +104,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 8ac0086629da..ad310e84846d 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -160,7 +160,6 @@ #endif /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 2cdd4369da00..e0dd5b42f4e6 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -134,7 +134,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index eb7823a98a58..072d44a80f5b 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -147,7 +147,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 6a50a25d3254..7c0450d2a083 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -142,7 +142,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index a063b92a643f..349996e43c67 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -158,7 +158,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 4fc6d3819249..169f0535ae30 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -165,7 +165,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 7a9240a57171..7f3a39a697ec 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -167,7 +167,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 641d8fdbd53d..1eb9e5f2aca8 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -75,7 +75,6 @@ * This is a single unified instruction/data cache. * sdram - single region - no masks */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 2ea33e5eff22..845dd5eb51e7 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -272,7 +272,6 @@ #endif /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index c859616c68cb..c4c7dcc0fe1e 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -237,7 +237,6 @@ from which user programs will be started */ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 77584fa7a5d2..2fa057c571d2 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -135,7 +135,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 0c3103082cc8..f653742ce520 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -33,8 +33,6 @@ /* UART */ #define LPUART_BASE LPUART4_RBASE -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 3bcc04808a3c..b7c001a37eab 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_RK3188_COMMON_H #define __CONFIG_RK3188_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index fbbb8cf267e6..f83761a82782 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch-rockchip/hardware.h> #include <linux/sizes.h> diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index d63a5f62fbc7..f13e95f342ef 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -38,8 +38,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Environment options */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h index 0fbe8a59058e..00cc4b80c9cb 100644 --- a/include/configs/sipeed-maix.h +++ b/include/configs/sipeed-maix.h @@ -12,7 +12,6 @@ /* Start just below the second bank so we don't clobber it during reloc */ #define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF #define CONFIG_SYS_MALLOC_LEN SZ_128K -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_SIZE SZ_8M diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index da162cbb1140..a2c466e18551 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -132,7 +132,6 @@ #endif /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ -- 2.17.1

4 5

[PATCH] rpi: always set fdt_addr with firmware-provided FDT address
by Mauro Salvini 30 Sep '21

30 Sep '21

Raspberry firmware prepares the FDT blob in memory at an address that depends on both the memory size and the blob size [1]. After commit ade243a211d6 ("rpi: passthrough of the firmware provided FDT blob") this FDT is passed to kernel through fdt_addr environment variable, handled in set_fdt_addr() function in board file. When u-boot environment is persistently saved, if a change happens in loaded FDT (e.g. for a new overlay applied), firmware produces a FDT address different from the saved one, but u-boot still use the saved one because set_fdt_addr() function does not overwrite the fdt_addr variable. So, for example, if there is a script that uses fdt commands for e.g. manipulate the bootargs, boot hangs with error libfdt fdt_check_header(): FDT_ERR_BADMAGIC Removing the fdt_addr variable in saved environment allows to boot. With this patch set_fdt_addr() function always overwrite fdt_addr value. [1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018 Signed-off-by: Mauro Salvini <m.salvini(a)koansoftware.com> Cc: Cédric Schieli <cschieli(a)gmail.com> Cc: Matthias Brugger <mbrugger(a)suse.com> --- board/raspberrypi/rpi/rpi.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index df52a4689f..611013471e 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -318,9 +318,6 @@ static void set_fdtfile(void) */ static void set_fdt_addr(void) { - if (env_get("fdt_addr")) - return; - if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC) return; -- 2.17.1

3 9

[PATCH 00/23] Makefile: Continue simplifying Makefile rules (Part B)
by Simon Glass 30 Sep '21

30 Sep '21

5 34

[PATCH] RFC: Support an EFI-loader bootflow
by Simon Glass 30 Sep '21

30 Sep '21

This is just a demonstration of how to support EFI loader using bootflow. Various things need cleaning up, not least that the naming needs to be finalised. I will deal with that in the v2 series. In order to support multiple methods of booting from the same device, we should probably separate out the different implementations (syslinux, EFI loader and soon bootmgr, Chromium OS, Android, VBE) into pluggable drivers and number them as we do with partitions. For now the sequence number is used to determine both the partition number and the implementation to use. The same boot command is used as before ('bootflow scan -lb') so there is no change to that. It can boot both Fedora 31 and 34, for example. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- See u-boot-dm/bmea for the tree containing this patch and the series that it relies on: https://patchwork.ozlabs.org/project/uboot/list/?series=258654&state=* As an aside, the hack to call efi_set_bootdev() provides another example of why the EFI implementation should have been written using driver model, instead of independently of it. I hope that someone can take up this challenge and reduce the amount of duplication between the EFI implementation and the rest of U-Boot. Some relevant threads on that are below. The first two show (I believe) why this is was all so unnecessary if it had been done correctly from the start: https://lists.denx.de/pipermail/u-boot/2016-May/254804.html https://lists.denx.de/pipermail/u-boot/2016-August/263501.html http://patchwork.ozlabs.org/project/uboot/patch/1471374529-61610-2-git-send… https://lists.denx.de/pipermail/u-boot/2019-March/362190.html https://yhbt.net/lore/all/20210628134827.GA9516@bill-the-cat/ https://lists.denx.de/pipermail/u-boot/2018-February/321463.html Sample log on rpi_3_32b: U-Boot 2021.10-rc2-00043-gccd453aa918-dirty (Aug 28 2021 - 13:58:46 -0600) DRAM: 992 MiB RPI 3 Model B (0xa22082) MMC: mmc@7e202000: 0, sdhci@7e300000: 1 Loading Environment from FAT... Unable to read "uboot.env" from mmc0:1... In: serial Out: vidconsole Err: vidconsole Net: No ethernet found. starting USB... Bus usb@7e980000: USB DWC2 scanning bus usb@7e980000 for devices... usb_kbd usb_kbd: Timeout poll on interrupt endpoint Failed to get keyboard state from device 0c40:8000 4 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Scanning for bootflows in all bootmethods Seq Type State Uclass Part Name Filename --- ----------- ------ -------- ---- ------------------------ ---------------- Scanning bootmethod 'mmc(a)7e202000.bootmethod': 0 efi-loader loaded mmc 1 mmc(a)7e202000.bootmethod.p efi/boot/bootarm.efi ** Booting bootflow 'mmc(a)7e202000.bootmethod.part_1' Scanning disk mmc(a)7e202000.blk... ** Unrecognized filesystem type ** Card did not respond to voltage select! : -110 Scanning disk sdhci(a)7e300000.blk... Disk sdhci(a)7e300000.blk not ready Found 4 disks No EFI system partition Booting /efi\boot Waiting for Ethernet connection... done. Fedora (5.11.12-300.fc34.armv7hl) 34 (Workstation Edition) UEFI Firmware Settings Use the ▲ and ▼ keys to change the selection. Press 'e' to edit the selected item, or 'c' for a command prompt. Press Escape to return to the previous menu. The selected entry will be started automatically in 0s. boot/Kconfig | 21 +++++++ boot/Makefile | 1 + boot/bootmethod.c | 73 ++++++++++++++++++---- boot/efiloader.c | 141 +++++++++++++++++++++++++++++++++++++++++++ include/bm_efi.h | 42 +++++++++++++ include/bootmethod.h | 1 + 6 files changed, 266 insertions(+), 13 deletions(-) create mode 100644 boot/efiloader.c create mode 100644 include/bm_efi.h diff --git a/boot/Kconfig b/boot/Kconfig index a1beb182f60..6339ace9413 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -310,6 +310,27 @@ config BOOTMETHOD_DISTRO This provides a way to try out bootmethod on an existing boot flow. +config BOOTMETHOD_EFILOADER + bool "Bootmethod support for EFI boot" + depends on BOOTMETHOD && EFI_LOADER + default y + help + Enables support for EFI boot using bootmethods. This makes the + bootmethods look for a 'boot<arch>.efi' on each filesystem + they scan. The resulting file is booted after enabling U-Boot's + EFI loader support. + + The <arch> depends on the architecture of the board: + + aa64 - aarch64 (ARM 64-bit) + arm - ARM 32-bit + ia32 - x86 32-bit + x64 - x86 64-bit + riscv32 - RISC-V 32-bit + riscv64 - RISC-V 64-bit + + This provides a way to try out bootmethod on an existing boot flow. + config LEGACY_IMAGE_FORMAT bool "Enable support for the legacy image format" default y if !FIT_SIGNATURE diff --git a/boot/Makefile b/boot/Makefile index 4ce721242b0..7a4e882a805 100644 --- a/boot/Makefile +++ b/boot/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_ANDROID_AB) += android_ab.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o image-android-dt.o obj-$(CONFIG_$(SPL_TPL_)BOOTMETHOD) += bootmethod.o obj-$(CONFIG_$(SPL_TPL_)BOOTMETHOD_DISTRO) += distro.o +obj-$(CONFIG_$(SPL_TPL_)BOOTMETHOD_EFILOADER) += efiloader.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += fdt_region.o obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o diff --git a/boot/bootmethod.c b/boot/bootmethod.c index b9752f75e54..33b3c7d4a39 100644 --- a/boot/bootmethod.c +++ b/boot/bootmethod.c @@ -9,6 +9,7 @@ #include <bootmethod.h> #include <distro.h> #include <dm.h> +#include <bm_efi.h> #include <fs.h> #include <log.h> #include <malloc.h> @@ -17,12 +18,15 @@ #include <dm/uclass-internal.h> enum { + /* So far we only support distroboot and EFI_LOADER */ + MAX_BOOTMETHODS = 2, + /* * Set some sort of limit on the number of bootflows a bootmethod can * return. Note that for disks this limits the partitions numbers that - * are scanned to 1..MAX_BOOTFLOWS_PER_BOOTMETHOD + * are scanned to 1..MAX_BOOTFLOWS_PER_BOOTMETHOD / MAX_BOOTMETHODS */ - MAX_BOOTFLOWS_PER_BOOTMETHOD = 20, + MAX_BOOTFLOWS_PER_BOOTMETHOD = 20 * MAX_BOOTMETHODS, }; static const char *const bootmethod_state[BOOTFLOWST_COUNT] = { @@ -36,6 +40,7 @@ static const char *const bootmethod_state[BOOTFLOWST_COUNT] = { static const char *const bootmethod_type[BOOTFLOWT_COUNT] = { "distro-boot", + "efi-loader", }; int bootmethod_get_state(struct bootflow_state **statep) @@ -279,14 +284,23 @@ int bootmethod_scan_next_bootflow(struct bootmethod_iter *iter, /* * Unless there are no more partitions or no bootflow support, - * try the next partition + * try the next partition. If we run out of partitions, fall + * through to select the next device. */ else if (ret != -ESHUTDOWN && ret != -ENOSYS) { log_debug("Bootmethod '%s' seq %d: Error %d\n", dev->name, iter->seq, ret); - if ((iter->seq++ != MAX_BOOTFLOWS_PER_BOOTMETHOD) && - (iter->flags & BOOTFLOWF_ALL)) - return log_msg_ret("all", ret); + if (iter->seq++ != MAX_BOOTFLOWS_PER_BOOTMETHOD) { + /* + * For 'all' we return all bootflows, even + * those with errors + */ + if (iter->flags & BOOTFLOWF_ALL) + return log_msg_ret("all", ret); + + /* Try the next partition */ + continue; + } } /* we got to the end of that bootmethod, try the next */ @@ -327,12 +341,19 @@ int bootmethod_find_in_blk(struct udevice *dev, struct udevice *blk, int seq, { struct blk_desc *desc = dev_get_uclass_plat(blk); struct disk_partition info; + bool done = false; char name[60]; - int partnum = seq + 1; + + /* + * TODO(sjg(a)chromium.org): Add a suitable parameter for the method + * number. Needs to consider the renaming suggested in the cover letter + */ + int methodnum = seq % MAX_BOOTMETHODS; + int partnum = seq / MAX_BOOTMETHODS + 1; int ret; if (seq >= MAX_BOOTFLOWS_PER_BOOTMETHOD) - return -ESHUTDOWN; + return log_msg_ret("max", -ESHUTDOWN); bflow->blk = blk; bflow->seq = seq; @@ -344,7 +365,11 @@ int bootmethod_find_in_blk(struct udevice *dev, struct udevice *blk, int seq, bflow->state = BOOTFLOWST_BASE; ret = part_get_info(desc, partnum, &info); - /* This error indicates the media is not present */ + /* + * This error indicates the media is not present. Otherwise we just + * blindly scan the next partition. We could be more intelligent here + * and check which partition numbers actually exist. + */ if (ret != -EOPNOTSUPP) bflow->state = BOOTFLOWST_MEDIA; if (ret) @@ -362,11 +387,27 @@ int bootmethod_find_in_blk(struct udevice *dev, struct udevice *blk, int seq, bflow->state = BOOTFLOWST_FS; - if (CONFIG_IS_ENABLED(BOOTMETHOD_DISTRO)) { - ret = distro_boot_setup(desc, partnum, bflow); - if (ret) - return log_msg_ret("distro", ret); + switch (methodnum) { + case 0: + if (CONFIG_IS_ENABLED(BOOTMETHOD_DISTRO)) { + done = true; + ret = distro_boot_setup(desc, partnum, bflow); + if (ret) + return log_msg_ret("distro", ret); + } + break; + + case 1: + if (CONFIG_IS_ENABLED(BOOTMETHOD_EFILOADER)) { + done = true; + ret = efiloader_boot_setup(desc, partnum, bflow); + if (ret) + return log_msg_ret("efi_loader", ret); + } + break; } + if (!done) + return log_msg_ret("supp", -ENOTSUPP); return 0; } @@ -386,6 +427,12 @@ int bootflow_boot(struct bootflow *bflow) ret = distro_boot(bflow); } break; + case BOOTFLOWT_EFILOADER: + if (CONFIG_IS_ENABLED(BOOTMETHOD_EFILOADER)) { + done = true; + ret = efiloader_boot(bflow); + } + break; case BOOTFLOWT_COUNT: break; } diff --git a/boot/efiloader.c b/boot/efiloader.c new file mode 100644 index 00000000000..7e874bc8134 --- /dev/null +++ b/boot/efiloader.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * EFI loader implementation for bootflow + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg(a)chromium.org> + */ + +#include <common.h> +#include <blk.h> +#include <bootmethod.h> +#include <command.h> +#include <distro.h> +#include <dm.h> +#include <efi_loader.h> +#include <fs.h> +#include <malloc.h> +#include <mapmem.h> +#include <net.h> +#include <pxe_utils.h> +#include <vsprintf.h> + +/* This could be written in C perhaps - taken from config_distro_bootcmd.h */ +#if defined(CONFIG_ARM64) +#define BOOTEFI_NAME "bootaa64.efi" +#elif defined(CONFIG_ARM) +#define BOOTEFI_NAME "bootarm.efi" +#elif defined(CONFIG_X86_RUN_32BIT) +#define BOOTEFI_NAME "bootia32.efi" +#elif defined(CONFIG_X86_RUN_64BIT) +#define BOOTEFI_NAME "bootx64.efi" +#elif defined(CONFIG_ARCH_RV32I) +#define BOOTEFI_NAME "bootriscv32.efi" +#elif defined(CONFIG_ARCH_RV64I) +#define BOOTEFI_NAME "bootriscv64.efi" +#elif defined(CONFIG_SANDBOX) +#define BOOTEFI_NAME "bootsbox.efi" +#else +#error "Not supported for this architecture" +#endif + +#define EFI_FNAME "efi/boot/" BOOTEFI_NAME + +static int efiload_read_file(struct blk_desc *desc, int partnum, + struct bootflow *bflow) +{ + const struct udevice *media_dev; + int size = bflow->size; + char devnum_str[9]; + char dirname[200]; + loff_t bytes_read; + char *last_slash; + ulong addr; + char *buf; + int ret; + + /* Sadly FS closes the file after fs_size() so we must redo this */ + ret = fs_set_blk_dev_with_part(desc, partnum); + if (ret) + return log_msg_ret("set", ret); + + buf = malloc(size + 1); + if (!buf) + return log_msg_ret("buf", -ENOMEM); + addr = map_to_sysmem(buf); + + ret = fs_read(bflow->fname, addr, 0, 0, &bytes_read); + if (ret) { + free(buf); + return log_msg_ret("read", ret); + } + if (size != bytes_read) + return log_msg_ret("bread", -EINVAL); + buf[size] = '\0'; + bflow->state = BOOTFLOWST_LOADED; + bflow->buf = buf; + + /* + * This is a horrible hack to tell EFI about this boot device. Once we + * unify EFI with the rest of U-Boot we can clean this up. The same hack + * exists in multiple places, e.g. in the fs, tftp and load commands. + * + * Once we can clean up the EFI code to make proper use of driver model, + * this can go away. + */ + media_dev = dev_get_parent(bflow->dev); + snprintf(devnum_str, sizeof(devnum_str), "%x", dev_seq(media_dev)); + + strlcpy(dirname, bflow->fname, sizeof(dirname)); + last_slash = strrchr(dirname, '/'); + if (last_slash) + *last_slash = '\0'; + + efi_set_bootdev(dev_get_uclass_name(media_dev), devnum_str, dirname, + bflow->buf, size); + + return 0; +} + +int efiloader_boot_setup(struct blk_desc *desc, int partnum, + struct bootflow *bflow) +{ + loff_t size; + int ret; + + bflow->type = BOOTFLOWT_EFILOADER; + bflow->fname = strdup(EFI_FNAME); + if (!bflow->fname) + return log_msg_ret("name", -ENOMEM); + ret = fs_size(bflow->fname, &size); + bflow->size = size; + if (ret) + return log_msg_ret("size", ret); + bflow->state = BOOTFLOWST_FILE; + log_debug(" - distro file size %x\n", (uint)size); + if (size > 0x2000000) + return log_msg_ret("chk", -E2BIG); + + ret = efiload_read_file(desc, partnum, bflow); + if (ret) + return log_msg_ret("read", -EINVAL); + + return 0; +} + +int efiloader_boot(struct bootflow *bflow) +{ + char cmd[50]; + + /* + * At some point we can add a real interface to bootefi so we can call + * this directly. For now, go through the CLI like distro boot. + */ + snprintf(cmd, sizeof(cmd), "bootefi %lx %lx", + (ulong)map_to_sysmem(bflow->buf), + (ulong)map_to_sysmem(gd->fdt_blob)); + if (run_command(cmd, 0)) + return log_msg_ret("run", -EINVAL); + + return 0; +} diff --git a/include/bm_efi.h b/include/bm_efi.h new file mode 100644 index 00000000000..836b2c17f22 --- /dev/null +++ b/include/bm_efi.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg(a)chromium.org> + */ + +#ifndef __bootmethod_efi_h +#define __bootmethod_efi_h + +struct blk_desc; + +/** + * efiloader_boot_setup() - Set up a bootflow for EFI boot from a block device + * + * This fills out a bootflow for a particular boot device and partition. It + * scans for a filesystem and suitable file, updating the bootflow accordingly. + * + * This sets the following fields in @bflow: + * + * type, size, fname, state, subdir, buf + * + * The caller mast have already set the other fields. + * + * @desc: Block-device descriptor + * @partnum: Partition number (1..) + * @bflow: Partial bootflow to be completed by this function + * @return 0 on success (bootflow got to 'loaded' state), -ve on error + */ +int efiloader_boot_setup(struct blk_desc *desc, int partnum, + struct bootflow *bflow); + +/** + * efiloader_boot() - Boot an EFI binary + * + * Boots a bootflow of type BOOTFLOWT_EFI_LOADER. This boots an EFI application + * which takes care of the boot from then on. + * + * @bflow: Bootflow to boot + */ +int efiloader_boot(struct bootflow *bflow); + +#endif diff --git a/include/bootmethod.h b/include/bootmethod.h index d80be556b8a..d6cc486c43c 100644 --- a/include/bootmethod.h +++ b/include/bootmethod.h @@ -25,6 +25,7 @@ enum bootflow_state_t { enum bootflow_type_t { BOOTFLOWT_DISTRO, /**< Distro boot */ + BOOTFLOWT_EFILOADER, /**< EFI loader boot */ BOOTFLOWT_COUNT, }; -- 2.33.0.259.gc128427fd7-goog

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[PATCH 0/2] doc: update Sphinx build system
by Heinrich Schuchardt 30 Sep '21

30 Sep '21

We require Sphinx 2.44. Adjust the coding accordingly. In Linux the margins of Latex documents were fixed. Update our files accordingly. Heinrich Schuchardt (2): doc: require Sphinx 2.44 doc: fix Latex margins doc/conf.py | 108 ++++++++-------------------------------- doc/sphinx/kerneldoc.py | 26 ++-------- 2 files changed, 24 insertions(+), 110 deletions(-) -- 2.30.2

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[PATCH] mkimage: Don't disable encryption based on CONFIG_FIT_CIPHER
by Alexandru Gagniuc 30 Sep '21

30 Sep '21

We want the u-boot tools to be target agnostic, as explained in commit cb9faa6f98ae (" tools: Use a single target-independent config to enable OpenSSL") Making mkimage features depend on CONFIG_FIT_CIPHER is contrary to that goal. Thus, always enable cihper features in mkimage, and ignore the value of CONFIG_FIT_CIPHER for host-only code. Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- include/image.h | 5 ----- tools/image-host.c | 2 +- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/include/image.h b/include/image.h index e20f0b69d5..381ee91eb5 100644 --- a/include/image.h +++ b/include/image.h @@ -1432,14 +1432,9 @@ static inline int fit_image_check_target_arch(const void *fdt, int node) * device */ #if defined(USE_HOSTCC) -# if defined(CONFIG_FIT_CIPHER) # define IMAGE_ENABLE_ENCRYPT 1 # define IMAGE_ENABLE_DECRYPT 1 # include <openssl/evp.h> -# else -# define IMAGE_ENABLE_ENCRYPT 0 -# define IMAGE_ENABLE_DECRYPT 0 -# endif #else # define IMAGE_ENABLE_ENCRYPT 0 # define IMAGE_ENABLE_DECRYPT CONFIG_IS_ENABLED(FIT_CIPHER) diff --git a/tools/image-host.c b/tools/image-host.c index d3a882ec29..82cb238f54 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -562,7 +562,7 @@ int fit_image_cipher_data(const char *keydir, void *keydest, printf("Failure getting cipher node\n"); return -1; } - if (!IMAGE_ENABLE_ENCRYPT || !keydir) + if (keydir) return 0; return fit_image_process_cipher(keydir, keydest, fit, image_name, image_noffset, cipher_node_offset, data, size, cmdname); -- 2.31.1

2 1

[PATCH] i2c: rcar_i2c: Enable configuring SCL rise and fall times
by Adam Ford 28 Sep '21

28 Sep '21

The Linux i2c driver supports i2c-scl-rising-time-ns, and i2c-scl-falling-time-ns, but U-Boot uses hard-coded values for these values. Update the calculation by fetching them from the device tree if present and use the previous values as the default if they are missing. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c index 14bb6603d5..d9ece5e3a8 100644 --- a/drivers/i2c/rcar_i2c.c +++ b/drivers/i2c/rcar_i2c.c @@ -64,6 +64,8 @@ enum rcar_i2c_type { struct rcar_i2c_priv { void __iomem *base; struct clk clk; + u32 fall_ns; + u32 rise_ns; u32 intdelay; u32 icccr; enum rcar_i2c_type type; @@ -278,7 +280,7 @@ static int rcar_i2c_set_speed(struct udevice *dev, uint bus_freq_hz) * = F[sum * ick / 1000000000] * = F[(ick / 1000000) * sum / 1000] */ - sum = 35 + 200 + priv->intdelay; + sum = priv->fall_ns + priv->rise_ns + priv->intdelay; round = (ick + 500000) / 1000000 * sum; round = (round + 500) / 1000; @@ -323,6 +325,10 @@ static int rcar_i2c_probe(struct udevice *dev) int ret; priv->base = dev_read_addr_ptr(dev); + priv->rise_ns = dev_read_u32_default(dev, + "i2c-scl-rising-time-ns", 200); + priv->fall_ns = dev_read_u32_default(dev, + "i2c-scl-falling-time-ns", 35); priv->intdelay = dev_read_u32_default(dev, "i2c-scl-internal-delay-ns", 5); priv->type = dev_get_driver_data(dev); -- 2.25.1

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[PATCH 0/4] crypto: Add new UCLASS_HASH
by Chia-Wei Wang 27 Sep '21

27 Sep '21

This patch series proposes new UCLASS_HASH for hash devices. Thus the hash drivers (SW or HW-accelerated) can be developed in the DM-based fashion. A purely software implemented hash driver is also added under the newly added UCLASS_HASH uclass. In addition, the FIT image hash verification is also updated to leverage the UCLASS_HASH driver if configured. As there is widly spread use of non-DM hash functions (common/hash.c), this patch does not remove them. More patches are needed if UCLASS_HASH is established. Chia-Wei Wang (4): lib/md5: Export progressive APIs dm: hash: Add new UCLASS_HASH support crypto: hash: Add software hash DM driver fit: Use DM hash driver if supported common/image-fit.c | 30 +++ drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/hash/Kconfig | 16 ++ drivers/crypto/hash/Makefile | 6 + drivers/crypto/hash/hash-uclass.c | 121 ++++++++++++ drivers/crypto/hash/hash_sw.c | 301 ++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/u-boot/hash.h | 61 ++++++ include/u-boot/md5.h | 4 + lib/md5.c | 6 +- 11 files changed, 546 insertions(+), 3 deletions(-) create mode 100644 drivers/crypto/hash/Kconfig create mode 100644 drivers/crypto/hash/Makefile create mode 100644 drivers/crypto/hash/hash-uclass.c create mode 100644 drivers/crypto/hash/hash_sw.c create mode 100644 include/u-boot/hash.h -- 2.17.1

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[PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support
by Green Wan 27 Sep '21

27 Sep '21

This patch set is to add SiFive fu740 chip and HiFive Unmatched board support. Patches are split into several parts: - [PATCH v7 1/8] support for fu740 cpu - [PATCH v7 2/8] support for fu740 clk driver - [PATCH v7 3/8] rename and support for fu740 ram driver - [PATCH v7 4/8] add pcie driver - [PATCH v7 5/8] dts for SiFive fu740 - [PATCH v7 6/8] dts for SiFive Unmatched board - [PATCH v7 7/8] add Unmatched board support - [PATCH v7 8/8] add fu740 support to macb driver Description - For fu740 cpu support, reuse most of fu540 cpu. - For prci driver, add one abstract layer to separate fu540 and fu740. Move orignal fu540 code to separate files. - For pcie driver, it depends on gpio, prci, clk and reset drivers to do init&reset works. Also based on pcie_dw_common.c - Align with Linux DT file. Tests and patch checks - Able to boot both unmatched and unleashed boards. - PCIe tests . M.2 NVMe SSD . e1000 compatibale ethernet adapter (ping&tftpboot) . pci-to-usb adapter(usb mass storage) - checkpatch is performed. To keep code derived from other boards the same, ignore some warnings/errors in [PATCH 7/8]. Changlogs - V7 . Rebase to latest master branch . Moved dts for fu740 patch [v6 1/7] to [v7 5/8] and seperate dts of Unmatched board from [v6 6/7] into [v7 6/8] . Applied PCIe refactoring patch to base on the common code in pcie_dw_common.c - V6 . Remove redundant DT string for 1.2GHz CPU clock and squash to [1/7] - V5 . Fix unleashed build error in patch [6/8] . Append one more set for 1.2GHz CPU speed . Add "#include <asm/global_data.h>" back to sifive_ddr.c . Add Reviewed-by to [4/8] and [7/8] - V4 . fixed incorrect file name in ./board/sifive/unmatched/Makefile . fixed link in doc/board/sifive/index.rst, passed 'make htmldocs' - V3 . Rebase to unleashed rename v2 patch . Rename doc/board/sifive/unmatched.rst board/sifive/unmatched/unmatched.c . Fix tail whitespace . Add 'git mv' info to ram driver and merge patch back to one . Add comment to macb driver for PLL hardware quirk . Add reviewed-by to patch [6/7] . Add 'gpio-poweroff' node for upcoming opensbi integration - V2 . Rebase to unleashed rename patch . remove unnessaary fu540 changes . split ram driver patch into 2 to keep 'git mv' info . use a shorter name for unmatched support . Remove redundant&incorrect temperature-sensor in DT . Remove unnecessary USB EHCI & OHCI from defconfig . Revised fu740 doc . Fixed year of copyright . Add reviewed-by received in v1 patch David Abdurachmanov (1): drivers: net: macb: add fu740 support Green Wan (7): riscv: cpu: fu740: Add support for cpu fu740 drivers: clk: add fu740 support drivers: ram: sifive: rename fu540_ddr and add fu740 support drivers: pci: add pcie support for fu740 riscv: dts: add fu740 support riscv: dts: add SiFive Unmatched board support board: sifive: add HiFive Unmatched board support arch/riscv/Kconfig | 5 + arch/riscv/cpu/fu740/Kconfig | 37 + arch/riscv/cpu/fu740/Makefile | 12 + arch/riscv/cpu/fu740/cache.c | 55 + arch/riscv/cpu/fu740/cpu.c | 22 + arch/riscv/cpu/fu740/dram.c | 38 + arch/riscv/cpu/fu740/spl.c | 23 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/fu740-c000-u-boot.dtsi | 105 ++ arch/riscv/dts/fu740-c000.dtsi | 329 ++++ .../dts/fu740-hifive-unmatched-a00-ddr.dtsi | 1489 +++++++++++++++++ .../dts/hifive-unmatched-a00-u-boot.dtsi | 40 + arch/riscv/dts/hifive-unmatched-a00.dts | 259 +++ arch/riscv/include/asm/arch-fu740/cache.h | 14 + arch/riscv/include/asm/arch-fu740/clk.h | 14 + arch/riscv/include/asm/arch-fu740/gpio.h | 38 + arch/riscv/include/asm/arch-fu740/reset.h | 13 + arch/riscv/include/asm/arch-fu740/spl.h | 14 + arch/riscv/lib/sifive_clint.c | 1 - board/sifive/unleashed/Kconfig | 1 + board/sifive/unmatched/Kconfig | 50 + board/sifive/unmatched/MAINTAINERS | 9 + board/sifive/unmatched/Makefile | 9 + board/sifive/unmatched/spl.c | 85 + board/sifive/unmatched/unmatched.c | 24 + common/spl/Kconfig | 4 +- configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 54 + doc/board/sifive/index.rst | 1 + doc/board/sifive/unmatched.rst | 536 ++++++ drivers/clk/sifive/Kconfig | 8 +- drivers/clk/sifive/Makefile | 4 +- drivers/clk/sifive/fu540-prci.c | 769 +-------- drivers/clk/sifive/fu540-prci.h | 22 + drivers/clk/sifive/fu740-prci.c | 158 ++ drivers/clk/sifive/fu740-prci.h | 22 + drivers/clk/sifive/sifive-prci.c | 733 ++++++++ drivers/clk/sifive/sifive-prci.h | 323 ++++ drivers/net/macb.c | 13 +- drivers/pci/Kconfig | 10 + drivers/pci/Makefile | 1 + drivers/pci/pcie_dw_sifive.c | 508 ++++++ drivers/ram/sifive/Kconfig | 8 +- drivers/ram/sifive/Makefile | 2 +- .../ram/sifive/{fu540_ddr.c => sifive_ddr.c} | 89 +- drivers/reset/Kconfig | 2 +- include/configs/sifive-unmatched.h | 85 + include/dt-bindings/clock/sifive-fu740-prci.h | 25 + include/dt-bindings/reset/sifive-fu740-prci.h | 19 + 49 files changed, 5277 insertions(+), 807 deletions(-) create mode 100644 arch/riscv/cpu/fu740/Kconfig create mode 100644 arch/riscv/cpu/fu740/Makefile create mode 100644 arch/riscv/cpu/fu740/cache.c create mode 100644 arch/riscv/cpu/fu740/cpu.c create mode 100644 arch/riscv/cpu/fu740/dram.c create mode 100644 arch/riscv/cpu/fu740/spl.c create mode 100644 arch/riscv/dts/fu740-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/fu740-c000.dtsi create mode 100644 arch/riscv/dts/fu740-hifive-unmatched-a00-ddr.dtsi create mode 100644 arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi create mode 100644 arch/riscv/dts/hifive-unmatched-a00.dts create mode 100644 arch/riscv/include/asm/arch-fu740/cache.h create mode 100644 arch/riscv/include/asm/arch-fu740/clk.h create mode 100644 arch/riscv/include/asm/arch-fu740/gpio.h create mode 100644 arch/riscv/include/asm/arch-fu740/reset.h create mode 100644 arch/riscv/include/asm/arch-fu740/spl.h create mode 100644 board/sifive/unmatched/Kconfig create mode 100644 board/sifive/unmatched/MAINTAINERS create mode 100644 board/sifive/unmatched/Makefile create mode 100644 board/sifive/unmatched/spl.c create mode 100644 board/sifive/unmatched/unmatched.c create mode 100644 configs/sifive_unmatched_defconfig create mode 100644 doc/board/sifive/unmatched.rst create mode 100644 drivers/clk/sifive/fu540-prci.h create mode 100644 drivers/clk/sifive/fu740-prci.c create mode 100644 drivers/clk/sifive/fu740-prci.h create mode 100644 drivers/clk/sifive/sifive-prci.c create mode 100644 drivers/clk/sifive/sifive-prci.h create mode 100644 drivers/pci/pcie_dw_sifive.c rename drivers/ram/sifive/{fu540_ddr.c => sifive_ddr.c} (81%) create mode 100644 include/configs/sifive-unmatched.h create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h create mode 100644 include/dt-bindings/reset/sifive-fu740-prci.h -- 2.31.0

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