August 2021 - U-Boot

[PATCH v3] imx8mm-cl-iot-gate: Split the defconfigs
by Fabio Estevam 07 Oct '21

07 Oct '21

Currently imx8mm-cl-iot-gate_defconfig fails to produce a working boot binary due to the lack of fip.bin: " BINMAN all Image 'main-section' is missing external blobs and is non-functional: blob-ext Some images are invalid" To make the build process more consistent with the other i.MX8M targets, split the defconfig in two: - imx8mm-cl-iot-gate_defconfig: standard defconfig that only requires ATF / DDR firmware. - imx8mm-cl-iot-gate-optee_defconfig: "more advanced" defconfig that requires ATF / Optee / mbedtls / DDR firmware. Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- Changes since v2: - Rename the ATF binary to bl2.bin in the optee case (Paul) arch/arm/dts/Makefile | 2 + .../dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi | 255 ++++++++++++++++++ arch/arm/dts/imx8mm-cl-iot-gate-optee.dts | 6 + arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi | 14 +- arch/arm/mach-imx/imx8m/Kconfig | 7 + board/compulab/imx8mm-cl-iot-gate/Kconfig | 2 +- board/compulab/imx8mm-cl-iot-gate/MAINTAINERS | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 147 ++++++++++ 8 files changed, 420 insertions(+), 14 deletions(-) create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-optee.dts create mode 100644 configs/imx8mm-cl-iot-gate-optee_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c42715ead4..88f52cd390 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1127,6 +1127,8 @@ dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb +dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb + dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb targets += $(dtb-y) diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi new file mode 100644 index 0000000000..3226a244a9 --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +/ { + binman: binman { + multiple-images; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + u-boot,dm-spl; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; +}; + +&{/soc@0} { + u-boot,dm-pre-reloc; + u-boot,dm-spl; +}; + +&clk { + u-boot,dm-spl; + u-boot,dm-pre-reloc; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +&osc_24m { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&aips3 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&pinctrl_uart3 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_gpio { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&uart3 { + u-boot,dm-spl; +}; + +&usdhc1 { + u-boot,dm-spl; +}; + +&usdhc2 { + u-boot,dm-spl; +}; + +&usdhc3 { + u-boot,dm-spl; +}; + +&i2c1 { + u-boot,dm-spl; +}; + +&i2c2 { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { + u-boot,dm-spl; +}; + +&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { + u-boot,dm-spl; +}; + +&pinctrl_i2c2 { + u-boot,dm-spl; +}; + +&pinctrl_pmic { + u-boot,dm-spl; +}; + +&fec1 { + phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; +}; + +&wdog1 { + u-boot,dm-spl; +}; + +&binman { + u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + }; + + blob_1: blob-ext@1 { + filename = "lpddr4_pmu_train_1d_imem.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "lpddr4_pmu_train_2d_imem.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + size = <0x4000>; + }; + }; + + flash { + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + + images { + uboot { + description = "U-Boot (64-bit)"; + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + + uboot_blob: blob-ext { + filename = "u-boot-nodtb.bin"; + }; + }; + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x920000>; + entry = <0x920000>; + + atf_blob: blob-ext { + filename = "bl2.bin"; + }; + }; + + fip { + description = "Trusted Firmware FIP"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x40310000>; + + fip_blob: blob-ext{ + filename = "fip.bin"; + }; + }; + + fdt { + description = "NAME"; + type = "flat_dt"; + compression = "none"; + + uboot_fdt_blob: blob-ext { + filename = "u-boot.dtb"; + }; + }; + }; + + configurations { + default = "conf"; + + conf { + description = "NAME"; + firmware = "uboot"; + loadables = "atf", "fip"; + fdt = "fdt"; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-optee.dts b/arch/arm/dts/imx8mm-cl-iot-gate-optee.dts new file mode 100644 index 0000000000..4d0ef46997 --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-optee.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 NXP + */ + +#include "imx8mm-cl-iot-gate.dts" diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi index 3226a244a9..00927c1574 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi @@ -217,18 +217,6 @@ }; }; - fip { - description = "Trusted Firmware FIP"; - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <0x40310000>; - - fip_blob: blob-ext{ - filename = "fip.bin"; - }; - }; - fdt { description = "NAME"; type = "flat_dt"; @@ -246,7 +234,7 @@ conf { description = "NAME"; firmware = "uboot"; - loadables = "atf", "fip"; + loadables = "atf"; fdt = "fdt"; }; }; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index ccaf106be5..dfda4cb70e 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -138,6 +138,13 @@ config TARGET_IMX8MM_CL_IOT_GATE select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 + +config TARGET_IMX8MM_CL_IOT_GATE_OPTEE + bool "CompuLab iot-gate-imx8 with optee support" + select BINMAN + select IMX8MM + select SUPPORT_SPL + select IMX8M_LPDDR4 endchoice source "board/beacon/imx8mm/Kconfig" diff --git a/board/compulab/imx8mm-cl-iot-gate/Kconfig b/board/compulab/imx8mm-cl-iot-gate/Kconfig index 7f5c794bf5..f32102f24b 100644 --- a/board/compulab/imx8mm-cl-iot-gate/Kconfig +++ b/board/compulab/imx8mm-cl-iot-gate/Kconfig @@ -1,4 +1,4 @@ -if TARGET_IMX8MM_CL_IOT_GATE +if TARGET_IMX8MM_CL_IOT_GATE || TARGET_IMX8MM_CL_IOT_GATE_OPTEE config SYS_BOARD default "imx8mm-cl-iot-gate" diff --git a/board/compulab/imx8mm-cl-iot-gate/MAINTAINERS b/board/compulab/imx8mm-cl-iot-gate/MAINTAINERS index 9c6b17095c..9db1fb6950 100644 --- a/board/compulab/imx8mm-cl-iot-gate/MAINTAINERS +++ b/board/compulab/imx8mm-cl-iot-gate/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/compulab/imx8mm-cl-iot-gate/ F: include/configs/imx8mm-cl-iot-gate.h F: configs/imx8mm-cl-iot-gate_defconfig +F: configs/imx8mm-cl-iot-gate-optee_defconfig diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig new file mode 100644 index 0000000000..d918779960 --- /dev/null +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -0,0 +1,147 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x40200000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate-optee" +CONFIG_SPL_TEXT_BASE=0x7E1000 +CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg" +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C=y +CONFIG_SPL_POWER=y +CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_BOOTEFI_SELFTEST=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_BIND=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_RTC=y +CONFIG_CMD_TIME=y +CONFIG_CMD_GETTIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_TPM=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_DFU_TFTP=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_UDP_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x44000000 +CONFIG_FASTBOOT_BUF_SIZE=0x5000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_DM_KEYBOARD=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_DM_SPI_FLASH=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PCI_ENDPOINT=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_BD71837=y +CONFIG_SPL_DM_PMIC_BD71837=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_BD71837=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RTC=y +CONFIG_RTC_ABX80X=y +CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_TEE=y +CONFIG_OPTEE=y +CONFIG_DM_THERMAL=y +CONFIG_TPM2_TIS_SPI=y +CONFIG_TPM2_FTPM_TEE=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_IMX_WATCHDOG=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_TPM=y +CONFIG_LZO=y +CONFIG_BZIP2=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_SET_TIME=y +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y +CONFIG_EFI_SECURE_BOOT=y -- 2.25.1

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[PATCH v2 1/5] board: gateworks: venice: display hwmon details by default
by Tim Harvey 07 Oct '21

07 Oct '21

Display hwmon values by default when using the 'gsc' command. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- v2: no changes --- board/gateworks/venice/gsc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/gateworks/venice/gsc.c b/board/gateworks/venice/gsc.c index 7d6acd7b4a..065d1fb8cc 100644 --- a/board/gateworks/venice/gsc.c +++ b/board/gateworks/venice/gsc.c @@ -527,6 +527,9 @@ static int gsc_info(int verbose) printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24); } + /* Display hwmon */ + gsc_hwmon(); + return 0; } -- 2.17.1

3 10

[PATCH][RFC] tree: imx: remove old fit generator script
by Andrey Zhizhikin 07 Oct '21

07 Oct '21

Since derivatives are moving to binman from usage of the FIT generator script, and considering the warning introduced in f4a43d2925 ("Makefile: Warn against using CONFIG_SPL_FIT_GENERATOR"), usage of FIT generator is discouraged. Current FIT generator also generates broken output, since commit 3f04db891a ("image: Check for unit addresses in FITs") prohibits using '@' for unit addresses but the generator script still emits the old sematics. Remove the generator script and corresponding call in Makefile, all derivatives should be migrated to binman in order to provide binary images. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin(a)leica-geosystems.com> --- Makefile | 3 - arch/arm/mach-imx/mkimage_fit_atf.sh | 143 --------------------------- 2 files changed, 146 deletions(-) delete mode 100755 arch/arm/mach-imx/mkimage_fit_atf.sh diff --git a/Makefile b/Makefile index 3c8437d21a..6760ddc826 100644 --- a/Makefile +++ b/Makefile @@ -1350,9 +1350,6 @@ $(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE)) else ifneq ($(CONFIG_USE_SPL_FIT_GENERATOR),) U_BOOT_ITS := u-boot.its -ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-imx/mkimage_fit_atf.sh") -U_BOOT_ITS_DEPS += u-boot-nodtb.bin -endif ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py") U_BOOT_ITS_DEPS += u-boot endif diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh b/arch/arm/mach-imx/mkimage_fit_atf.sh deleted file mode 100755 index 2a17968794..0000000000 --- a/arch/arm/mach-imx/mkimage_fit_atf.sh +++ /dev/null @@ -1,143 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0+ -# -# script to generate FIT image source for i.MX8MQ boards with -# ARM Trusted Firmware and multiple device trees (given on the command line) -# -# usage: $0 <dt_name> [<dt_name> [<dt_name] ...] - -[ -z "$BL31" ] && BL31="bl31.bin" -[ -z "$TEE_LOAD_ADDR" ] && TEE_LOAD_ADDR="0xfe000000" -[ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0x00910000" -[ -z "$BL33_LOAD_ADDR" ] && BL33_LOAD_ADDR="0x40200000" - -if [ ! -f $BL31 ]; then - echo "ERROR: BL31 file $BL31 NOT found" >&2 - exit 0 -else - echo "$BL31 size: " >&2 - stat -c %s $BL31 >&2 -fi - -BL32="tee.bin" - -if [ ! -f $BL32 ]; then - BL32=/dev/null -else - echo "Building with TEE support, make sure your $BL31 is compiled with spd. If you do not want tee, please delete $BL31" >&2 - echo "$BL32 size: " >&2 - stat -c %s $BL32 >&2 -fi - -BL33="u-boot-nodtb.bin" - -if [ ! -f $BL33 ]; then - echo "ERROR: $BL33 file NOT found" >&2 - exit 0 -else - echo "u-boot-nodtb.bin size: " >&2 - stat -c %s u-boot-nodtb.bin >&2 -fi - -for dtname in $* -do - echo "$dtname size: " >&2 - stat -c %s $dtname >&2 -done - - -cat << __HEADER_EOF -/dts-v1/; - -/ { - description = "Configuration to load ATF before U-Boot"; - - images { - uboot@1 { - description = "U-Boot (64-bit)"; - os = "u-boot"; - data = /incbin/("$BL33"); - type = "standalone"; - arch = "arm64"; - compression = "none"; - load = <$BL33_LOAD_ADDR>; - }; -__HEADER_EOF - -cnt=1 -for dtname in $* -do - cat << __FDT_IMAGE_EOF - fdt@$cnt { - description = "$(basename $dtname .dtb)"; - data = /incbin/("$dtname"); - type = "flat_dt"; - compression = "none"; - }; -__FDT_IMAGE_EOF -cnt=$((cnt+1)) -done - -cat << __HEADER_EOF - atf@1 { - description = "ARM Trusted Firmware"; - os = "arm-trusted-firmware"; - data = /incbin/("$BL31"); - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <$ATF_LOAD_ADDR>; - entry = <$ATF_LOAD_ADDR>; - }; -__HEADER_EOF - -if [ -f $BL32 ]; then -cat << __HEADER_EOF - tee@1 { - description = "TEE firmware"; - data = /incbin/("$BL32"); - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <$TEE_LOAD_ADDR>; - entry = <$TEE_LOAD_ADDR>; - }; -__HEADER_EOF -fi - -cat << __CONF_HEADER_EOF - }; - configurations { - default = "config@1"; - -__CONF_HEADER_EOF - -cnt=1 -for dtname in $* -do -if [ -f $BL32 ]; then -cat << __CONF_SECTION_EOF - config@$cnt { - description = "$(basename $dtname .dtb)"; - firmware = "uboot@1"; - loadables = "atf@1", "tee@1"; - fdt = "fdt@$cnt"; - }; -__CONF_SECTION_EOF -else -cat << __CONF_SECTION1_EOF - config@$cnt { - description = "$(basename $dtname .dtb)"; - firmware = "uboot@1"; - loadables = "atf@1"; - fdt = "fdt@$cnt"; - }; -__CONF_SECTION1_EOF -fi -cnt=$((cnt+1)) -done - -cat << __ITS_EOF - }; -}; -__ITS_EOF -- 2.25.1

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[PATCH] arm: imx8m: Fix pad DSE issue for i.MX8MM/MN/MP
by Ye Li 07 Oct '21

07 Oct '21

According to 8MM/MN/MP reference manual, their pad registers only have 4 valid DSE values. And DSE2 and DSE4 are different with current definitions in iomux-v3.h. Fix the issue to align with manual. Signed-off-by: Ye Li <ye.li(a)nxp.com> Acked-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/include/asm/mach-imx/iomux-v3.h | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h index 1de7093..9330a32 100644 --- a/arch/arm/include/asm/mach-imx/iomux-v3.h +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h @@ -87,15 +87,6 @@ typedef u64 iomux_v3_cfg_t; #define MUX_MODE_LPSR ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \ MUX_MODE_SHIFT) #ifdef CONFIG_IMX8M -#define PAD_CTL_DSE0 (0x0 << 0) -#define PAD_CTL_DSE1 (0x1 << 0) -#define PAD_CTL_DSE2 (0x2 << 0) -#define PAD_CTL_DSE3 (0x3 << 0) -#define PAD_CTL_DSE4 (0x4 << 0) -#define PAD_CTL_DSE5 (0x5 << 0) -#define PAD_CTL_DSE6 (0x6 << 0) -#define PAD_CTL_DSE7 (0x7 << 0) - #define PAD_CTL_FSEL0 (0x0 << 3) #define PAD_CTL_FSEL1 (0x1 << 3) #define PAD_CTL_FSEL2 (0x2 << 3) @@ -105,8 +96,20 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_PUE (0x1 << 6) #define PAD_CTL_HYS (0x1 << 7) #if defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP) +#define PAD_CTL_DSE1 (0x0 << 1) +#define PAD_CTL_DSE2 (0x2 << 1) +#define PAD_CTL_DSE4 (0x1 << 1) +#define PAD_CTL_DSE6 (0x3 << 1) #define PAD_CTL_PE (0x1 << 8) #else +#define PAD_CTL_DSE0 (0x0 << 0) +#define PAD_CTL_DSE1 (0x1 << 0) +#define PAD_CTL_DSE2 (0x2 << 0) +#define PAD_CTL_DSE3 (0x3 << 0) +#define PAD_CTL_DSE4 (0x4 << 0) +#define PAD_CTL_DSE5 (0x5 << 0) +#define PAD_CTL_DSE6 (0x6 << 0) +#define PAD_CTL_DSE7 (0x7 << 0) #define PAD_CTL_LVTTL (0x1 << 8) #endif -- 2.7.4

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[PATCH v2 0/1] arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size
by Ying-Chun Liu 07 Oct '21

07 Oct '21

From: "Ying-Chun Liu (PaulLiu)" <paulliu(a)debian.org> When purchasing imx8mm-cl-iot-gate it is able to customize the memory size. It could be 1GB, 2GB and 4GB. We implement board_phys_sdram_size() to detect the memory size for usage. This patch was trying to fix the regression on mainline U-boot for imx8mm-cl-iot-gate. However this is not related to the regression. But we should have this implemented anyway. v2: use hang() instead of while(1) Ying-Chun Liu (PaulLiu) (1): arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) -- 2.32.0

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[PATCH 1/3] imx8mm_evk: Increase CONFIG_SYS_BOOTM_LEN to 64MB
by Oleksandr Suvorov 07 Oct '21

07 Oct '21

The BSP platform LmP supports the board NXP iMX8M Mini EVK. The kernel size in LmP exceeds 32Mb. Increase the maximum size of an uncompressed kernel to fix the following error: Uncompressing Kernel Image Error: inflate() returned -5 Image too large: increase CONFIG_SYS_BOOTM_LEN Must RESET board to recover Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov(a)foundries.io> --- include/configs/imx8mm_evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 8f3dd8fb61..33c7ec544b 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -10,7 +10,7 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h> -#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) +#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -- 2.31.1

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[PATCH v1 0/2] imx8m: fix secure boot
by Heiko Schocher 07 Oct '21

07 Oct '21

This series fixes secure boot on imx8m based boards. Tim also detected this issue and the patches fixed on his hardware also the problem, see discussion here: https://lists.denx.de/pipermail/u-boot/2021-July/454351.html Problem is that the IVT header gets loaded to a memallocated buffer, but it needs to sit on memaddress coded in IVT header itself. This patchseries adds a weak function spl_load_simple_fit() in common spl code, which does not change current code behaviour. Second patch than implements this weak function for imx based boards (if no IVT header is found on address which is passed to it, it does nothing). I am not sure if this is the best solution, but it fixes a real bug, and may could be made clearer, if possible. Heiko Schocher (2): spl_fit. add hook to make fixes after fit header is loaded imx: spl: implement spl_load_simple_fit_fix_load arch/arm/mach-imx/spl.c | 33 +++++++++++++++++++++++++++++++++ common/spl/spl_fit.c | 11 +++++++++++ include/spl.h | 8 ++++++++ 3 files changed, 52 insertions(+) -- 2.31.1

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[PATCH v2] arm: dts: imx8mp: Generate single bootable binary
by Teresa Remmet 07 Oct '21

07 Oct '21

binman conversion made flashing flash.bin and u-boot.itb necessary. Update binman config to create a single flash.bin image again. This updates imx8mp_evk and phyCORE-i.MX8MP as they share the same binman config. Updated also imx8mp_evk documentation. Tested on phyCORE-i.MX8MP. Signed-off-by: Teresa Remmet <t.remmet(a)phytec.de> Reviewed-by: Fabio Estevam <festevam(a)gmail.com> Reviewed-by: Heiko Schocher <hs(a)denx.de> --- Changes in v2: - Added filename to spl node - Use u-boot-spl-ddr.bin in the LOADER section arch/arm/dts/imx8mp-u-boot.dtsi | 19 ++++++++++++++++++- .../imx8mp_evk/imximage-8mp-lpddr4.cfg | 2 +- .../phytec/phycore_imx8mp/imximage-8mp-sd.cfg | 2 +- doc/board/nxp/imx8mp_evk.rst | 1 - 4 files changed, 20 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index a6ede2ed6e30..120c4c4dbb13 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -82,7 +82,9 @@ }; }; - flash { + spl { + filename = "spl.bin"; + mkimage { args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x920000"; @@ -149,4 +151,19 @@ }; }; }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl: blob-ext@1 { + filename = "spl.bin"; + offset = <0x0>; + }; + + uboot: blob-ext@2 { + filename = "u-boot.itb"; + offset = <0x58000>; + }; + }; }; diff --git a/board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg b/board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg index b2920b4908ed..4c3ecf5a71ad 100644 --- a/board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg +++ b/board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg @@ -7,4 +7,4 @@ ROM_VERSION v2 BOOT_FROM sd -LOADER mkimage.flash.mkimage 0x920000 +LOADER u-boot-spl-ddr.bin 0x920000 diff --git a/board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg b/board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg index b2920b4908ed..4c3ecf5a71ad 100644 --- a/board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg +++ b/board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg @@ -7,4 +7,4 @@ ROM_VERSION v2 BOOT_FROM sd -LOADER mkimage.flash.mkimage 0x920000 +LOADER u-boot-spl-ddr.bin 0x920000 diff --git a/doc/board/nxp/imx8mp_evk.rst b/doc/board/nxp/imx8mp_evk.rst index 609a29f3ebc3..b996ae055e69 100644 --- a/doc/board/nxp/imx8mp_evk.rst +++ b/doc/board/nxp/imx8mp_evk.rst @@ -52,7 +52,6 @@ Burn the flash.bin to the MicroSD card at offset 32KB: .. code-block:: bash $sudo dd if=build/flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync - $sudo dd if=build/u-boot.itb of=/dev/sd[x] bs=1K seek=384 conv=notrunc; sync Boot ---- -- 2.25.1

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[PATCH v2] mx7ulp: Allow to enable CONFIG_IMX_HAB
by Oleksandr Suvorov 07 Oct '21

07 Oct '21

From: Ricardo Salveti <ricardo(a)foundries.io> Secure boot support on mx7ulp was added in the commit 27117b2024b6 ("mx7ulp: Add HAB boot support"). Allow selecting CONFIG_IMX_HAB for ARCH_IMX7ULP. Fixes: 27117b2024b6 ("mx7ulp: Add HAB boot support") Signed-off-by: Ricardo Salveti <ricardo(a)foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov(a)foundries.io> Reviewed-by: Fabio Estevam <festevam(a)gmail.com> --- Changes in v2: - fix typo in the commit message - add Reviewed-by field (Thanks, Fabio) arch/arm/mach-imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 653463ab46..18a39047a5 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -43,7 +43,7 @@ config USE_IMXIMG_PLUGIN config IMX_HAB bool "Support i.MX HAB features" - depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M + depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M || ARCH_MX7ULP select FSL_CAAM if HAS_CAAM imply CMD_DEKBLOB if HAS_CAAM help -- 2.31.1

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[PATCH] mmc: fsl_esdhc_imx: Fix clock disable issue
by Ye Li 07 Oct '21

07 Oct '21

The SD clock disable is wrapped by MMC_SUPPORTS_TUNING. So it only works when UHS is enabled. However, in SD initialization the power cycle does not depends on UHS. But the power cycle needs disable the SD clock before power down. So this causes a problem when UHS is not enabled. Some cards can't become ready (ACMD14 timeout) due to the clock is enabled during power cycle. Signed-off-by: Ye Li <ye.li(a)nxp.com> Reviewed-by: Haibo Chen <haibo.chen(a)nxp.com> --- drivers/mmc/fsl_esdhc_imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index aabf395..7b67972 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -971,7 +971,6 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) if (priv->clock != clock) set_sysctl(priv, mmc, clock); -#ifdef MMC_SUPPORTS_TUNING if (mmc->clk_disable) { #ifdef CONFIG_FSL_USDHC esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_CKEN); @@ -987,6 +986,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) #endif } +#ifdef MMC_SUPPORTS_TUNING /* * For HS400/HS400ES mode, make sure set the strobe dll in the * target clock rate. So call esdhc_set_strobe_dll() after the -- 2.7.4

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