July 2021 - U-Boot

[PATCH 1/7] stm32mp: configs: activate the command stm32key only for ST boards
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: patrick.delaunay(a)foss.st.com Original delivery time: 28-Jun-2021 01:18 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. This command is used to evaluate the secure boot on stm32mp SOC, it is deactivated by default in real products. We activate this command only in STMicroelectronics defconfig used with the evaluation boards. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 4 +++- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 7c25266f33..0e59931679 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -174,10 +174,12 @@ config STM32_ETZPC config CMD_STM32KEY bool "command stm32key to fuse public key hash" - default y + default n help fuse public key hash in corresponding fuse used to authenticate binary. + This command is used to evaluate the secure boot on stm32mp SOC, + it is deactivated by default in real products. config PRE_CON_BUF_ADDR default 0xC02FF000 diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 3ff46f7048..4e66472825 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DM_SPI=y CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y +CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index afbf721299..d68bdf9eea 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 -- 2.25.1

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[PATCH] configs: stm32mp1: remove splashimage and add fdtoverlay_addr_r
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: patrick.delaunay(a)foss.st.com Original delivery time: 28-Jun-2021 01:09 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. Add the variable used by PXE command for fdtoverlays support since the commit 69076dff2284 ("cmd: pxe: add support for FDT overlays"). Reused the unused "splashimage" address as CONFIG_SPLASH_SOURCE and CONFIG_VIDEO_LOGO are not activated and U-Boot display the "BACKGROUND" image found in extlinux.conf to manage splashscreen on stm32mp1 boards. Signed-off-by: Patrick Delaunay --- include/configs/stm32mp1.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 440efa1a55..2e7f49e7bb 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -155,7 +155,7 @@ /* * memory layout for 32M uncompressed/compressed kernel, - * 1M fdt, 1M script, 1M pxe and 1M for splashimage + * 1M fdt, 1M script, 1M pxe and 1M for overlay * and the ramdisk at the end. */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -163,7 +163,7 @@ "fdt_addr_r=0xc4000000\0" \ "scriptaddr=0xc4100000\0" \ "pxefile_addr_r=0xc4200000\0" \ - "splashimage=0xc4300000\0" \ + "fdtoverlay_addr_r=0xc4300000\0" \ "ramdisk_addr_r=0xc4400000\0" \ "altbootcmd=run bootcmd\0" \ "env_check=if env info -p -d -q; then env save; fi\0" \ -- 2.25.1

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[PATCH 3/7] stm32mp: cmd_stm32key: handle error in fuse_hash_value
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: patrick.delaunay(a)foss.st.com Original delivery time: 28-Jun-2021 01:03 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. Handle errors in fuse_hash_value function. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cmd_stm32key.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index d2045a5983..2529139ebc 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -25,7 +25,7 @@ static void read_hash_value(u32 addr) } } -static void fuse_hash_value(u32 addr, bool print) +static int fuse_hash_value(u32 addr, bool print) { struct udevice *dev; u32 word, val; @@ -36,21 +36,25 @@ static void fuse_hash_value(u32 addr, bool print) &dev); if (ret) { log_err("Can't find stm32mp_bsec driver\n"); - return; + return ret; } for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) { - if (print) - printf("Fuse OTP %i : %x\n", - STM32_OTP_HASH_KEY_START + i, - __be32_to_cpu(*(u32 *)addr)); - word = STM32_OTP_HASH_KEY_START + i; val = __be32_to_cpu(*(u32 *)addr); - misc_write(dev, STM32_BSEC_OTP(word), &val, 4); + if (print) + printf("Fuse OTP %i : %x\n", word, val); + + ret = misc_write(dev, STM32_BSEC_OTP(word), &val, 4); + if (ret != 4) { + log_err("Fuse OTP %i failed\n", word); + return ret; + } addr += 4; } + + return 0; } static int confirm_prog(void) @@ -104,7 +108,9 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con if (!yes && !confirm_prog()) return CMD_RET_FAILURE; - fuse_hash_value(addr, !yes); + if (fuse_hash_value(addr, !yes)) + return CMD_RET_FAILURE; + printf("Hash key updated !\n"); return CMD_RET_SUCCESS; -- 2.25.1

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[PATCH 7/7] stm32mp: cmd_stm32key: add subcommand close
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: patrick.delaunay(a)foss.st.com Original delivery time: 28-Jun-2021 01:04 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. The expected sequence to close the device 1/ Load key in DDR with any supported load command 2/ Update OTP with key: STM32MP> stm32key read At this point the device is able to perform image authentication but non-authenticated images can still be used and executed. So it is the last moment to test boot with signed binary and check that the ROM code accepts them. 3/ Close the device: only signed binary will be accepted !! STM32MP> stm32key close Warning: Programming these OTP is an irreversible operation! This may brick your system if the HASH of key is invalid This command should be deactivated by default in real product. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cmd_stm32key.c | 54 ++++++++++++++++++++++++++-- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index 8c8d476b65..50840b0f38 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -210,10 +210,60 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con return CMD_RET_SUCCESS; } +static int do_stm32key_close(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + bool yes, lock, closed; + struct udevice *dev; + u32 val; + int ret; + + yes = false; + if (argc == 2) { + if (strcmp(argv[1], "-y")) + return CMD_RET_USAGE; + yes = true; + } + + ret = read_hash_otp(!yes, &lock, &closed); + if (ret) { + if (ret == -ENOENT) + printf("Error: OTP not programmed!\n"); + return CMD_RET_FAILURE; + } + + if (closed) { + printf("Error: already closed!\n"); + return CMD_RET_FAILURE; + } + + if (!lock) + printf("Warning: OTP not locked!\n"); + + if (!yes && !confirm_prog()) + return CMD_RET_FAILURE; + + ret = get_misc_dev(&dev); + if (ret) + return CMD_RET_FAILURE; + + val = STM32_OTP_CLOSE_MASK; + ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), &val, 4); + if (ret != 4) { + printf("Error: can't update OTP\n"); + return CMD_RET_FAILURE; + } + + printf("Device is closed !\n"); + + return CMD_RET_SUCCESS; +} + static char stm32key_help_text[] = "read []: Read the hash stored at addr in memory or in OTP\n" - "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n"; + "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n" + "stm32key close [-y] : Close the device, the hash stored in OTP\n"; U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text, U_BOOT_SUBCMD_MKENT(read, 2, 0, do_stm32key_read), - U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse)); + U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse), + U_BOOT_SUBCMD_MKENT(close, 2, 0, do_stm32key_close)); -- 2.25.1

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[PATCH 6/7] stm32mp: cmd_stm32key: add read OTP subcommand
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: patrick.delaunay(a)foss.st.com Original delivery time: 28-Jun-2021 01:00 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. Allow to read the OTP value and lock status with the command $> stm32key read. This patch also protects the stm32key fuse command. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cmd_stm32key.c | 93 ++++++++++++++++++++++++++-- 1 file changed, 87 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index 886c52794f..8c8d476b65 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -11,8 +11,13 @@ #include #include -#define STM32_OTP_HASH_KEY_START 24 -#define STM32_OTP_HASH_KEY_SIZE 8 +/* Closed device : bit 6 of OPT0*/ +#define STM32_OTP_CLOSE_ID 0 +#define STM32_OTP_CLOSE_MASK BIT(6) + +/* HASH of key: 8 OTPs, starting with OTP24) */ +#define STM32_OTP_HASH_KEY_START 24 +#define STM32_OTP_HASH_KEY_SIZE 8 static int get_misc_dev(struct udevice **dev) { @@ -29,6 +34,7 @@ static void read_hash_value(u32 addr) { int i; + printf("Read KEY at 0x%x\n", addr); for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) { printf("OTP value %i: %x\n", STM32_OTP_HASH_KEY_START + i, __be32_to_cpu(*(u32 *)addr)); @@ -36,6 +42,69 @@ static void read_hash_value(u32 addr) } } +static int read_hash_otp(bool print, bool *locked, bool *closed) +{ + struct udevice *dev; + int i, word, ret; + int nb_invalid = 0, nb_zero = 0, nb_lock = 0; + u32 val, lock; + bool status; + + ret = get_misc_dev(&dev); + if (ret) + return ret; + + for (i = 0, word = STM32_OTP_HASH_KEY_START; i < STM32_OTP_HASH_KEY_SIZE; i++, word++) { + ret = misc_read(dev, STM32_BSEC_OTP(word), &val, 4); + if (ret != 4) + val = ~0x0; + ret = misc_read(dev, STM32_BSEC_LOCK(word), &lock, 4); + if (ret != 4) + lock = -1; + if (print) + printf("OTP HASH %i: %x lock : %d\n", word, val, lock); + if (val == ~0x0) + nb_invalid++; + else if (val == 0x0) + nb_zero++; + if (lock == 1) + nb_lock++; + } + + word = STM32_OTP_CLOSE_ID; + ret = misc_read(dev, STM32_BSEC_OTP(word), &val, 4); + if (ret != 4) + val = 0x0; + ret = misc_read(dev, STM32_BSEC_LOCK(word), &lock, 4); + if (ret != 4) + lock = -1; + + status = (val & STM32_OTP_CLOSE_MASK) == STM32_OTP_CLOSE_MASK; + if (closed) + *closed = status; + if (print) + printf("OTP %d: closed status: %d lock : %d\n", word, status, lock); + + status = (nb_lock == STM32_OTP_HASH_KEY_SIZE); + if (locked) + *locked = status; + if (!status && print) + printf("Hash of key is not locked!\n"); + + if (nb_invalid == STM32_OTP_HASH_KEY_SIZE) { + if (print) + printf("Hash of key is invalid!\n"); + return -EINVAL; + } + if (nb_zero == STM32_OTP_HASH_KEY_SIZE) { + if (print) + printf("Hash of key is free!\n"); + return -ENOENT; + } + + return 0; +} + static int fuse_hash_value(u32 addr, bool print) { struct udevice *dev; @@ -88,8 +157,10 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *con { u32 addr; - if (argc == 1) - return CMD_RET_USAGE; + if (argc == 1) { + read_hash_otp(true, NULL, NULL); + return CMD_RET_SUCCESS; + } addr = simple_strtoul(argv[1], NULL, 16); if (!addr) @@ -103,7 +174,7 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *con static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { u32 addr; - bool yes = false; + bool yes = false, lock, closed; if (argc < 2) return CMD_RET_USAGE; @@ -118,6 +189,16 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con if (!addr) return CMD_RET_USAGE; + if (read_hash_otp(!yes, &lock, &closed) != -ENOENT) { + printf("Error: can't fuse again the OTP\n"); + return CMD_RET_FAILURE; + } + + if (lock || closed) { + printf("Error: invalid OTP configuration (lock=%d, closed=%d)\n", lock, closed); + return CMD_RET_FAILURE; + } + if (!yes && !confirm_prog()) return CMD_RET_FAILURE; @@ -130,7 +211,7 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con } static char stm32key_help_text[] = - "read : Read the hash stored at addr in memory\n" + "read []: Read the hash stored at addr in memory or in OTP\n" "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n"; U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text, -- 2.25.1

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[PATCH] stm32mp: stm32prog: fix the content of short help message
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: patrick.delaunay(a)foss.st.com Original delivery time: 28-Jun-2021 01:06 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. Reduce the content of short help message for stm32prog command and removed the carriage return to fix the display of 'help' command when this command is activated. Fixes: 954bd1a923a6 ("stm32mp: add the command stm32prog") Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index feff73c79e..064f51b2c7 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -177,12 +177,12 @@ cleanup: } U_BOOT_CMD(stm32prog, 5, 0, do_stm32prog, + "start communication with tools STM32Cubeprogrammer", " [] []\n" - "start communication with tools STM32Cubeprogrammer on with Flashlayout at ", - " = serial|usb\n" - " = device instance\n" - " = address of flashlayout\n" - " = size of flashlayout\n" + " = serial|usb\n" + " = device instance\n" + " = address of flashlayout\n" + " = size of flashlayout (optional for image with STM32 header)\n" ); bool stm32prog_get_tee_partitions(void) -- 2.25.1

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[PATCH 3/3] board: freescale: LX2162AQDS: Add MAINTAINER
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: wasim.khan(a)oss.nxp.com Original delivery time: 28-Jun-2021 12:41 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2162AQDS board Signed-off-by: Wasim Khan --- Change in v2: Fix typo board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index fca828148e..c60b2af6e4 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -31,6 +31,7 @@ F: configs/lx2160aqds_tfa_SECURE_BOOT_defconfig LX2162AQDS BOARD M: Meenakshi Aggarwal +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/eth_lx2162aqds.h F: include/configs/lx2162aqds.h -- 2.25.1

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[v2 PATCH 1/3] board: freescale: LX2160ARDB: Add MAINTAINER
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: wasim.khan(a)oss.nxp.com Original delivery time: 28-Jun-2021 12:35 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160ARDB board Signed-off-by: Wasim Khan --- Change in v2: Fix typo board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index cc69de2970..fd33c51ac7 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -1,6 +1,7 @@ LX2160ARDB BOARD M: Meenakshi Aggarwal M: Priyanka Jain +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/ F: include/configs/lx2160a_common.h -- 2.25.1

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[v2 PATCH 2/3] board: freescale: LX2160AQDS: Add MAINTAINER
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: wasim.khan(a)oss.nxp.com Original delivery time: 28-Jun-2021 12:15 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160AQDS board Signed-off-by: Wasim Khan --- Change in v2: Fix typo board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index fd33c51ac7..fca828148e 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -17,6 +17,7 @@ F: configs/lx2160ardb_tfa_SECURE_BOOT_defconfig LX2160AQDS BOARD M: Meenakshi Aggarwal +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/eth_lx2160aqds.h F: include/configs/lx2160aqds.h -- 2.25.1

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[PATCH 2/3] board: freescale: LX2160AQDS: Add MAINTAINER
by Hexagon Email Recovery 01 Jul '21

01 Jul '21

This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via it(a)hexagon.com. Original sender: wasim.khan(a)oss.nxp.com Original delivery time: 28-Jun-2021 12:02 PM (UTC) ----------------------------------------------------------------------------------------------------------------------- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160AQDS board Signed-off-by: Wasim Khan --- board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index fd33c51ac7..fca828148e 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -17,6 +17,7 @@ F: configs/lx2160ardb_tfa_SECURE_BOOT_defconfig LX2160AQDS BOARD M: Meenakshi Aggarwal +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/eth_lx2160aqds.h F: include/configs/lx2160aqds.h -- 2.25.1

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