June 2021 - U-Boot

[PATCH v2] cmd:Elaborate 'blkcache' cmd HELP statement
by opensource.kab＠gmail.com 05 Aug '21

05 Aug '21

From: Adarsh Babu Kalepalli <opensource.kab(a)gmail.com> HELP description is provided for ‘configure’ sub-command of ‘blkcache’. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab(a)gmail.com> --- (no changes since v1) cmd/blkcache.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cmd/blkcache.c b/cmd/blkcache.c index 25f252e455..47ea1ec0b9 100644 --- a/cmd/blkcache.c +++ b/cmd/blkcache.c @@ -83,5 +83,6 @@ U_BOOT_CMD( blkcache, 4, 0, do_blkcache, "block cache diagnostics and control", "show - show and reset statistics\n" - "blkcache configure blocks entries\n" + "blkcache configure <blocks> <entries> " + "- set max blocks per entry and max cache entries\n" ); -- 2.17.1

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[PATCH] cmd:(cosmetic)Mentioned in 'chpart' command HELP text that it is for MTD devices
by opensource.kab＠gmail.com 05 Aug '21

05 Aug '21

From: Adarsh Babu Kalepalli <opensource.kab(a)gmail.com> Modified the help text of 'chpart' command ,mentioning that it is for MTD devices. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab(a)gmail.com> --- cmd/mtdparts.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c index ed373a8c4d..3048700778 100644 --- a/cmd/mtdparts.c +++ b/cmd/mtdparts.c @@ -2077,9 +2077,9 @@ static int do_mtdparts(struct cmd_tbl *cmdtp, int flag, int argc, /***************************************************/ U_BOOT_CMD( chpart, 2, 0, do_chpart, - "change active partition", + "change active partition of a MTD device", "part-id\n" - " - change active partition (e.g. part-id = nand0,1)" + " - change active partition (e.g. part-id = nand0,1) of a MTD device" ); #ifdef CONFIG_SYS_LONGHELP -- 2.17.1

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[PATCH] fs/squashfs: Fix some hardlinks reading the wrong inode
by Campbell Suter 05 Aug '21

05 Aug '21

In SquashFS, the contents of a directory is stored by squashfs_directory_entry structures which contain the file's name, inode and position within the filesystem. The inode number is not stored directly; instead each directory has one or more headers which set a base inode number, and files store the offset from that to the file's inode number. In mksquashfs, each inode is allocated a number in the same order as they are written to the directory table; thus the offset from the header's base inode number to the file's inode number is usually positive. Hardlinks are simply stored with two directory entries referencing the same file. This means the second entry will thus have an inode number much lower than the surrounding files. Since the header's base inode number comes from the first entry that uses the header, this delta will usually be negative. Previously, U-Boot's squashfs_directory_entry.inode_offset field was declared as an unsigned value. Thus when a negative value was found, it would either resolve to an invalid inode number or to that of an unrelated file. A squashfs image to test this can be created like so: echo hi > sqfs_test_files/001-root-file mkdir sqfs_test_files/002-subdir touch sqfs_test_files/002-subdir/003-file ln sqfs_test_files/{001-root-file,002-subdir/004-link} mksquashfs sqfs_test_files/ test.sqfs -noappend Note that squashfs sorts the files ASCIIbetacally, so we can use the names to control the order they appear in. The ordering is important - the first reference to the file must have a lower inode number than the directory in which the second reference resides, and the second reference cannot be the first file in the directory. Listing this sample image in U-Boot results in: => sqfsls virtio 2 002-subdir 0 003-file Inode not found. 0 004-link Signed-off-by: Campbell Suter <campbell(a)snapit.group> --- fs/squashfs/sqfs_filesystem.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/squashfs/sqfs_filesystem.h b/fs/squashfs/sqfs_filesystem.h index 856cd15e349..5440b6c0e05 100644 --- a/fs/squashfs/sqfs_filesystem.h +++ b/fs/squashfs/sqfs_filesystem.h @@ -231,7 +231,7 @@ union squashfs_inode { struct squashfs_directory_entry { u16 offset; - u16 inode_offset; + s16 inode_offset; u16 type; u16 name_size; char name[0]; -- 2.31.1

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[PATCH] fit: Fix verification of images with external data
by John Keeping 05 Aug '21

05 Aug '21

The "-E" option to mkimage generates a FIT with external data using the data-size and data-offset properties which must both be ignored when verifying a signature. Add "data-offset" to the list of excluded properties for signature verification; since the line is now too long, re-format the list to one-per-line and make it static since the data is constant. Signed-off-by: John Keeping <john(a)metanate.com> --- common/image-fit-sig.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c index 55ddf1879e..b979cd2a4b 100644 --- a/common/image-fit-sig.c +++ b/common/image-fit-sig.c @@ -245,7 +245,13 @@ static int fit_config_check_sig(const void *fit, int noffset, int required_keynode, int conf_noffset, char **err_msgp) { - char * const exc_prop[] = {"data", "data-size", "data-position"}; + static char * const exc_prop[] = { + "data", + "data-size", + "data-position", + "data-offset" + }; + const char *prop, *end, *name; struct image_sign_info info; const uint32_t *strings; -- 2.31.1

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[PATCH] Avoid adding the same dataflash for the second time
by Jakub Frackowiak 03 Aug '21

03 Aug '21

The spi_dataflash_probe function should return after jedec_probe if it finds any serial flash. This functions adds the same SPI device two times without this path. Serial output when reading environment: Loading Environment from SPIFlash... SPI DataFlash: Detected at45db321d with page size 512 Bytes, erase size 512 Bytes, total 4 MiB, revision d SPI DataFlash: Detected AT45DB321x with page size 528 Bytes, erase size 528 Bytes, total 4.1 MiB, revision *** Warning - bad CRC, using default environment When this patch is applied: Loading Environment from SPIFlash... SPI DataFlash: Detected at45db321d with page size 512 Bytes, erase size 512 Bytes, total 4 MiB, revision d OK --- drivers/mtd/spi/sf_dataflash.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index b59edd152c..7040f21eb2 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -630,6 +630,9 @@ static int spi_dataflash_probe(struct udevice *dev) if (status == 0 || status == 0xff) status = -ENODEV; goto err_jedec_probe; + + if (!status) + return 0; } /* -- 2.17.1

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[PATCH v1] mtd: spi-nor-ids: Add support for XMC XM25QH64C
by Reto Schneider 03 Aug '21

03 Aug '21

From: Reto Schneider <reto.schneider(a)husqvarnagroup.com> This chip has been (briefly) tested on the MediaTek MT7688 based GARDENA smart gateway. Datasheet: http://xmcwh.com/Uploads/2020-12-17/XM25QH64C_Ver1.1.pdf Signed-off-by: Reto Schneider <reto.schneider(a)husqvarnagroup.com> --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 2b57797954..b91be10fc3 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -335,6 +335,7 @@ const struct flash_info spi_nor_ids[] = { #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif { }, -- 2.30.2

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[PATCH v3 00/16] misc: Some more misc patches
by Simon Glass 02 Aug '21

02 Aug '21

Various issues were discovered in getting Chromium OS verified boot running on top of coreboot, booting into U-Boot. Improvements include: - enable serial console if even coreboot doesn't - enable cache always - show the BIOS date since Chromium OS's coreboot doesn't have a version - update docs - allow SPI driver to work without a PCH - fix mtrr command when multi-processing (CONFIG_MP) is disabled - add documentation about the memory map Changes in v3: - Fix comment to menion u-boot,dm-tpl - Fix 'u-boot,dm-pre-tpl' (it should be u-boot,dm-tpl) Changes in v2: - Add a comment about the cases - Reorder declaration and use bios_date for the variable name - Add missing newline in the error path - Use (ret) instead of (ret != 0) to fit with U-Boot style - Convert table to reST format - Add 'cros' tag since this not a generic x86 change - Drop unnecessary patch 'Enable the cbsysinfo command' Simon Glass (16): pci: Use const for pci_find_device_id() etc. x86: pci: Allow binding of some devices before relocation x86: Allow coreboot serial driver to guess the UART spi: ich: Don't require the PCH tpm: cr50: Drop unnecessary coral headers x86: Don't set up MTRRs if previously done x86: Update the MP constants to avoid conflicts x86: Do cache set-up by default when booting from coreboot x86: coreboot: Show the BIOS date x86: coral: Allow booting from coreboot x86: Add function comments to cb_sysinfo.h x86: coreboot: Use vendor in the Kconfig x86: coreboot: Document the memory map x86: cros: Check ROM exists before building vboot dtoc: Check that a parent is not missing doc: Update documentation for cros-2021.04 release arch/x86/cpu/coreboot/Kconfig | 2 +- arch/x86/cpu/i386/cpu.c | 2 +- arch/x86/dts/chromebook_coral.dts | 2 +- arch/x86/dts/chromebook_samus.dts | 2 +- arch/x86/include/asm/cb_sysinfo.h | 16 ++++++ arch/x86/include/asm/mp.h | 12 +++-- arch/x86/lib/init_helpers.c | 18 +++++-- board/coreboot/coreboot/Kconfig | 12 +++-- board/coreboot/coreboot/coreboot.c | 3 ++ board/google/chromebook_coral/coral.c | 28 ++++++++++ doc/board/coreboot/coreboot.rst | 21 ++++++++ doc/chromium/run_vboot.rst | 15 +++--- doc/device-tree-bindings/pci/x86-pci.txt | 7 ++- drivers/pci/pci-uclass.c | 39 ++++++++++++-- drivers/serial/serial_coreboot.c | 68 +++++++++++++++++++++--- drivers/spi/ich.c | 4 +- drivers/tpm/cr50_i2c.c | 2 - include/dt-bindings/pci/pci.h | 12 +++++ include/pci.h | 5 +- include/pci_ids.h | 1 + tools/dtoc/dtb_platdata.py | 9 ++++ tools/dtoc/test/dtoc_test_noparent.dts | 32 +++++++++++ tools/dtoc/test_dtoc.py | 10 ++++ 23 files changed, 278 insertions(+), 44 deletions(-) create mode 100644 include/dt-bindings/pci/pci.h create mode 100644 tools/dtoc/test/dtoc_test_noparent.dts -- 2.32.0.93.g670b81a890-goog

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U-Boot zboot on x86-64 VirtualBox UEFI.
by Christian Melki 01 Aug '21

01 Aug '21

Hi. I have been trying to boot a bzImage with zboot from a VirtualBox UEFI instance -> U-Boot UEFI payload. So far I've been using 2021.07-rc1. I'd like to try a newer rc, but even if built exactly the same with the same .config, newer won't boot as an UEFI payload. So right now, I'm stuck at rc1. Anyway. The kernel in question starts when configured with an EFI stub from the UEFI shell. U-boot fails to boot the bzImage from the console using zboot though. Just freezes after "Starting kernel..." zboot 01080000 - 04000000 319c000 Valid Boot Flag Magic signature found Linux kernel version 5.12.0 (ptxdist@ptxdist) #2 SMP PREEMPT 2021-06-01T00:00:00+00:00 Building boot_params at 0x00090000 Loading bzImage at address 100000 (6516096 bytes) Initial RAM disk at linear address 0x04000000, size 52019200 bytes Kernel command line: "console=ttyS0,115200 rw quiet" Kernel loaded at 00100000, setup_base=00090000 Starting kernel ... Any ideas? Best regards, Christian

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[PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
by Aswath Govindraju 29 Jul '21

29 Jul '21

From: Faiz Abbas <faiz_abbas(a)ti.com> Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas <faiz_abbas(a)ti.com> Signed-off-by: Aswath Govindraju <a-govindraju(a)ti.com> --- drivers/mmc/sdhci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index d9ab6a0a839e..eea4701d8af5 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) case MMC_HS_200: reg |= SDHCI_CTRL_UHS_SDR104; break; + case MMC_HS_400: + reg |= SDHCI_CTRL_HS400; + break; default: reg |= SDHCI_CTRL_UHS_SDR12; } -- 2.17.1

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[PATCH 0/6] AM64: Add support for higher speed modes and boot mode in eMMC
by Aswath Govindraju 29 Jul '21

29 Jul '21

The following series of patches add support for, - HS200/HS400 speed modes - eMMC boot mode - gpt and FDT library overlay This series of patches, - dependent on https://patchwork.ozlabs.org/project/uboot/list/?series=237442 - applies on top of, https://patchwork.ozlabs.org/project/uboot/list/?series=246976 Aswath Govindraju (4): arch: arm: mach-k3: am642_init: Correct the function name spl_boot_mode() to spl_mmc_boot_mode() arch: dts: am642-sk-u-boot: Disable main_sdhci0 DT node and define alias index 1 for main_sdhci1 node configs: am64x_evm: Move CONFIG_SYS_MMC_ENV_DEV and CONFIG_SYS_MMC_ENV_PART to defconfig files and enable configs to save env in eMMC and FAT write. configs: am64x_evm_*_defconfig: Enable config to support gpt and FDT library overlay Kishon Vijay Abraham I (2): configs: am64x_evm_a53_defconfig: Enable configs to support HS200/HS400 configs: am64x_evm_a53_defconfig/am64x_evm_r5_defconfig: Enable configs to support eMMC boot arch/arm/dts/k3-am642-sk-u-boot.dtsi | 5 +++++ arch/arm/mach-k3/am642_init.c | 2 +- configs/am64x_evm_a53_defconfig | 18 +++++++++++++++--- configs/am64x_evm_r5_defconfig | 7 +++++++ include/configs/am64x_evm.h | 6 ------ 5 files changed, 28 insertions(+), 10 deletions(-) -- 2.17.1

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