June 2021 - U-Boot

[PATCH 1/2] i2c: pcf8575: Remove not used members of pcf8575_chip structure
by Lukasz Majewski 23 Jul '21

23 Jul '21

Those members are not used anymore as ones from gpio_dev_priv structure (when DM_GPIO support is enabled) are used instead. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- drivers/gpio/pcf8575_gpio.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c index 359646266c93..bae9695f28b1 100644 --- a/drivers/gpio/pcf8575_gpio.c +++ b/drivers/gpio/pcf8575_gpio.c @@ -34,8 +34,6 @@ DECLARE_GLOBAL_DATA_PTR; struct pcf8575_chip { - int gpio_count; /* No. GPIOs supported by the chip */ - /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. * We can't actually know whether a pin is configured (a) as output * and driving the signal low, or (b) as input and reporting a low @@ -49,7 +47,6 @@ struct pcf8575_chip { * reset state. Otherwise it flags pins to be driven low. */ unsigned int out; /* software latch */ - const char *bank_name; /* Name of the expander bank */ }; /* Read/Write to 16-bit I/O expander */ -- 2.20.1

3 5

[PATCH] spl: fit: Also record architecture in /fit-images
by Michal Simek 23 Jul '21

23 Jul '21

On ARM64 secure OS can run as 64bit or 32bit that's why it is necessary to record information about architecture that other code can read it and properly pass it to TF-A and start in 64bit or 32bit mode. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- common/fdt_support.c | 4 +++- common/spl/spl_fit.c | 3 ++- include/fdt_support.h | 3 ++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index a9a32df1e78f..240f1e57d135 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -594,7 +594,7 @@ void fdt_fixup_ethernet(void *fdt) int fdt_record_loadable(void *blob, u32 index, const char *name, uintptr_t load_addr, u32 size, uintptr_t entry_point, - const char *type, const char *os) + const char *type, const char *os, const char *arch) { int err, node; @@ -622,6 +622,8 @@ int fdt_record_loadable(void *blob, u32 index, const char *name, fdt_setprop_string(blob, node, "type", type); if (os) fdt_setprop_string(blob, node, "os", os); + if (arch) + fdt_setprop_string(blob, node, "arch", arch); return node; } diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index caddf5119679..f6c475315ed6 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -480,7 +480,8 @@ static int spl_fit_record_loadable(const struct spl_fit_info *ctx, int index, ret = fdt_record_loadable(blob, index, name, image->load_addr, image->size, image->entry_point, fdt_getprop(ctx->fit, node, "type", NULL), - fdt_getprop(ctx->fit, node, "os", NULL)); + fdt_getprop(ctx->fit, node, "os", NULL), + fdt_getprop(ctx->fit, node, "arch", NULL)); return ret; } diff --git a/include/fdt_support.h b/include/fdt_support.h index 1e4dbc0a8f65..f6f46bb8e9ce 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -160,11 +160,12 @@ static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} * @param entry_point entry point (if specified, otherwise pass -1) * @param type type (if specified, otherwise pass NULL) * @param os os-type (if specified, otherwise pass NULL) + * @param arch architecture (if specified, otherwise pass NULL) * @return 0 if ok, or -1 or -FDT_ERR_... on error */ int fdt_record_loadable(void *blob, u32 index, const char *name, uintptr_t load_addr, u32 size, uintptr_t entry_point, - const char *type, const char *os); + const char *type, const char *os, const char *arch); #ifdef CONFIG_PCI #include <pci.h> -- 2.31.1

3 2

[PATCH v3 1/2] cmd: pinmux: update result of do_status
by Patrick Delaunay 23 Jul '21

23 Jul '21

Update the result of do_status and always returns a CMD_RET_ value (-ENOSYS was a possible result of show_pinmux). This patch also adds pincontrol name in error messages (dev->name) and treats correctly the status sub command when pin-controller device is not selected. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- (no changes since v2) Changes in v2: - keep result in show_pinmux - add comment in API pinctrl_get_pins_count() for -ENOSYS result cmd/pinmux.c | 31 +++++++++++++++++-------------- include/dm/pinctrl.h | 2 +- test/py/tests/test_pinmux.py | 4 ++-- 3 files changed, 20 insertions(+), 17 deletions(-) diff --git a/cmd/pinmux.c b/cmd/pinmux.c index 9942b15419..0df78c71da 100644 --- a/cmd/pinmux.c +++ b/cmd/pinmux.c @@ -52,20 +52,21 @@ static int show_pinmux(struct udevice *dev) pins_count = pinctrl_get_pins_count(dev); if (pins_count == -ENOSYS) { - printf("Ops get_pins_count not supported\n"); + printf("Ops get_pins_count not supported by %s\n", dev->name); return pins_count; } for (i = 0; i < pins_count; i++) { ret = pinctrl_get_pin_name(dev, i, pin_name, PINNAME_SIZE); - if (ret == -ENOSYS) { - printf("Ops get_pin_name not supported\n"); + if (ret) { + printf("Ops get_pin_name error (%d) by %s\n", ret, dev->name); return ret; } ret = pinctrl_get_pin_muxing(dev, i, pin_mux, PINMUX_SIZE); if (ret) { - printf("Ops get_pin_muxing error (%d)\n", ret); + printf("Ops get_pin_muxing error (%d) by %s in %s\n", + ret, pin_name, dev->name); return ret; } @@ -80,25 +81,27 @@ static int do_status(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct udevice *dev; - int ret = CMD_RET_USAGE; - if (currdev && (argc < 2 || strcmp(argv[1], "-a"))) - return show_pinmux(currdev); + if (argc < 2) { + if (!currdev) { + printf("pin-controller device not selected\n"); + return CMD_RET_FAILURE; + } + show_pinmux(currdev); + return CMD_RET_SUCCESS; + } - if (argc < 2 || strcmp(argv[1], "-a")) - return ret; + if (strcmp(argv[1], "-a")) + return CMD_RET_USAGE; uclass_foreach_dev_probe(UCLASS_PINCTRL, dev) { /* insert a separator between each pin-controller display */ printf("--------------------------\n"); printf("%s:\n", dev->name); - ret = show_pinmux(dev); - if (ret < 0) - printf("Can't display pin muxing for %s\n", - dev->name); + show_pinmux(dev); } - return ret; + return CMD_RET_SUCCESS; } static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 1bdc8d3cbd..695e78ad0d 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -587,7 +587,7 @@ int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf, * * This allows to know the number of pins owned by a given pin-controller * - * Return: Number of pins if OK, or negative error code on failure + * Return: Number of pins if OK, or -ENOSYS when not supported */ int pinctrl_get_pins_count(struct udevice *dev); diff --git a/test/py/tests/test_pinmux.py b/test/py/tests/test_pinmux.py index 0cbbae000c..b3ae2ab024 100644 --- a/test/py/tests/test_pinmux.py +++ b/test/py/tests/test_pinmux.py @@ -13,9 +13,9 @@ def test_pinmux_usage_1(u_boot_console): @pytest.mark.buildconfigspec('cmd_pinmux') def test_pinmux_usage_2(u_boot_console): """Test that 'pinmux status' executed without previous "pinmux dev" - command displays pinmux usage.""" + command displays error message.""" output = u_boot_console.run_command('pinmux status') - assert 'Usage:' in output + assert 'pin-controller device not selected' in output @pytest.mark.buildconfigspec('cmd_pinmux') @pytest.mark.boardspec('sandbox') -- 2.17.1

2 3

[PATCH v2] tee: optee: sync cache on pre-reloc OP-TEE invocation
by Etienne Carriere 23 Jul '21

23 Jul '21

This change ensures both U-Boot and OP-TEE see the same content from shared memory when OP-TEE is invoked prior U-Boot relocation. This change is required since U-Boot may execute with data cahce off while OP-TEE always enables cache on memory shared with U-Boot. Signed-off-by: Etienne Carriere <etienne.carriere(a)linaro.org> --- Changes since v1: - Fix invocation argument buffer size in optee/core.c, using OPTEE_MSG_GET_ARG_SIZE(). - add missing #include <asm/cache.h> in tee-uclass.c --- drivers/tee/optee/core.c | 21 ++++++++++++++++++++- drivers/tee/tee-uclass.c | 19 ++++++++++++++++++- include/tee.h | 6 ++++++ 3 files changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index 73dbb22ba0..dad46aa388 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -1,9 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (c) 2018 Linaro Limited + * Copyright (c) 2018-2020 Linaro Limited */ #include <common.h> +#include <cpu_func.h> #include <dm.h> #include <dm/device_compat.h> #include <log.h> @@ -295,6 +296,16 @@ static u32 call_err_to_res(u32 call_err) } } +static void flush_shm_dcache(struct udevice *dev, struct optee_msg_arg *arg) +{ + size_t sz = OPTEE_MSG_GET_ARG_SIZE(arg->num_params); + + flush_dcache_range(rounddown((ulong)arg, CONFIG_SYS_CACHELINE_SIZE), + roundup((ulong)arg + sz, CONFIG_SYS_CACHELINE_SIZE)); + + tee_flush_all_shm_dcache(dev); +} + static u32 do_call_with_arg(struct udevice *dev, struct optee_msg_arg *arg) { struct optee_pdata *pdata = dev_get_plat(dev); @@ -305,9 +316,17 @@ static u32 do_call_with_arg(struct udevice *dev, struct optee_msg_arg *arg) while (true) { struct arm_smccc_res res; + /* If cache are off from U-Boot, sync the cache shared with OP-TEE */ + if (!dcache_status()) + flush_shm_dcache(dev, arg); + pdata->invoke_fn(param.a0, param.a1, param.a2, param.a3, param.a4, param.a5, param.a6, param.a7, &res); + /* If cache are off from U-Boot, sync the cache shared with OP-TEE */ + if (!dcache_status()) + flush_shm_dcache(dev, arg); + free(page_list); page_list = NULL; diff --git a/drivers/tee/tee-uclass.c b/drivers/tee/tee-uclass.c index 2cc6b6c407..24321ba1d2 100644 --- a/drivers/tee/tee-uclass.c +++ b/drivers/tee/tee-uclass.c @@ -1,13 +1,15 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (c) 2018 Linaro Limited + * Copyright (c) 2018-2020 Linaro Limited */ #include <common.h> +#include <cpu_func.h> #include <dm.h> #include <log.h> #include <malloc.h> #include <tee.h> +#include <asm/cache.h> #include <dm/device-internal.h> #include <dm/uclass-internal.h> @@ -233,3 +235,18 @@ void tee_optee_ta_uuid_to_octets(u8 d[TEE_UUID_LEN], d[7] = s->time_hi_and_version; memcpy(d + 8, s->clock_seq_and_node, sizeof(s->clock_seq_and_node)); } + +void tee_flush_all_shm_dcache(struct udevice *dev) +{ + struct tee_uclass_priv *priv = dev_get_uclass_priv(dev); + struct tee_shm *s; + + list_for_each_entry(s, &priv->list_shm, link) { + ulong start = rounddown((ulong)s->addr, + CONFIG_SYS_CACHELINE_SIZE); + ulong end = roundup((ulong)s->addr + s->size, + CONFIG_SYS_CACHELINE_SIZE); + + flush_dcache_range(start, end); + } +} diff --git a/include/tee.h b/include/tee.h index 99367b258e..2ef29bfc8f 100644 --- a/include/tee.h +++ b/include/tee.h @@ -377,4 +377,10 @@ void tee_optee_ta_uuid_from_octets(struct tee_optee_ta_uuid *d, void tee_optee_ta_uuid_to_octets(u8 d[TEE_UUID_LEN], const struct tee_optee_ta_uuid *s); +/** + * tee_flush_all_shm_dcache() - Flush data cache for all shared memories + * @dev: The TEE device + */ +void tee_flush_all_shm_dcache(struct udevice *dev); + #endif /* __TEE_H */ -- 2.17.1

4 3

[PATCH] spl: use CONFIG_IS_ENABLED(LOAD_FIT_FULL)
by John Keeping 23 Jul '21

23 Jul '21

It's possible that LOAD_FIT_FULL will have different values for TPL and SPL, in which case just checking CONFIG_SPL_LOAD_FIT_FULL causes this to be compiled in to the TPL even though functions and struct members it depends on are not. Use CONFIG_IS_ENABLED() to ensure the correct TPL/SPL variant is checked. Signed-off-by: John Keeping <john(a)metanate.com> --- common/spl/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index a0a608fd77..c4019d2bfc 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -198,7 +198,7 @@ void spl_set_header_raw_uboot(struct spl_image_info *spl_image) spl_image->name = "U-Boot"; } -#ifdef CONFIG_SPL_LOAD_FIT_FULL +#if CONFIG_IS_ENABLED(LOAD_FIT_FULL) /* Parse and load full fitImage in SPL */ static int spl_load_fit_image(struct spl_image_info *spl_image, const struct image_header *header) @@ -305,7 +305,7 @@ __weak int spl_parse_legacy_header(struct spl_image_info *spl_image, int spl_parse_image_header(struct spl_image_info *spl_image, const struct image_header *header) { -#ifdef CONFIG_SPL_LOAD_FIT_FULL +#if CONFIG_IS_ENABLED(LOAD_FIT_FULL) int ret = spl_load_fit_image(spl_image, header); if (!ret) -- 2.31.1

4 3

[PATCH v2 1/2] clk: scmi: register all scmi clock by name with CCF
by Etienne Carriere 23 Jul '21

23 Jul '21

From: Patrick Delaunay <patrick.delaunay(a)st.com> This patch implements SCMI APIs to retrieve the number and the name of SCMI clocks using SCMI_PROTOCOL_ATTRIBUTES messages. Signed-off-by: Gabriel Fernandez <gabriel.fernandez(a)st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> Signed-off-by: Etienne Carriere <etienne.carriere(a)linaro.org> --- Changes since v1: - remove use of ERR_PTR() adn friends --- drivers/clk/clk_scmi.c | 89 ++++++++++++++++++++++++++++++++++++++++ include/scmi_protocols.h | 43 +++++++++++++++++++ 2 files changed, 132 insertions(+) diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index 93a4819501..62c85b1c6e 100644 --- a/drivers/clk/clk_scmi.c +++ b/drivers/clk/clk_scmi.c @@ -8,6 +8,50 @@ #include <scmi_agent.h> #include <scmi_protocols.h> #include <asm/types.h> +#include <linux/clk-provider.h> + +static u16 scmi_clk_get_num_clock(struct udevice *dev) +{ + struct scmi_clk_protocol_attr_out out; + struct scmi_msg msg = { + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, + .message_id = SCMI_PROTOCOL_ATTRIBUTES, + .out_msg = (u8 *)&out, + .out_msg_sz = sizeof(out), + }; + int ret; + + ret = devm_scmi_process_msg(dev->parent, &msg); + if (ret) + return ret; + + return out.attributes & SCMI_CLK_PROTO_ATTR_COUNT_MASK; +} + +static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) +{ + struct scmi_clk_attribute_in in = { + .clock_id = clkid, + }; + struct scmi_clk_attribute_out out; + struct scmi_msg msg = { + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, + .message_id = SCMI_CLOCK_ATTRIBUTES, + .in_msg = (u8 *)&in, + .in_msg_sz = sizeof(in), + .out_msg = (u8 *)&out, + .out_msg_sz = sizeof(out), + }; + int ret; + + ret = devm_scmi_process_msg(dev->parent, &msg); + if (ret) + return ret; + + *name = out.clock_name; + + return 0; +} static int scmi_clk_gate(struct clk *clk, int enable) { @@ -85,6 +129,50 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) return scmi_clk_get_rate(clk); } +static int scmi_clk_probe(struct udevice *dev) +{ + struct clk *clk; + int num_clocks; + int i, ret; + + if (!CONFIG_IS_ENABLED(CLK_CCF)) + return 0; + + /* register CCF children: CLK UCLASS, no probed again */ + if (device_get_uclass_id(dev->parent) == UCLASS_CLK) + return 0; + + num_clocks = scmi_clk_get_num_clock(dev); + if (!num_clocks) + return 0; + + for (i = 0; i < num_clocks; i++) { + char *name; + + if (!scmi_clk_get_attibute(dev, i, &name)) { + char *clock_name = strdup(name); + + clk = kzalloc(sizeof(*clk), GFP_KERNEL); + if (!clk || !clock_name) + ret = -ENOMEM; + else + ret = clk_register(clk, dev->driver->name, + clock_name, dev->name); + + if (ret) { + free(clk); + free(clock_name); + return ret; + } + + clk->id = i; + clk_request(dev, clk); + } + } + + return 0; +} + static const struct clk_ops scmi_clk_ops = { .enable = scmi_clk_enable, .disable = scmi_clk_disable, @@ -96,4 +184,5 @@ U_BOOT_DRIVER(scmi_clock) = { .name = "scmi_clk", .id = UCLASS_CLK, .ops = &scmi_clk_ops, + .probe = &scmi_clk_probe, }; diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h index 2db71697e8..3fc8ec95ef 100644 --- a/include/scmi_protocols.h +++ b/include/scmi_protocols.h @@ -40,22 +40,65 @@ enum scmi_status_code { SCMI_PROTOCOL_ERROR = -10, }; +/* + * Generic message IDs + */ +enum scmi_discovery_id { + SCMI_PROTOCOL_VERSION = 0x0, + SCMI_PROTOCOL_ATTRIBUTES = 0x1, + SCMI_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2, +}; + /* * SCMI Clock Protocol */ enum scmi_clock_message_id { + SCMI_CLOCK_ATTRIBUTES = 0x3, SCMI_CLOCK_RATE_SET = 0x5, SCMI_CLOCK_RATE_GET = 0x6, SCMI_CLOCK_CONFIG_SET = 0x7, }; +#define SCMI_CLK_PROTO_ATTR_COUNT_MASK GENMASK(15, 0) #define SCMI_CLK_RATE_ASYNC_NOTIFY BIT(0) #define SCMI_CLK_RATE_ASYNC_NORESP (BIT(0) | BIT(1)) #define SCMI_CLK_RATE_ROUND_DOWN 0 #define SCMI_CLK_RATE_ROUND_UP BIT(2) #define SCMI_CLK_RATE_ROUND_CLOSEST BIT(3) +#define SCMI_CLOCK_NAME_LENGTH_MAX 16 + +/** + * struct scmi_clk_get_nb_out - Response for SCMI_PROTOCOL_ATTRIBUTES command + * @status: SCMI command status + * @attributes: Attributes of the clock protocol, mainly number of clocks exposed + */ +struct scmi_clk_protocol_attr_out { + s32 status; + u32 attributes; +}; + +/** + * struct scmi_clk_attribute_in - Message payload for SCMI_CLOCK_ATTRIBUTES command + * @clock_id: SCMI clock ID + */ +struct scmi_clk_attribute_in { + u32 clock_id; +}; + +/** + * struct scmi_clk_get_nb_out - Response payload for SCMI_CLOCK_ATTRIBUTES command + * @status: SCMI command status + * @attributes: clock attributes + * @clock_name: name of the clock + */ +struct scmi_clk_attribute_out { + s32 status; + u32 attributes; + char clock_name[SCMI_CLOCK_NAME_LENGTH_MAX]; +}; + /** * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command * @clock_id: SCMI clock ID -- 2.17.1

2 2

[PATCH] Nokia RX-51: Update documentation about ext2/3/4
by Pali Rohár 21 Jul '21

21 Jul '21

Since commit 25c5b6517854 ("Nokia RX-51: Do not try calling both ext2load and ext4load") command ext4load is used for all ext2/3/4 fs variants. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- doc/README.nokia_rx51 | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/doc/README.nokia_rx51 b/doc/README.nokia_rx51 index 7f22ed49bd75..1be077514f03 100644 --- a/doc/README.nokia_rx51 +++ b/doc/README.nokia_rx51 @@ -44,8 +44,7 @@ Boot from SD or eMMC in this order: * 1.2 find uImage on first fat partition * 1.3 find zImage on first fat partition * 1.4 same order for 2. - 4. fat partition - * 2. same as 1. but for ext2/3 partition - * 3. same as 1. but for ext4 partition + * 2. same as 1. but for ext2/3/4 partition Available additional commands/variables: @@ -70,7 +69,7 @@ Additional variables for loading files from mmc: * mmc ${mmcnum} (0 - external, 1 - internal) * partition number ${mmcpart} (1 - 4) - * parition type ${mmctype} (fat, ext2, ext4) + * partition type ${mmctype} (fat, ext2, ext4; ext2 is just alias for ext4) Additional variables for booting kernel: -- 2.20.1

2 2

[PATCH 1/9] net: eqos: Add PHY reset control for i.MX platform
by Ye Li 21 Jul '21

21 Jul '21

Parse the "phy-reset-gpios", "phy-reset-post-delay" and "phy-reset-duration" properties from eqos node to control the ethernet PHY reset at driver probe. Reset PHY once is enough that can reduce the time cost to get IP after the first time. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/net/dwc_eth_qos.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index e8242ca..14aafc6 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -303,6 +303,8 @@ struct eqos_priv { struct eqos_tegra186_regs *tegra186_regs; struct reset_ctl reset_ctl; struct gpio_desc phy_reset_gpio; + uint32_t reset_delay; + uint32_t reset_post_delay; struct clk clk_master_bus; struct clk clk_rx; struct clk clk_ptp_ref; @@ -1880,6 +1882,7 @@ static int eqos_probe_resources_imx(struct udevice *dev) { struct eqos_priv *eqos = dev_get_priv(dev); phy_interface_t interface; + int ret = 0; debug("%s(dev=%p):\n", __func__, dev); @@ -1890,8 +1893,52 @@ static int eqos_probe_resources_imx(struct udevice *dev) return -EINVAL; } + ret = gpio_request_by_name(dev, "phy-reset-gpios", 0, + &eqos->phy_reset_gpio, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + if (ret) { + pr_debug("gpio_request_by_name(phy reset) failed: %d", ret); + } + + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + eqos->reset_delay = dev_read_u32_default(dev, "phy-reset-duration", 1); + if (eqos->reset_delay > 1000) { + pr_err("phy reset duration should be <= 1000ms\n"); + /* property value wrong, use default value */ + eqos->reset_delay = 1; + } + + mdelay(eqos->reset_delay); + + eqos->reset_post_delay = dev_read_u32_default(dev, + "phy-reset-post-delay", + 0); + if (eqos->reset_post_delay > 1000) { + pr_err("phy reset post delay should be <= 1000ms\n"); + /* property value wrong, use default value */ + eqos->reset_post_delay = 0; + } + + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret); + goto err_free_gpio_phy_reset; + } + + if (eqos->reset_post_delay) + mdelay(eqos->reset_post_delay); + } + debug("%s: OK\n", __func__); return 0; + +err_free_gpio_phy_reset: + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + dm_gpio_free(dev, &eqos->phy_reset_gpio); + } + + debug("%s: returns %d\n", __func__, ret); + return ret; } static phy_interface_t eqos_get_interface_imx(struct udevice *dev) @@ -1951,6 +1998,14 @@ static int eqos_remove_resources_stm32(struct udevice *dev) static int eqos_remove_resources_imx(struct udevice *dev) { + struct eqos_priv *eqos = dev_get_priv(dev); + + debug("%s(dev=%p):\n", __func__, dev); + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + dm_gpio_free(dev, &eqos->phy_reset_gpio); + } + + debug("%s: OK\n", __func__); return 0; } -- 2.7.4

2 10

[PATCH v2 0/6] net: dwc_eth_qos: add support of device tree configuration for reset delay
by Patrick Delaunay 20 Jul '21

20 Jul '21

It is the V2 version of [1] after Marek remarks: all commit are new. I change the DWC_ETH_QOS STM32 variant by using generic eth phy driver. This driver is updated to use the gpio reset and assert/deassert delay from DT with the generic binding defined in linux: Documentation/devicetree/bindings/net/ethernet-phy.yaml or in U-Boot: doc/device-tree-bindings/net/phy.txt [1] net: dwc_eth_qos: add support of device tree configuration for reset delay http://patchwork.ozlabs.org/project/uboot/list/?series=238253&state=* Changes in v2: - Update eth-phy driver (NEW) - use log macro in eth-phy driver (NEW) - update eth-phy driver to support STM32 binding with a mdio0 subnode (NEW) - remove unused element in the struct eqos_priv (NEW) - use generic ethernet phy for stm32 variant, this patch is a REWORK of previous serie: the device parsing is done in eth-phy driver and the gpio support is removed in stm32 variant: eqos_start/stop_resets_stm32 and eqos_probe_resources_stm32. - cleanup ops by adding a common null ops (NEW) Patrick Delaunay (6): net: eth-phy: add support of device tree configuration for gpio reset net: eth-phy: use dev_dbg and log_notice net: eth-phy: manage subnode mdio0 net: dwc_eth_qos: remove the field phyaddr of the struct eqos_priv net: dwc_eth_qos: use generic ethernet phy for stm32 variant net: dwc: add a common empty ops eqos_null_ops drivers/net/Kconfig | 1 + drivers/net/dwc_eth_qos.c | 152 +++++------------------------------ drivers/net/eth-phy-uclass.c | 78 +++++++++++++++--- 3 files changed, 91 insertions(+), 140 deletions(-) -- 2.17.1

3 15

[PATCH v2 0/5] Add SIMATIC IOT2050 board support
by Jan Kiszka 20 Jul '21

20 Jul '21

This is the baseline support for the SIMATIC IOT2050 devices. Changes in v2: - rebased - sync with upstream-accepted DT - add boot switch - include watchdog support Allows to boot mainline 5.10 kernels, but not the original BSP-derived kernel we currently ship as reference. This is due to the TI sysfw ABI breakages between 2.x and 3.x. We will soon provide a transitional kernel that allows booting both firmware ABIs - as long as full upstream kernel support is work in progress. Note that this baseline support lacks Ethernet drivers. We are working closely with TI to ensure that the to-be-upstreamed icssg-prueth driver will work both with new SR2.0 AM65x silicon as well as with SR1.0 which is used in the currently shipped IOT2050 devices. A staging tree for complete IOT2050 support can be found at [1]. Full image integration is available via [2]. Regarding patch 4: There has been some doubts on the proposed approach, but there has been also no suggestion provided for a similarly lightweight and secure embedding method. Therefore, I'm proposing our solution once again. Jan [1] https://github.com/siemens/u-boot/commits/jan/iot2050 [2] https://github.com/siemens/meta-iot2050 Jan Kiszka (5): arm: dts: Add IOT2050 device tree files board: siemens: Add support for SIMATIC IOT2050 devices arm64: dts: ti: k3-am65-mcu: Add RTI watchdog entry watchdog: rti_wdt: Add support for loading firmware configs: iot2050: Enable watchdog support, but do not auto-start it arch/arm/dts/Makefile | 7 +- arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 105 +++ .../dts/k3-am65-iot2050-common-u-boot.dtsi | 103 +++ arch/arm/dts/k3-am65-iot2050-common.dtsi | 655 ++++++++++++++++++ arch/arm/dts/k3-am65-iot2050-spl.dts | 16 + arch/arm/dts/k3-am65-mcu.dtsi | 9 + arch/arm/dts/k3-am6528-iot2050-basic.dts | 67 ++ arch/arm/dts/k3-am6548-iot2050-advanced.dts | 66 ++ arch/arm/mach-k3/Kconfig | 1 + board/siemens/iot2050/Kconfig | 32 + board/siemens/iot2050/MAINTAINERS | 8 + board/siemens/iot2050/Makefile | 10 + board/siemens/iot2050/README | 65 ++ board/siemens/iot2050/board.c | 278 ++++++++ board/siemens/iot2050/config.mk | 8 + configs/iot2050_defconfig | 146 ++++ drivers/watchdog/Kconfig | 20 + drivers/watchdog/Makefile | 5 + drivers/watchdog/rti_wdt.c | 58 +- drivers/watchdog/rti_wdt_fw.S | 20 + include/configs/iot2050.h | 60 ++ 21 files changed, 1737 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-spl.dts create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic.dts create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced.dts create mode 100644 board/siemens/iot2050/Kconfig create mode 100644 board/siemens/iot2050/MAINTAINERS create mode 100644 board/siemens/iot2050/Makefile create mode 100644 board/siemens/iot2050/README create mode 100644 board/siemens/iot2050/board.c create mode 100644 board/siemens/iot2050/config.mk create mode 100644 configs/iot2050_defconfig create mode 100644 drivers/watchdog/rti_wdt_fw.S create mode 100644 include/configs/iot2050.h -- 2.26.2

4 27