October 2021 - U-Boot

[PATCH 1/3] lib/circbuf: Make circbuf selectable symbol
by Loic Poulain 22 Nov '21

22 Nov '21

It is currenly only used from usbtty driver but make it properly selectable via Kconfig symbol, for future usage. Signed-off-by: Loic Poulain <loic.poulain(a)linaro.org> --- lib/Kconfig | 3 +++ lib/Makefile | 8 +++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/lib/Kconfig b/lib/Kconfig index c535147..1bd54d8 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -290,6 +290,9 @@ config TRACE_EARLY_ADDR the size is too small then the message which says the amount of early data being coped will the the same as the +config CIRCBUF + bool + source lib/dhry/Kconfig menu "Security support" diff --git a/lib/Makefile b/lib/Makefile index 8ba745f..4daeee2 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -29,7 +29,13 @@ ifneq ($(CONFIG_CHARSET),) obj-y += charset.o endif endif -obj-$(CONFIG_USB_TTY) += circbuf.o + +ifdef CONFIG_USB_TTY +obj-y += circbuf.o +else +obj-$(CONFIG_CIRCBUF) += circbuf.o +endif + obj-y += crc8.o obj-y += crc16.o obj-$(CONFIG_ERRNO_STR) += errno_str.o -- 2.7.4

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[PATCH] configs: sama5d2 boards: add DM and GPIO commands
by Eugen Hristev 22 Nov '21

22 Nov '21

From: Mihai Sain <mihai.sain(a)microchip.com> Add dm command for driver model low level access and gpio command for query and control gpio pins. Signed-off-by: Mihai Sain <mihai.sain(a)microchip.com> --- configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++ configs/sama5d27_som1_ek_mmc_defconfig | 2 ++ configs/sama5d27_som1_ek_qspiflash_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_mmc_defconfig | 2 ++ configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 2 ++ configs/sama5d2_icp_mmc_defconfig | 2 ++ configs/sama5d2_ptc_ek_mmc_defconfig | 2 ++ configs/sama5d2_ptc_ek_nandflash_defconfig | 2 ++ configs/sama5d2_xplained_emmc_defconfig | 2 ++ configs/sama5d2_xplained_mmc_defconfig | 2 ++ configs/sama5d2_xplained_qspiflash_defconfig | 2 ++ configs/sama5d2_xplained_spiflash_defconfig | 2 ++ 12 files changed, 24 insertions(+) diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 023758c634..1a405b500e 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -32,6 +32,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 70ecec3481..52be7e105d 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 95d3186c5c..3ca9deacaf 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 9dde22f313..ef756a78c0 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_DISPLAY_PRINT=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 5ee5a5aefa..1f4192aa98 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -38,6 +38,8 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index f4f4134dc9..70ced6dc88 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -35,6 +35,8 @@ CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_IMI is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 978b4b2cd1..a84c888cf1 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -24,6 +24,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 9017e9d7c3..aab409851d 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -24,6 +24,8 @@ CONFIG_CONSOLE_MUX=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index f1ecf72d89..2b535b1f3d 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -31,6 +31,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwai # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 7bb700151f..8ee3de8322 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index f40e9bcf75..99bc807b08 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -33,6 +33,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwai CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index ed53be9bcd..4ecbef0479 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -37,6 +37,8 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set -- 2.25.1

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[PATCH 1/4] arm: stm32mp: bsec: Update OTP shadow registers in SPL
by Patrick Delaunay 22 Nov '21

22 Nov '21

Currently the upper OTP (after 57) are shadowed in U-Boot proper, when TFABOOT is not used. This choice cause an issue when U-Boot is not executed after SPL, so this BSEC initialization is moved in SPL and no more executed in U-Boot, so it is still executed only one time. After this patch this BSEC initialization is done in FSBL: SPL or TF-A. To force this initialization in all the case, the probe of the BSEC driver is forced in SPL in the arch st32mp function: spl_board_init(). Even if today BSEC driver is already probed in STM32MP15x clock driver clk_stm32mp1.c because get_cpu_type() is called in stm32mp1_get_max_opp_freq() function. Reported-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- It is updated version of proposed Alexandru patch: [v2,06/11] arm: stm32mp: bsec: Update OTP shadow registers in SPL http://patchwork.ozlabs.org/project/uboot/patch/20210907235933.2798330-7-mr… arch/arm/mach-stm32mp/bsec.c | 5 ++--- arch/arm/mach-stm32mp/cpu.c | 8 ++++++++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd80cf..e517acdd01 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -503,10 +503,9 @@ static int stm32mp_bsec_probe(struct udevice *dev) /* * update unlocked shadow for OTP cleared by the rom code - * only executed in U-Boot proper when TF-A is not used + * only executed in SPL, it is done in TF-A for TFABOOT */ - - if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev); for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index eb79f3ffd2..0263ffe96a 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -174,7 +174,15 @@ static void dbgmcu_init(void) void spl_board_init(void) { + struct udevice *dev; + int ret; + dbgmcu_init(); + + /* force probe of BSEC driver to shadow the upper OTP */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); + if (ret) + log_warning("BSEC probe failed: %d\n", ret); } #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */ -- 2.25.1

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serial download on imx8mp
by Rasmus Villemoes 22 Nov '21

22 Nov '21

Hi I'm having trouble getting serial download to work on an imx8mp evk. I'm building on top of v2021.10. The SPL + U-Boot proper that I build work fine when I write them to an SD card and boot from that, also boot from eMMC with the same binaries works fine. I can also succesfully get the SPL to load and run via USB, and I can _partially_ load the u-boot.itb; in the sense that I can see that bl31.bin runs: I get the lines NOTICE: BL31: v2.4(release):lf-5.10.52-2.1.0-rc1-39-gbb4957067 NOTICE: BL31: Built : 04:45:39, Sep 8 2021 on the serial console (same as when happens when booting via sd or emmc), but then the board just hangs. Now, extracting the u-boot.itb from the imx-boot-imx8mpevk-sd.bin-flash_evk file I found inside LF_v5.10.52-2.1.0_images_IMX8MPEVK.zip, I can actually get _that_ u-boot.itb to run on top of the SPL that I built, so I think my SPL is alright (after all, it does manages to hand control over to BL31). That u-boot.itb is U-Boot 2021.04-lf_v2021.04+g1c0116f3da Vanilla v2021.04 shows the same symptoms of being unable to boot via serial download. So I did a bisect between v2021.04 and 1c0116f3da. That bisect lands at commit 3a053a1bd6bc03eaffe82648a318b065d70d1bd0 (refs/bisect/boots) Author: Ye Li <ye.li(a)nxp.com> Date: Tue Apr 21 20:14:29 2020 -0700 MLK-23574-39 imx8mp_evk: Update iMX8MP EVK board codes so I suppose _something_ in that commit fixed it, but unfortunately board/freescale/imx8mp_evk/imx8mp_evk.c | 332 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- board/freescale/imx8mp_evk/spl.c | 79 ++++++++++++------------- configs/imx8mp_evk_defconfig | 66 +++++++++++++++++++-- include/configs/imx8mp_evk.h | 156 ++++++++++++++++++++++++++++++++++++++++++------- 4 files changed, 561 insertions(+), 72 deletions(-) means I have no idea what part of it is missing in mainline, or if there are more bits and pieces scattered around that are prerequisites for getting it to work. But it's really odd, because once the entire image has been downloaded, the components of the FIT have been loaded to the proper addresses and control handed over to BL31, I don't see how U-Boot proper (the very same binary that's used when booting from sd or emmc) can fail, and U-Boot shouldn't really need to know or care about where it was loaded from. Rasmus

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[PATCH v3 1/2] nvme: Enable FUA
by Jon Lin 22 Nov '21

22 Nov '21

Most NVME devcies maintain data in internal cache for an uncertain times, and u-boot has no method to force NVME to flush cache. So this patch adds FUA to avoid data loss caused by power off after data programming. Signed-off-by: Jon Lin <jon.lin(a)rock-chips.com> Reviewed-by: Stefan Agner <stefan(a)agner.ch> --- Changes in v3: Only enable FUA when vwc is enabled drivers/nvme/nvme.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index 3c529a2fce..9623c896a1 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -762,6 +762,10 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr, c.rw.appmask = 0; c.rw.metadata = 0; + /* Enable FUA for data integrity if vwc is enabled */ + if (dev->vwc) + c.rw.control |= NVME_RW_FUA; + while (total_lbas) { if (total_lbas < lbas) { lbas = (u16)total_lbas; -- 2.17.1

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[PATCH] net: uclass: Save ethernet MAC address when generated
by Michal Simek 20 Nov '21

20 Nov '21

When MAC address is randomly generated it should be also saved to variables. This step is there when MAC address is passed via pdata but not when it is randomly generated. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- net/eth-uclass.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 0da0e85be031..58c308f33276 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -583,6 +583,8 @@ static int eth_post_probe(struct udevice *dev) net_random_ethaddr(pdata->enetaddr); printf("\nWarning: %s (eth%d) using random MAC address - %pM\n", dev->name, dev_seq(dev), pdata->enetaddr); + eth_env_set_enetaddr_by_index("eth", dev_seq(dev), + pdata->enetaddr); #else printf("\nError: %s address not set.\n", dev->name); -- 2.33.1

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[PATCH 00/14] Some more env fixes
by Marek Behún 19 Nov '21

19 Nov '21

From: Marek Behún <marek.behun(a)nic.cz> Hello Tom, Simon and others, here are some various fixes for env. More are to follow after this, the code is horrible and I want to implement something there. Marek Behún (14): env: sf: Cosmetic fix in env_sf_init_addr() env: sf: Use ENV_VALID enum names instead of literals env: sf: Put ENV_INVALID into gd->env_valid on CRC failure env: nand: Put ENV_INVALID into gd->env_valid if default environment env: nvram: Let generic env_init() assign default environment env: nvram: Cosmetic fix in env_nvram_init() env: nowhere: Let generic env_init() assign default environment env: nowhere: Cosmetic fix env: flash: Let generic env_init() assign default environment env: flash: Cosmetic fix board: synquacer: developerbox: Don't set gd->env_addr to default_environment board: freescale: various boards: Let env subsystem set gd->env_addr env: Always use char for default_environment env: Use static_assert() to check if default_environment is too large board/Marvell/mvebu_armada-37xx/board.c | 2 +- board/freescale/ls1012afrdm/ls1012afrdm.c | 4 ---- board/freescale/ls1012aqds/ls1012aqds.c | 4 ---- board/freescale/ls1012ardb/ls1012ardb.c | 4 ---- board/freescale/ls1028a/ls1028a.c | 4 ---- board/freescale/ls1088a/ls1088a.c | 4 ---- board/freescale/ls2080aqds/ls2080aqds.c | 3 --- board/freescale/ls2080ardb/ls2080ardb.c | 3 --- board/freescale/lx2160a/lx2160a.c | 3 --- board/socionext/developerbox/developerbox.c | 2 -- env/common.c | 11 +++-------- env/flash.c | 5 +---- env/nand.c | 3 +-- env/nowhere.c | 5 ++--- env/nvram.c | 7 +++---- env/sf.c | 7 +++---- include/env_default.h | 10 ++++++++-- include/env_internal.h | 4 ++-- 18 files changed, 24 insertions(+), 61 deletions(-) -- 2.32.0

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[PATCH v2] part: return -ENOSYS when get_info not valid.
by schspa 19 Nov '21

19 Nov '21

In some case, get_info() interface can be NULL, add this check to stop from crash. Signed-off-by: schspa <schspa(a)gmail.com> --- disk/part.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/disk/part.c b/disk/part.c index a6a8f7052b..f9b9b89861 100644 --- a/disk/part.c +++ b/disk/part.c @@ -668,6 +668,13 @@ int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name, part_drv = part_driver_lookup_type(dev_desc); if (!part_drv) return -1; + + if (!part_drv->get_info) { + log_debug("## Driver %s does not have the get_info() method\n", + part_drv->name); + return -ENOSYS; + } + for (i = 1; i < part_drv->max_entries; i++) { ret = part_drv->get_info(dev_desc, i, info); if (ret != 0) { -- 2.33.1

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[PATCH v8 00/12] aspeed: Support secure boot chain with FIT image verification
by Chia-Wei Wang 18 Nov '21

18 Nov '21

This patch series intends to provide a secure boot chain from SPL to Linux kernel based on the hash and signature verification of FIT image paradigm. To improve the performance and save code size (SPL is limited to 64KB due to HW-RoT), the drviers of two HW crypto engine HACE and ACRY are also added for AST26xx SoCs. As HACE and ACRY can only access to DRAM space, additional configuration and boot command are also updated according to move each FIT image before its booting. In addition, the common code of FIT image hash algorithm lookup is also revised to leverage the HW accelerated calculation. v8: - include reviewers' tag - address comments suggested by Joel - move this patch series back to the master branch as DM_HASH has been merged v7: - fix missing interrupt status clear for ACRY RSA operation v6: - fix parameter comment for v5 update v5: - fix inconsistent parameter name due to parallel patch work v4: - add new DM_HASH based driver for Aspeed HACE - remove SPL board init, which was originally used to probe non-DM HACE driver - fix typo of ARCY to ACRY - refactor defconfig based on the new Kconfig of U-Boot next branch v3: - add SW work around for HACE HW DMA issue by resetting HACE - add reset control for HACE device tree node - sync all of the HACE error message to use debug() v2: - update commit authors Chia-Wei Wang (9): image: fit: Fix parameter name for hash algorithm aspeed: ast2600: Enlarge SRAM size clk: ast2600: Add RSACLK control for ACRY crypto: aspeed: Add AST2600 ACRY support ARM: dts: ast2600: Add ACRY to device tree ast2600: spl: Locate load buffer in DRAM space configs: ast2600-evb: Enable SPL FIT support configs: aspeed: Make EXTRA_ENV_SETTINGS board specific configs: ast2600: Boot kernel FIT in DRAM Joel Stanley (2): clk: ast2600: Add YCLK control for HACE ARM: dts: ast2600: Add HACE to device tree Johnny Huang (1): crypto: aspeed: Add AST2600 HACE support arch/arm/dts/ast2600-evb.dts | 10 + arch/arm/dts/ast2600.dtsi | 17 + arch/arm/include/asm/arch-aspeed/platform.h | 2 +- .../arm/include/asm/arch-aspeed/scu_ast2600.h | 6 +- arch/arm/mach-aspeed/ast2600/spl.c | 9 +- common/image-fit.c | 4 +- configs/evb-ast2600_defconfig | 22 +- drivers/clk/aspeed/clk_ast2600.c | 46 +++ drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 20 + drivers/crypto/aspeed/Makefile | 2 + drivers/crypto/aspeed/aspeed_acry.c | 190 +++++++++ drivers/crypto/aspeed/aspeed_hace.c | 381 ++++++++++++++++++ drivers/crypto/hash/Kconfig | 8 + include/configs/aspeed-common.h | 9 - include/configs/evb_ast2500.h | 7 + include/configs/evb_ast2600.h | 14 + lib/rsa/Kconfig | 10 +- 19 files changed, 733 insertions(+), 27 deletions(-) create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed_acry.c create mode 100644 drivers/crypto/aspeed/aspeed_hace.c -- 2.25.1

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[PATCH] x86: chromebook_coral: fix C block comment
by Alistair Delva 18 Nov '21

18 Nov '21

Fix a warning seen when compiling this dts file. Signed-off-by: Alistair Delva <adelva(a)google.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Bin Meng <bmeng.cn(a)gmail.com> --- arch/x86/dts/chromebook_coral.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index f0caaacfee..69a1c1ce29 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -825,6 +825,7 @@ * Refer to EDS-Vol2-22.3 * [14:8] steps of delay for HS400, each 125ps * [6:0] steps of delay for SDR104/HS200, each 125ps + */ /* * EMMC TX DATA Delay 2 -- 2.30.2

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