October 2021 - U-Boot

[PATCH v4 0/4] Add octal DTR support for Macronix flash
by JaimeLiao 13 Nov '21

13 Nov '21

This series add support for Macronix octal DTR flash, add flag for Softreset with "INVERT" command extension type on boot and follow linux kernel to enable 4byte opcode when possible. v4: Add flag SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT to seperate command extension types. Replace ifdef with CONFIG_IS_ENABLED and modify uncorrect descriptions. v3: Add flag SPI_NOR_CMD_EXT_INVERT to seperate command extension types. replace CONFIG_SPI_FLASH_MACRONIX with SPI_FLASH_MACRONIX_OCTAL for spi_nor_macronix_octal_dtr_enable function. v2: add ret checking for write enable in spi_nor_macronix_octal_dtr_enable function. JaimeLiao (4): mtd: spi-nor: macronix: add support for Macronix Octal mtd: spi-nor-core: Adding different type of command extension in Soft Reset mtd: spi-nor-core: set 4byte opcode when possible mtd: spi-nor-core: Add support for Macronix Octal flash drivers/mtd/spi/Kconfig | 14 +++++ drivers/mtd/spi/spi-nor-core.c | 94 +++++++++++++++++++++++++++++++++- drivers/mtd/spi/spi-nor-ids.c | 22 +++++++- include/linux/mtd/spi-nor.h | 13 ++++- 4 files changed, 139 insertions(+), 4 deletions(-) -- 2.17.1

4 16

[PATCH 1/1] blk: simplify blk_get_devnum_by_typename()
by Heinrich Schuchardt 13 Nov '21

13 Nov '21

The block descriptor contains the if_type. There is no need to first look up the uclass for the if_type and then to check the parent device's uclass to know if the device has the correct if_type. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- drivers/block/blk-uclass.c | 35 +---------------------------------- 1 file changed, 1 insertion(+), 34 deletions(-) diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index 83682dcc18..b32067f957 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -33,22 +33,6 @@ static const char *if_typename_str[IF_TYPE_COUNT] = { [IF_TYPE_PVBLOCK] = "pvblock", }; -static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = { - [IF_TYPE_IDE] = UCLASS_IDE, - [IF_TYPE_SCSI] = UCLASS_SCSI, - [IF_TYPE_ATAPI] = UCLASS_INVALID, - [IF_TYPE_USB] = UCLASS_MASS_STORAGE, - [IF_TYPE_DOC] = UCLASS_INVALID, - [IF_TYPE_MMC] = UCLASS_MMC, - [IF_TYPE_SD] = UCLASS_INVALID, - [IF_TYPE_SATA] = UCLASS_AHCI, - [IF_TYPE_HOST] = UCLASS_ROOT, - [IF_TYPE_NVME] = UCLASS_NVME, - [IF_TYPE_EFI] = UCLASS_EFI, - [IF_TYPE_VIRTIO] = UCLASS_VIRTIO, - [IF_TYPE_PVBLOCK] = UCLASS_PVBLOCK, -}; - static enum if_type if_typename_to_iftype(const char *if_typename) { int i; @@ -62,11 +46,6 @@ static enum if_type if_typename_to_iftype(const char *if_typename) return IF_TYPE_UNKNOWN; } -static enum uclass_id if_type_to_uclass_id(enum if_type if_type) -{ - return if_type_uclass_id[if_type]; -} - const char *blk_get_if_type_name(enum if_type if_type) { return if_typename_str[if_type]; @@ -93,7 +72,6 @@ struct blk_desc *blk_get_devnum_by_type(enum if_type if_type, int devnum) */ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) { - enum uclass_id uclass_id; enum if_type if_type; struct udevice *dev; struct uclass *uc; @@ -105,12 +83,6 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) if_typename); return NULL; } - uclass_id = if_type_to_uclass_id(if_type); - if (uclass_id == UCLASS_INVALID) { - debug("%s: Unknown uclass for interface type'\n", - if_typename_str[if_type]); - return NULL; - } ret = uclass_get(UCLASS_BLK, &uc); if (ret) @@ -122,13 +94,8 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) if_type, devnum, dev->name, desc->if_type, desc->devnum); if (desc->devnum != devnum) continue; - - /* Find out the parent device uclass */ - if (device_get_uclass_id(dev->parent) != uclass_id) { - debug("%s: parent uclass %d, this dev %d\n", __func__, - device_get_uclass_id(dev->parent), uclass_id); + if (desc->if_type != if_type) continue; - } if (device_probe(dev)) return NULL; -- 2.32.0

3 13

[PATCH] phy: rockchip: inno-usb2: fix hang when multiple controllers exit
by Icenowy Zheng 12 Nov '21

12 Nov '21

The OHCI and EHCI controllers are both bound to the same PHY. They will both do init and power_on operations when the controller is brought up and both do power_off and exit when the controller is stopped. However, the PHY uclass of U-Boot is not as sane as we thought -- they won't maintain a status mark for PHYs, and thus the functions of the PHYs could be called for multiple times. Calling init/power_on for multiple times have no severe problems, however calling power_off/exit for multiple times have a problem -- the first exit call will stop the PHY clock, and power_off/exit calls after it still trying to write to PHY registers. The write operation to PHY registers will fail because clock is already stopped. Adapt the count mechanism from phy-sun4i-usb to both init/exit and power_on/power_off functions to phy-rockchip-inno-usb2 to fix this problem. With this stopping USB controllers (manually or before booting a kernel) will work. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.io> Fixes: ac97a9ece14e ("phy: rockchip: Add Rockchip USB2PHY driver") --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 62b8ba3a4a..be9cc99d90 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -62,6 +62,8 @@ struct rockchip_usb2phy { void *reg_base; struct clk phyclk; const struct rockchip_usb2phy_cfg *phy_cfg; + int init_count; + int power_on_count; }; static inline int property_enable(void *reg_base, @@ -92,6 +94,10 @@ static int rockchip_usb2phy_power_on(struct phy *phy) struct rockchip_usb2phy *priv = dev_get_priv(parent); const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + priv->power_on_count++; + if (priv->power_on_count != 1) + return 0; + property_enable(priv->reg_base, &port_cfg->phy_sus, false); /* waiting for the utmi_clk to become stable */ @@ -106,6 +112,10 @@ static int rockchip_usb2phy_power_off(struct phy *phy) struct rockchip_usb2phy *priv = dev_get_priv(parent); const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); + priv->power_on_count--; + if (priv->power_on_count != 0) + return 0; + property_enable(priv->reg_base, &port_cfg->phy_sus, true); return 0; @@ -118,6 +128,10 @@ static int rockchip_usb2phy_init(struct phy *phy) const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy); int ret; + priv->init_count++; + if (priv->init_count != 1) + return 0; + ret = clk_enable(&priv->phyclk); if (ret) { dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret); @@ -140,6 +154,10 @@ static int rockchip_usb2phy_exit(struct phy *phy) struct udevice *parent = dev_get_parent(phy->dev); struct rockchip_usb2phy *priv = dev_get_priv(parent); + priv->init_count--; + if (priv->init_count != 0) + return 0; + clk_disable(&priv->phyclk); return 0; @@ -212,6 +230,9 @@ static int rockchip_usb2phy_probe(struct udevice *dev) return ret; } + priv->power_on_count = 0; + priv->init_count = 0; + return 0; } -- 2.30.2

6 9

[PATCH] get_maintainer.pl: add .get_maintainer.conf
by Michael Walle 12 Nov '21

12 Nov '21

Since commit e57c7c5c4282 ("get_maintainer.pl: update from Linux kernel v5.13-rc6") only the top level MAINTAINERS file is used. This is because this commit (accidentally) disabled the search of MAINTAINERS files (find_maintainer_files is set to 0 again). Before that, commit b79372ae94fb ("scripts/get_maintainer.pl: enable find_maintainer_files") explicitly enabled that feature. Nowadays, we also have to set maintainer_path to a directory. To fix it and enable recursive search of MAINTAINERS, create a configuration file to set these two variables. Signed-off-by: Michael Walle <michael(a)walle.cc> --- .get_maintainer.conf | 1 + 1 file changed, 1 insertion(+) create mode 100644 .get_maintainer.conf diff --git a/.get_maintainer.conf b/.get_maintainer.conf new file mode 100644 index 0000000000..df595f5420 --- /dev/null +++ b/.get_maintainer.conf @@ -0,0 +1 @@ +--find-maintainer-files --maintainer-path=. -- 2.30.2

2 1

[PATCH] Azure: Move to windows-2019
by Tom Rini 12 Nov '21

12 Nov '21

As per https://github.com/actions/virtual-environments/issues/4312 the Windows-2016 environments are scheduled for deprecation and removal in early 2022. Move to windows-2019 now to avoid this (Visual Studio 2019 is included here, hence the tag naming scheme change). Signed-off-by: Tom Rini <trini(a)konsulko.com> --- .azure-pipelines.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index b3794a956e86..41b34ea7de5a 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -1,5 +1,5 @@ variables: - windows_vm: vs2017-win2016 + windows_vm: windows-2019 ubuntu_vm: ubuntu-18.04 macos_vm: macOS-10.15 ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210921-05Oct2021 -- 2.25.1

2 2

[PATCH] Remove LYNX KDI remainders
by Thomas Huth 12 Nov '21

12 Nov '21

The last board that used to set CONFIG_LYNXKDI has been removed in commit 242836a893ae ("powerpc: ppc4xx: remove pcs440ep support"), doc/README.lynxkdi only talks about a MPC8260 board being supported, and the mpc8260 support has been removed four years ago in commit 2eb48ff7a210d ("powerpc, 8260: remove support for mpc8260") already, and common/lynxkdi.c only consists of an "#error" statement these days, so it seems like the LYNX KDI code is dead code nowadays. Let's remove it now. Signed-off-by: Thomas Huth <thuth(a)redhat.com> --- common/Makefile | 1 - common/bootm_os.c | 25 ---------------- common/image.c | 2 +- common/lynxkdi.c | 23 --------------- doc/README.lynxkdi | 57 ------------------------------------ include/bootm.h | 1 - include/lynxkdi.h | 24 --------------- scripts/config_whitelist.txt | 1 - 8 files changed, 1 insertion(+), 133 deletions(-) delete mode 100644 common/lynxkdi.c delete mode 100644 doc/README.lynxkdi delete mode 100644 include/lynxkdi.h diff --git a/common/Makefile b/common/Makefile index e7839027b6..44baf04572 100644 --- a/common/Makefile +++ b/common/Makefile @@ -50,7 +50,6 @@ obj-$(CONFIG_LCD) += lcd.o lcd_console.o endif obj-$(CONFIG_LCD_ROTATION) += lcd_console_rotation.o obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o -obj-$(CONFIG_LYNXKDI) += lynxkdi.o obj-$(CONFIG_MENU) += menu.o obj-$(CONFIG_UPDATE_COMMON) += update.o obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o diff --git a/common/bootm_os.c b/common/bootm_os.c index 39623f9126..e635c72709 100644 --- a/common/bootm_os.c +++ b/common/bootm_os.c @@ -138,28 +138,6 @@ static int do_bootm_netbsd(int flag, int argc, char *const argv[], } #endif /* CONFIG_BOOTM_NETBSD*/ -#ifdef CONFIG_LYNXKDI -static int do_bootm_lynxkdi(int flag, int argc, char *const argv[], - bootm_headers_t *images) -{ - image_header_t *hdr = &images->legacy_hdr_os_copy; - - if (flag != BOOTM_STATE_OS_GO) - return 0; - -#if defined(CONFIG_FIT) - if (!images->legacy_hdr_valid) { - fit_unsupported_reset("Lynx"); - return 1; - } -#endif - - lynxkdi_boot((image_header_t *)hdr); - - return 1; -} -#endif /* CONFIG_LYNXKDI */ - #ifdef CONFIG_BOOTM_RTEMS static int do_bootm_rtems(int flag, int argc, char *const argv[], bootm_headers_t *images) @@ -570,9 +548,6 @@ static boot_os_fn *boot_os[] = { #ifdef CONFIG_BOOTM_NETBSD [IH_OS_NETBSD] = do_bootm_netbsd, #endif -#ifdef CONFIG_LYNXKDI - [IH_OS_LYNXOS] = do_bootm_lynxkdi, -#endif #ifdef CONFIG_BOOTM_RTEMS [IH_OS_RTEMS] = do_bootm_rtems, #endif diff --git a/common/image.c b/common/image.c index 3fa60b5827..992e72991d 100644 --- a/common/image.c +++ b/common/image.c @@ -106,7 +106,7 @@ static const table_entry_t uimage_os[] = { { IH_OS_INVALID, "invalid", "Invalid OS", }, { IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware" }, { IH_OS_LINUX, "linux", "Linux", }, -#if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC) +#if defined(USE_HOSTCC) { IH_OS_LYNXOS, "lynxos", "LynxOS", }, #endif { IH_OS_NETBSD, "netbsd", "NetBSD", }, diff --git a/common/lynxkdi.c b/common/lynxkdi.c deleted file mode 100644 index 1c8e122c32..0000000000 --- a/common/lynxkdi.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) Orbacom Systems, Inc <www.orbacom.com> - * All rights reserved. - * - * Redistribution and use in source and binary forms are freely - * permitted provided that the above copyright notice and this - * paragraph and the following disclaimer are duplicated in all - * such forms. - * - * This software is provided "AS IS" and without any express or - * implied warranties, including, without limitation, the implied - * warranties of merchantability and fitness for a particular - * purpose. - */ - -#include <common.h> -#include <asm/processor.h> -#include <image.h> -#include <net.h> - -#include <lynxkdi.h> - -#error "Lynx KDI support not implemented for configured CPU" diff --git a/doc/README.lynxkdi b/doc/README.lynxkdi deleted file mode 100644 index 076f01862a..0000000000 --- a/doc/README.lynxkdi +++ /dev/null @@ -1,57 +0,0 @@ - LYNX KDI SUPPORT - - Last Update: July 20, 2003 -======================================================================= - -This file describes support for LynuxWorks KDI within U-Boot. Support -is enabled by defining CONFIG_LYNXKDI. - - -LYNXOS AND BLUECAT SUPPORTED -============================ -Both LynxOS and BlueCat linux KDIs are supported. The implementation -automatically detects which is being booted. When you use mkimage -you should specify "lynxos" for both (see target-specific notes). - - -SUPPORTED ARCHITECTURE/TARGETS -============================== -The following targets have been tested: - --PowerPC MPC8260ADS - - -FILES TO LOOK AT -================ -include/lynxkdi.h -defines a simple struct passed to a kdi. -common/lynxkdi.c -implements the call to the kdi. -common/cmd_bootm.c -top-level command implementation ("bootm"). - - -==================================================================== -TARGET SPECIFIC NOTES -==================================================================== - -MPC8260ADS -=========== -The default LynxOS and BlueCat implementations require some -modifications to the config file. - -Edit include/configs/MPC8260ADS.h to use the following: - -#define CONFIG_SYS_IMMR 0xFA200000 -#define CONFIG_SYS_BCSR 0xFA100000 -#define CONFIG_SYS_BR1_PRELIM 0xFA101801 - -When creating a LynxOS or BlueCat u-boot image using mkimage, -you must specify the following: - -Both: -A ppc -O lynxos -T kernel -C none -LynxOS: -a 0x00004000 -e 0x00004020 -BlueCat: -a 0x00500000 -e 0x00507000 - -To pass the MAC address to BlueCat you should define the -"fcc2_ether_addr" parameter in the "bootargs" environment -variable. E.g.: - -==> setenv bootargs fcc2_ether_addr=00:11:22:33:44:55:66 diff --git a/include/bootm.h b/include/bootm.h index 7f88ec718b..48fc668cf3 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -39,7 +39,6 @@ extern boot_os_fn do_bootm_linux; extern boot_os_fn do_bootm_vxworks; int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); -void lynxkdi_boot(image_header_t *hdr); boot_os_fn *bootm_os_get_boot_func(int os); diff --git a/include/lynxkdi.h b/include/lynxkdi.h deleted file mode 100644 index 38640277b2..0000000000 --- a/include/lynxkdi.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2003 - * Orbacom Systems, Inc. - */ - -#ifndef __LYNXKDI_H__ -#define __LYNXKDI_H__ - - -/* Boot parameter struct passed to kernel - */ -typedef struct lynxos_bootparms_t { - uint8_t rsvd1[2]; /* Reserved */ - uint8_t ethaddr[6]; /* Ethernet address */ - uint16_t flags; /* Boot flags */ - uint32_t rate; /* System frequency */ - uint32_t clock_ref; /* Time reference */ - uint32_t dramsz; /* DRAM size */ - uint32_t rsvd2; /* Reserved */ -} lynxos_bootparms_t; - - -#endif /* __LYNXKDI_H__ */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 022a27288c..50a9e9d20c 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -742,7 +742,6 @@ CONFIG_LQ038J7DH53 CONFIG_LS102XA_STREAM_ID CONFIG_LSCHLV2 CONFIG_LSXHL -CONFIG_LYNXKDI CONFIG_M41T94_SPI_CS CONFIG_M520x CONFIG_M5301x -- 2.27.0

3 3

[u-boot-test-hooks PATCH 1/7] travis-ci: Add qemu_arm_spl board
by Simon Glass 11 Nov '21

11 Nov '21

From: Tuomas Tynkkynen <tuomas.tynkkynen(a)iki.fi> This is similar to the existing qemu_arm target, except that the 'bios' is image.bin (containing both SPL and U-Boot) rather than in u-boot.bin Signed-off-by: Simon Glass <sjg(a)chromium.org> --- bin/travis-ci/conf.qemu_arm_spl_na | 31 ++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 bin/travis-ci/conf.qemu_arm_spl_na diff --git a/bin/travis-ci/conf.qemu_arm_spl_na b/bin/travis-ci/conf.qemu_arm_spl_na new file mode 100644 index 0000000..18c7fe5 --- /dev/null +++ b/bin/travis-ci/conf.qemu_arm_spl_na @@ -0,0 +1,31 @@ +# Copyright 2021 Google LLC +# Based on conf.vexpress_ca15_tc2_qemu which is: +# Copyright (c) 2016 Konsulko Group. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +console_impl=qemu +qemu_machine="virt" +qemu_binary="qemu-system-arm" +qemu_extra_args="-nographic -netdev user,id=net0,tftp=${UBOOT_TRAVIS_BUILD_DIR} -device e1000,netdev=net0 -device virtio-rng-pci" + +# Uses image.bin which contains SPL and U-Boot +qemu_kernel_args="-bios ${U_BOOT_BUILD_DIR}/image.bin" +reset_impl=none +flash_impl=none -- 2.33.1.1089.g2158813163f-goog

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[PATCH v5 00/28] arm: dts: ls1028a: sync device tree with linux
by Michael Walle 11 Nov '21

11 Nov '21

This series sync the device tree of the LS1028A SoC with the linux one. To ease future debugging and reviewing, we first clean up the existing one, removing bogus nodes, moving all CCSR related nodes in /soc and update the drivers to accept the offical compatible strings. This was tested on a sl28 board, but the ls1028a.dtsi sync also affects the LS1028A-RDB and -QDS. It would be nice if someone could actually test it on such a board. I didn't sync the device trees for the NXP boards because u-boot related things aren't split into its own -u-boot.dtsi file. So I'll leave that task to NXP :) The following patch is a prerequisite for this series: https://patchwork.ozlabs.org/project/uboot/patch/20210825210510.24766-1-tri… changes since v4: - drop the following patch which isn't needed anymore, because it was fixed in the linux dtsi: arm: dts: ls1028a: drop non-removable property from esdhc controller - sync dtsi with linux 5.14.12 changes since v3: - rebase to latest master - don't support fsl,ls1028a-gpu anymore, use the upstream compatible string changes since v2: - move the device tree nodes piece by piece and sort them to ease reviewing - fix PCI driver (bindings) - fix SATA driver (bindings) - fix USB driver (bindings) - split most changes which are caused by the sync of the linux device tree to own patches, eg. pcie io window, spi chip selects The final diff for the sync is much nicer now ;) changes since v1: - remove u-boot,dm-pre-reloc from rdb and qds boards - fix enetc0 and enetc2 labels Michael Walle (28): armv8: ls1028a: use the official compatible string for the GPU arm: dts: ls1028a: remove /memory node arm: dts: ls1028a-{rdb,qds}: remove dm-pre-reloc property arm: dts: ls1028a: add an empty /soc arm: dts: ls1028a: move the clockgen node into /soc arm: dts: ls1028a: move I2C controller nodes into /soc arm: dts: ls1028a: move the FlexSPI controller node arm: dts: ls1028a: move the SPI and eSDHC controller nodes into /soc arm: dts: ls1028a: move the UART controller nodes into /soc arm: dts: ls1028a: move the low-power UART nodes into /soc arm: dts: ls1028a: move the GPIO controller nodes into /soc arm: dts: ls1028a: move SATA and USB controller nodes into /soc arm: dts: ls1028a: move the PCIe controller nodes into /soc arm: dts: ls1028a: move the watchdog node into /soc arm: dts: ls1028a: move the iRC node and its devices into /soc arm: dts: ls1028a: update the labels watchdog: sp805_wdt: use correct compatible string spi: fsl_dspi: add new compatible fsl,ls1021a-v1.0-dspi spi: fsl_dspi: rename num-cs to spi-num-chipselects serial: lpuart: add new compatible fsl,ls1028a-lpuart scsi: ceva: rename the resource name to match the linux kernel one usb: xhci: fsl: add new compatible fsl,ls1028a-dwc3 pci: layerscape: add official ls1028a binding support arm: dts: ls1028a: remove num-lanes in the PCIe controller nodes arm: dts: ls1028a: move the PCI I/O window to match arm: dts: ls1028a: disable the PCIe controller by default arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux arm: dts: sl28: sync dtbs arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 2 +- .../arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 2 +- arch/arm/dts/fsl-ls1012a.dtsi | 4 +- .../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 37 +- .../fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi | 2 +- .../arm/dts/fsl-ls1028a-kontron-sl28-var1.dts | 31 +- .../fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi | 8 + .../arm/dts/fsl-ls1028a-kontron-sl28-var2.dts | 46 +- .../fsl-ls1028a-kontron-sl28-var3-u-boot.dtsi | 2 +- .../fsl-ls1028a-kontron-sl28-var4-u-boot.dtsi | 4 +- .../arm/dts/fsl-ls1028a-kontron-sl28-var4.dts | 18 +- arch/arm/dts/fsl-ls1028a-kontron-sl28.dts | 256 ++- .../dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi | 4 +- .../dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi | 4 +- .../dts/fsl-ls1028a-qds-7777-sch-30841.dtsi | 12 +- .../dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi | 8 +- .../dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi | 4 +- .../fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi | 12 +- .../dts/fsl-ls1028a-qds-9999-sch-24801.dtsi | 12 +- arch/arm/dts/fsl-ls1028a-qds-duart.dts | 2 +- .../fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi | 12 +- .../fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi | 12 +- .../dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi | 6 +- .../dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi | 6 +- arch/arm/dts/fsl-ls1028a-qds.dtsi | 25 +- arch/arm/dts/fsl-ls1028a-rdb.dts | 31 +- arch/arm/dts/fsl-ls1028a.dtsi | 1443 ++++++++++++----- arch/arm/dts/fsl-ls1043a.dtsi | 6 +- arch/arm/dts/fsl-ls1046a.dtsi | 6 +- arch/arm/dts/fsl-ls1088a.dtsi | 4 +- arch/arm/dts/fsl-ls2080a.dtsi | 2 +- arch/arm/dts/fsl-lx2160a.dtsi | 6 +- arch/arm/dts/hi3660.dtsi | 4 +- arch/arm/dts/ls1021a.dtsi | 6 +- arch/arm/dts/vf.dtsi | 4 +- drivers/ata/sata_ceva.c | 2 +- drivers/pci/pcie_layerscape_rc.c | 61 +- drivers/serial/serial_lpuart.c | 2 + drivers/spi/fsl_dspi.c | 6 +- drivers/usb/host/xhci-fsl.c | 1 + drivers/watchdog/sp805_wdt.c | 2 +- .../dt-bindings/clock/fsl,qoriq-clockgen.h | 15 + 42 files changed, 1530 insertions(+), 602 deletions(-) create mode 100644 include/dt-bindings/clock/fsl,qoriq-clockgen.h -- 2.30.2

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[PATCH] ARM: stm32: Align mtdparts with SPI NOR layout on DHSOM
by Marek Vasut 10 Nov '21

10 Nov '21

The DHSOM uses different SPI NOR layout than the ST devkit, stop pulling in the ST specific runtime mtdparts settings and adjust the mtdparts accordingly. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- board/dhelectronics/dh_stm32mp1/Makefile | 1 - configs/stm32mp15_dhcom_basic_defconfig | 3 ++- configs/stm32mp15_dhcor_basic_defconfig | 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/board/dhelectronics/dh_stm32mp1/Makefile b/board/dhelectronics/dh_stm32mp1/Makefile index b368b396a46..30db1dee807 100644 --- a/board/dhelectronics/dh_stm32mp1/Makefile +++ b/board/dhelectronics/dh_stm32mp1/Makefile @@ -5,5 +5,4 @@ obj-y += ../../st/common/stpmic1.o board.o -obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += ../../st/common/stm32mp_mtdparts.o obj-$(CONFIG_SET_DFU_ALT_INFO) += ../../st/common/stm32mp_dfu.o diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 5ecc91c7c1b..f51896ed472 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -61,6 +61,8 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=nor0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k(env1),64k(env2)" # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set @@ -102,7 +104,6 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y CONFIG_MTD=y CONFIG_DM_MTD=y -CONFIG_SYS_MTDPARTS_RUNTIME=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=50000000 CONFIG_SPI_FLASH_SFDP_SUPPORT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 7c410b8224a..13e4553ac82 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -59,6 +59,8 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=nor0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k(env1),64k(env2)" # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set -- 2.33.0

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[PATCH] net: phy: realtek: Add tx/rx delay config for 8211e
by Samuel Holland 10 Nov '21

10 Nov '21

Some boards need to change the tx/rx delay config in order for gigabit Ethernet to work. In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config"), Realtek documented the bits for overriding the delays from the hardware straps. Copy the logic from linux, so the delay config is set from the PHY's interface type (the phy-mode property in the device tree). This removes the need for a one-off workaround for the Pine A64+ board. Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- This change is needed for the Allwinner D1 Nezha board, which has incorrect hardware straps. configs/pine64_plus_defconfig | 1 - drivers/net/phy/Kconfig | 10 ----- drivers/net/phy/realtek.c | 69 ++++++++++++++++++++++------------- 3 files changed, 43 insertions(+), 37 deletions(-) diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index d1c2c3c3cc..f42f4e5923 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -8,7 +8,6 @@ CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y -CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 68ee7d7a2d..e69cd8a4b3 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -214,16 +214,6 @@ config PHY_NXP_C45_TJA11XX config PHY_REALTEK bool "Realtek Ethernet PHYs support" -config RTL8211E_PINE64_GIGABIT_FIX - bool "Fix gigabit throughput on some Pine64+ models" - depends on PHY_REALTEK - help - Configure the Realtek RTL8211E found on some Pine64+ models differently to - fix throughput on Gigabit links, turning off all internal delays in the - process. The settings that this touches are not documented in the CONFREG - section of the RTL8211E datasheet, but come from Realtek by way of the - Pine64 engineering team. - config RTL8211X_PHY_FORCE_MASTER bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode" depends on PHY_REALTEK diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b1b1fa5080..84c755525f 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -12,7 +12,6 @@ #include <linux/delay.h> #define PHY_RTL8211x_FORCE_MASTER BIT(1) -#define PHY_RTL8211E_PINE64_GIGABIT_FIX BIT(2) #define PHY_RTL8211F_FORCE_EEE_RXC_ON BIT(3) #define PHY_RTL8201F_S700_RMII_TIMINGS BIT(4) @@ -49,10 +48,10 @@ #define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800 #define MIIM_RTL8211F_PHYSTAT_LINK 0x0004 -#define MIIM_RTL8211E_CONFREG 0x1c -#define MIIM_RTL8211E_CONFREG_TXD 0x0002 -#define MIIM_RTL8211E_CONFREG_RXD 0x0004 -#define MIIM_RTL8211E_CONFREG_MAGIC 0xb400 /* Undocumented */ +#define MIIM_RTL8211E_CONFREG 0x1c +#define MIIM_RTL8211E_CTRL_DELAY BIT(13) +#define MIIM_RTL8211E_TX_DELAY BIT(12) +#define MIIM_RTL8211E_RX_DELAY BIT(11) #define MIIM_RTL8211E_EXT_PAGE_SELECT 0x1e @@ -108,10 +107,6 @@ static int rtl8211b_probe(struct phy_device *phydev) static int rtl8211e_probe(struct phy_device *phydev) { -#ifdef CONFIG_RTL8211E_PINE64_GIGABIT_FIX - phydev->flags |= PHY_RTL8211E_PINE64_GIGABIT_FIX; -#endif - return 0; } @@ -154,22 +149,6 @@ static int rtl8211x_config(struct phy_device *phydev) reg |= MIIM_RTL8211x_CTRL1000T_MASTER; phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg); } - if (phydev->flags & PHY_RTL8211E_PINE64_GIGABIT_FIX) { - unsigned int reg; - - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, - 7); - phy_write(phydev, MDIO_DEVAD_NONE, - MIIM_RTL8211E_EXT_PAGE_SELECT, 0xa4); - reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG); - /* Ensure both internal delays are turned off */ - reg &= ~(MIIM_RTL8211E_CONFREG_TXD | MIIM_RTL8211E_CONFREG_RXD); - /* Flip the magic undocumented bits */ - reg |= MIIM_RTL8211E_CONFREG_MAGIC; - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG, reg); - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, - 0); - } /* read interrupt status just to clear it */ phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER); @@ -201,6 +180,44 @@ static int rtl8201f_config(struct phy_device *phydev) return 0; } +static int rtl8211e_config(struct phy_device *phydev) +{ + int reg, val; + + /* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */ + switch (phydev->interface) { + case PHY_INTERFACE_MODE_RGMII: + val = MIIM_RTL8211E_CTRL_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_ID: + val = MIIM_RTL8211E_CTRL_DELAY | MIIM_RTL8211E_TX_DELAY | + MIIM_RTL8211E_RX_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_RXID: + val = MIIM_RTL8211E_CTRL_DELAY | MIIM_RTL8211E_TX_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_TXID: + val = MIIM_RTL8211E_CTRL_DELAY | MIIM_RTL8211E_RX_DELAY; + break; + default: /* the rest of the modes imply leaving delays as is. */ + goto default_delay; + } + + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 7); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_EXT_PAGE_SELECT, 0xa4); + + reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG); + reg &= ~(MIIM_RTL8211E_TX_DELAY | MIIM_RTL8211E_RX_DELAY); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG, reg | val); + + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0); + +default_delay: + genphy_config_aneg(phydev); + + return 0; +} + static int rtl8211f_config(struct phy_device *phydev) { u16 reg; @@ -410,7 +427,7 @@ static struct phy_driver RTL8211E_driver = { .mask = 0xffffff, .features = PHY_GBIT_FEATURES, .probe = &rtl8211e_probe, - .config = &rtl8211x_config, + .config = &rtl8211e_config, .startup = &rtl8211e_startup, .shutdown = &genphy_shutdown, }; -- 2.32.0

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