August 2020 - U-Boot

[PATCH] cmd: add clone command
by John Chau 05 Aug '20

05 Aug '20

From: John Chau <john(a)harmon.hk> This patch adds a feature for block device cloning similar to dd command, this should be useful for boot-strapping a device where usb gadget or networking is not available. For instance one can clone a factory image into a blank emmc from an external sd card. Signed-off-by: John Chau <john(a)harmon.hk> --- cmd/Kconfig | 9 +++++ cmd/Makefile | 1 + cmd/clone.c | 112 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 122 insertions(+) create mode 100644 cmd/clone.c diff --git a/cmd/Kconfig b/cmd/Kconfig index 6403bc45a5..44f96dedcd 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1067,6 +1067,15 @@ config CMD_MMC_SWRITE Enable support for the "mmc swrite" command to write Android sparse images to eMMC. +config CMD_CLONE + bool "clone" + depends on BLK + select CLONE + help + Enable storage cloning over block devices, useful for + initial flashing by external block device without network + or usb gadget support. + config CMD_MTD bool "mtd" depends on MTD diff --git a/cmd/Makefile b/cmd/Makefile index f1dd513a4b..02663a1c73 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -95,6 +95,7 @@ obj-$(CONFIG_CMD_MMC) += mmc.o obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_CMD_MTD) += mtd.o obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o +obj-$(CONFIG_CMD_CLONE) += clone.o ifneq ($(CONFIG_CMD_NAND)$(CONFIG_CMD_SF),) obj-y += legacy-mtd-utils.o endif diff --git a/cmd/clone.c b/cmd/clone.c new file mode 100644 index 0000000000..ee36c7698c --- /dev/null +++ b/cmd/clone.c @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 John Chau <john(a)harmon.hk> + * + */ + +#include <common.h> +#include <command.h> +#include <malloc.h> +#include <blk.h> +#include <vsprintf.h> + +//FIXME: we assume blk size of both devices can be divided by 1M, which should be normal +#define BUFSIZE (1 * 1024 * 1024) +static int do_clone(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { + int srcdev, destdev; + struct blk_desc *srcdesc, *destdesc; + int srcbz, destbz, ret; + char *unit, *buf; + unsigned long wrcnt, rdcnt, requested, srcblk, destblk; + unsigned long timer; + + if (argc < 6) { + return CMD_RET_USAGE; + } + printf("\n"); + srcdev = blk_get_device_by_str(argv[1], argv[2], &srcdesc); + destdev = blk_get_device_by_str(argv[3], argv[4], &destdesc); + if (srcdev < 0) { + printf("Unable to open source device\n"); + return 1; + } else if (destdev < 0) { + printf("Unable to open destination device\n"); + return 1; + } + requested = simple_strtoul(argv[5], &unit, 10); + srcbz = srcdesc->blksz; + destbz = destdesc->blksz; + if (requested == 0) { + unsigned long a = srcdesc->lba * srcdesc->blksz; + unsigned long b = destdesc->lba * destdesc->blksz; + if (a > b) requested = a; + else requested = b; + } else { + switch (unit[0]) { + case 'g': + case 'G': + requested *= 1024; + case 'm': + case 'M': + requested *= 1024; + case 'k': + case 'K': + requested *= 1024; + break; + } + } + wrcnt = 0; + rdcnt = 0; + buf = (char*)malloc(BUFSIZE); + srcblk = 0; + destblk = 0; + timer = get_timer(0); + while (wrcnt < requested) { + unsigned long toRead = BUFSIZE / srcbz; + unsigned long offset = 0; +read: + ret = blk_dread(srcdesc, srcblk, toRead, buf + offset); + if (ret < 0) { + printf("Src read error @blk %ld\n", srcblk); + goto exit; + } + rdcnt += ret * srcbz; + srcblk += ret; + if (ret < toRead) { + toRead -= ret; + offset += ret * srcbz; + goto read; + } + unsigned long toWrite = BUFSIZE / destbz; + offset = 0; +write: + ret = blk_dwrite(destdesc, destblk, toWrite, buf + offset); + if (ret < 0) { + printf("Dest write error @blk %ld\n", srcblk); + goto exit; + } + wrcnt += ret * destbz; + destblk += ret; + if (ret < toWrite) { + toWrite -= ret; + offset += ret * destbz; + goto write; + } + } + +exit: + timer = get_timer(timer); + timer = 1000 * timer / CONFIG_SYS_HZ; + printf("%ld read \n", rdcnt); + printf("%ld written\n", wrcnt); + printf("%ldms, %ldkB/s\n", timer, wrcnt / timer); + free(buf); + return 0; +} + +U_BOOT_CMD( + clone, 6, 1, do_clone, + "simple storage cloning", + "<src interface> <src dev> <dest interface> <dest dev> <size[K/M/G]>\n" + "clone storage from 'src dev' on 'src interface' to 'dest dev' on 'dest interface' with maximum 'size' bytes (or 0 for clone to end)" +); -- 2.25.1

2 4

[PATCH v3] fs/fat/fat.c: Do not perform zero block reads if there are no blocks left
by Jason Wessel 05 Aug '20

05 Aug '20

While using u-boot with qemu's virtio driver I stumbled across a problem reading files less than sector size. On the real hardware the block reader seems ok with reading zero blocks, and while we could fix the virtio host side of qemu to deal with a zero block read instead of crashing, the u-boot fat driver should not be doing zero block reads in the first place. If you ask hardware to read zero blocks you are just going to get zero data. There may also be other hardware that responds similarly to the virtio interface so this is worth fixing. Without the patch I get the following and have to restart qemu because it dies. --------------------------------- => fatls virtio 0:1 30 cmdline.txt => fatload virtio 0:1 ${loadaddr} cmdline.txt qemu-system-aarch64: virtio: zero sized buffers are not allowed --------------------------------- With the patch I get the expected results. --------------------------------- => fatls virtio 0:1 30 cmdline.txt => fatload virtio 0:1 ${loadaddr} cmdline.txt 30 bytes read in 11 ms (2 KiB/s) => md.b ${loadaddr} 0x1E 40080000: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62 dwc_otg.lpm_enab 40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a le=0 rootwait. --------------------------------- Signed-off-by: Jason Wessel <jason.wessel(a)windriver.com> Signed-off-by: Jason Wessel <jason.wessel(a)windriver.com> --- fs/fat/fat.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 7fd29470c1..dfad1e910b 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -278,7 +278,10 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size) } } else { idx = size / mydata->sect_size; - ret = disk_read(startsect, idx, buffer); + if (idx == 0) + ret = 0; + else + ret = disk_read(startsect, idx, buffer); if (ret != idx) { debug("Error reading data (got %d)\n", ret); return -1; -- 2.17.1

2 2

[PATCH v2] net: ping: reset stored IP address
by Marek Szyprowski 05 Aug '20

05 Aug '20

Reset the stored ping IP address before entering a netloop with different protocol to ensure that it won't be interrupted by the received correct ICMP_ECHO_REPLY packet. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> --- v2: - Moved the net_ping_ip reset to the beginning of the net_loop() if the protocol is not equal to PING. This is required, because the netretry feature of the network framework relies on the fact that the internal state of the commands is preserved between net_loop() calls. v1: https://patchwork.ozlabs.org/project/uboot/patch/20200325134200.18959-1-m.s… - Initial version --- net/net.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/net/net.c b/net/net.c index 37932919d04..72b445774f9 100644 --- a/net/net.c +++ b/net/net.c @@ -409,6 +409,10 @@ int net_loop(enum proto_t protocol) int ret = -EINVAL; enum net_loop_state prev_net_state = net_state; +#if defined(CONFIG_CMD_PING) + if (protocol != PING) + net_ping_ip.s_addr = 0; +#endif net_restarted = 0; net_dev_exists = 0; net_try_count = 1; -- 2.17.1

2 1

[PATCH] net: dwc_eth_qos: add Kconfig option to select supported configuration
by Patrick Delaunay 05 Aug '20

05 Aug '20

Add configuration flag to select the supported dwc driver configuration: - CONFIG_DWC_ETH_QOS_TEGRA186 - CONFIG_DWC_ETH_QOS_IMX - CONFIG_DWC_ETH_QOS_STM32 See Linux driver ethernet/stmicro/stmmac and associated glue layers for other configuration examples. This patch removes the not-selected compatibles and lets the linker remove the unused functions to reduce the size of the driver. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- Hi, I propose this patch after Marek's remark in [1]. It is also linked to [2] to limit the STM32 glue for ST compatible. [1] net: dwc_eth_qos: Make clk_rx and clk_tx optional http://patchwork.ozlabs.org/project/uboot/patch/20200512095603.29126-5-davi… [2] net: dwc_eth_qos: update the compatible supported for STM32 http://patchwork.ozlabs.org/project/uboot/list/?series=176917 drivers/net/Kconfig | 27 ++++++++++++++++++++++++--- drivers/net/dwc_eth_qos.c | 12 +++++++++--- 2 files changed, 33 insertions(+), 6 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 0b08de0ef4..c4b3667d3b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -156,9 +156,30 @@ config DWC_ETH_QOS help This driver supports the Synopsys Designware Ethernet QOS (Quality Of Service) IP block. The IP supports many options for bus type, - clocking/reset structure, and feature list. This driver currently - supports the specific configuration used in NVIDIA's Tegra186 chip, - but should be extensible to other combinations quite easily. + clocking/reset structure, and feature list. + +config DWC_ETH_QOS_IMX + bool "Synopsys DWC Ethernet QOS device support for IMX" + depends on DWC_ETH_QOS + help + The Synopsys Designware Ethernet QOS IP block with the specific + configuration used in IMX soc. + +config DWC_ETH_QOS_STM32 + bool "Synopsys DWC Ethernet QOS device support for STM32" + depends on DWC_ETH_QOS + default y if ARCH_STM32MP + help + The Synopsys Designware Ethernet QOS IP block with the specific + configuration used in STM32MP soc. + +config DWC_ETH_QOS_TEGRA186 + bool "Synopsys DWC Ethernet QOS device support for TEGRA186" + depends on DWC_ETH_QOS + default y if TEGRA186 + help + The Synopsys Designware Ethernet QOS IP block with specific + configuration used in NVIDIA's Tegra186 chip. config E1000 bool "Intel PRO/1000 Gigabit Ethernet support" diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 3f4437069b..d4536a325f 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -2100,7 +2100,7 @@ static struct eqos_ops eqos_tegra186_ops = { .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_tegra186 }; -static const struct eqos_config eqos_tegra186_config = { +static const struct eqos_config __maybe_unused eqos_tegra186_config = { .reg_access_always_ok = false, .mdio_wait = 10, .swr_wait = 10, @@ -2127,7 +2127,7 @@ static struct eqos_ops eqos_stm32_ops = { .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32 }; -static const struct eqos_config eqos_stm32_config = { +static const struct eqos_config __maybe_unused eqos_stm32_config = { .reg_access_always_ok = false, .mdio_wait = 10000, .swr_wait = 50, @@ -2154,7 +2154,7 @@ static struct eqos_ops eqos_imx_ops = { .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx }; -struct eqos_config eqos_imx_config = { +struct eqos_config __maybe_unused eqos_imx_config = { .reg_access_always_ok = false, .mdio_wait = 10000, .swr_wait = 50, @@ -2165,18 +2165,24 @@ struct eqos_config eqos_imx_config = { }; static const struct udevice_id eqos_ids[] = { +#if IS_ENABLED(CONFIG_DWC_ETH_QOS_TEGRA186) { .compatible = "nvidia,tegra186-eqos", .data = (ulong)&eqos_tegra186_config }, +#endif +#if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32) { .compatible = "snps,dwmac-4.20a", .data = (ulong)&eqos_stm32_config }, +#endif +#if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX) { .compatible = "fsl,imx-eqos", .data = (ulong)&eqos_imx_config }, +#endif { } }; -- 2.17.1

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[PATCH v2 00/19] arm: mach-k3: Initial support for Texas Instrument's J7200 Platform
by Lokesh Vutla 05 Aug '20

05 Aug '20

This series adds initial support for latest new SoC, J7200, from Texas Instruments. The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Changes since v2: - Rebased on top of latest master - Addressed comments form Suman and Vignesh Changes since v1: - Updated compatible for sdhci - Enabled CONFIG_OF_BOARD_SETUP for fixuping up msmc dt node. - Split R5 dts and A72 dts Dave Gerlach (1): arm: dts: k3-j7200: Add R5 specific dts support Jean-Jacques Hiblot (1): arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled Kishon Vijay Abraham I (1): soc: soc_ti_k3: Add device identification for J7200 SoC Lokesh Vutla (15): board: ti: board_detect: Add stub functions for EEPROM detection apis board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined arm: mach-k3: Move mmr_unlock to a common location arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image arm: mach-k3: j721e: Add detection for j721e arm: mach-k3: j721e: Fix unlocking control module registers arm: mach-k3: j7200: Add support for SOC detection arm: mach-k3: j7200: Add support for storing extended boot info from ROM arm: mach-k3: j7200: Detect if ROM has already loaded sysfw board: ti: j7200: Introduce support for j7200 build targets board: ti: j7200: Add board detection support for j7200 ram: k3-j721e: Relax version checks for memory controller arm: dts: k3-j7200: Add dts support configs: j7200_evm_r5: Add initial support configs: j7200_evm_a72: Add Initial support Suman Anna (1): board: ti: j721e: Update fdt fixup logic for interconnect nodes arch/arm/dts/Makefile | 4 +- .../k3-j7200-common-proc-board-u-boot.dtsi | 104 + arch/arm/dts/k3-j7200-common-proc-board.dts | 123 + arch/arm/dts/k3-j7200-ddr-evm-lp4-1600.dtsi | 2195 +++++++++++++++++ arch/arm/dts/k3-j7200-main.dtsi | 313 +++ arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 117 + .../arm/dts/k3-j7200-r5-common-proc-board.dts | 199 ++ arch/arm/dts/k3-j7200-som-p0.dtsi | 29 + arch/arm/dts/k3-j7200.dtsi | 175 ++ arch/arm/mach-k3/am6_init.c | 12 +- arch/arm/mach-k3/common.c | 38 + arch/arm/mach-k3/common.h | 6 + arch/arm/mach-k3/config.mk | 8 +- arch/arm/mach-k3/include/mach/hardware.h | 8 + .../arm/mach-k3/include/mach/j721e_hardware.h | 3 + arch/arm/mach-k3/include/mach/sys_proto.h | 3 + arch/arm/mach-k3/include/mach/sysfw-loader.h | 4 +- arch/arm/mach-k3/j721e_init.c | 30 +- arch/arm/mach-k3/sysfw-loader.c | 56 +- board/ti/common/board_detect.h | 13 + board/ti/j721e/Kconfig | 53 + board/ti/j721e/evm.c | 25 +- configs/j7200_evm_a72_defconfig | 175 ++ configs/j7200_evm_r5_defconfig | 130 + drivers/ram/k3-j721e/lpddr4.c | 16 +- drivers/soc/soc_ti_k3.c | 4 + include/configs/j721e_evm.h | 4 +- 27 files changed, 3776 insertions(+), 71 deletions(-) create mode 100644 arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j7200-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j7200-ddr-evm-lp4-1600.dtsi create mode 100644 arch/arm/dts/k3-j7200-main.dtsi create mode 100644 arch/arm/dts/k3-j7200-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j7200-r5-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j7200-som-p0.dtsi create mode 100644 arch/arm/dts/k3-j7200.dtsi create mode 100644 configs/j7200_evm_a72_defconfig create mode 100644 configs/j7200_evm_r5_defconfig -- 2.23.0

1 1

[PATCH v2 00/18] arm: mach-k3: Initial support for Texas Instrument's J7200 Platform
by Lokesh Vutla 05 Aug '20

05 Aug '20

This series adds initial support for latest new SoC, J7200, from Texas Instruments. The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Changes since v1: - Updated compatible for sdhci - Enabled CONFIG_OF_BOARD_SETUP for fixuping up msmc dt node. - Split R5 dts and A72 dts Dave Gerlach (1): arm: dts: k3-j7200: Add R5 specific dts support Jean-Jacques Hiblot (1): arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled Lokesh Vutla (15): board: ti: board_detect: Add stub functions for EEPROM detection apis board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined arm: mach-k3: Move mmr_unlock to a common location arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image arm: mach-k3: j721e: Add detection for j721e arm: mach-k3: j721e: Fix unlocking control module registers arm: mach-k3: j7200: Add support for SOC detection arm: mach-k3: j7200: Add support for storing extended boot info from ROM arm: mach-k3: j7200: Detect if ROM has already loaded sysfw board: ti: j7200: Introduce support for j7200 build targets board: ti: j7200: Add board detection support for j7200 ram: k3-j721e: Relax version checks for memory controller arm: dts: k3-j7200: Add dts support configs: j7200_evm_r5: Add initial support configs: j7200_evm_a72: Add Initial support Suman Anna (1): board: ti: j721e: Update fdt fixup logic for interconnect nodes arch/arm/dts/Makefile | 4 +- .../k3-j7200-common-proc-board-u-boot.dtsi | 92 + arch/arm/dts/k3-j7200-common-proc-board.dts | 94 + arch/arm/dts/k3-j7200-ddr-evm-lp4-1600.dtsi | 2195 +++++++++++++++++ arch/arm/dts/k3-j7200-main.dtsi | 313 +++ arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 117 + .../arm/dts/k3-j7200-r5-common-proc-board.dts | 199 ++ arch/arm/dts/k3-j7200-som-p0.dtsi | 29 + arch/arm/dts/k3-j7200.dtsi | 175 ++ arch/arm/mach-k3/am6_init.c | 12 +- arch/arm/mach-k3/common.c | 38 + arch/arm/mach-k3/common.h | 4 + arch/arm/mach-k3/config.mk | 8 +- arch/arm/mach-k3/include/mach/hardware.h | 7 + .../arm/mach-k3/include/mach/j721e_hardware.h | 3 + arch/arm/mach-k3/include/mach/sys_proto.h | 3 + arch/arm/mach-k3/include/mach/sysfw-loader.h | 4 +- arch/arm/mach-k3/j721e_init.c | 30 +- arch/arm/mach-k3/sysfw-loader.c | 56 +- board/ti/common/board_detect.h | 13 + board/ti/j721e/Kconfig | 53 + board/ti/j721e/evm.c | 25 +- configs/j7200_evm_a72_defconfig | 172 ++ configs/j7200_evm_r5_defconfig | 126 + drivers/ram/k3-j721e/lpddr4.c | 16 +- 25 files changed, 3719 insertions(+), 69 deletions(-) create mode 100644 arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j7200-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j7200-ddr-evm-lp4-1600.dtsi create mode 100644 arch/arm/dts/k3-j7200-main.dtsi create mode 100644 arch/arm/dts/k3-j7200-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j7200-r5-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j7200-som-p0.dtsi create mode 100644 arch/arm/dts/k3-j7200.dtsi create mode 100644 configs/j7200_evm_a72_defconfig create mode 100644 configs/j7200_evm_r5_defconfig -- 2.27.0

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[PATCH] firmware: psci: Do not bind driver if U-Boot runs in EL3
by Michal Simek 05 Aug '20

05 Aug '20

There is no reason to bind psci driver if U-Boot runs in EL3 because SMC/HVC instructions can't be called. That's why detect this state and don't let user to crash from prompt by performing reset or poweroff commands (if enabled). Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Maybe there is a better way how to do it. Maybe do it in probe instead of bind. Feel free to comment but this doesn't look right behavior. U-Boot SPL 2020.10-rc1-00046-g5fade0c9d867 (Aug 05 2020 - 14:36:03 +0200) PMUFW: v1.1 Loading new PMUFW cfg obj (2024 bytes) EL Level: EL3 Multiboot: 0 Trying to boot from MMC2 spl: could not initialize mmc. error: -19 Trying to boot from MMC1 spl_load_image_fat_os: error reading image u-boot.bin, err - -2 U-Boot 2020.10-rc1-00046-g5fade0c9d867 (Aug 05 2020 - 14:36:03 +0200) Model: ZynqMP ZCU104 RevC Board: Xilinx ZynqMP DRAM: 2 GiB PMUFW: v1.1 EL Level: EL3 Chip ID: zu7e Multiboot: 0 WDT: Started with servicing (60s timeout) NAND: 0 MiB MMC: mmc@ff170000: 0 In: serial@ff000000 Out: serial@ff000000 Err: serial@ff000000 Bootmode: LVL_SHFT_SD_MODE1 Reset reason: EXTERNAL Net: ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 12, interface rgmii-id eth0: ethernet@ff0e0000 Hit any key to stop autoboot: 0 ZynqMP> ZynqMP> reset resetting ... "Synchronous Abort" handler, esr 0x5e000000 elr: 0000000008000194 lr : 0000000008000220 (reloc) elr: 000000007fec9194 lr : 000000007fec9220 x0 : 0000000084000009 x1 : 0000000000000000 x2 : 0000000000000000 x3 : 0000000000000000 x4 : 0000000000000000 x5 : 0000000000000000 x6 : 0000000000000000 x7 : 0000000000000000 x8 : 000000007deaedb0 x9 : 000000000000000c x10: 00000000000007c4 x11: 000000007deae92c x12: 0000000000000006 x13: 000000000001869f x14: 000000007deaedb0 x15: 0000000000000002 x16: 000000007ff2af5c x17: 0000000000000000 x18: 000000007deb8db0 x19: 0000000000000000 x20: 000000007ffb0268 x21: 0000000000000000 x22: 000000007debc600 x23: 0000000000000001 x24: 000000007ffc7898 x25: 0000000000000000 x26: 0000000000000000 x27: 0000000000000000 x28: 000000007debc640 x29: 000000007deaeaf0 Code: 00000000 f9020000 00000000 d4000003 (f94003e4) Resetting CPU ... ### ERROR ### Please RESET the board ### --- drivers/firmware/psci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index 23cf807591c4..1bef7eea56fc 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -69,6 +69,9 @@ static int psci_probe(struct udevice *dev) { const char *method; + if (current_el() == 3) + return -EINVAL; + method = ofnode_read_string(dev_ofnode(dev), "method"); if (!method) { pr_warn("missing \"method\" property\n"); -- 2.27.0

1 1

[PATCH] env: nowhere: Implement .load callback
by Marek Vasut 05 Aug '20

05 Aug '20

Add .load callback for the 'nowhere' environment driver. This is useful for when the 'nowhere' driver is used in combination with other drivers and should be used to load the default environment. Signed-off-by: Marek Vasut <marex(a)denx.de> Reviewed-by: Tom Rini <trini(a)konsulko.com> --- V2: No change --- env/nowhere.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/env/nowhere.c b/env/nowhere.c index d33fdf27d0..a92a84b0c4 100644 --- a/env/nowhere.c +++ b/env/nowhere.c @@ -15,6 +15,12 @@ DECLARE_GLOBAL_DATA_PTR; +static int env_nowhere_load(void) +{ + env_set_default(NULL, 0); + + return 0; +} /* * Because we only ever have the default environment available we must mark * it as invalid. -- 2.27.0

2 1

[PATCH] ARM: imx: soc: Add reset for non-DM case
by Marek Vasut 05 Aug '20

05 Aug '20

This is another in series of patches which remove ad-hoc reset_cpu() hacks from board files. This one is for iMX7, so implement default reset_cpu() there to prevent it from showing up in board files. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/mach-imx/mx7/soc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 9cb61f5c34..8db672fb05 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -18,6 +18,7 @@ #include <env.h> #include <imx_thermal.h> #include <fsl_sec.h> +#include <fsl_wdog.h> #include <asm/setup.h> #include <linux/delay.h> @@ -419,3 +420,15 @@ void reset_misc(void) #endif } +#if !CONFIG_IS_ENABLED(SYSRESET) +void reset_cpu(ulong addr) +{ + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + + /* Clear WDA to trigger WDOG_B immediately */ + writew(SET_WCR_WT(1) | WCR_WDT | WCR_WDE | WCR_SRS, &wdog->wcr); + + while (1) + ; +} +#endif -- 2.27.0

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[PATCH v1] spi: cadence_qspi: Probe fail if QSPI clock is not set
by Chee Hong Ang 05 Aug '20

05 Aug '20

If the QSPI clock is not set (read as 0), QSPI driver probe shall fail and prevent further QSPI access. Signed-off-by: Chee Hong Ang <chee.hong.ang(a)intel.com> --- drivers/spi/cadence_qspi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 1e85749209..3bb5c7031d 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -170,6 +170,9 @@ static int cadence_spi_probe(struct udevice *bus) struct clk clk; int ret; + if (!CONFIG_CQSPI_REF_CLK) + return -ENODEV; + priv->regbase = plat->regbase; priv->ahbbase = plat->ahbbase; -- 2.19.0

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