August 2020 - U-Boot

RPi4 U-Boot freeze
by Stefan Agner 20 Sep '20

20 Sep '20

Hi, I noticed a quite common freeze when running 32-bit U-Boot 2020.01 (rpi_4_32b_defconfig) on a 2GB RPi4 model: U-Boot 2020.01 (Aug 07 2020 - 13:00:23 +0000) DRAM: 1.9 GiB <freeze, no more output> This happens fairly often, I would say 4 out of 5 boot tries. However, if it boots, everything seems to run fine. The issue seems to go away when using 2020.04 or any newer release, however, when trying to find the actual patch fixing the issue using git bisect I ended up with a MMC merge request which really seems unrelated (36bdcf7f3b). It seems that the problem is quite evasive and disappears if certain structure are aligned differently etc. Enabling initcall debugging showed that U-Boot crashes right after relocation: ... initcall: 00016f2c RAM Configuration: Bank #0: 0 948 MiB Bank #1: 40000000 1 GiB Bank #2: 0 0 Bytes Bank #3: 0 0 Bytes DRAM: 1.9 GiB initcall: 00016bb8 New Stack Pointer is: 3af6d9e0 initcall: 00016da4 initcall: 00016ef0 initcall: 00016ef8 initcall: 00016d38 Relocation Offset is: 3b375000 Relocating to 3b37d000, new gd at 3af78ec0, sp at 3af6d9e0 initcall: 00016ec8 [clear_bss] initcall: 0004465c [display_options?? only appears sometimes] <freeze> I realized when using CONFIG_SYS_(I|D)CACHE_OFF=y the problem seems to disappear. But to be 100% certain that it is cache related, I used my original configuration (which is known to "reliably" freeze), and replaced 00016ec8 with 00008688 manually in the binary, essentially swapping out function pointers in "init_sequence_f" [00008688 is cleanup_before_linux, which flushes and disables I-cache/D-cache]. And indeed, that hacked up binary does boot reliably every time: ... initcall: 00016f2c RAM Configuration: Bank #0: 0 948 MiB Bank #1: 40000000 1 GiB Bank #2: 0 0 Bytes Bank #3: 0 0 Bytes DRAM: 1.9 GiB initcall: 00016bb8 New Stack Pointer is: 3af6d9e0 initcall: 00016da4 initcall: 00016ef0 initcall: 00016ef8 initcall: 00016d38 Relocation Offset is: 3b375000 Relocating to 3b37d000, new gd at 3af78ec0, sp at 3af6d9e0 initcall: 00008688 initcall: 3b38c10c initcall: 3b38c114 initcall: 000172e0 (relocated to 3b38c2e0) initcall: 0001712c (relocated to 3b38c12c) ... >From what I understand on RPi4 caches are enabled when entering U-Boot. I was wondering if the relocation code really can handle that? -- Stefan

5 9

[PATCH v1 00/10] mips: octeon: Add bootoctlinux command for Octeon Linux kernel booting
by Stefan Roese 19 Sep '20

19 Sep '20

This patchset adds the platforms specific bootoctlinux command, which is used to boot the MIPS Octeon Linux kernel (4.9.x). A special command is necessary here, as very platform specific data is passed to the kernel via the bootinfo / bootmem format. This patchset also includes various required infrastructure code for this (octeon-feature, coremask, bootinfo). The code for booting the additional cores is also included in this patchset. Tested on Octeon 7304 EBB with all 16 cores. Thanks, Stefan Aaron Williams (7): mips: octeon: Add header cvmx-regs.h mips: octeon: Add header octeon-feature.h mips: octeon: Add header cvmx-fuse.h mips: octeon: Add header cvmx-bootinfo.h mips: octeon: Add coremask support mips: octeon: Add bootmem support mips: octeon: Add bootoctlinux command Stefan Roese (3): mips: octeon: octeon-model.h: Enable inclusion from assembler files mips: octeon: lowlevel_init.S: Add NMI handling code for SMP Linux booting mips: octeon: octeon_common.h: Increase CONFIG_SYS_BOOTM_LEN arch/mips/mach-octeon/Makefile | 3 + arch/mips/mach-octeon/bootoctlinux.c | 661 ++++++++ arch/mips/mach-octeon/cvmx-bootmem.c | 1460 +++++++++++++++++ arch/mips/mach-octeon/cvmx-coremask.c | 366 +++++ .../mach-octeon/include/mach/bootoct_cmd.h | 54 + .../mach-octeon/include/mach/cvmx-bootinfo.h | 350 ++++ .../mach-octeon/include/mach/cvmx-bootmem.h | 533 ++++++ .../mach-octeon/include/mach/cvmx-coremask.h | 752 +++++++++ .../mips/mach-octeon/include/mach/cvmx-fuse.h | 71 + .../mips/mach-octeon/include/mach/cvmx-regs.h | 144 ++ .../mach-octeon/include/mach/octeon-feature.h | 442 +++++ .../mach-octeon/include/mach/octeon-model.h | 4 + arch/mips/mach-octeon/lowlevel_init.S | 76 + include/configs/octeon_common.h | 2 + 14 files changed, 4918 insertions(+) create mode 100644 arch/mips/mach-octeon/bootoctlinux.c create mode 100644 arch/mips/mach-octeon/cvmx-bootmem.c create mode 100644 arch/mips/mach-octeon/cvmx-coremask.c create mode 100644 arch/mips/mach-octeon/include/mach/bootoct_cmd.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-bootinfo.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-bootmem.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-coremask.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fuse.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-regs.h create mode 100644 arch/mips/mach-octeon/include/mach/octeon-feature.h -- 2.28.0

2 11

[PATCH v4 0/8] mips/usb: Add Octeon xHCI USB support
by Stefan Roese 19 Sep '20

19 Sep '20

This patchset adds xHCI USB support for MIPS Octeon. After the xHCI code has been fixed to support mapped addresses (virt != phys), this patchset now adds the missing code pieces to enable USB support on Octeon. This is mainly the USB glue code for Octeon and the MIPS platform specific changes (cache fixes, platform specific swapping based on address areas, DT & defcopnfig changes). Thanks, Stefan Changes in v4: - Add Reviewed-by tag from Bin - Add Reviewed-by tag from Bin - Correct another missed multi-line comment style Changes in v3: - Add Reviewed-by tag from Bin - Minor corrections to the commit text as suggested by Bin - Minor corrections of the commit text as suggested by Bin - Minor corrections in comments as suggested by Bin - Removed empty driver remove() function - Use macros for clock values instead of numbers - Add Reviewed-by tag from Bin - Correct multi-line comment style Changes in v2: - Completely remove BUG_ON() for this trans_event.buffer check - Reword commit text - Only use SPDX format for license info Stefan Roese (8): usb: xhci: xhci-dwc3.c: Use dev_remap_addr() instead of dev_get_addr() usb: xhci: xhci_bulk_tx: Don't "BUG" when comparing addresses usb: xhci: octeon: Add DWC3 glue layer for Octeon mips: octeon: cpu.c: Add table for selective swapping mips: octeon: Add mangle-port.h mips: octeon: cache.c: Flush all pending writes in flush_dcache_range() mips: octeon: Add USB DT nodes mips: octeon: octeon_ebb7304_defconfig: Enable USB support arch/mips/dts/mrvl,cn73xx.dtsi | 60 +++ arch/mips/dts/mrvl,octeon-ebb7304.dts | 24 ++ arch/mips/mach-octeon/cache.c | 12 +- arch/mips/mach-octeon/cpu.c | 21 ++ arch/mips/mach-octeon/include/mangle-port.h | 56 +++ configs/octeon_ebb7304_defconfig | 17 + drivers/usb/host/Kconfig | 9 + drivers/usb/host/Makefile | 1 + drivers/usb/host/dwc3-octeon-glue.c | 393 ++++++++++++++++++++ drivers/usb/host/xhci-dwc3.c | 2 +- drivers/usb/host/xhci-ring.c | 2 - 11 files changed, 588 insertions(+), 9 deletions(-) create mode 100644 arch/mips/mach-octeon/include/mangle-port.h create mode 100644 drivers/usb/host/dwc3-octeon-glue.c -- 2.28.0

2 9

[PATCH 1/4] cmd: mem: Correctly count the errors in mtest
by Stefan Roese 19 Sep '20

19 Sep '20

This patch changes mtest to correctly count the overall errors and print them even in the abort (Ctrl-C) case. Signed-off-by: Stefan Roese <sr(a)denx.de> --- cmd/mem.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/cmd/mem.c b/cmd/mem.c index 6d54f19527..9367278aa8 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -871,7 +871,7 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, ulong start, end; vu_long *buf, *dummy; ulong iteration_limit = 0; - int ret; + ulong count = 0; ulong errs = 0; /* number of errors, or -1 if interrupted */ ulong pattern = 0; int iteration; @@ -929,6 +929,7 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, } if (errs == -1UL) break; + count += errs; } /* @@ -947,14 +948,10 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, if (errs == -1UL) { /* Memory test was aborted - write a newline to finish off */ putc('\n'); - ret = 1; - } else { - printf("Tested %d iteration(s) with %lu errors.\n", - iteration, errs); - ret = errs != 0; } + printf("Tested %d iteration(s) with %lu errors.\n", iteration, count); - return ret; + return errs != 0; } #endif /* CONFIG_CMD_MEMTEST */ -- 2.25.1

3 24

[PATCH v1 1/2] colibri-imx8qxp: rename all occurences to colibri-imx8x
by Igor Opaniuk 18 Sep '20

18 Sep '20

From: Philippe Schenker <philippe.schenker(a)toradex.com> The Toradex product is called colibri-imx8x consisting of SoM with i.MX8QXP and i.MX8DX SoCs. Signed-off-by: Philippe Schenker <philippe.schenker(a)toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk(a)toradex.com> --- arch/arm/dts/fsl-imx8qxp-colibri.dts | 6 +++--- board/toradex/colibri-imx8x/MAINTAINERS | 2 +- ...ibri-imx8qxp-imximage.cfg => colibri-imx8x-imximage.cfg} | 0 .../{colibri-imx8qxp_defconfig => colibri-imx8x_defconfig} | 2 +- doc/board/toradex/colibri-imx8x.rst | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) rename board/toradex/colibri-imx8x/{colibri-imx8qxp-imximage.cfg => colibri-imx8x-imximage.cfg} (100%) rename configs/{colibri-imx8qxp_defconfig => colibri-imx8x_defconfig} (98%) diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts index 0c20edf2cf..11ece34c02 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri.dts +++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts @@ -9,8 +9,8 @@ #include "fsl-imx8qxp-colibri-u-boot.dtsi" / { - model = "Toradex Colibri iMX8QXP"; - compatible = "toradex,colibri-imx8qxp", "fsl,imx8qxp"; + model = "Toradex Colibri iMX8X"; + compatible = "toradex,colibri-imx8x", "fsl,imx8qxp"; chosen { bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200"; @@ -32,7 +32,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>; - colibri-imx8qxp { + colibri-imx8x { pinctrl_lpuart0: lpuart0grp { fsl,pins = < SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 diff --git a/board/toradex/colibri-imx8x/MAINTAINERS b/board/toradex/colibri-imx8x/MAINTAINERS index f6853586c8..de62f87a56 100644 --- a/board/toradex/colibri-imx8x/MAINTAINERS +++ b/board/toradex/colibri-imx8x/MAINTAINERS @@ -5,6 +5,6 @@ S: Maintained F: arch/arm/dts/fsl-imx8x-colibri.dts F: arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi F: board/toradex/colibri-imx8x/ -F: configs/colibri-imx8qxp_defconfig +F: configs/colibri-imx8x_defconfig F: doc/board/toradex/colibri-imx8x.rst F: include/configs/colibri-imx8x.h diff --git a/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg b/board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg similarity index 100% rename from board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg rename to board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg diff --git a/configs/colibri-imx8qxp_defconfig b/configs/colibri-imx8x_defconfig similarity index 98% rename from configs/colibri-imx8qxp_defconfig rename to configs/colibri-imx8x_defconfig index 719e7473e1..92dc103ce3 100644 --- a/configs/colibri-imx8qxp_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -10,7 +10,7 @@ CONFIG_TARGET_COLIBRI_IMX8X=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg" CONFIG_LOG=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/doc/board/toradex/colibri-imx8x.rst b/doc/board/toradex/colibri-imx8x.rst index 244e5a4c04..616f40ae0f 100644 --- a/doc/board/toradex/colibri-imx8x.rst +++ b/doc/board/toradex/colibri-imx8x.rst @@ -52,7 +52,7 @@ Build U-Boot .. code-block:: bash - $ make colibri-imx8qxp_defconfig + $ make colibri-imx8x_defconfig $ make u-boot-dtb.imx Load the U-Boot Binary Using UUU -- 2.17.1

2 3

[PATCH v2 1/3] armv8: gpio: add gpio feature
by Hui Song 18 Sep '20

18 Sep '20

From: "hui.song" <hui.song_1(a)nxp.com> add one struct mpc8xxx_gpio_plat to enable gpio feature. Signed-off-by: hui.song <hui.song_1(a)nxp.com> --- .../include/asm/arch-fsl-layerscape/gpio.h | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/gpio.h diff --git a/arch/arm/include/asm/arch-fsl-layerscape/gpio.h b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h new file mode 100644 index 0000000000..7ae5eee8b6 --- /dev/null +++ b/arch/arm/include/asm/arch-fsl-layerscape/gpio.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 NXP + */ + +/* + * Dummy header file to enable CONFIG_OF_CONTROL. + * If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled. + * It includes <asm/arch/gpio.h> via <asm/gpio.h>, so those SoCs that enable + * OF_CONTROL must have arch/gpio.h. + */ + +#ifndef __ASM_ARCH_MX85XX_GPIO_H +#define __ASM_ARCH_MX85XX_GPIO_H + +struct mpc8xxx_gpio_plat { + ulong addr; + ulong size; + uint ngpios; +}; + +#endif -- 2.17.1

2 3

[PATCH] MAINTAINERS: update clk entry git tree
by Baruch Siach 17 Sep '20

17 Sep '20

Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index e35d5d4fcbf8..739bb1468350 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -609,7 +609,7 @@ F: drivers/mtd/jedec_flash.c CLOCK M: Lukasz Majewski <lukma(a)denx.de> S: Maintained -T: git git://git.denx.de/u-boot-dfu.git +T: git https://gitlab.denx.de/u-boot/custodians/u-boot-clk.git F: drivers/clk/ F: drivers/clk/imx/ -- 2.28.0

2 1

[PATCH] include: phy: fix NULL pointer check in phy_write()
by Thirupathaiah Annapureddy 17 Sep '20

17 Sep '20

phy_write() uses bus->write() instead of bus->read(). This means NULL pointer pre-check needs to happen on bus->write instead of bus->read. Signed-off-by: Thirupathaiah Annapureddy <thiruan(a)linux.microsoft.com> --- include/phy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/phy.h b/include/phy.h index 1dbbf65111..cbdb10d6fc 100644 --- a/include/phy.h +++ b/include/phy.h @@ -205,7 +205,7 @@ static inline int phy_write(struct phy_device *phydev, int devad, int regnum, { struct mii_dev *bus = phydev->bus; - if (!bus || !bus->read) { + if (!bus || !bus->write) { debug("%s: No bus configured\n", __func__); return -1; } -- 2.25.2

4 4

[PATCH 0/3] MCU R5F branch-only boot on J7200 SoCs
by Suman Anna 15 Sep '20

15 Sep '20

Hi Lokesh, The following series adds the support for the branch-only boot of an application firmware on MCU R5F from R5 SPL after it has finished launching the A72. Most of the changes are just related to updating J7200 defconfigs or dts nodes, as the core logic for R5 SPL branch-only boot is already present. The boot media supported is _only_ SDCard just like with J721E SoCs. Firmware images to be used are the non-ATCM images. The series is on top of the previous "Early-boot support of R5FSS from A72 U-Boot for J7200 SoCs" [1]. Following is the patch summary: - Patch #1 updates the R5 SPL rproc env variables for J7200 SoCs given the different firmware names used between J721E & J7200 SoCs. The Main R5FSS variables are also left out, until the support for the same is added to code. - Patches #2 and #3 add and enable the FS_LOADER node and Kconfigs regards Suman [1] https://patchwork.ozlabs.org/project/uboot/list/?series=196101 Suman Anna (3): env: ti: j721e-evm: Update R5 SPL rproc env variables for J7200 arm: dts: k3-j7200-r5: Add fs_loader node configs: j7200_evm_r5: Enable FS_LOADER arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 6 ++++++ configs/j7200_evm_r5_defconfig | 1 + include/configs/j721e_evm.h | 6 ++++++ 3 files changed, 13 insertions(+) -- 2.28.0

2 5

[PATCH 0/8] Early-boot support of R5FSS from A72 U-Boot for J7200 SoCs
by Suman Anna 15 Sep '20

15 Sep '20

Hi Lokesh, The following series adds the early-boot support of the revised R5FSS IP on J7200 SoCS from A72 U-Boot. The J7200 SoCs has two R5FSS clusters, one in MCU domain and another in MAIN domain. Patches are on top of the latest master + "Configure J721E Main R5FSS1 to Split-mode & env" series [1]. The current series enables the default variables only for the MAIN R5FSS cores. The config file used is common between J721E and J7200 SoCs, so is adjusted accordingly. The MCU R5FSS is shutdown at the end of R5 SPL, and can be booted by modifying env variables. Early-boot is supported only through the MMC rootfs just like on J721E SoCs. Following are the default modes and firmware image names supported with this series: 1. Modes MCU R5FSS0: LockStep mode MAIN R5FSS0: Split mode 2. Firmware images MCU R5FSS0 Core0 : j7200-mcu-r5f0_0-fw MCU R5FSS0 Core1 : j7200-mcu-r5f0_1-fw MAIN R5FSS0 Core0 : j7200-main-r5f0_0-fw MAIN R5FSS0 Core0 : j7200-main-r5f0_1-fw Following is the patch summary: - Patches #1 and #2 update the binding and the K3 R5F remoteproc driver for J7200 SoCs - Patch #3 sets up a separate MMU map for J7200 SoCs using the appropriate CONFIG_TARGET_<SOC>_A72_EVM symbols - Patches #4 and #5 add the dts nodes with LockStep for MCU R5FSS0 and Split-mode for MAIN R5FSS0 - Patch #6 leverages the CONFIG_TARGET_<SOC>_A72_EVM symbols to set the SoC-specific default remoteproc boot list - Patch #7 enables the R5F remoteproc driver and needed options for A72 U-Boot - Patch #8 enhances the bootcmd variable to include the booting of the rprocs based on couple of control variables regards Suman [1] https://patchwork.ozlabs.org/project/uboot/list/?series=196091 Suman Anna (8): dt-bindings: remoteproc: k3-r5f: Update bindings for J7200 SoCs remoteproc: k3-r5: Add support for J7200 R5Fs armv8: K3: j7200: Add custom MMU support arm: dts: k3-j7200-mcu: Add MCU domain R5F cluster node arm: dts: k3-j7200-main: Add MAIN domain R5F cluster nodes env: ti: j721e-evm: Update rproc_fw_binaries env variable for J7200 configs: j7200_evm_a72: Enable R5F remoteproc driver configs: j7200_evm_a72: Enhance bootcmd to start remoteprocs arch/arm/dts/k3-j7200-common-proc-board.dts | 7 ++ arch/arm/dts/k3-j7200-main.dtsi | 40 ++++++++ arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 40 ++++++++ arch/arm/mach-k3/arm64-mmu.c | 59 ++++++++++- configs/j7200_evm_a72_defconfig | 6 +- .../remoteproc/ti,k3-r5f-rproc.txt | 5 +- drivers/remoteproc/ti_k3_r5f_rproc.c | 99 +++++++++++++++++-- include/configs/j721e_evm.h | 14 ++- 8 files changed, 255 insertions(+), 15 deletions(-) -- 2.28.0

2 9