August 2020 - U-Boot

[PATCH] arm64: zynqmp: Correct value of shunt resistor for VCCINT and VCC_SOC
by Michal Simek 23 Sep '20

23 Sep '20

From: Saeed Nowshadi <saeed.nowshadi(a)xilinx.com> Value of shunt resistor for INA226s that monitor VCCINT and VCC_SOC power rails are incorrect. This patch corrects those values. Signed-off-by: Saeed Nowshadi <saeed.nowshadi(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index b81919e31948..aae3c626f562 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -230,16 +230,16 @@ #io-channel-cells = <1>; label = "ina226-vccint"; reg = <0x40>; - shunt-resistor = <5000>; /* R440 */ - /* 0.78V @ 32A 1 of 6 Phases*/ + shunt-resistor = <500>; /* R440 */ + /* 0.80V @ 32A 1 of 6 Phases*/ }; vcc_soc: ina226@41 { /* u161 */ compatible = "ti,ina226"; #io-channel-cells = <1>; label = "ina226-vcc-soc"; reg = <0x41>; - shunt-resistor = <2000>; /* R1186 */ - /* 0.78V @ 18A */ + shunt-resistor = <500>; /* R1702 */ + /* 0.80V @ 18A */ }; vcc_pmc: ina226@42 { /* u163 */ compatible = "ti,ina226"; -- 2.28.0

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[PATCH] arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus
by Michal Simek 23 Sep '20

23 Sep '20

From: Saeed Nowshadi <saeed.nowshadi(a)xilinx.com> There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1 ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and channel 2 is connected to J288 connector for QSFP1. Signed-off-by: Saeed Nowshadi <saeed.nowshadi(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index a8bbb14f6cd1..b81919e31948 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -554,6 +554,31 @@ reg = <7>; }; }; + i2c-mux@75 { /* u214 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { /* SFP0_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* SFP0 */ + }; + i2c@1 { /* SFP1_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* SFP1 */ + }; + i2c@2 { /* QSFP1_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* QSFP1 */ + }; + /* 3 - 7 unused */ + }; }; &xilinx_ams { -- 2.28.0

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[PATCH] xilinx: Enable uartlite driver for Versal/ZynqMP
by Michal Simek 23 Sep '20

23 Sep '20

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to enable uartlite driver support by default. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index f9edc727176f..c84bf2ead6ea 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -79,6 +79,7 @@ CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y +CONFIG_XILINX_UARTLITE=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 00a53f36e47b..23d7ddf2d079 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -122,6 +122,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_ARM_DCC=y +CONFIG_XILINX_UARTLITE=y CONFIG_ZYNQ_SERIAL=y CONFIG_SPI=y CONFIG_ZYNQ_SPI=y -- 2.28.0

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[PATCH] configs: xilinx: Enable configs required for ubifs
by Michal Simek 23 Sep '20

23 Sep '20

From: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Enable required configs for using ubifs in uboot. UBIFS testing procedure from u-boot: Let's say we have two partitions in dt as below and want to format partition1 "images" with ubifs. partition@0 { label = "boot"; reg = <0x0 0x1000000>; }; partition@1 { label = "images"; reg = <0x1000000 0x7000000>; }; We will format the partition from linux and copy some files and access from uboot later. First thing, in linux config disable CONFIG_MTD_SPI_NOR_USE_4K_SECTORS. this is required as ubifs expects min LEB size as 15*1024 bytes. Use below commands in linux to format "images" partition with ubifs. ubiformat /dev/mtd1 ubiattach /dev/ubi_ctrl -m 1 ubimkvol /dev/ubi0 -N images -m mount -t ubifs ubi0:images /mnt We can copy files to /mnt and unmount it. To access this ubifs partition from uboot, run below commands. (Don't forget to probe device before, e.g. sf probe 0 0 0) setenv mtdids "nor0=nor0" setenv mtdparts "mtdparts=nor0:16m(boot),112m(images)" ubi part images ubifsmount ubi0:images make sure we match "mtdparts" to whatever is given in dt w.r.t partition sizes. "mtdparts" command will list the mtd partitions in u-boot. Once ubifs is mounted, we can use "ubifsls" to list the files in that partition and use "ubifsload <addr> <filename>" to load files from ubifs partition to DDR. Reading information about mtd layout from DT is not supported. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/xilinx_versal_virt_defconfig | 4 ++++ configs/xilinx_zynqmp_virt_defconfig | 1 + 2 files changed, 5 insertions(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 4c463f48eed5..f9edc727176f 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -25,12 +25,15 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -64,6 +67,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_NATSEMI=y CONFIG_PHY_REALTEK=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index a0984c804534..00a53f36e47b 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -107,6 +107,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -- 2.28.0

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[PATCH] microblaze: Add support for little/big endian in/out api's
by Michal Simek 23 Sep '20

23 Sep '20

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Add read/write memory utilities for 16 and 32 bits. Add these api's for both little and big endian systems similar to arm architecture. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/microblaze/include/asm/io.h | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 8e6be0ae267f..632bb236fbbe 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h @@ -50,14 +50,24 @@ #define outw(x, addr) ((void)writew(x, addr)) #define outl(x, addr) ((void)writel(x, addr)) -/* Some #definitions to keep strange Xilinx code happy */ -#define in_8(addr) readb(addr) -#define in_be16(addr) readw(addr) -#define in_be32(addr) readl(addr) +#define out_arch(type, endian, addr, x) \ + __raw_write##type(cpu_to_##endian(x), addr) +#define in_arch(type, endian, addr) \ + endian##_to_cpu(__raw_read##type(addr)) + +#define out_le16(addr, x) out_arch(w, le16, addr, x) +#define out_le32(addr, x) out_arch(l, le32, addr, x) + +#define in_le16(addr) in_arch(w, le16, addr) +#define in_le32(addr) in_arch(l, le32, addr) + +#define in_8(addr) readb(addr) +#define in_be16(addr) in_arch(w, be16, addr) +#define in_be32(addr) in_arch(l, be32, addr) #define out_8(addr, x) outb(x, addr) -#define out_be16(addr, x) outw(x, addr) -#define out_be32(addr, x) outl(x, addr) +#define out_be16(addr, x) out_arch(w, be16, addr, x) +#define out_be32(addr, x) out_arch(l, be32, addr, x) #define inb_p(port) inb((port)) #define outb_p(val, port) outb((val), (port)) -- 2.28.0

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[PATCH] board: xilinx: Enable changing default DTB pick up address
by Michal Simek 23 Sep '20

23 Sep '20

U-Boot on xilinx boards is checking one address where DTB can be placed as the first location for DTB. Originally this code was developed for Versal where QEMU was putting generated DTB for U-Boot to use. The patch enables changing this address which is necessary for cases where default address is pointing to location (DDR) which is not present. The access to this location can cause exception. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig index 73fc1be0141e..c80d0a881284 100644 --- a/board/xilinx/Kconfig +++ b/board/xilinx/Kconfig @@ -41,7 +41,7 @@ config XILINX_PS_INIT_FILE endif config XILINX_OF_BOARD_DTB_ADDR - hex + hex "Default DTB pickup address" default 0x1000 if ARCH_VERSAL default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP depends on OF_BOARD || OF_SEPARATE -- 2.28.0

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[PATCH] xilinx: kconfig: Move sourcing of board Kconfig to mach folders
by Michal Simek 23 Sep '20

23 Sep '20

Do not source xilinx board Kconfig by other boards. These configs should be available only when Xilinx platforms are selected. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/Kconfig | 4 ---- arch/arm/mach-versal/Kconfig | 3 +++ arch/arm/mach-zynq/Kconfig | 3 +++ arch/arm/mach-zynqmp/Kconfig | 3 +++ 4 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 80702c23d345..df4bbd252aca 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1997,10 +1997,6 @@ source "board/tcl/sl50/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/variscite/dart_6ul/Kconfig" source "board/vscom/baltos/Kconfig" -source "board/xilinx/Kconfig" -source "board/xilinx/zynq/Kconfig" -source "board/xilinx/zynqmp/Kconfig" -source "board/xilinx/versal/Kconfig" source "board/phytium/durian/Kconfig" source "board/xen/xenguest_arm64/Kconfig" diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig index e1d66e8d32b7..ebd2da3887ec 100644 --- a/arch/arm/mach-versal/Kconfig +++ b/arch/arm/mach-versal/Kconfig @@ -62,4 +62,7 @@ config VERSAL_NO_DDR This option configures MMU with no DDR to avoid speculative access to DDR memory where DDR is not present. +source "board/xilinx/Kconfig" +source "board/xilinx/versal/Kconfig" + endif diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index 79f831e6df2c..e54310383b29 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -70,4 +70,7 @@ config BOOT_INIT_FILE config ZYNQ_SDHCI_MAX_FREQ default 52000000 +source "board/xilinx/Kconfig" +source "board/xilinx/zynq/Kconfig" + endif diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index d82a737a699e..f1301f6661a1 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -171,4 +171,7 @@ config SD1_LSHFT_MODE endchoice +source "board/xilinx/Kconfig" +source "board/xilinx/zynqmp/Kconfig" + endif -- 2.28.0

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[PATCH] xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
by Michal Simek 23 Sep '20

23 Sep '20

Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in PL and vice versa. That's why change dependencies and do not limit enabling just for some platforms. This is follow up patch based on commit 664e16ce99a0 ("xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers"). Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/serial/Kconfig | 4 ++-- drivers/spi/Kconfig | 3 --- drivers/usb/host/Kconfig | 3 +-- 3 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index e344677f91f6..b4805a2e4ea4 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -734,7 +734,7 @@ config UNIPHIER_SERIAL config XILINX_UARTLITE bool "Xilinx Uarlite support" - depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || 4xx) + depends on DM_SERIAL help If you have a Xilinx based board and want to use the uartlite serial ports, say Y to this option. If unsure, say N. @@ -802,7 +802,7 @@ config STM32_SERIAL config ZYNQ_SERIAL bool "Cadence (Xilinx Zynq) UART support" - depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_ZYNQMP_R5) + depends on DM_SERIAL help This driver supports the Cadence UART. It is found e.g. in Xilinx Zynq/ZynqMP. diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 3fc2d0674ae4..5df97c80fa51 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -407,7 +407,6 @@ config XILINX_SPI config ZYNQ_SPI bool "Zynq SPI driver" - depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL help Enable the Zynq SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Zynq @@ -415,7 +414,6 @@ config ZYNQ_SPI config ZYNQ_QSPI bool "Zynq QSPI driver" - depends on ARCH_ZYNQ imply SPI_FLASH_BAR help Enable the Zynq Quad-SPI (QSPI) driver. This driver can be @@ -425,7 +423,6 @@ config ZYNQ_QSPI config ZYNQMP_GQSPI bool "Configure ZynqMP Generic QSPI" - depends on ARCH_ZYNQMP || ARCH_VERSAL help This option is used to enable ZynqMP QSPI controller driver which is used to communicate with qspi flash devices. diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 1c374a7bd809..4eb7b34e245f 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -200,8 +200,7 @@ config USB_EHCI_TEGRA config USB_EHCI_ZYNQ bool "Support for Xilinx Zynq on-chip EHCI USB controller" - depends on ARCH_ZYNQ - default y + default y if ARCH_ZYNQ ---help--- Enable support for Zynq on-chip EHCI USB controller -- 2.28.0

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[PATCH] env: kconfig: Add default option for ARCH_ZYNQ
by Michal Simek 23 Sep '20

23 Sep '20

Zynq is similar to ZynqMP u-boot feature wise that's why also enable default option for ENV_FAT_DEVICE_AND_PART Kconfig entry. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- env/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/env/Kconfig b/env/Kconfig index b59ba310ec3d..f3a9925f58f4 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -422,7 +422,7 @@ config ENV_FAT_DEVICE_AND_PART string "Device and partition for where to store the environemt in FAT" depends on ENV_IS_IN_FAT default "0:1" if TI_COMMON_CMD_OPTIONS - default "0:auto" if ARCH_ZYNQMP + default "0:auto" if ARCH_ZYNQ || ARCH_ZYNQMP default "0:auto" if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1 default "1:auto" if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1 default "0" if ARCH_AT91 -- 2.28.0

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[PATCH] net: gem: Add support for more PHYs on MDIO bus
by Michal Simek 23 Sep '20

23 Sep '20

Find out MDIO bus and enable MDIO access to it if this is done via different GEM controller. Only works across GEM instances. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/net/zynq_gem.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index da4b6fba9ff6..8afec8bbfcff 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -758,6 +758,9 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, &phandle_args)) { + fdt_addr_t addr; + ofnode parent; + debug("phy-handle does exist %s\n", dev->name); priv->phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1); @@ -765,6 +768,13 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) priv->max_speed = ofnode_read_u32_default(phandle_args.node, "max-speed", SPEED_1000); + + parent = ofnode_get_parent(phandle_args.node); + addr = ofnode_get_addr(parent); + if (addr != FDT_ADDR_T_NONE) { + debug("MDIO bus not found %s\n", dev->name); + priv->mdiobase = (struct zynq_gem_regs *)addr; + } } phy_mode = dev_read_prop(dev, "phy-mode", NULL); -- 2.28.0

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