July 2020 - U-Boot

[U-Boot] Pull request: u-boot-riscv/master 20200724
by uboot＠andestech.com 24 Jul '20

24 Jul '20

Hi Tom, Please pull some riscv updates: - Fix SiFive HiFive Unleashed board booting failure problem. - Enable SiFive fu540 PWM driver. - Support SiFive fu540: SPI boot. - Update OpenSBI used for RISC-V CI testing. - Revert "riscv: Allow use of reset drivers". - Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"". - sysreset: syscon: - Don't assume default value for offset and mask property. - Support value property. - qemu: Add syscon reboot and poweroff support. - Fix SIFIVE debug serial dependency. - Fix linking error when building u-boot-spl with no SMP support. - AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg. - Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi - SiFive fu540 avoid using hardcoded ram base and size. Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/710968496 The following changes since commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7: Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm (2020-07-23 15:56:06 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to ecb70bdb9f12b694e3a50895a759119b3fc27507: ram: sifive: Avoid using hardcoded ram base and size (2020-07-24 14:56:29 +0800) ---------------------------------------------------------------- Bin Meng (9): riscv: Make SiFive HiFive Unleashed board boot again azure: gitlab: travis: Update OpenSBI used for RISC-V testing Revert "riscv: Allow use of reset drivers" Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"" sysreset: syscon: Don't assume default value for offset and mask property sysreset: syscon: Support value property riscv: qemu: Add syscon reboot and poweroff support riscv: dts: hifive-unleashed-a00: Make memory node available to SPL ram: sifive: Avoid using hardcoded ram base and size Jagan Teki (6): sifive: fu540: Add runtime boot mode detection sifive: fu540: Add Booting from SPI env: Enable SPI flash env for SiFive FU540 sifive: fu540: Mark the default env as SPI flash sifive: fu540: Add boot flash script offset, size sifive: fu540: Enable SF distro bootcmd Leo Yu-Chi Liang (1): riscv: Fix linking error when building u-boot-spl with no SMP support Michal Simek (1): serial: Fix SIFIVE debug serial dependency Pragnesh Patel (1): riscv: sifive: fu540: Enable SiFive PWM driver Rick Chen (1): riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg .azure-pipelines.yml | 8 ++++---- .gitlab-ci.yml | 8 ++++---- .travis.yml | 8 ++++---- arch/riscv/cpu/cpu.c | 2 +- arch/riscv/cpu/fu540/Kconfig | 13 +++++++++++++ arch/riscv/cpu/start.S | 2 ++ arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 16 ++++++++++++++++ arch/riscv/lib/reset.c | 2 -- arch/riscv/lib/sifive_clint.c | 16 ++++++++++++---- board/AndesTech/ax25-ae350/ax25-ae350.c | 3 ++- board/emulation/qemu-riscv/Kconfig | 4 ++++ board/sifive/fu540/Kconfig | 5 +++++ board/sifive/fu540/fu540.c | 25 +++++++++++++++++++------ common/spl/spl_opensbi.c | 5 ----- configs/sifive_fu540_defconfig | 4 ++++ doc/board/sifive/fu540.rst | 41 +++++++++++++++++++++++++++++++++++++++++ drivers/ram/sifive/fu540_ddr.c | 30 +++++++++++++++--------------- drivers/serial/Kconfig | 2 +- drivers/sysreset/sysreset_syscon.c | 28 +++++++++++++++++++++++++--- include/configs/sifive-fu540.h | 7 ++++++- 20 files changed, 178 insertions(+), 51 deletions(-)

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[PATCH 00/18] arm: mach-k3: Initial support for Texas Instrument's J7200 Platform
by Lokesh Vutla 24 Jul '20

24 Jul '20

This series adds initial support for latest new SoC, J7200, from Texas Instruments. The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Boot log: https://pastebin.ubuntu.com/p/2Q8B4QsgkC/ Dave Gerlach (1): arm: dts: k3-j7200: Add lpddr4 1600MTs configuration Faiz Abbas (1): mmc: am654_sdhci: Add support for J7200 devices Jean-Jacques Hiblot (1): arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled Lokesh Vutla (14): board: ti: board_detect: Add stub functions for EEPROM detection apis board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined arm: mach-k3: Move mmr_unlock to a common location arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image arm: mach-k3: j721e: Add detection for j721e arm: mach-k3: j721e: Fix unlocking control module registers arm: mach-k3: j7200: Add support for SOC detection arm: mach-k3: j7200: Add support for storing extended boot info from ROM arm: mach-k3: j7200: Detect if ROM has already loaded sysfw board: ti: j7200: Add board detection support for j7200 ram: k3-j721e: Relax version checks for memory controller arm: dts: k3-j7200: Add dts support configs: j7200_evm_r5: Add initial support configs: j7200_evm_a72: Add Initial support Suman Anna (1): board: ti: j721e: Update fdt fixup logic for interconnect nodes arch/arm/dts/Makefile | 4 +- .../k3-j7200-common-proc-board-u-boot.dtsi | 92 + arch/arm/dts/k3-j7200-common-proc-board.dts | 94 + arch/arm/dts/k3-j7200-ddr-evm-lp4-1600.dtsi | 2195 +++++++++++++++++ arch/arm/dts/k3-j7200-main.dtsi | 313 +++ arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 117 + .../arm/dts/k3-j7200-r5-common-proc-board.dts | 199 ++ arch/arm/dts/k3-j7200-som-p0.dtsi | 29 + arch/arm/dts/k3-j7200.dtsi | 175 ++ arch/arm/mach-k3/am6_init.c | 12 +- arch/arm/mach-k3/common.c | 38 + arch/arm/mach-k3/common.h | 4 + arch/arm/mach-k3/config.mk | 8 +- arch/arm/mach-k3/include/mach/hardware.h | 7 + .../arm/mach-k3/include/mach/j721e_hardware.h | 3 + arch/arm/mach-k3/include/mach/sys_proto.h | 3 + arch/arm/mach-k3/include/mach/sysfw-loader.h | 4 +- arch/arm/mach-k3/j721e_init.c | 30 +- arch/arm/mach-k3/sysfw-loader.c | 56 +- board/ti/common/board_detect.h | 13 + board/ti/j721e/evm.c | 25 +- configs/j7200_evm_a72_defconfig | 172 ++ configs/j7200_evm_r5_defconfig | 126 + drivers/mmc/am654_sdhci.c | 8 + drivers/ram/k3-j721e/lpddr4.c | 16 +- 25 files changed, 3674 insertions(+), 69 deletions(-) create mode 100644 arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j7200-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j7200-ddr-evm-lp4-1600.dtsi create mode 100644 arch/arm/dts/k3-j7200-main.dtsi create mode 100644 arch/arm/dts/k3-j7200-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j7200-r5-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j7200-som-p0.dtsi create mode 100644 arch/arm/dts/k3-j7200.dtsi create mode 100644 configs/j7200_evm_a72_defconfig create mode 100644 configs/j7200_evm_r5_defconfig -- 2.27.0

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[PATCH 1/2] xilinx: Align dfu ram with booti command
by Michal Simek 24 Jul '20

24 Jul '20

Image should be loaded to 0x80000 address and not to $kernel_addr_r. Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined that's why define it to be aligned with Versal. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/xilinx_versal.h | 2 +- include/configs/xilinx_zynqmp.h | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 804525dcad26..32cd5b21f7b7 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -54,7 +54,7 @@ #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "setenv dfu_alt_info " \ - "Image ram $kernel_addr_r $kernel_size_r\\\\;" \ + "Image ram 80000 $kernel_size_r\\\\;" \ "system.dtb ram $fdt_addr_r $fdt_size_r\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e7cfebee7c46..86f292761b38 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -58,8 +58,8 @@ #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "setenv dfu_alt_info " \ - "Image ram $kernel_addr $kernel_size\\\\;" \ - "system.dtb ram $fdt_addr $fdt_size\0" \ + "Image ram 80000 $kernel_size_r\\\\;" \ + "system.dtb ram $fdt_addr_r $fdt_size_r\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" @@ -101,8 +101,10 @@ #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_high=10000000\0" \ "fdt_addr_r=0x40000000\0" \ + "fdt_size_r=0x400000\0" \ "pxefile_addr_r=0x10000000\0" \ "kernel_addr_r=0x18000000\0" \ + "kernel_size_r=0x10000000\0" \ "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" \ -- 2.27.0

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[PATCH] arm64: zynqmp: Reduce malloc memory for mini QSPI configuration
by Michal Simek 24 Jul '20

24 Jul '20

From: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory for malloc may not be required. Reduce it by 1.5K. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/xilinx_zynqmp_mini_qspi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h index 129af6e93294..205ddb4ae097 100644 --- a/include/configs/xilinx_zynqmp_mini_qspi.h +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -13,6 +13,6 @@ #include <configs/xilinx_zynqmp_mini.h> #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) -#define CONFIG_SYS_MALLOC_LEN 0x2000 +#define CONFIG_SYS_MALLOC_LEN 0x1a00 #endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */ -- 2.27.0

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[PATCH v2 0/3] xilinx: Enable Versal allocation from low memory
by Michal Simek 24 Jul '20

24 Jul '20

Hi, Generated DTS files don't need to have memory nodes sorted out that's why it can happen that the first memory node is not pointing to lowest DDR which is normally used for system boot. That's why new function was introduced which finds out the lowest memory available and use it for u-boot and later can be also used for OS. The series is based on https://lists.denx.de/pipermail/u-boot/2020-July/419656.html which simplified conversion to livetree API which was asked by Simon. And also I keep conversion to livetree in separate patch on the top of v1 which shouldn't be a problem. The series is still missing tests which Simon asked for but I would like to get feedback about these patches. If they are fine I would like to have discussion how/where to write little test for it. Thanks, Michal Changes in v2: - Separate Xilinx change from generic patch - new patch asked by Simon - split from generic patch sent in v1 Michal Simek (3): lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() lib: fdt: Convert fdtdes_setup_mem..() to livetree API xilinx: versal: Use lowest memory for U-Boot board/xilinx/versal/board.c | 2 +- include/fdtdec.h | 17 +++++++ lib/fdtdec.c | 90 ++++++++++++++++++++++++++++--------- 3 files changed, 87 insertions(+), 22 deletions(-) -- 2.27.0

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[PATCH] versal: fix versal PM ret payload size
by Michal Simek 24 Jul '20

24 Jul '20

From: Ibai Erkiaga <ibai.erkiaga-elorza(a)xilinx.com> The PM return payload size is defined as 4 bytes for Versal arquitecture while the PM calls implemented both in the Versal clock driver and ZynqMP firmware driver expects 5 bytes length. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- --- arch/arm/mach-versal/include/mach/sys_proto.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index 31af049a21c9..cfd480bec17e 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -8,7 +8,7 @@ enum { TCM_SPLIT, }; -#define PAYLOAD_ARG_CNT 4U +#define PAYLOAD_ARG_CNT 5U void tcm_init(u8 mode); void mem_map_fill(void); -- 2.27.0

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[PATCH v2] xilinx: versal: Add new versal loadpdi command
by Michal Simek 24 Jul '20

24 Jul '20

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Versal loadpdi command is used for loading secure & non-secure pdi images. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v2: - Fix failures for versal mini configuration and create Kconfig entry for versal specific commands. Dependency to firmware should ensure that it is not enabled for mini configurations. arch/arm/Kconfig | 1 + board/xilinx/versal/Kconfig | 14 +++++ board/xilinx/versal/Makefile | 1 + board/xilinx/versal/cmds.c | 105 +++++++++++++++++++++++++++++++++++ 4 files changed, 121 insertions(+) create mode 100644 board/xilinx/versal/Kconfig create mode 100644 board/xilinx/versal/cmds.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 54d65f84889f..b1bd640b2d92 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1920,6 +1920,7 @@ source "board/vscom/baltos/Kconfig" source "board/xilinx/Kconfig" source "board/xilinx/zynq/Kconfig" source "board/xilinx/zynqmp/Kconfig" +source "board/xilinx/versal/Kconfig" source "board/phytium/durian/Kconfig" source "arch/arm/Kconfig.debug" diff --git a/board/xilinx/versal/Kconfig b/board/xilinx/versal/Kconfig new file mode 100644 index 000000000000..c0cccc2068b2 --- /dev/null +++ b/board/xilinx/versal/Kconfig @@ -0,0 +1,14 @@ +# Copyright (c) 2020, Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0 + +if ARCH_VERSAL + +config CMD_VERSAL + bool "Enable Versal specific commands" + default y + depends on ZYNQMP_FIRMWARE + help + Enable Versal specific commands. + +endif diff --git a/board/xilinx/versal/Makefile b/board/xilinx/versal/Makefile index e9307d7fa690..90e034315406 100644 --- a/board/xilinx/versal/Makefile +++ b/board/xilinx/versal/Makefile @@ -5,4 +5,5 @@ # obj-y := board.o +obj-$(CONFIG_CMD_VERSAL) += cmds.o obj-y += ../common/board.o diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c new file mode 100644 index 000000000000..981c80ee4742 --- /dev/null +++ b/board/xilinx/versal/cmds.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2020 Xilinx, Inc. + * Michal Simek <michal.simek(a)xilinx.com> + */ + +#include <cpu_func.h> +#include <command.h> +#include <common.h> +#include <log.h> +#include <memalign.h> +#include <versalpl.h> +#include <zynqmp_firmware.h> + +static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc, + char * const argv[]) +{ + u32 buf_lo, buf_hi; + u32 ret_payload[5]; + ulong addr, *pdi_buf; + size_t len; + int ret; + + if (argc != cmdtp->maxargs) { + debug("pdi_load: incorrect parameters passed\n"); + return CMD_RET_USAGE; + } + + addr = simple_strtol(argv[2], NULL, 16); + if (!addr) { + debug("pdi_load: zero pdi_data address\n"); + return CMD_RET_USAGE; + } + + len = simple_strtoul(argv[3], NULL, 16); + if (!len) { + debug("pdi_load: zero size\n"); + return CMD_RET_USAGE; + } + + pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN); + if ((ulong)addr != (ulong)pdi_buf) { + memcpy((void *)pdi_buf, (void *)addr, len); + debug("Pdi addr:0x%lx aligned to 0x%lx\n", + addr, (ulong)pdi_buf); + } + + flush_dcache_range((ulong)pdi_buf, (ulong)pdi_buf + len); + + buf_lo = lower_32_bits((ulong)pdi_buf); + buf_hi = upper_32_bits((ulong)pdi_buf); + + ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo, + buf_hi, 0, ret_payload); + if (ret) + printf("PDI load failed with err: 0x%08x\n", ret); + + return ret; +} + +static struct cmd_tbl cmd_versal_sub[] = { + U_BOOT_CMD_MKENT(loadpdi, 4, 1, do_versal_load_pdi, "", ""), +}; + +/** + * do_versal - Handle the "versal" command-line command + * @cmdtp: Command data struct pointer + * @flag: Command flag + * @argc: Command-line argument count + * @argv: Array of command-line arguments + * + * Processes the versal specific commands + * + * Return: return 0 on success, Error value if command fails. + * CMD_RET_USAGE incase of incorrect/missing parameters. + */ +static int do_versal(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct cmd_tbl *c; + int ret = CMD_RET_USAGE; + + if (argc < 2) + return CMD_RET_USAGE; + + c = find_cmd_tbl(argv[1], &cmd_versal_sub[0], + ARRAY_SIZE(cmd_versal_sub)); + if (c) + ret = c->cmd(c, flag, argc, argv); + + return cmd_process_error(c, ret); +} + +#ifdef CONFIG_SYS_LONGHELP +static char versal_help_text[] = + "loadpdi addr len - Load pdi image\n" + "load pdi image at ddr address 'addr' with pdi image size 'len'\n" +; +#endif + +U_BOOT_CMD(versal, 4, 1, do_versal, + "versal sub-system", + versal_help_text +) + -- 2.27.0

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[PATCH] arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
by Michal Simek 24 Jul '20

24 Jul '20

Origin function was calling strsep which replaced delimiter ',' by a null byte ('\0'). Operation was done directly on FDT which ends up with the following behavior: ZynqMP> printenv fdtfile fdtfile=xilinx/zynqmp.dtb ZynqMP> fdt addr $fdtcontroladdr ZynqMP> fdt print / compatible compatible = "xlnx", "zynqmp" As is visible fdtfile was correctly composed but a null byte caused that xlnx was separated from zynqmp. This hasn't been spotted because in all Xilinx DTs there are at least 3 compatible string and only the first one was affected by this issue. But for systems which only had one compatible string "xlnx,zynqmp" it was causing an issue when U-Boot's DT was used by Linux kernel. The patch removes strsep calling and strchr is called instead which just locate the first char after deliminator ',' (variable called "name"). And using this pointer in fdtfile composing. Fixes: 91d7e0c47f51 ("arm64: zynqmp: Create fdtfile from compatible string") Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/zynqmp/zynqmp.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index ebb71729081d..8a4df6fc1ab6 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -541,23 +541,30 @@ static int set_fdtfile(void) char *compatible, *fdtfile; const char *suffix = ".dtb"; const char *vendor = "xilinx/"; + int fdt_compat_len; if (env_get("fdtfile")) return 0; - compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", NULL); - if (compatible) { + compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", + &fdt_compat_len); + if (compatible && fdt_compat_len) { + char *name; + debug("Compatible: %s\n", compatible); - /* Discard vendor prefix */ - strsep(&compatible, ","); + name = strchr(compatible, ','); + if (!name) + return -EINVAL; + + name++; - fdtfile = calloc(1, strlen(vendor) + strlen(compatible) + + fdtfile = calloc(1, strlen(vendor) + strlen(name) + strlen(suffix) + 1); if (!fdtfile) return -ENOMEM; - sprintf(fdtfile, "%s%s%s", vendor, compatible, suffix); + sprintf(fdtfile, "%s%s%s", vendor, name, suffix); env_set("fdtfile", fdtfile); free(fdtfile); -- 2.27.0

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[PATCH] xilinx: Setup bootm variables
by Michal Simek 24 Jul '20

24 Jul '20

On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/common/board.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 0469e2e7ac9b..3bca3a25a97b 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -86,5 +86,8 @@ int board_late_init_xilinx(void) initrd_hi = round_down(initrd_hi, SZ_16M); env_set_addr("initrd_high", (void *)initrd_hi); + env_set_addr("bootm_low", (void *)gd->ram_base); + env_set_addr("bootm_size", (void *)gd->ram_size); + return 0; } -- 2.27.0

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RE: [PATCH 3/4] clk: add clock driver for SCMI agents
by Peng Fan 24 Jul '20

24 Jul '20

> Subject: [PATCH 3/4] clk: add clock driver for SCMI agents > > This change introduces a clock driver for SCMI agent devices. When SCMI > agent and SCMI clock drivers are enabled, SCMI agent binds a clock device for > each SCMI clock protocol devices enabled in the FDT. > > SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled, > CONFIG_SCMI_AGENT is also enabled. > > SCMI Clock protocol is defined in the SCMI specification [1]. > > Links: [1] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdevelo > per.arm.com%2Farchitectures%2Fsystem-architectures%2Fsoftware-standar > ds%2Fscmi&data=02%7C01%7Cpeng.fan%40nxp.com%7C6a1c6d1e102 > 94e81e47708d82a6777b9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0% > 7C0%7C637305971176347870&sdata=4pKZGL17y7QUY%2Bi9XRutLOCe > 5jBs1y9gMW7vNoUIcC0%3D&reserved=0 > Signed-off-by: Etienne Carriere <etienne.carriere(a)linaro.org> > --- > > drivers/clk/Kconfig | 8 +++ > drivers/clk/Makefile | 1 + > drivers/clk/clk_scmi.c | 152 > ++++++++++++++++++++++++++++++++++++++++ > drivers/firmware/scmi.c | 3 + > 4 files changed, 164 insertions(+) > create mode 100644 drivers/clk/clk_scmi.c > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index > 82cb1874e19..234d6035202 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -152,6 +152,14 @@ config CLK_CDCE9XX > Enable the clock synthesizer driver for CDCE913/925/937/949 > series of chips. > > +config CLK_SCMI > + bool "Enable SCMI clock driver" > + select SCMI_FIRMWARE > + help > + Enable this option if you want to support clock devices exposed > + by a SCMI agent based on SCMI clock protocol communication > + with a SCMI server. > + > source "drivers/clk/analogbits/Kconfig" > source "drivers/clk/at91/Kconfig" > source "drivers/clk/exynos/Kconfig" > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index > d9119545810..76bba77d1f0 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -31,6 +31,7 @@ obj-$(CONFIG_CLK_K210) += kendryte/ > obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o > obj-$(CONFIG_CLK_OWL) += owl/ > obj-$(CONFIG_CLK_RENESAS) += renesas/ > +obj-$(CONFIG_CLK_SCMI) += clk_scmi.o > obj-$(CONFIG_CLK_SIFIVE) += sifive/ > obj-$(CONFIG_ARCH_SUNXI) += sunxi/ > obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o diff --git > a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c new file mode 100644 index > 00000000000..efe64a6a38f > --- /dev/null > +++ b/drivers/clk/clk_scmi.c > @@ -0,0 +1,152 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2019-2020 Linaro Limited */ #include <common.h> > +#include <clk-uclass.h> #include <dm.h> #include <scmi.h> #include > +<asm/types.h> > + > +enum scmi_clock_message_id { > + SCMI_CLOCK_RATE_SET = 0x5, > + SCMI_CLOCK_RATE_GET = 0x6, > + SCMI_CLOCK_CONFIG_SET = 0x7, > +}; > + > +#define SCMI_CLK_RATE_ASYNC_NOTIFY BIT(0) > +#define SCMI_CLK_RATE_ASYNC_NORESP (BIT(0) | BIT(1)) > +#define SCMI_CLK_RATE_ROUND_DOWN 0 > +#define SCMI_CLK_RATE_ROUND_UP BIT(2) > +#define SCMI_CLK_RATE_ROUND_CLOSEST BIT(3) > + > +struct scmi_clk_state_in { > + u32 clock_id; > + u32 attributes; > +}; > + > +struct scmi_clk_state_out { > + s32 status; > +}; > + > +static int scmi_clk_gate(struct clk *clk, int enable) { > + struct scmi_clk_state_in in = { > + .clock_id = clk->id, > + .attributes = enable, > + }; > + struct scmi_clk_state_out out; > + struct scmi_msg scmi_msg = { > + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, > + .message_id = SCMI_CLOCK_CONFIG_SET, > + .in_msg = (u8 *)&in, > + .in_msg_sz = sizeof(in), > + .out_msg = (u8 *)&out, > + .out_msg_sz = sizeof(out), > + }; > + int rc; > + > + rc = scmi_send_and_process_msg(clk->dev->parent, &scmi_msg); > + if (rc) > + return rc; > + > + return scmi_to_linux_errno(out.status); } > + > +static int scmi_clk_enable(struct clk *clk) { > + return scmi_clk_gate(clk, 1); > +} > + > +static int scmi_clk_disable(struct clk *clk) { > + return scmi_clk_gate(clk, 0); > +} > + > +struct scmi_clk_rate_get_in { > + u32 clock_id; > +}; > + > +struct scmi_clk_rate_get_out { > + s32 status; > + u32 rate_lsb; > + u32 rate_msb; > +}; > + > +static ulong scmi_clk_get_rate(struct clk *clk) { > + struct scmi_clk_rate_get_in in = { > + .clock_id = clk->id, > + }; > + struct scmi_clk_rate_get_out out; > + struct scmi_msg scmi_msg = { > + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, > + .message_id = SCMI_CLOCK_RATE_GET, > + .in_msg = (u8 *)&in, > + .in_msg_sz = sizeof(in), > + .out_msg = (u8 *)&out, > + .out_msg_sz = sizeof(out), > + }; > + int rc; > + > + rc = scmi_send_and_process_msg(clk->dev->parent, &scmi_msg); > + if (rc) > + return 0; > + > + rc = scmi_to_linux_errno(out.status); > + if (rc) > + return 0; > + > + return (ulong)(((u64)out.rate_msb << 32) | out.rate_lsb); } > + > +struct scmi_clk_rate_set_in { > + u32 clock_id; > + u32 flags; > + u32 rate_lsb; > + u32 rate_msb; > +}; > + > +struct scmi_clk_rate_set_out { > + s32 status; > +}; > + > +static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) { > + struct scmi_clk_rate_set_in in = { > + .clock_id = clk->id, > + .flags = SCMI_CLK_RATE_ASYNC_NORESP | This will use async, but how if sync? Thanks, Peng. > + SCMI_CLK_RATE_ROUND_CLOSEST, > + .rate_lsb = (u32)rate, > + .rate_msb = (u32)((u64)rate >> 32), > + }; > + struct scmi_clk_rate_set_out out; > + struct scmi_msg scmi_msg = { > + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, > + .message_id = SCMI_CLOCK_RATE_SET, > + .in_msg = (u8 *)&in, > + .in_msg_sz = sizeof(in), > + .out_msg = (u8 *)&out, > + .out_msg_sz = sizeof(out), > + }; > + int rc; > + > + rc = scmi_send_and_process_msg(clk->dev->parent, &scmi_msg); > + if (rc) > + return 0; > + > + return scmi_to_linux_errno(out.status); } > + > +static const struct clk_ops scmi_clk_ops = { > + .enable = scmi_clk_enable, > + .disable = scmi_clk_disable, > + .get_rate = scmi_clk_get_rate, > + .set_rate = scmi_clk_set_rate, > +}; > + > +U_BOOT_DRIVER(scmi_clock) = { > + .name = "scmi_clk", > + .id = UCLASS_CLK, > + .ops = &scmi_clk_ops, > +}; > diff --git a/drivers/firmware/scmi.c b/drivers/firmware/scmi.c index > fa8a91c3f3d..9f06718df51 100644 > --- a/drivers/firmware/scmi.c > +++ b/drivers/firmware/scmi.c > @@ -399,6 +399,9 @@ static int scmi_bind(struct udevice *dev) > continue; > > switch (protocol_id) { > + case SCMI_PROTOCOL_ID_CLOCK: > + drv = DM_GET_DRIVER(scmi_clock); > + break; > default: > dev_info(dev, "Ignore unsupported SCMI protocol %u\n", > protocol_id); > -- > 2.17.1

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