June 2020 - U-Boot

[PATCH] misc: scu: Remove child dev bind
by Ye Li 16 Jul '20

16 Jul '20

Remove the child device binding codes for clk and iomux nodes, because the misc uclass has added such operation in post-bind. If we keep the codes in scu bind, child devices will be created twices. Find the problem by "dm uclass" command. uclass 24: clk 0 * clk @ fce22380, seq 0, (req -1) 1 clk @ fce23110 uclass 67: pinctrl 0 * iomuxc @ fce22470, seq 0, (req -1) 1 iomuxc @ fce231c0 After the fix: uclass 24: clk 0 * clk @ fce22380, seq 0, (req -1) uclass 67: pinctrl 0 * iomuxc @ fce22470, seq 0, (req -1) Signed-off-by: Ye Li <ye.li(a)nxp.com> Reviewed-by: Peng Fan <peng.fan(a)nxp.com> --- drivers/misc/imx8/scu.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/misc/imx8/scu.c b/drivers/misc/imx8/scu.c index ee635eb..cdf3052 100644 --- a/drivers/misc/imx8/scu.c +++ b/drivers/misc/imx8/scu.c @@ -212,18 +212,6 @@ static int imx8_scu_remove(struct udevice *dev) static int imx8_scu_bind(struct udevice *dev) { - int ret; - struct udevice *child; - ofnode node; - - debug("%s(dev=%p)\n", __func__, dev); - ofnode_for_each_subnode(node, dev_ofnode(dev)) { - ret = lists_bind_fdt(dev, node, &child, true); - if (ret) - return ret; - debug("bind child dev %s\n", child->name); - } - return 0; } -- 2.7.4

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[PATCH] pico-imx6ul: Fix Quick Start Guide URL
by Fabio Estevam 16 Jul '20

16 Jul '20

The current URL for the pico imx6ul board is not valid anymore. Change to a different URL that works. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- board/technexion/pico-imx6ul/README | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/technexion/pico-imx6ul/README b/board/technexion/pico-imx6ul/README index 40d4344142..e58640c55e 100644 --- a/board/technexion/pico-imx6ul/README +++ b/board/technexion/pico-imx6ul/README @@ -22,8 +22,8 @@ If the eMMC has already a U-Boot flashed with DFU support then the user can go to step 2 below in order to update U-Boot. Put pico board in USB download mode (refer to the document -http://www.wandboard.org/images/hobbit/hobbitboard-imx6ul-reva1.pdf -page 15). +https://www.nxp.com/files-static/32bit/doc/quick_start_guide/PICO-IMX6UL-QSG.pdf +Figure 6a at page 7). Connect a USB to serial adapter between the host PC and pico. -- 2.17.1

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[PATCH v2 1/1] power: pmic_pca9450: fix PCA9450A I2C address
by Sébastien Szymanski 16 Jul '20

16 Jul '20

Quoting Ye Li from NXP: "We have confirmed with PMIC team, 0x35 is used only on early chips and not used any more. 0x25 is the final address." Fix it by merging power_pca9450a_init and power_pca9450b_init into one function power_pca9450_init. Signed-off-by: Sébastien Szymanski <sebastien.szymanski(a)armadeus.com> --- Changes for v2: * Quoting Ye Li * Merge both function into one as suggested by Ye Li board/freescale/imx8mp_evk/spl.c | 2 +- drivers/power/pmic/pmic_pca9450.c | 21 +-------------------- include/power/pca9450.h | 3 +-- 3 files changed, 3 insertions(+), 23 deletions(-) diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 3b3a854e29..3214718e62 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -68,7 +68,7 @@ int power_init_board(void) struct pmic *p; int ret; - ret = power_pca9450b_init(I2C_PMIC); + ret = power_pca9450_init(I2C_PMIC); if (ret) printf("power init failed"); p = pmic_get("PCA9450"); diff --git a/drivers/power/pmic/pmic_pca9450.c b/drivers/power/pmic/pmic_pca9450.c index 67a9090200..d4f27428bd 100644 --- a/drivers/power/pmic/pmic_pca9450.c +++ b/drivers/power/pmic/pmic_pca9450.c @@ -11,26 +11,7 @@ static const char pca9450_name[] = "PCA9450"; -int power_pca9450a_init(unsigned char bus) -{ - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - p->name = pca9450_name; - p->interface = PMIC_I2C; - p->number_of_regs = PCA9450_REG_NUM; - p->hw.i2c.addr = 0x35; - p->hw.i2c.tx_num = 1; - p->bus = bus; - - return 0; -} - -int power_pca9450b_init(unsigned char bus) +int power_pca9450_init(unsigned char bus) { struct pmic *p = pmic_alloc(); diff --git a/include/power/pca9450.h b/include/power/pca9450.h index 5d4f58ca44..5a9a697d62 100644 --- a/include/power/pca9450.h +++ b/include/power/pca9450.h @@ -54,7 +54,6 @@ enum { PCA9450_REG_NUM, }; -int power_pca9450a_init(unsigned char bus); -int power_pca9450b_init(unsigned char bus); +int power_pca9450_init(unsigned char bus); #endif -- 2.26.2

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[PATCH for v2020.10 1/1] cmd: drop fitupd command
by Heinrich Schuchardt 16 Jul '20

16 Jul '20

The `fitupd' command is not used by any board. The `dfu tftp' command provides the same capabilities. So let's drop the `fitupd' command. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- cmd/Kconfig | 7 ------- cmd/Makefile | 1 - cmd/fitupd.c | 30 ------------------------------ doc/README.dfutftp | 2 -- doc/README.update | 5 ----- 5 files changed, 45 deletions(-) delete mode 100644 cmd/fitupd.c diff --git a/cmd/Kconfig b/cmd/Kconfig index 192b3b262f..8c0204c32c 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -489,13 +489,6 @@ config CMD_SPL_WRITE_SIZE flash used by Falcon-mode boot. See the documentation until CMD_SPL for detail. -config CMD_FITUPD - bool "fitImage update command" - depends on UPDATE_TFTP - help - Implements the 'fitupd' command, which allows to automatically - store software updates present on a TFTP server in NOR Flash - config CMD_THOR_DOWNLOAD bool "thor - TIZEN 'thor' download" select DFU diff --git a/cmd/Makefile b/cmd/Makefile index 974ad48b0a..dd7a00482b 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -61,7 +61,6 @@ obj-$(CONFIG_CMD_EXT4) += ext4.o obj-$(CONFIG_CMD_EXT2) += ext2.o obj-$(CONFIG_CMD_FAT) += fat.o obj-$(CONFIG_CMD_FDT) += fdt.o -obj-$(CONFIG_CMD_FITUPD) += fitupd.o obj-$(CONFIG_CMD_FLASH) += flash.o obj-$(CONFIG_CMD_FPGA) += fpga.o obj-$(CONFIG_CMD_FPGAD) += fpgad.o diff --git a/cmd/fitupd.c b/cmd/fitupd.c deleted file mode 100644 index 0f490c58fc..0000000000 --- a/cmd/fitupd.c +++ /dev/null @@ -1,30 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2011 - * Andreas Pretzsch, carpe noctem engineering, apr(a)cn-eng.de - */ - -#include <common.h> -#include <command.h> -#include <net.h> - -static int do_fitupd(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - ulong addr = 0UL; - - if (argc > 2) - return CMD_RET_USAGE; - - if (argc == 2) - addr = simple_strtoul(argv[1], NULL, 16); - - return update_tftp(addr, NULL, NULL); -} - -U_BOOT_CMD(fitupd, 2, 0, do_fitupd, - "update from FIT image", - "[addr]\n" - "\t- run update from FIT image at addr\n" - "\t or from tftp 'updatefile'" -); diff --git a/doc/README.dfutftp b/doc/README.dfutftp index 127d2d6abc..a3341bbb61 100644 --- a/doc/README.dfutftp +++ b/doc/README.dfutftp @@ -42,8 +42,6 @@ for USB based DFU (CONFIG_DFU_*) and DFU TFTP update The "dfu" command has been extended to support transfer via TFTP - one needs to type for example "dfu tftp 0 mmc 0" -This feature does not depend on "fitupd" command enabled. - As of this writing (SHA1:8d77576371381ade83de475bb639949b44941e8c v2015.10-rc2) the update.c code is not enabled (CONFIG_UPDATE_TFTP) by any board in the contemporary u-boot tree. diff --git a/doc/README.update b/doc/README.update index d37f2c4d4a..bf4379279e 100644 --- a/doc/README.update +++ b/doc/README.update @@ -51,11 +51,6 @@ the mkimage tool. dtc tool with support for binary includes, e.g. in version to be prepared. Refer to the doc/uImage.FIT/ directory for more details on FIT images. -This mechanism can be also triggered by the command "fitupd". -If an optional, non-zero address is provided as argument, the TFTP transfer -is skipped and the image at this address is used. -The fitupd command is enabled by CONFIG_CMD_FITUPD. - Example .its files ------------------ -- 2.27.0

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[PATCH v2 0/5] mips: Improve initial Octeon MIPS64 support
by Stefan Roese 16 Jul '20

16 Jul '20

This patchset improves the Octeon base support by adding a very early copy of the U-Boot image from bootspace (e.g. parallel NOR CFI flash) to the L2 cache and continue execution there. This is done by introducing the optional hook mips_mach_early_init() to start.S for very early machine specific code. This code can be selected via the new Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT. Additionally, the common invalidate_dcache_range() implementation is also changed to a weak function allowing Octeon to adds its own no-op cache function (Octeon is cache coherent). This patchset is based on the base Octeon patchsert in v4. Thanks, Stefan Changes in v2: - Change mips_mach_early_init() as suggested by Daniel to make it easier to understand and smaller - Drop CONFIG_BOARD_SIZE_LIMIT Stefan Roese (5): mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code mips: octeon: use mips_mach_early_init() to copy to L2 cache mips: octeon: octeon_ebb7304: Change TEXT_BASE to L2 cache mips: cache: Make invalidate_dcache_range() weak to enable overwrite mips: octeon: Add empty invalidate_dcache_range() arch/mips/Kconfig | 10 ++++++ arch/mips/cpu/start.S | 5 +++ arch/mips/lib/cache.c | 2 +- arch/mips/mach-octeon/cache.c | 4 +++ arch/mips/mach-octeon/lowlevel_init.S | 50 +++++++++++++++++++++++++++ configs/octeon_ebb7304_defconfig | 3 +- 6 files changed, 72 insertions(+), 2 deletions(-) -- 2.27.0

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[PATCHv2 00/13] powerpc: covert p1010, p1020 and p2020 RDB board to DM_ETH
by Zhiqiang Hou 16 Jul '20

16 Jul '20

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> Rebased this series on the top of master branch of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx.git This patch set depends on: https://patchwork.ozlabs.org/project/uboot/list/?series=174343 Hou Zhiqiang (13): net: fsl_pq_mdio: Add the compatible "fsl,gianfar-mdio" support net: tsec: Add the compatible string "gianfar" support powerpc: mpc8xxx: Don't compile cpu_eth_init() when DM_ETH enabled fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r() configs: p1_p2_rdb: Add the default address of vsc7385 firmware dts: powerpc: p1020rdb: Add eTSEC DT nodes powerpc: p1_p2_rdb: Don't compile board_eth_init() when DM_ETH enabled configs: P1020RDB: Enable DM_ETH config dts: powerpc: p1010rdb: Add eTSEC DT nodes powerpc: p1010rdb: Compile legacy ethernet init function when no DM_ETH configs: P1010RDB: Enable DM_ETH config dts: powerpc: p2020rdb: Add eTSEC DT nodes configs: P2020RDB: Enable DM_ETH config arch/powerpc/cpu/mpc8xxx/cpu.c | 2 + arch/powerpc/dts/p1010rdb-pa.dts | 1 + arch/powerpc/dts/p1010rdb-pa_36b.dts | 1 + arch/powerpc/dts/p1010rdb.dtsi | 62 +++++++++++++++++++ arch/powerpc/dts/p1010si-post.dtsi | 25 ++++++++ arch/powerpc/dts/p1020-post.dtsi | 16 +++++ arch/powerpc/dts/p1020rdb-pc.dts | 1 + arch/powerpc/dts/p1020rdb-pc.dtsi | 55 ++++++++++++++++ arch/powerpc/dts/p1020rdb-pc_36b.dts | 1 + arch/powerpc/dts/p1020rdb-pd.dts | 57 +++++++++++++++++ arch/powerpc/dts/p2020-post.dtsi | 10 +++ arch/powerpc/dts/p2020rdb-pc.dts | 1 + arch/powerpc/dts/p2020rdb-pc.dtsi | 59 ++++++++++++++++++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 1 + arch/powerpc/dts/pq3-etsec1-0.dtsi | 28 +++++++++ arch/powerpc/dts/pq3-etsec1-1.dtsi | 28 +++++++++ arch/powerpc/dts/pq3-etsec1-2.dtsi | 28 +++++++++ arch/powerpc/dts/pq3-etsec1-3.dtsi | 28 +++++++++ arch/powerpc/dts/pq3-etsec1-timer-0.dtsi | 13 ++++ arch/powerpc/dts/pq3-etsec2-0.dtsi | 35 +++++++++++ arch/powerpc/dts/pq3-etsec2-1.dtsi | 35 +++++++++++ arch/powerpc/dts/pq3-etsec2-2.dtsi | 35 +++++++++++ arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi | 16 +++++ arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi | 16 +++++ arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi | 16 +++++ board/freescale/p1010rdb/p1010rdb.c | 2 + board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 37 ++++++----- configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 + configs/P1010RDB-PA_NAND_defconfig | 2 + configs/P1010RDB-PA_NOR_defconfig | 2 + configs/P1010RDB-PA_SDCARD_defconfig | 2 + configs/P1010RDB-PA_SPIFLASH_defconfig | 2 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 + configs/P1010RDB-PB_NAND_defconfig | 2 + configs/P1010RDB-PB_NOR_defconfig | 2 + configs/P1010RDB-PB_SDCARD_defconfig | 2 + configs/P1010RDB-PB_SPIFLASH_defconfig | 2 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 3 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 3 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 3 + configs/P1020RDB-PC_36BIT_defconfig | 3 + configs/P1020RDB-PC_NAND_defconfig | 3 + configs/P1020RDB-PC_SDCARD_defconfig | 3 + configs/P1020RDB-PC_SPIFLASH_defconfig | 3 + configs/P1020RDB-PC_defconfig | 3 + configs/P1020RDB-PD_NAND_defconfig | 3 + configs/P1020RDB-PD_SDCARD_defconfig | 3 + configs/P1020RDB-PD_SPIFLASH_defconfig | 3 + configs/P1020RDB-PD_defconfig | 3 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 3 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 3 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 + configs/P2020RDB-PC_36BIT_defconfig | 3 + configs/P2020RDB-PC_NAND_defconfig | 3 + configs/P2020RDB-PC_SDCARD_defconfig | 3 + configs/P2020RDB-PC_SPIFLASH_defconfig | 3 + configs/P2020RDB-PC_defconfig | 3 + doc/device-tree-bindings/net/fsl-tsec-phy.txt | 5 +- drivers/net/fsl_mdio.c | 15 ++++- drivers/net/tsec.c | 16 ++++- include/configs/p1_p2_rdb_pc.h | 2 + include/fsl_mdio.h | 4 ++ include/tsec.h | 4 ++ 69 files changed, 724 insertions(+), 23 deletions(-) create mode 100644 arch/powerpc/dts/p1020rdb-pc.dtsi create mode 100644 arch/powerpc/dts/p2020rdb-pc.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-1.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-2.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-3.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-timer-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-1.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-2.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi -- 2.25.1

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[RFC PATCH 0/3] DM_MDIO for fsl_tsec driver
by Vladimir Oltean 15 Jul '20

15 Jul '20

From: Vladimir Oltean <vladimir.oltean(a)nxp.com> This series converts the MDIO handling portion of the DM_ETH variant of the tsec driver (currently in use only on LS1021A-TSN and LS1021A-TWR) to use DM_MDIO. The other (non-DM_ETH) users of tsec are left alone. Posted as RFC since it depends on Zhiqiang's series "[PATCHv2,0/3] net: tsec: Fix issues of DM driver": https://patchwork.ozlabs.org/project/uboot/cover/20200503144843.36949-1-Zhi… Vladimir Oltean (3): phy: make phy_connect_fixed work with a null mdio bus configs: enable DM_MDIO for LS1021A-TWR and LS1021A-TSN net: tsec: convert fsl_pq_mdio to DM_MDIO configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + drivers/net/fsl_mdio.c | 66 +++++++++++++++++-- drivers/net/phy/phy.c | 4 +- drivers/net/tsec.c | 50 +++++--------- include/fsl_mdio.h | 4 +- 13 files changed, 89 insertions(+), 44 deletions(-) -- 2.17.1

4 8

[PATCH] ARM: da850-evm: Unify config options with Kconfig
by Adam Ford 14 Jul '20

14 Jul '20

There are two options that are currently whitelisted, but they are redundant, because there are not necessary since Kconfig options exist to basically state the same thing. CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and only used by the da850 when booting from NOR, however the only time CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since NOR doesn't need SPL, the options for SPL can be moved to a check for building SPL instead of checking for NOR. This patch removes the checks for these two config options and unifies the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH. Since this board is the only board that uses these two config options, they can be removed from the whitelist table. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a3b0f8bf09..c91aeb8dbf 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -205,7 +205,7 @@ int misc_init_r(void) } static const struct pinmux_config gpio_pins[] = { -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH /* GP0[11] is required for NOR to work on Rev 3 EVMs */ { pinmux(0), 8, 4 }, /* GP0[11] */ #endif @@ -235,7 +235,7 @@ const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(emifa_pins_cs3), PINMUX_ITEM(emifa_pins_cs4), PINMUX_ITEM(emifa_pins_nand), -#elif defined(CONFIG_USE_NOR) +#elif defined(CONFIG_MTD_NOR_FLASH) PINMUX_ITEM(emifa_pins_cs2), PINMUX_ITEM(emifa_pins_nor), #endif @@ -341,7 +341,7 @@ int board_init(void) DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc); -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH /* Set the GPIO direction as output */ clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index ab86108d66..b46ab3c2cf 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 4d651264dd..c825a0440b 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -13,10 +13,6 @@ /* * Board */ -/* check if direct NOR boot config is used */ -#ifndef CONFIG_DIRECT_NOR_BOOT -#define CONFIG_USE_SPIFLASH -#endif /* * SoC Configuration @@ -28,7 +24,7 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) #endif @@ -107,10 +103,6 @@ #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#endif - /* * I2C Configuration */ @@ -171,7 +163,7 @@ #define CONFIG_NET_RETRY_COUNT 10 #endif -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE @@ -224,16 +216,11 @@ #define CONFIG_CLOCKS #endif -#if !defined(CONFIG_MTD_RAW_NAND) && \ - !defined(CONFIG_USE_NOR) && \ - !defined(CONFIG_USE_SPIFLASH) -#endif - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#ifndef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_SPL_BUILD /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) @@ -248,12 +235,12 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 #else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) -#endif /* CONFIG_DIRECT_NOR_BOOT */ +#endif /* CONFIG_MTD_NOR_FLASH */ #include <asm/arch/hardware.h> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 916768f361..770bcaf223 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -313,7 +313,6 @@ CONFIG_DFU_ENV_SETTINGS CONFIG_DHCP_MIN_EXT_LEN CONFIG_DIALOG_POWER CONFIG_DIMM_SLOTS_PER_CTLR -CONFIG_DIRECT_NOR_BOOT CONFIG_DISCONTIGMEM CONFIG_DISCOVER_PHY CONFIG_DISPLAY_AER_xxxx @@ -4161,7 +4160,6 @@ CONFIG_USB_XHCI_EXYNOS CONFIG_USB_XHCI_OMAP CONFIG_USER_LOWLEVEL_INIT CONFIG_USE_INTERRUPT -CONFIG_USE_NOR CONFIG_USE_ONENAND_BOARD_INIT CONFIG_USE_SPIFLASH CONFIG_UTBIPAR_INIT_TBIPA -- 2.25.1

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[PATCH v4 0/5] roc-rk3399-pc: Custom SPL init
by Jagan Teki 13 Jul '20

13 Jul '20

This series supports custom initialization code required for roc-rk3399-pc board on SPL stage. Here is the previous v3 this series[1]. Now this series is well mature code handling to add custom spl_board_init code parts. roc-rk3399-pc would require custom leds initialization based on user intervention of the power key. This code handles the user intervention via SPI environment variable. If someone or production systems wants this feature then 'pwr_key' has to be set otherwise it is normal like other rk3399 boards in Mainline. Changes for v4: - enable SPL_BOARD_INIT in all platforms Changes for v3: - support leds on SPL - support env 'pwr_key' [1] https://patchwork.ozlabs.org/project/uboot/cover/20200608183144.26809-1-jag… Any inputs? Jagan. Jagan Teki (5): rockchip: spl: Add spl_board_init rk3399: spl: Print SPL banner after relocation roc-rk3399-pc: Move leds setup in SPL rockchip: Separate the reset cause from display cpuinfo roc-rk3399-pc: Set LED only during POR and pwr_key=y arch/arm/Kconfig | 1 + arch/arm/include/asm/arch-rockchip/cru.h | 2 + arch/arm/mach-rockchip/Kconfig | 2 - arch/arm/mach-rockchip/Makefile | 5 +- arch/arm/mach-rockchip/cpu-info.c | 20 +++--- arch/arm/mach-rockchip/rk3188/rk3188.c | 2 +- arch/arm/mach-rockchip/rk3399/rk3399.c | 57 ----------------- arch/arm/mach-rockchip/spl.c | 11 ++++ arch/arm/mach-rockchip/tpl.c | 7 --- board/firefly/firefly-rk3288/firefly-rk3288.c | 2 +- board/firefly/roc-pc-rk3399/Makefile | 4 ++ board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 21 ------- board/firefly/roc-pc-rk3399/spl.c | 56 +++++++++++++++++ board/phytec/phycore_rk3288/phycore-rk3288.c | 2 +- .../puma_rk3399/puma-rk3399.c | 61 +++++++++++++++++++ configs/roc-pc-mezzanine-rk3399_defconfig | 6 +- configs/roc-pc-rk3399_defconfig | 6 +- 17 files changed, 162 insertions(+), 103 deletions(-) create mode 100644 board/firefly/roc-pc-rk3399/spl.c -- 2.25.1

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[PATCH 1/2] spi: make spi-mem driver usable without CONFIG_DM_SPI, drop NODM variant
by Mikhail Kshevetskiy 11 Jul '20

11 Jul '20

From: Ivan Morozko <Ivan.Morozko(a)oktetlabs.ru> There is no reason to have a separate and highly restricted version of spi-mem driver for NODM case, it's quite easily fix DM based driver version and use it for all cases. Signed-off-by: Ivan Morozko <Ivan.Morozko(a)oktetlabs.ru> Reviewed-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)oktetlabs.ru> --- drivers/spi/Makefile | 3 +- drivers/spi/spi-mem-nodm.c | 107 ------------------------------------- drivers/spi/spi-mem.c | 37 ++++++++----- include/spi.h | 1 + 4 files changed, 26 insertions(+), 122 deletions(-) delete mode 100644 drivers/spi/spi-mem-nodm.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 54881a7412..6dff4eed83 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -8,12 +8,11 @@ ifdef CONFIG_DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o -obj-$(CONFIG_SPI_MEM) += spi-mem.o obj-$(CONFIG_TI_QSPI) += ti_qspi.o else obj-y += spi.o -obj-$(CONFIG_SPI_MEM) += spi-mem-nodm.o endif +obj-$(CONFIG_SPI_MEM) += spi-mem.o obj-$(CONFIG_ALTERA_SPI) += altera_spi.o obj-$(CONFIG_ATH79_SPI) += ath79_spi.o diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c deleted file mode 100644 index 765f05fe54..0000000000 --- a/drivers/spi/spi-mem-nodm.c +++ /dev/null @@ -1,107 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ - */ - -#include <log.h> -#include <malloc.h> -#include <spi.h> -#include <spi-mem.h> - -int spi_mem_exec_op(struct spi_slave *slave, - const struct spi_mem_op *op) -{ - unsigned int pos = 0; - const u8 *tx_buf = NULL; - u8 *rx_buf = NULL; - u8 *op_buf; - int op_len; - u32 flag; - int ret; - int i; - - if (op->data.nbytes) { - if (op->data.dir == SPI_MEM_DATA_IN) - rx_buf = op->data.buf.in; - else - tx_buf = op->data.buf.out; - } - - op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes; - op_buf = calloc(1, op_len); - - ret = spi_claim_bus(slave); - if (ret < 0) - return ret; - - op_buf[pos++] = op->cmd.opcode; - - if (op->addr.nbytes) { - for (i = 0; i < op->addr.nbytes; i++) - op_buf[pos + i] = op->addr.val >> - (8 * (op->addr.nbytes - i - 1)); - - pos += op->addr.nbytes; - } - - if (op->dummy.nbytes) - memset(op_buf + pos, 0xff, op->dummy.nbytes); - - /* 1st transfer: opcode + address + dummy cycles */ - flag = SPI_XFER_BEGIN; - /* Make sure to set END bit if no tx or rx data messages follow */ - if (!tx_buf && !rx_buf) - flag |= SPI_XFER_END; - - ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag); - if (ret) - return ret; - - /* 2nd transfer: rx or tx data path */ - if (tx_buf || rx_buf) { - ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf, - rx_buf, SPI_XFER_END); - if (ret) - return ret; - } - - spi_release_bus(slave); - - for (i = 0; i < pos; i++) - debug("%02x ", op_buf[i]); - debug("| [%dB %s] ", - tx_buf || rx_buf ? op->data.nbytes : 0, - tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-"); - for (i = 0; i < op->data.nbytes; i++) - debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]); - debug("[ret %d]\n", ret); - - free(op_buf); - - if (ret < 0) - return ret; - - return 0; -} - -int spi_mem_adjust_op_size(struct spi_slave *slave, - struct spi_mem_op *op) -{ - unsigned int len; - - len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes; - if (slave->max_write_size && len > slave->max_write_size) - return -EINVAL; - - if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size) - op->data.nbytes = min(op->data.nbytes, - slave->max_read_size); - else if (slave->max_write_size) - op->data.nbytes = min(op->data.nbytes, - slave->max_write_size - len); - - if (!op->data.nbytes) - return -EINVAL; - - return 0; -} diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index d344701aeb..e4544edaad 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -105,6 +105,19 @@ void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data); #endif /* __UBOOT__ */ +static inline +struct spi_controller_mem_ops *spi_get_mem_ops(struct spi_slave *slave) +{ +#ifdef CONFIG_DM_SPI + struct udevice *bus = slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + + return ops->mem_ops; +#else + return slave->mem_ops; +#endif +} + static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx) { u32 mode = slave->mode; @@ -181,11 +193,10 @@ EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); bool spi_mem_supports_op(struct spi_slave *slave, const struct spi_mem_op *op) { - struct udevice *bus = slave->dev->parent; - struct dm_spi_ops *ops = spi_get_ops(bus); + struct spi_controller_mem_ops *mem_ops = spi_get_mem_ops(slave); - if (ops->mem_ops && ops->mem_ops->supports_op) - return ops->mem_ops->supports_op(slave, op); + if (mem_ops && mem_ops->supports_op) + return mem_ops->supports_op(slave, op); return spi_mem_default_supports_op(slave, op); } @@ -205,8 +216,7 @@ EXPORT_SYMBOL_GPL(spi_mem_supports_op); */ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) { - struct udevice *bus = slave->dev->parent; - struct dm_spi_ops *ops = spi_get_ops(bus); + struct spi_controller_mem_ops *mem_ops = spi_get_mem_ops(slave); unsigned int pos = 0; const u8 *tx_buf = NULL; u8 *rx_buf = NULL; @@ -222,7 +232,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) if (ret < 0) return ret; - if (ops->mem_ops && ops->mem_ops->exec_op) { + if (mem_ops && mem_ops->exec_op) { #ifndef __UBOOT__ /* * Flush the message queue before executing our SPI memory @@ -243,7 +253,8 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) mutex_lock(&ctlr->bus_lock_mutex); mutex_lock(&ctlr->io_mutex); #endif - ret = ops->mem_ops->exec_op(slave, op); + + ret = mem_ops->exec_op(slave, op); #ifndef __UBOOT__ mutex_unlock(&ctlr->io_mutex); @@ -425,13 +436,12 @@ EXPORT_SYMBOL_GPL(spi_mem_exec_op); */ int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op) { - struct udevice *bus = slave->dev->parent; - struct dm_spi_ops *ops = spi_get_ops(bus); + struct spi_controller_mem_ops *mem_ops = spi_get_mem_ops(slave); - if (ops->mem_ops && ops->mem_ops->adjust_op_size) - return ops->mem_ops->adjust_op_size(slave, op); + if (mem_ops && mem_ops->adjust_op_size) + return mem_ops->adjust_op_size(slave, op); - if (!ops->mem_ops || !ops->mem_ops->exec_op) { + if (!mem_ops || !mem_ops->exec_op) { unsigned int len; len = sizeof(op->cmd.opcode) + op->addr.nbytes + @@ -450,6 +460,7 @@ int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op) if (!op->data.nbytes) return -EINVAL; + } return 0; diff --git a/include/spi.h b/include/spi.h index 5cc6d6e008..825737b120 100644 --- a/include/spi.h +++ b/include/spi.h @@ -138,6 +138,7 @@ struct spi_slave { #else unsigned int bus; unsigned int cs; + struct spi_controller_mem_ops *mem_ops; #endif uint mode; unsigned int wordlen; -- 2.27.0

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