May 2020 - U-Boot

Pull request: u-boot-rockchip-20200501
by Kever Yang 04 May '20

04 May '20

Hi Tom, Please pull the rockchip updates/fixes: - dts clean up to use -u-boot for px30, rk3399 boards - dts sycn from upstream kernel for rk3328, rk3399 - add rockchip rng driver - new board support: rk3328-roc-cc, rk3399-roc-pc,Nanopi M4 2GB Gitlab CI: https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip/pipelines/3061 Thanks, - Kever The following changes since commit d16d37bcd4087b8ea0f66cb76a73edad182d151a: Merge tag 'video-for-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video (2020-04-27 09:41:51 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git tags/u-boot-rockchip-20200501 for you to fetch changes up to d597e613745155d2c48ed90617b3fce81af92fbd: rockchip: rk3399: Add Nanopi M4 2GB board support (2020-05-01 18:32:56 +0800) ---------------------------------------------------------------- Chen-Yu Tsai (9): rockchip: dts: rk3328-evb: Move vcc5v0-host-xhci-drv to -u-boot.dtsi rockchip: dts: rk3328-evb: Move gmac2io related nodes to -u-boot.dtsi rockchip: dts: rk3328: Move OTG node's hnp-srp-disable to rk3328-u-boot.dtsi dt-bindings: clock: rk3328: sync from upstream Linux kernel dt-bindings: power: rk3328-power: sync from upstream Linux kernel rockchip: rk3328: Disable generic PHY support rockchip: dts: rk3328: Sync device tree files from Linux rockchip: rk3328: Add support for ROC-RK3328-CC board rockchip: dts: rock64: Fix XHCI usage Deepak Das (1): rockchip: rk3399: Add Nanopi M4 2GB board support Jagan Teki (5): arm64: dts: rk3399-puma: Move u-boot properties into -u-boot.dtsi arm64: dts: rk3399-evb: Move u-boot properties into -u-boot.dtsi clk: rk3399: Set empty for HCLK_SD assigned-clocks arm64: dts: rk3399: Sync v5.7-rc1 from Linux arm: dts: rk3399: Sync roc-pc-mezzanine from v5.7-rc1 Kever Yang (4): rockchip: video: Use ofnode_decode_display_timing() to parse timing rockchip: video: Convert to use APIs which support live DT rockchip: px30: add -u-boot dtsi for soc rockchip: px30-evb: remove redundant include file Lin Jinhan (5): arm: dts: rockchip: rk3399: add and enable rng node arm: dts: rockchip: px30: add and enable rng node rockchip: rng: Add a driver for random number generator(rng) device rockchip: rk3399: Enable CONFIG_RNG_ROCKCHIP rockchip: px30: Enable CONFIG_RNG_ROCKCHIP Suniel Mahesh (3): arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pc rockchip: board: roc-pc-rk3399: Remove support for push button rk3399: Add ROC-RK3399-PC Mezzanine board arch/arm/dts/Makefile | 3 + arch/arm/dts/cros-ec-keyboard.dtsi | 10 +- arch/arm/dts/cros-ec-sbs.dtsi | 39 +- arch/arm/dts/px30-evb-u-boot.dtsi | 80 +- arch/arm/dts/px30-evb.dts | 1 - arch/arm/dts/px30-firefly-u-boot.dtsi | 82 +- arch/arm/dts/px30-u-boot.dtsi | 90 ++ arch/arm/dts/rk3328-evb-u-boot.dtsi | 39 + arch/arm/dts/rk3328-evb.dts | 220 ++-- arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 47 + arch/arm/dts/rk3328-roc-cc.dts | 354 ++++++ arch/arm/dts/rk3328-rock64-u-boot.dtsi | 11 + arch/arm/dts/rk3328-rock64.dts | 132 +- arch/arm/dts/rk3328-u-boot.dtsi | 4 + arch/arm/dts/rk3328.dtsi | 1415 ++++++++++++++-------- arch/arm/dts/rk3399-evb-u-boot.dtsi | 12 + arch/arm/dts/rk3399-evb.dts | 522 +++++--- arch/arm/dts/rk3399-ficus.dts | 6 + arch/arm/dts/rk3399-firefly.dts | 251 +++- arch/arm/dts/rk3399-gru-bob.dts | 16 +- arch/arm/dts/rk3399-gru-chromebook.dtsi | 40 +- arch/arm/dts/rk3399-gru-kevin.dts | 34 +- arch/arm/dts/rk3399-gru.dtsi | 89 +- arch/arm/dts/rk3399-khadas-edge.dtsi | 3 + arch/arm/dts/rk3399-leez-p710.dts | 36 +- arch/arm/dts/rk3399-nanopc-t4.dts | 47 +- arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi | 8 + arch/arm/dts/rk3399-nanopi-m4-2gb.dts | 66 + arch/arm/dts/rk3399-nanopi4.dtsi | 66 +- arch/arm/dts/rk3399-orangepi.dts | 79 +- arch/arm/dts/rk3399-puma-u-boot.dtsi | 31 +- arch/arm/dts/rk3399-puma.dtsi | 578 ++++----- arch/arm/dts/rk3399-roc-pc-mezzanine-u-boot.dtsi | 6 + arch/arm/dts/rk3399-roc-pc-mezzanine.dts | 93 ++ arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 36 + arch/arm/dts/rk3399-roc-pc.dts | 3 +- arch/arm/dts/rk3399-roc-pc.dtsi | 35 +- arch/arm/dts/rk3399-rock-pi-4.dts | 129 ++ arch/arm/dts/rk3399-rock960.dts | 49 + arch/arm/dts/rk3399-rock960.dtsi | 13 +- arch/arm/dts/rk3399-rockpro64.dts | 751 +----------- arch/arm/dts/rk3399-rockpro64.dtsi | 797 ++++++++++++ arch/arm/dts/rk3399-u-boot.dtsi | 7 + arch/arm/dts/rk3399.dtsi | 583 +++++---- board/firefly/roc-pc-rk3399/MAINTAINERS | 2 + board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 16 +- board/rockchip/evb_rk3328/MAINTAINERS | 7 + board/rockchip/evb_rk3399/MAINTAINERS | 7 + configs/evb-px30_defconfig | 2 + configs/evb-rk3328_defconfig | 1 - configs/evb-rk3399_defconfig | 2 + configs/nanopi-m4-2gb-rk3399_defconfig | 63 + configs/roc-cc-rk3328_defconfig | 102 ++ configs/roc-pc-mezzanine-rk3399_defconfig | 67 + configs/rock64-rk3328_defconfig | 1 - doc/README.rockchip | 4 +- drivers/clk/rockchip/clk_rk3399.c | 1 + drivers/rng/Kconfig | 8 + drivers/rng/Makefile | 1 + drivers/rng/rockchip_rng.c | 224 ++++ drivers/video/rockchip/rk3288_mipi.c | 1 - drivers/video/rockchip/rk3399_mipi.c | 1 - drivers/video/rockchip/rk_edp.c | 2 +- drivers/video/rockchip/rk_lvds.c | 13 +- drivers/video/rockchip/rk_mipi.c | 14 +- include/dt-bindings/clock/rk3328-cru.h | 212 ++-- include/dt-bindings/power/rk3328-power.h | 19 + 67 files changed, 5112 insertions(+), 2571 deletions(-) create mode 100644 arch/arm/dts/px30-u-boot.dtsi create mode 100644 arch/arm/dts/rk3328-roc-cc-u-boot.dtsi create mode 100644 arch/arm/dts/rk3328-roc-cc.dts create mode 100644 arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-nanopi-m4-2gb.dts create mode 100644 arch/arm/dts/rk3399-roc-pc-mezzanine-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-roc-pc-mezzanine.dts create mode 100644 arch/arm/dts/rk3399-rockpro64.dtsi create mode 100644 configs/nanopi-m4-2gb-rk3399_defconfig create mode 100644 configs/roc-cc-rk3328_defconfig create mode 100644 configs/roc-pc-mezzanine-rk3399_defconfig create mode 100644 drivers/rng/rockchip_rng.c create mode 100644 include/dt-bindings/power/rk3328-power.h

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[PATCH V2 1/9] uclass: cpu: Add new API to get udevice for current CPU
by Peng Fan 04 May '20

04 May '20

When running on SoC with multiple clusters, the boot CPU may not be fixed, saying booting from cluster A or cluster B. Add a API that can return the udevice for current boot CPU. Cpu driver needs to implement is_current_cpu interface for this feature, otherwise the API only returns the first udevice in cpu uclass. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Signed-off-by: Ye Li <ye.li(a)nxp.com> --- V2: Per Simon's comment, - Add cpu_is_current - use uclass_foreach_dev_probe - Update code comment drivers/cpu/cpu-uclass.c | 34 ++++++++++++++++++++++++++++++++++ include/cpu.h | 23 +++++++++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c index 457f77b7c8..33d38a0fde 100644 --- a/drivers/cpu/cpu-uclass.c +++ b/drivers/cpu/cpu-uclass.c @@ -10,6 +10,7 @@ #include <errno.h> #include <dm/lists.h> #include <dm/root.h> +#include <linux/err.h> int cpu_probe_all(void) { @@ -34,6 +35,39 @@ int cpu_probe_all(void) return 0; } +int cpu_is_current(struct udevice *cpu) +{ + struct cpu_ops *ops = cpu_get_ops(cpu); + + if (ops && ops->is_current) { + if (ops->is_current(cpu)) + return 1; + } + + return -ENOSYS; +} + +struct udevice *cpu_get_current_dev(void) +{ + struct udevice *cpu; + int ret; + + uclass_foreach_dev_probe(UCLASS_CPU, cpu) { + if (cpu_is_current(cpu) > 0) + return cpu; + } + + /* If can't find current cpu device, use the first dev instead */ + ret = uclass_first_device_err(UCLASS_CPU, &cpu); + if (ret) { + debug("%s: Could not get CPU device (err = %d)\n", + __func__, ret); + return NULL; + } + + return cpu; +} + int cpu_get_desc(struct udevice *dev, char *buf, int size) { struct cpu_ops *ops = cpu_get_ops(dev); diff --git a/include/cpu.h b/include/cpu.h index 6b1b6b37b3..2f283fe244 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -89,6 +89,15 @@ struct cpu_ops { * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error */ int (*get_vendor)(struct udevice *dev, char *buf, int size); + + /** + * is_current() - Check if the CPU that U-Boot is currently running from + * + * @dev: Device to check (UCLASS_CPU) + * @return 1 if the CPU that U-Boot is currently running from, 0 + * if not. + */ + int (*is_current)(struct udevice *dev); }; #define cpu_get_ops(dev) ((struct cpu_ops *)(dev)->driver->ops) @@ -137,4 +146,18 @@ int cpu_get_vendor(struct udevice *dev, char *buf, int size); */ int cpu_probe_all(void); +/** + * cpu_is_current() - Check if the CPU that U-Boot is currently running from + * + * Return: 1 if yes, - 0 if not + */ +int cpu_is_current(struct udevice *cpu); + +/** + * cpu_get_current_dev() - Get CPU udevice for current CPU + * + * Return: udevice if OK, - NULL on error + */ +struct udevice *cpu_get_current_dev(void); + #endif -- 2.16.4

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[PATCH] drivers: crypto: mod_exp_sw: Re-add DM_FLAG_PRE_RELOC
by Jan Kiszka 04 May '20

04 May '20

From: Jan Kiszka <jan.kiszka(a)siemens.com> This driver is safe to use in SPL without relocation. Denying DM_FLAG_PRE_RELOC prevents its usability for verifying the main U-Boot or other artifacts from the SPL unless needless enabling the full driver set (SPL_OF_PLATDATA). Fixes: 17e117408571 ("drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC") CC: Heinrich Schuchardt <xypron.glpk(a)gmx.de> CC: Marek Vasut <marex(a)denx.de> Signed-off-by: Jan Kiszka <jan.kiszka(a)siemens.com> --- drivers/crypto/rsa_mod_exp/mod_exp_uclass.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c b/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c index e91fe64458..298b2e579b 100644 --- a/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c +++ b/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c @@ -40,4 +40,5 @@ int rsa_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, UCLASS_DRIVER(mod_exp) = { .id = UCLASS_MOD_EXP, .name = "rsa_mod_exp", + .flags = DM_FLAG_PRE_RELOC, }; -- 2.26.1

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[PATCH v2 00/16] add initial support for broadcom NS3 soc
by Rayagonda Kokatanur 04 May '20

04 May '20

This patch series adds initial support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications. Changes from v1: -Address review comments from Marek Vasut, Split the series into samller and logical series like core, driver. -Address review comments from Simon Glass, Update MAINTAINERS file. Abhishek Shah (1): board: ns3: add api to save boot parameters passed from BL31 Bharat Gooty (2): include/configs: ns3: add env variables for Linux boot include/configs: ns3: add support for flashing images Bharat Kumar Reddy Gooty (1): board: ns3: limit U-boot relocation within 16MB memory Rayagonda Kokatanur (12): board: ns3: add support for Broadcom Northstar 3 arm: cpu: armv8: add L3 memory flush support configs: ns3: enable clock subsystem arm: dts: ns3: add clock dt node dt-bindings: memory: ns3: add memory definitions board: ns3: default reset type to L3 dt-bindings: memory: ns3: update GIC LPI address board: ns3: program GIC LPI tables configs: ns3: enable GIC ITS LPI table programing dt-bindings: memory: ns3: add ddr memory definition board: ns3: define ddr memory layout MAINTAINERS: update maintainers for broadcom ns3 platform MAINTAINERS | 17 +- arch/arm/Kconfig | 10 + arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/bcmns3/Makefile | 5 + arch/arm/cpu/armv8/bcmns3/lowlevel.S | 99 ++ arch/arm/dts/Makefile | 2 + arch/arm/dts/ns3-board.dts | 47 + arch/arm/dts/ns3-clock.dtsi | 34 + arch/arm/dts/ns3.dtsi | 34 + arch/arm/include/asm/arch-bcmns3/bl33_info.h | 26 + board/broadcom/bcmns3/Kconfig | 15 + board/broadcom/bcmns3/Makefile | 5 + board/broadcom/bcmns3/ns3.c | 196 ++++ configs/bcm_ns3_defconfig | 25 + include/configs/bcm_ns3.h | 901 +++++++++++++++++++ include/dt-bindings/memory/bcm-ns3-mc.h | 65 ++ 16 files changed, 1481 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S create mode 100644 arch/arm/dts/ns3-board.dts create mode 100644 arch/arm/dts/ns3-clock.dtsi create mode 100644 arch/arm/dts/ns3.dtsi create mode 100644 arch/arm/include/asm/arch-bcmns3/bl33_info.h create mode 100644 board/broadcom/bcmns3/Kconfig create mode 100644 board/broadcom/bcmns3/Makefile create mode 100644 board/broadcom/bcmns3/ns3.c create mode 100644 configs/bcm_ns3_defconfig create mode 100644 include/configs/bcm_ns3.h create mode 100644 include/dt-bindings/memory/bcm-ns3-mc.h -- 2.17.1

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[PULL] u-boot-sh/next network cleanup part 1
by Marek Vasut 04 May '20

04 May '20

This is part 1 of big network cleanup / DM conversion. The dc2114x/rtl8139/pcnet/tulip PCI adapter drivers received checkpatch cleanups in preparation for DM conversion. The smc911x is converted to DM completely. The dwc_eth_qos cache fixes are applied. I hope this is a one-off thing where I am picking my own network patches (sigh :-( ) and Joe comes back soon. The following changes since commit 78021b63373de32335bd204471d6cb7c7e18bc52: Merge tag 'efi-2020-07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-04-30 15:11:06 -0400) are available in the Git repository at: git://git.denx.de/u-boot-sh.git next for you to fetch changes up to 8148693b988fb36463dbc12cef4b7947acae9846: net: smc911x: Add DM support (2020-05-01 15:37:48 +0200) ---------------------------------------------------------------- Marek Vasut (48): net: Fix warning when including netdev.h on DM systems net: pcnet: Remove CONFIG_PCNET_79C97x net: tulip: Remove CONFIG_TULIP_* net: pcnet: Replace mips-specific accessors net: pcnet: Switch to PCI memory access net: dc2114x: Clean up init code net: dc2114x: Clean up dc21x4x_send() net: dc2114x: Clean up dc21x4x_recv() net: dc2114x: Clean up dc21x4x_halt() net: dc2114x: Clean up send_setup_frame() net: dc2114x: Clean up SROM operations net: dc2114x: Clean up remaining driver code net: dc2114x: Clean up DE4X5 macros net: dc2114x: Clean up INL/OUTL functions net: dc2114x: Reorganize driver net: dc2114x: Switch DEBUG_SROM{,2} to debug_cond() net: dwc_eth_qos: Fully rewrite RX descriptor field 3 net: dwc_eth_qos: Correctly wrap around TX descriptor tail pointer net: dwc_eth_qos: Flush the RX descriptors on init net: dwc_eth_qos: Invalidate RX descriptor before reading net: dwc_eth_qos: Invalidate RX packet DMA buffer net: dwc_eth_qos: Prevent DMA from writing updated RX DMA descriptor net: rtl8139: Register macro cleanup net: rtl8139: Rework eeprom_delay() macro net: rtl8139: Minor cleanup of read_eeprom() net: rtl8139: Consistently use rtl8139_rx_config net: rtl8139: Minor cleanup of set_rx_mode() net: rtl8139: Minor cleanup of rtl_reset() net: rtl8139: Minor cleanup of rtl_transmit() net: rtl8139: Minor cleanup of rtl_poll() net: rtl8139: Minor cleanup of rtl_disable() net: rtl8139: Factor out hardware reset net: rtl8139: Finish cleanup net: rtl8139: Move functions around net: rtl8139: Fill in SPDX tag net: smc911x: Remove pkt_data_{push,pull} net: smc911x: Replace malloc()+memset() with calloc() net: smc911x: Rename smc911x_rx() to smc911x_recv() net: smc911x: Invert the logic in smc911x_miiphy_{read,write}() net: smc911x: Fix potential memleak() in init fail path net: smc911x: Pull MII registration into separate function net: smc911x: Inline all functions from header file net: smc911x: Drop weak alias from 32bit accessors net: smc911x: Convert IO accessors to {read,write}{w,l}() net: smc911x: Pass around driver private data net: smc911x: Clean up the status handling in smc911x_recv() net: smc911x: Split non-DM specific bits from common code net: smc911x: Add DM support README | 2 - drivers/net/Kconfig | 2 + drivers/net/dc2114x.c | 965 +++++++++++++++++++++++++++++++++++++++++++----------------------------------------------------- drivers/net/dwc_eth_qos.c | 18 +- drivers/net/pcnet.c | 18 +- drivers/net/rtl8139.c | 742 +++++++++++++++++++++++++++++++++++++++----------------------------------- drivers/net/smc911x.c | 560 ++++++++++++++++++++++++++++++++++++++++++++------------ drivers/net/smc911x.h | 157 ---------------- examples/standalone/Makefile | 5 +- examples/standalone/smc911x_eeprom.c | 150 +++++++++++++++ include/configs/malta.h | 1 - include/netdev.h | 1 + scripts/config_whitelist.txt | 5 - 13 files changed, 1447 insertions(+), 1179 deletions(-)

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[PATCH] driver: net: fm: minor fix in DM ETH support
by Madalin Bucur 04 May '20

04 May '20

Bus callback functions for read/write/reset need to be set only for DM_ETH, moving endif a bit lower. Signed-off-by: Madalin Bucur <madalin.bucur(a)oss.nxp.com> --- As v1 of the patches were merged, this change made in v3 needs to be merged on its own. drivers/net/fm/eth.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 5f1a023..371c5d2 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -54,10 +54,10 @@ static void dtsec_configure_serdes(struct fm_eth *priv) bus.priv = priv->mac->phyregs; #else bus.priv = priv->pcs_mdio; -#endif bus.read = memac_mdio_read; bus.write = memac_mdio_write; bus.reset = memac_mdio_reset; +#endif qsgmii_loop: /* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */ -- 2.1.0

1 0

What is the right way to run fw_setenv for selecting different ECC or dtb files?
by Jupiter 04 May '20

04 May '20

Hi, To flash u-boot to iMX6ULL NAND, it requires using higher bits ECC (my imx6ulz_kobs.dtb) to run kobs-ng in ramdisk, but to flash rootfs image to NAND in ramdisk, I have to change to use lower ECC (my imx6ulz.dtb). I followed the advice at link https://developer.toradex.com/knowledge-base/u-boot-fw-utils to run "fw_setenv fdt_file imx6ulz_kobs.dtb" before flashing u-boot to NAND, although the fw_setenv command worked, the u-boot wasn't installed properly in NAND, I could not boot from NAND. What is the right way to run fw_setenv for changing different ECC or different dtb files? Thank you. Kind regards, - jh -- "A man can fail many times, but he isn't a failure until he begins to blame somebody else." -- John Burroughs

1 1

[PATCH] Actions: S700 Calculate SDRAM size
by Amit Singh Tomar 04 May '20

04 May '20

Calculate the SDRAM size from DDR capacity register registers instead of using hard-coded value. This is quite useful to get correct size on differnt boards based on S700 SoC. There is no documentation available that talks about DDR registers, and this is very much taken from vendor source. This commit lets Linux boot on Cubieboard7-lite (based on S700). Signed-off-by: Amit Singh Tomar <amittomer25(a)gmail.com> --- There is bit of a story about it: Wasn't really aware that working on a board (CubieBoard7-Lite) that actually has only 1GB of RAM untill I see the Kernel crash[1], and DDR size is hard-coded to 2GB(as CubieBoard7 comes with 2 GB). With this set-up Kernel was trying to access the memory that doesn't exist leads to the crash. [1]: Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034] [ 0.000000] Linux version 5.6.0-rc6-00012-g7080a8a-dirty (amit@amit-ThinkPad-X230) (gcc version 7.3.1 20180425 [linaro-7.3-2018.05 revision d29120a424ecfbc167ef90065c0eeb7f91977701] (Linaro GCC 7.3-2018.05)) #10 SMP PREEMPT Fri Mar 27 21:52:07 IST 2020 [ 0.000000] Machine model: CubieBoard7 [ 0.000000] earlycon: owl0 at MMIO 0x00000000e0126000 (options '') [ 0.000000] printk: bootconsole [owl0] enabled [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: UEFI not found. [ 0.000000] cma: Reserved 32 MiB at 0x000000007e000000 [ 0.000000] NUMA: No NUMA configuration found [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x000000007fffffff] [ 0.000000] NUMA: NODE_DATA [mem 0x7dbfb100-0x7dbfcfff] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000000000000-0x000000003fffffff] [ 0.000000] DMA32 [mem 0x0000000040000000-0x000000007fffffff] [ 0.000000] Normal empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x000000001effffff] [ 0.000000] node 0: [mem 0x0000000020000000-0x000000007fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000007fffffff] [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv0.2 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: Trusted OS migration not required [ 0.000000] percpu: Embedded 23 pages/cpu s53272 r8192 d32744 u94208 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: ARM erratum 845719 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 512000 [ 0.000000] Policy zone: DMA32 [ 0.000000] Kernel command line: console=ttyOWL,115200 earlycon=owl,0xe0126000 root=/dev/mmcblk0p2 [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear) [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Unable to handle kernel paging request at virtual address ffff00003de18000 [ 0.000000] Mem abort info: [ 0.000000] ESR = 0x96000047 [ 0.000000] EC = 0x25: DABT (current EL), IL = 32 bits [ 0.000000] SET = 0, FnV = 0 [ 0.000000] EA = 0, S1PTW = 0 [ 0.000000] Data abort info: [ 0.000000] ISV = 0, ISS = 0x00000047 [ 0.000000] CM = 0, WnR = 1 [ 0.000000] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000001399000 --- arch/arm/mach-owl/soc.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c index 409cbd3..f63f1a8 100644 --- a/arch/arm/mach-owl/soc.c +++ b/arch/arm/mach-owl/soc.c @@ -13,15 +13,38 @@ #include <asm/mach-types.h> #include <asm/psci.h> +#define DMM_INTERLEAVE_PER_CH_CFG (0xe0290028) + DECLARE_GLOBAL_DATA_PTR; +unsigned int get_owl_ram_size(void) +{ + unsigned int val, cap; + + /* ddr capacity register initialized by ddr driver + * in early bootloader + * DMM_INTERLEAVE_PER_CH_CFG bit[10:8] + * (val + 1) * 256 + */ + val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0x7; + cap = (val + 1) * 256; + + return cap; +} + /* * dram_init - sets uboots idea of sdram size */ int dram_init(void) { gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + +#if defined(CONFIG_MACH_S700) + gd->ram_size = get_owl_ram_size() * 1024 * 1024; +#endif + return 0; + } /* This is called after dram_init() so use get_ram_size result */ -- 2.7.4

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[PATCH] spi: fsl_dspi: Introduce DT bindings for CS-to-SCK and SCK-to-CS delays
by Vladimir Oltean 04 May '20

04 May '20

From: Vladimir Oltean <vladimir.oltean(a)nxp.com> Communication with some SPI slaves just won't cut it if these delays (before the beginning, and after the end of a transfer) are not added to the Chip Select signal. These are a straight copy from Linux: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt drivers/spi/spi-fsl-dspi.c Signed-off-by: Vladimir Oltean <vladimir.oltean(a)nxp.com> --- doc/device-tree-bindings/spi/spi-mcf-dspi.txt | 4 ++ drivers/spi/fsl_dspi.c | 54 ++++++++++++++++++- include/fsl_dspi.h | 1 + 3 files changed, 58 insertions(+), 1 deletion(-) diff --git a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt index 860eb8ac8526..4684d7846a99 100644 --- a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt +++ b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt @@ -13,6 +13,10 @@ Optional properties: - ctar-params: CTAR0 to 7 register configuration, as an array of 8 integer fields for each register, where each register is defined as: <fmsz, pcssck, pasc, pdt, cssck, asc, dt, br>. +- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip + select and the start of clock signal, at the start of a transfer. +- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock + signal and deactivating chip select, at the end of a transfer. Example: diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index a68a51945e4e..c0303dc5d606 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -9,6 +9,7 @@ * Haikun Wang (B53464(a)freescale.com) */ +#include <linux/math64.h> #include <common.h> #include <dm.h> #include <errno.h> @@ -22,6 +23,9 @@ #endif #include <fsl_dspi.h> +/* linux/include/time.h */ +#define NSEC_PER_SEC 1000000000L + DECLARE_GLOBAL_DATA_PTR; /* fsl_dspi_platdata flags */ @@ -383,6 +387,40 @@ static int fsl_dspi_hz_to_spi_baud(int *pbr, int *br, return -EINVAL; } +static void ns_delay_scale(unsigned char *psc, unsigned char *sc, int delay_ns, + unsigned long clkrate) +{ + int scale_needed, scale, minscale = INT_MAX; + int pscale_tbl[4] = {1, 3, 5, 7}; + u32 remainder; + int i, j; + + scale_needed = div_u64_rem((u64)delay_ns * clkrate, NSEC_PER_SEC, + &remainder); + if (remainder) + scale_needed++; + + for (i = 0; i < ARRAY_SIZE(pscale_tbl); i++) + for (j = 0; j <= DSPI_CTAR_SCALE_BITS; j++) { + scale = pscale_tbl[i] * (2 << j); + if (scale >= scale_needed) { + if (scale < minscale) { + minscale = scale; + *psc = i; + *sc = j; + } + break; + } + } + + if (minscale == INT_MAX) { + pr_warn("Cannot find correct scale values for %dns delay at clkrate %ld, using max prescaler value", + delay_ns, clkrate); + *psc = ARRAY_SIZE(pscale_tbl) - 1; + *sc = DSPI_CTAR_SCALE_BITS; + } +} + static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) { int ret; @@ -540,6 +578,9 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev) { struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); struct fsl_dspi_priv *priv = dev_get_priv(dev->parent); + u32 cs_sck_delay = 0, sck_cs_delay = 0; + unsigned char pcssck = 0, cssck = 0; + unsigned char pasc = 0, asc = 0; if (slave_plat->cs >= priv->num_chipselect) { debug("DSPI invalid chipselect number %d(max %d)!\n", @@ -547,7 +588,18 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev) return -EINVAL; } - priv->ctar_val[slave_plat->cs] = DSPI_CTAR_DEFAULT_VALUE; + ofnode_read_u32(dev->node, "fsl,spi-cs-sck-delay", &cs_sck_delay); + ofnode_read_u32(dev->node, "fsl,spi-sck-cs-delay", &sck_cs_delay); + + /* Set PCS to SCK delay scale values */ + ns_delay_scale(&pcssck, &cssck, cs_sck_delay, priv->bus_clk); + + /* Set After SCK delay scale values */ + ns_delay_scale(&pasc, &asc, sck_cs_delay, priv->bus_clk); + + priv->ctar_val[slave_plat->cs] = DSPI_CTAR_DEFAULT_VALUE | + DSPI_CTAR_PCSSCK(pcssck) | + DSPI_CTAR_PASC(pasc); debug("DSPI pre_probe slave device on CS %u, max_hz %u, mode 0x%x.\n", slave_plat->cs, slave_plat->max_hz, slave_plat->mode); diff --git a/include/fsl_dspi.h b/include/fsl_dspi.h index 114f63bce374..4fec83549e1f 100644 --- a/include/fsl_dspi.h +++ b/include/fsl_dspi.h @@ -94,6 +94,7 @@ struct dspi { #define DSPI_CTAR_ASC(x) (((x) & 0x0F) << 8) #define DSPI_CTAR_DT(x) (((x) & 0x0F) << 4) #define DSPI_CTAR_BR(x) ((x) & 0x0F) +#define DSPI_CTAR_SCALE_BITS 0xf /* Status */ #define DSPI_SR_TCF 0x80000000 -- 2.17.1

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[PATCH v3 1/2] timer: mpc83xx_timer: fix build with CONFIG_{HW_, }WATCHDOG
by Rasmus Villemoes 04 May '20

04 May '20

The code, which is likely copied from arch/powerpc/lib/interrupts.c, lacks a fallback definition of CONFIG_SYS_WATCHDOG_FREQ and refers to a non-existing timestamp variable - obviously priv->timestamp is meant. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- drivers/timer/mpc83xx_timer.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c index 72cb58b693..da516c9d74 100644 --- a/drivers/timer/mpc83xx_timer.c +++ b/drivers/timer/mpc83xx_timer.c @@ -16,6 +16,10 @@ DECLARE_GLOBAL_DATA_PTR; +#ifndef CONFIG_SYS_WATCHDOG_FREQ +#define CONFIG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2) +#endif + /** * struct mpc83xx_timer_priv - Private data structure for MPC83xx timer driver * @decrementer_count: Value to which the decrementer register should be re-set @@ -167,7 +171,7 @@ void timer_interrupt(struct pt_regs *regs) priv->timestamp++; #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) - if ((timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) + if ((priv->timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) WATCHDOG_RESET(); #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */ -- 2.23.0

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