May 2020 - U-Boot

[PATCH v2 0/9] riscv: sifive/fu540: Booting from SPI
by Jagan Teki 25 May '20

25 May '20

This series support Boot from SPI on SiFive FU540 HiFive Unleashed board, with improved version of detecting bootmode at runtime. Previous version changes are at [1]. Changes for v2: - fu540 board driver - runtime bootmode detection - rebase on Pragnesh v11 series [1] https://patchwork.ozlabs.org/project/uboot/cover/20200420140514.25847-1-jag… Any inputs? Jagan. Jagan Teki (9): spl: Try to get SPL boot device via board_get_int dt-bindings: board: Document sifive,fu540-modeselect riscv: dts: fu540-c000-u-boot: Add sifive,fu540-modeselect drivers: Add fu540 board driver sifive: fu540: Add Booting from SPI env: Enable SPI flash env for SiFive FU540 sifive: fu540: Mark the default env as SPI flash sifive: fu540: Add boot flash script offset, size sifive: fu540: Enable SF distro bootcmd arch/riscv/cpu/fu540/Kconfig | 15 ++++ arch/riscv/dts/fu540-c000-u-boot.dtsi | 7 ++ .../dts/hifive-unleashed-a00-u-boot.dtsi | 12 +++ board/sifive/fu540/Kconfig | 1 + board/sifive/fu540/fu540.c | 12 --- common/spl/spl.c | 14 ++- configs/sifive_fu540_defconfig | 4 + doc/board/sifive/fu540.rst | 41 +++++++++ .../board/sifive,fu540-modeselect.txt | 15 ++++ drivers/board/Kconfig | 8 ++ drivers/board/Makefile | 1 + drivers/board/fu540.c | 86 +++++++++++++++++++ include/board.h | 9 ++ include/configs/sifive-fu540.h | 7 +- 14 files changed, 218 insertions(+), 14 deletions(-) create mode 100644 doc/device-tree-bindings/board/sifive,fu540-modeselect.txt create mode 100644 drivers/board/fu540.c -- 2.20.1

3 19

[PATCH 1/2] spi: Zap sh_spi driver
by Jagan Teki 25 May '20

25 May '20

sh_spi driver is deprecated, no active updates and no board user, hence dropped the same. Cc: Marek Vasut <marex(a)denx.de> Cc: Tom Rini <trini(a)konsulko.com> Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- drivers/spi/Kconfig | 7 -- drivers/spi/Makefile | 1 - drivers/spi/sh_spi.c | 249 ------------------------------------------- drivers/spi/sh_spi.h | 67 ------------ 4 files changed, 324 deletions(-) delete mode 100644 drivers/spi/sh_spi.c delete mode 100644 drivers/spi/sh_spi.h diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 4166c6104e..0ab661bf05 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -412,13 +412,6 @@ config DAVINCI_SPI help Enable the Davinci SPI driver -config SH_SPI - bool "SuperH SPI driver" - depends on DEPRECATED - help - Enable the SuperH SPI controller driver. This driver can be used - on various SuperH SoCs, such as SH7757. - config SH_QSPI bool "Renesas Quad SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 52462e19a3..e12e1bca98 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o obj-$(CONFIG_SPI_SUNXI) += spi-sunxi.o -obj-$(CONFIG_SH_SPI) += sh_spi.o obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o obj-$(CONFIG_STM32_SPI) += stm32_spi.o diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c deleted file mode 100644 index c58fd0ebc4..0000000000 --- a/drivers/spi/sh_spi.c +++ /dev/null @@ -1,249 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SH SPI driver - * - * Copyright (C) 2011-2012 Renesas Solutions Corp. - */ - -#include <common.h> -#include <console.h> -#include <malloc.h> -#include <spi.h> -#include <asm/io.h> -#include "sh_spi.h" - -static void sh_spi_write(unsigned long data, unsigned long *reg) -{ - writel(data, reg); -} - -static unsigned long sh_spi_read(unsigned long *reg) -{ - return readl(reg); -} - -static void sh_spi_set_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp |= val; - sh_spi_write(tmp, reg); -} - -static void sh_spi_clear_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp &= ~val; - sh_spi_write(tmp, reg); -} - -static void clear_fifo(struct sh_spi *ss) -{ - sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2); - sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2); -} - -static int recvbuf_wait(struct sh_spi *ss) -{ - while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static int write_fifo_empty_wait(struct sh_spi *ss) -{ - while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs) -{ - unsigned long val = 0; - - if (cs & 0x01) - val |= SH_SPI_SSS0; - if (cs & 0x02) - val |= SH_SPI_SSS1; - - sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4); - sh_spi_set_bit(val, &ss->regs->cr4); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct sh_spi *ss; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ss = spi_alloc_slave(struct sh_spi, bus, cs); - if (!ss) - return NULL; - - ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE; - - /* SPI sycle stop */ - sh_spi_write(0xfe, &ss->regs->cr1); - /* CR1 init */ - sh_spi_write(0x00, &ss->regs->cr1); - /* CR3 init */ - sh_spi_write(0x00, &ss->regs->cr3); - sh_spi_set_cs(ss, cs); - - clear_fifo(ss); - - /* 1/8 clock */ - sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2); - udelay(10); - - return &ss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct sh_spi *spi = to_sh_spi(slave); - - free(spi); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct sh_spi *ss = to_sh_spi(slave); - - sh_spi_write(sh_spi_read(&ss->regs->cr1) & - ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1); -} - -static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data, - unsigned int len, unsigned long flags) -{ - int i, cur_len, ret = 0; - int remain = (int)len; - - if (len >= SH_SPI_FIFO_SIZE) - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - while (remain > 0) { - cur_len = (remain < SH_SPI_FIFO_SIZE) ? - remain : SH_SPI_FIFO_SIZE; - for (i = 0; i < cur_len && - !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) && - !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF); - i++) - sh_spi_write(tx_data[i], &ss->regs->tbr_rbr); - - cur_len = i; - - if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) { - /* Abort the transaction */ - flags |= SPI_XFER_END; - sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4); - ret = 1; - break; - } - - remain -= cur_len; - tx_data += cur_len; - - if (remain > 0) - write_fifo_empty_wait(ss); - } - - if (flags & SPI_XFER_END) { - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - udelay(100); - write_fifo_empty_wait(ss); - } - - return ret; -} - -static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data, - unsigned int len, unsigned long flags) -{ - int i; - - if (len > SH_SPI_MAX_BYTE) - sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3); - else - sh_spi_write(len, &ss->regs->cr3); - - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - for (i = 0; i < len; i++) { - if (recvbuf_wait(ss)) - return 0; - - rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr); - } - sh_spi_write(0, &ss->regs->cr3); - - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct sh_spi *ss = to_sh_spi(slave); - const unsigned char *tx_data = dout; - unsigned char *rx_data = din; - unsigned int len = bitlen / 8; - int ret = 0; - - if (flags & SPI_XFER_BEGIN) - sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA, - &ss->regs->cr1); - - if (tx_data) - ret = sh_spi_send(ss, tx_data, len, flags); - - if (ret == 0 && rx_data) - ret = sh_spi_receive(ss, rx_data, len, flags); - - if (flags & SPI_XFER_END) { - sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1); - udelay(100); - - sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD, - &ss->regs->cr1); - clear_fifo(ss); - } - - return ret; -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (!bus && cs < SH_SPI_NUM_CS) - return 1; - else - return 0; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - -} diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h deleted file mode 100644 index 33a4630c8d..0000000000 --- a/drivers/spi/sh_spi.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * SH SPI driver - * - * Copyright (C) 2011 Renesas Solutions Corp. - */ - -#ifndef __SH_SPI_H__ -#define __SH_SPI_H__ - -#include <spi.h> - -struct sh_spi_regs { - unsigned long tbr_rbr; - unsigned long resv1; - unsigned long cr1; - unsigned long resv2; - unsigned long cr2; - unsigned long resv3; - unsigned long cr3; - unsigned long resv4; - unsigned long cr4; -}; - -/* CR1 */ -#define SH_SPI_TBE 0x80 -#define SH_SPI_TBF 0x40 -#define SH_SPI_RBE 0x20 -#define SH_SPI_RBF 0x10 -#define SH_SPI_PFONRD 0x08 -#define SH_SPI_SSDB 0x04 -#define SH_SPI_SSD 0x02 -#define SH_SPI_SSA 0x01 - -/* CR2 */ -#define SH_SPI_RSTF 0x80 -#define SH_SPI_LOOPBK 0x40 -#define SH_SPI_CPOL 0x20 -#define SH_SPI_CPHA 0x10 -#define SH_SPI_L1M0 0x08 - -/* CR3 */ -#define SH_SPI_MAX_BYTE 0xFF - -/* CR4 */ -#define SH_SPI_TBEI 0x80 -#define SH_SPI_TBFI 0x40 -#define SH_SPI_RBEI 0x20 -#define SH_SPI_RBFI 0x10 -#define SH_SPI_SSS1 0x08 -#define SH_SPI_WPABRT 0x04 -#define SH_SPI_SSS0 0x01 - -#define SH_SPI_FIFO_SIZE 32 -#define SH_SPI_NUM_CS 4 - -struct sh_spi { - struct spi_slave slave; - struct sh_spi_regs *regs; -}; - -static inline struct sh_spi *to_sh_spi(struct spi_slave *slave) -{ - return container_of(slave, struct sh_spi, slave); -} - -#endif -- 2.17.1

2 6

[PATCH 0/2] mtd: spi-nand: Update Toshiba support
by Robert Marko 25 May '20

25 May '20

This patch series updates the Toshiba SPI-NAND driver support to match the Linux tree. This imports 2 patches that add support for the new J series, as well as adding x4 and QE enable to previously added TC58CVG2S0HRAIJ. Yoshio Furuyama (2): mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit) mtd: spinand: toshiba: Support for new Kioxia Serial NAND drivers/mtd/nand/spi/toshiba.c | 167 +++++++++++++++++++++++++-------- 1 file changed, 127 insertions(+), 40 deletions(-) -- 2.26.2

2 4

[PATCH v3 0/9] USB host support for Raspberry Pi 4 board (64-bit)
by Sylwester Nawrocki 25 May '20

25 May '20

Hi all, This patch series adds USB host support for Raspberry Pi 4 board. It includes the Broadcom STB PCIe controller driver ported from Linux kernel, a memory mapping update for the xHCI controller on PCIe bus for 64-bit builds and some related fixes and updates in the usb/xhci and the pci driver core code. The 32-bit ARM part has be excluded from the series and will be posted separately. This iteration includes mostly correction in the PCIe controller driver patch addressing Simon's review comments. Hopefully I have addressed all comments. I didn't decide to use struct for the control registers as the registers offsets used are sparse and I don't have detailed documentation of the hardware to be able to define the struct accurately. The patch series is based on v2020.07-rc1 tree. Thanks, Sylwester Marek Szyprowski (2): rpi4: shorten a mapping for the DRAM rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit) Nicolas Saenz Julienne (1): linux/bitfield.h: Add primitives for manipulating bitfields both in host- and fixed-endian Sylwester Nawrocki (6): usb: xhci: Add missing cache flush in the scratchpad array initialization usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq pci: Move some PCIe register offset definitions to a common header pci: Add some PCI Express capability register offset definitions pci: Add driver for Broadcom BCM2711 SoC PCIe controller configs: Enable support for the XHCI controller on RPI4 board (ARM 64-bit) arch/arm/mach-bcm283x/init.c | 20 +- configs/rpi_arm64_defconfig | 8 +- drivers/pci/Kconfig | 9 + drivers/pci/Makefile | 1 + drivers/pci/pci-rcar-gen3.c | 8 - drivers/pci/pcie_brcmstb.c | 623 ++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pcie_intel_fpga.c | 3 - drivers/usb/host/xhci-mem.c | 3 + include/linux/bitfield.h | 50 ++++ include/pci.h | 22 +- include/usb/xhci.h | 8 - 11 files changed, 729 insertions(+), 26 deletions(-) create mode 100644 drivers/pci/pcie_brcmstb.c -- 2.7.4

2 13

[PATCH v4 00/13] x86: cbfs: Various clean-ups to CBFS implementation
by Simon Glass 25 May '20

25 May '20

This code is very old and has not had much of a clean-up since it was written. This series aims to tidy it up to use error codes, avoid using BSS when not necessary and to add a few more features. Changes in v4: - Stick with US spelling - Fix 'his' typo Changes in v3: - Fix typo in commit message Changes in v2: - Fix incorrect function comments - Fix s/u8/void/ in find_uncached() - Fix setting of start in file_cbfs_find_uncached() - Add more comments on @node in file_cbfs_find_uncached() - Use void * instead of u8 * in file_cbfs_find_uncached_base() - Fix and expand comments in file_cbfs_find_uncached_base() - Rebase to master (with x86/master cherry-picked in too) - Resending as some comments / reviews were missed Simon Glass (13): cbfs: Rename the result variable cbfs: Use ulong consistently cbfs: Use bool type for whether initialised cbfs: Adjust return value of file_cbfs_next_file() cbfs: Adjust file_cbfs_load_header() to use cbfs_priv cbfs: Adjust cbfs_load_header_ptr() to use cbfs_priv cbfs: Unify the two header loaders cbfs: Use void * for the position pointers cbfs: Record the start address in cbfs_priv cbfs: Return the error code from file_cbfs_init() cbfs: Change file_cbfs_find_uncached() to return an error cbfs: Allow reading a file from a CBFS given its base addr cbfs: Don't require the CBFS size with cbfs_init_mem() arch/x86/lib/fsp2/fsp_init.c | 3 +- cmd/cbfs.c | 3 +- fs/cbfs/cbfs.c | 240 ++++++++++++++++++++++------------- include/cbfs.h | 40 ++++-- 4 files changed, 182 insertions(+), 104 deletions(-) -- 2.27.0.rc0.183.gde8f92d652-goog

2 19

[PATCH] sf: Drop spl_flash_get_sw_write_prot
by Jagan Teki 25 May '20

25 May '20

The get_sw_write_prot API is used to get the write-protected bits of flash by reading the status register and other wards it's API for reading register bits. 1) This kind of requirement can be achieved using existing flash operations and flash locking API calls instead of making a separate flash API. 2) Technically there is no real hardware user for this API to use in the source tree. 3) Having a flash operations API for simple register read bits also make difficult to extend the flash operations. 4) Instead of touching generic code, it is possible to have this functionality inside spinor operations in the form of flash hooks or fixups for associated flash chips. Considering all these points, this patch drops the get_sw_write_prot and associated code bases. Cc: Simon Glass <sjg(a)chromium.org> Cc: Vignesh R <vigneshr(a)ti.com> Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- drivers/mtd/spi/sf-uclass.c | 9 --------- drivers/mtd/spi/sf_internal.h | 4 ---- drivers/mtd/spi/sf_probe.c | 8 -------- drivers/mtd/spi/spi-nor-core.c | 11 ----------- drivers/mtd/spi/spi-nor-tiny.c | 6 ------ include/spi_flash.h | 27 --------------------------- test/dm/sf.c | 8 -------- 7 files changed, 73 deletions(-) diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index 5ebcca590a..5a42ab83c8 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -29,15 +29,6 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len) return log_ret(sf_get_ops(dev)->erase(dev, offset, len)); } -int spl_flash_get_sw_write_prot(struct udevice *dev) -{ - struct dm_spi_flash_ops *ops = sf_get_ops(dev); - - if (!ops->get_sw_write_prot) - return -ENOSYS; - return log_ret(ops->get_sw_write_prot(dev)); -} - /* * TODO(sjg(a)chromium.org): This is an old-style function. We should remove * it when all SPI flash drivers use dm diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 544ed74a5f..5fc662875e 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -74,10 +74,6 @@ extern const struct flash_info spi_nor_ids[]; #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) -/* Get software write-protect value (BP bits) */ -int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash); - - #if CONFIG_IS_ENABLED(SPI_FLASH_MTD) int spi_flash_mtd_register(struct spi_flash *flash); void spi_flash_mtd_unregister(void); diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 1e8744896c..f167bfab8a 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -129,13 +129,6 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) return mtd->_erase(mtd, &instr); } -static int spi_flash_std_get_sw_write_prot(struct udevice *dev) -{ - struct spi_flash *flash = dev_get_uclass_priv(dev); - - return spi_flash_cmd_get_sw_write_prot(flash); -} - int spi_flash_std_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); @@ -159,7 +152,6 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = { .read = spi_flash_std_read, .write = spi_flash_std_write, .erase = spi_flash_std_erase, - .get_sw_write_prot = spi_flash_std_get_sw_write_prot, }; static const struct udevice_id spi_flash_std_ids[] = { diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 984cece0b0..c5aff6f5c6 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -2639,14 +2639,3 @@ int spi_nor_scan(struct spi_nor *nor) return 0; } - -/* U-Boot specific functions, need to extend MTD to support these */ -int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) -{ - int sr = read_sr(nor); - - if (sr < 0) - return sr; - - return (sr >> 2) & 7; -} diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index ccc0ab07af..06e3dad8c4 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -797,9 +797,3 @@ int spi_nor_scan(struct spi_nor *nor) return 0; } - -/* U-Boot specific functions, need to extend MTD to support these */ -int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) -{ - return -ENOTSUPP; -} diff --git a/include/spi_flash.h b/include/spi_flash.h index 0b23f57a71..d9b2af856c 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -34,19 +34,6 @@ struct dm_spi_flash_ops { int (*write)(struct udevice *dev, u32 offset, size_t len, const void *buf); int (*erase)(struct udevice *dev, u32 offset, size_t len); - /** - * get_sw_write_prot() - Check state of software write-protect feature - * - * SPI flash chips can lock a region of the flash defined by a - * 'protected area'. This function checks if this protected area is - * defined. - * - * @dev: SPI flash device - * @return 0 if no region is write-protected, 1 if a region is - * write-protected, -ENOSYS if the driver does not implement this, - * other -ve value on error - */ - int (*get_sw_write_prot)(struct udevice *dev); }; /* Access the serial operations for a device */ @@ -88,20 +75,6 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, */ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len); -/** - * spl_flash_get_sw_write_prot() - Check state of software write-protect feature - * - * SPI flash chips can lock a region of the flash defined by a - * 'protected area'. This function checks if this protected area is - * defined. - * - * @dev: SPI flash device - * @return 0 if no region is write-protected, 1 if a region is - * write-protected, -ENOSYS if the driver does not implement this, - * other -ve value on error - */ -int spl_flash_get_sw_write_prot(struct udevice *dev); - /** * spi_flash_std_probe() - Probe a SPI flash device * diff --git a/test/dm/sf.c b/test/dm/sf.c index 7805af740e..0c3f6c3bb7 100644 --- a/test/dm/sf.c +++ b/test/dm/sf.c @@ -50,14 +50,6 @@ static int dm_test_spi_flash(struct unit_test_state *uts) ut_assertok(spi_flash_read_dm(dev, 0, size, dst)); ut_assertok(memcmp(src, dst, size)); - /* Try the write-protect stuff */ - ut_assertok(uclass_first_device_err(UCLASS_SPI_EMUL, &emul)); - ut_asserteq(0, spl_flash_get_sw_write_prot(dev)); - sandbox_sf_set_block_protect(emul, 1); - ut_asserteq(1, spl_flash_get_sw_write_prot(dev)); - sandbox_sf_set_block_protect(emul, 0); - ut_asserteq(0, spl_flash_get_sw_write_prot(dev)); - /* Check mapping */ ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset)); ut_asserteq(0x1000, map_base); -- 2.20.1

1 1

Regression when building with DEVICE_TREE parameter
by Patrice CHOTARD 25 May '20

25 May '20

Hi Masahiro As indicated into doc/README.fdt-control, it's possible build U-boot with specifying dts-file-name using $ make DEVICE_TREE=<dts-file-name> But since your commit a3444bd09af9 ("Revert "Ensure device tree DTS is compiled") it's no more possible: make ARCH=arm CROSS_COMPILE=$CROSS_COMPILE -j 16 DEVICE_TREE="trial" Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument dts/Makefile:28: recipe for target 'arch/arm/dts/trial.dtb' failed make[1]: *** [arch/arm/dts/trial.dtb] Error 1 Makefile:1087: recipe for target 'dts/dt.dtb' failed make: *** [dts/dt.dtb] Error 2 By reverting the above patch, it's restoring the attended behavior. But In your commit you indicated several issues. Unfortunately, i am not a Makefile "expert", can anybody have a look at it ? Thanks Patrice

2 2

[PATCH 1/7] amlogic: Remove ARCH= references from documentation
by Tom Rini 25 May '20

25 May '20

When building U-Boot we select the architecture via Kconfig and not ARCH being passed in via the environment or make cmdline. Cc: Beniamino Galvani <b.galvani(a)gmail.com> Cc: Neil Armstrong <narmstrong(a)baylibre.com> Cc: u-boot-amlogic(a)groups.io Signed-off-by: Tom Rini <trini(a)konsulko.com> --- As an aside, these files should be converted rST and moved to doc/board/ and the MAINTAINERS file updated to include the new documentation file too. Thanks! --- board/amlogic/p200/README.nanopi-k2 | 1 - board/amlogic/p200/README.odroid-c2 | 1 - board/amlogic/p200/README.p200 | 1 - board/amlogic/p201/README.p201 | 1 - board/amlogic/p212/README.khadas-vim | 1 - board/amlogic/p212/README.libretech-ac | 1 - board/amlogic/p212/README.libretech-cc | 1 - board/amlogic/p212/README.p212 | 1 - board/amlogic/q200/README.khadas-vim2 | 1 - board/amlogic/q200/README.q200 | 1 - board/amlogic/s400/README | 1 - board/amlogic/sei510/README | 1 - board/amlogic/sei610/README | 1 - board/amlogic/u200/README | 1 - board/amlogic/w400/README.khadas-vim3 | 1 - board/amlogic/w400/README.khadas-vim3l | 1 - board/amlogic/w400/README.odroid-n2 | 1 - board/amlogic/w400/README.w400 | 1 - 18 files changed, 18 deletions(-) diff --git a/board/amlogic/p200/README.nanopi-k2 b/board/amlogic/p200/README.nanopi-k2 index d450d3c2b2af..c8dec3569b4d 100644 --- a/board/amlogic/p200/README.nanopi-k2 +++ b/board/amlogic/p200/README.nanopi-k2 @@ -24,7 +24,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make nanopi-k2_defconfig > make diff --git a/board/amlogic/p200/README.odroid-c2 b/board/amlogic/p200/README.odroid-c2 index bed48c5728ba..3b9f80df29d8 100644 --- a/board/amlogic/p200/README.odroid-c2 +++ b/board/amlogic/p200/README.odroid-c2 @@ -29,7 +29,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make odroid-c2_defconfig > make diff --git a/board/amlogic/p200/README.p200 b/board/amlogic/p200/README.p200 index 01d82d1e79e3..84d5ca535691 100644 --- a/board/amlogic/p200/README.p200 +++ b/board/amlogic/p200/README.p200 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make p200_defconfig > make diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201 index c251096ce142..4bb5e9590532 100644 --- a/board/amlogic/p201/README.p201 +++ b/board/amlogic/p201/README.p201 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make p201_defconfig > make diff --git a/board/amlogic/p212/README.khadas-vim b/board/amlogic/p212/README.khadas-vim index a2c7606454f8..ccf933861b79 100644 --- a/board/amlogic/p212/README.khadas-vim +++ b/board/amlogic/p212/README.khadas-vim @@ -30,7 +30,6 @@ Currently the u-boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim_defconfig > make diff --git a/board/amlogic/p212/README.libretech-ac b/board/amlogic/p212/README.libretech-ac index 538604261b84..3f713ec32634 100644 --- a/board/amlogic/p212/README.libretech-ac +++ b/board/amlogic/p212/README.libretech-ac @@ -25,7 +25,6 @@ Currently the U-Boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make libretech-ac_defconfig > make diff --git a/board/amlogic/p212/README.libretech-cc b/board/amlogic/p212/README.libretech-cc index 6af7de3cfa79..74434d4435ec 100644 --- a/board/amlogic/p212/README.libretech-cc +++ b/board/amlogic/p212/README.libretech-cc @@ -30,7 +30,6 @@ Currently the U-Boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make libretech-cc_defconfig > make diff --git a/board/amlogic/p212/README.p212 b/board/amlogic/p212/README.p212 index ef5370c763c4..3776f2449391 100644 --- a/board/amlogic/p212/README.p212 +++ b/board/amlogic/p212/README.p212 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make p212_defconfig > make diff --git a/board/amlogic/q200/README.khadas-vim2 b/board/amlogic/q200/README.khadas-vim2 index 8bcfc296f3e0..595998c4fabb 100644 --- a/board/amlogic/q200/README.khadas-vim2 +++ b/board/amlogic/q200/README.khadas-vim2 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim2_defconfig > make diff --git a/board/amlogic/q200/README.q200 b/board/amlogic/q200/README.q200 index 55d730a0d200..d4142c88bd42 100644 --- a/board/amlogic/q200/README.q200 +++ b/board/amlogic/q200/README.q200 @@ -30,7 +30,6 @@ Currently the u-boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim2_defconfig > make diff --git a/board/amlogic/s400/README b/board/amlogic/s400/README index ab21998dc836..a48db22a4282 100644 --- a/board/amlogic/s400/README +++ b/board/amlogic/s400/README @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make s400_defconfig > make diff --git a/board/amlogic/sei510/README b/board/amlogic/sei510/README index e47ebc7b3a5a..d9358aa50183 100644 --- a/board/amlogic/sei510/README +++ b/board/amlogic/sei510/README @@ -22,7 +22,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make sei510_defconfig > make diff --git a/board/amlogic/sei610/README b/board/amlogic/sei610/README index 1cc2b3c2a4e9..d96a94b5e970 100644 --- a/board/amlogic/sei610/README +++ b/board/amlogic/sei610/README @@ -18,7 +18,6 @@ specifications: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make sei610_defconfig > make diff --git a/board/amlogic/u200/README b/board/amlogic/u200/README index bffac5e7ae0a..a4080eb299c4 100644 --- a/board/amlogic/u200/README +++ b/board/amlogic/u200/README @@ -27,7 +27,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make u200_defconfig > make diff --git a/board/amlogic/w400/README.khadas-vim3 b/board/amlogic/w400/README.khadas-vim3 index 45ef90c1b0a9..399bf49295f6 100644 --- a/board/amlogic/w400/README.khadas-vim3 +++ b/board/amlogic/w400/README.khadas-vim3 @@ -29,7 +29,6 @@ Currently the U-Boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim3_defconfig > make diff --git a/board/amlogic/w400/README.khadas-vim3l b/board/amlogic/w400/README.khadas-vim3l index 0afff16c0c26..b2d9abbfd9b2 100644 --- a/board/amlogic/w400/README.khadas-vim3l +++ b/board/amlogic/w400/README.khadas-vim3l @@ -29,7 +29,6 @@ Currently the U-Boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim3l_defconfig > make diff --git a/board/amlogic/w400/README.odroid-n2 b/board/amlogic/w400/README.odroid-n2 index a8f2c3d7daa6..8142eebea007 100644 --- a/board/amlogic/w400/README.odroid-n2 +++ b/board/amlogic/w400/README.odroid-n2 @@ -28,7 +28,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make odroid-n2_defconfig > make diff --git a/board/amlogic/w400/README.w400 b/board/amlogic/w400/README.w400 index 25b786d817c4..c129717a1189 100644 --- a/board/amlogic/w400/README.w400 +++ b/board/amlogic/w400/README.w400 @@ -27,7 +27,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make w400_defconfig > make -- 2.17.1

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[PATCH 1/2] rockchip: Enable PCIe/M.2 and NVMe on Firefly RK3399
by Mark Kettenis 25 May '20

25 May '20

Signed-off-by: Mark Kettenis <kettenis(a)openbsd.org> --- configs/firefly-rk3399_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 831a37d607..2f2a3edb72 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -38,10 +39,13 @@ CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=115200 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y -- 2.26.2

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[PATCH] rk3399: Enable NVMe distro bootcmd
by Mark Kettenis 25 May '20

25 May '20

Include NVME in the list of boot targets if CONFIG_NVME is enabled. Signed-off-by: Mark Kettenis <kettenis(a)openbsd.org> --- include/configs/rockchip-common.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index bf8c60d6dd..0b9e24d1db 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -23,6 +23,12 @@ #define BOOT_TARGET_MMC(func) #endif +#if CONFIG_IS_ENABLED(CMD_NVME) + #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) +#else + #define BOOT_TARGET_NVME(func) +#endif + #if CONFIG_IS_ENABLED(CMD_USB) #define BOOT_TARGET_USB(func) func(USB, usb, 0) #else @@ -50,6 +56,7 @@ #ifdef CONFIG_ROCKCHIP_RK3399 #define BOOT_TARGET_DEVICES(func) \ BOOT_TARGET_MMC(func) \ + BOOT_TARGET_NVME(func) \ BOOT_TARGET_USB(func) \ BOOT_TARGET_PXE(func) \ BOOT_TARGET_DHCP(func) \ -- 2.26.2

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