May 2020 - U-Boot

Re: [PATCH 2/2] riscv: Enable CONFIG_OF_BOARD_FIXUP by default
by Rick Chen 03 Jun '20

03 Jun '20

Hi Bin > From: Bin Meng [mailto:bmeng.cn@gmail.com] > Sent: Wednesday, May 20, 2020 3:40 PM > To: Rick Jian-Zhi Chen(陳建志); U-Boot Mailing List > Cc: Bin Meng > Subject: [PATCH 2/2] riscv: Enable CONFIG_OF_BOARD_FIXUP by default > > From: Bin Meng <bin.meng(a)windriver.com> > > Starting from OpenSBI v0.7, the SBI firmware inserts/fixes up the reserved memory node for PMP protected memory regions. All RISC-V boards needs to copy the reserved memory node from the device tree provided by the firmware to the device tree used by U-Boot. > > Turn on CONFIG_OF_BOARD_FIXUP by default. > > Signed-off-by: Bin Meng <bin.meng(a)windriver.com> > --- > > arch/riscv/Kconfig | 3 +++ > configs/sifive_fu540_defconfig | 1 - > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fb5fe5a..5176b35 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -272,4 +272,7 @@ config STACK_SIZE_SHIFT > int > default 14 > > +config OF_BOARD_FIXUP > + default y I think it shall invoke by individual board, just like the description of riscv_fdt_copy_resv_mem_node function. In [PATCH 1/2] if source and destination are the same place, it represent that OF_BOARD_FIXUP is unnecessary. BTW when I try OF_SEPARATE and OF_BOARD_FIXUP both are enabled, it hit the problem as below: U-Boot SPL 2020.07-rc3-16981-g4332225-dirty (May 28 2020 - 14:48:18 +0800) Trying to boot from RAM U-Boot 2020.07-rc3-16981-g4332225-dirty (May 28 2020 - 14:48:18 +0800) DRAM: 1 GiB failed to add reserved memory: -3 failed to fixup DT for reserved memory: -3 initcall sequence 0000000001253c20 failed at call 000000000120b8e0 (err=-3) ### ERROR ### Please RESET the board ### I will dig in and figure out what is going on here ? Maybe there exist a potential issue somehow! Thanks, Rick > + > endmenu > diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index f805aac..6d61e6c 100644 > --- a/configs/sifive_fu540_defconfig > +++ b/configs/sifive_fu540_defconfig > @@ -9,7 +9,6 @@ CONFIG_FIT=y > CONFIG_MISC_INIT_R=y > CONFIG_DISPLAY_CPUINFO=y > CONFIG_DISPLAY_BOARDINFO=y > -CONFIG_OF_BOARD_FIXUP=y > CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > CONFIG_DM_MTD=y > -- > 2.7.4

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[PATCH] env: Add option to only ever append environment
by Marek Vasut 03 Jun '20

03 Jun '20

Add configuration option which prevents the environment hash table to be ever cleared and reloaded with different content. This is useful in case the first environment loaded into the hash table contains e.g. sensitive content which must not be dropped or reloaded. Signed-off-by: Marek Vasut <marex(a)denx.de> --- env/Kconfig | 9 +++++++++ env/env.c | 2 ++ lib/hashtable.c | 4 ++++ 3 files changed, 15 insertions(+) diff --git a/env/Kconfig b/env/Kconfig index ca7fef682b..8166e5df91 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -604,6 +604,15 @@ config DELAY_ENVIRONMENT later by U-Boot code. With CONFIG_OF_CONTROL this is instead controlled by the value of /config/load-environment. +config ENV_APPEND + bool "Always append the environment with new data" + default n + help + If defined, the environment hash table is only ever appended with new + data, but the existing hash table can never be dropped and reloaded + with newly imported data. This may be used in combination with static + flags to e.g. to protect variables which must not be modified. + config ENV_ACCESS_IGNORE_FORCE bool "Block forced environment operations" default n diff --git a/env/env.c b/env/env.c index 024d36fdbe..967a9d36d7 100644 --- a/env/env.c +++ b/env/env.c @@ -204,7 +204,9 @@ int env_load(void) ret = drv->load(); if (!ret) { printf("OK\n"); +#if !CONFIG_IS_ENABLED(ENV_APPEND) return 0; +#endif } else if (ret == -ENOMSG) { /* Handle "bad CRC" case */ if (best_prio == -1) diff --git a/lib/hashtable.c b/lib/hashtable.c index b96dbe19be..c2bf75fb76 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -822,6 +822,10 @@ int himport_r(struct hsearch_data *htab, if (nvars) memcpy(localvars, vars, sizeof(vars[0]) * nvars); +#if CONFIG_IS_ENABLED(ENV_APPEND) + flag |= H_NOCLEAR; +#endif + if ((flag & H_NOCLEAR) == 0 && !nvars) { /* Destroy old hash table if one exists */ debug("Destroy Hash Table: %p table = %p\n", htab, -- 2.25.1

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[PATCH 0/6] rtc: add rtc_{read,write}8_array and rtc command
by Rasmus Villemoes 02 Jun '20

02 Jun '20

I need access to registers other than just the timekeeping ones of the pcf2127, so I wanted to implement ->read8 and ->write8. But for testing these it appeared there was no convenient way to invoke those from the shell, so I also ended up adding such a command. Also, it seemed more natural to provide array variants that can read or write several registers at once, so rtc_ops is expanded a bit. There are a few things one could do on top, but for now I just want some feedback, especially on the new _array methods. "rtc set", "rtc get" and "rtc reset" are rather obvious subsommands to add at some point. Also, rtc_{read,write}{16,32} can be simplified a bit, along the lines of __le16 v; int ret = rtc_read8_array(dev, reg, &v, 2); if (ret) return ret; *valuep = __le16_to_cpu(v); return 0; Rasmus Villemoes (6): rtc: add rtc_read8_array helper and ->read8_array method rtc: add rtc_write8_array() helper rtc: fall back to ->{read,write}8_array if ->{read,write}8 are not provided rtc: pcf2127: provide ->read8_array method rtc: pcf2127: provide ->write8_array method rtc: add rtc command cmd/Kconfig | 6 ++ cmd/Makefile | 1 + cmd/rtc.c | 153 +++++++++++++++++++++++++++++++++++++++ drivers/rtc/pcf2127.c | 14 +++- drivers/rtc/rtc-uclass.c | 53 +++++++++++++- include/rtc.h | 48 ++++++++++++ 6 files changed, 270 insertions(+), 5 deletions(-) create mode 100644 cmd/rtc.c -- 2.23.0

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[PATCH v13 00/19] RISC-V SiFive FU540 support SPL
by Pragnesh Patel 02 Jun '20

02 Jun '20

This series add support for SPL to FU540. U-Boot SPL can boot from L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and U-Boot proper from MMC devices. This series is also available here [1] for testing [1] https://github.com/pragnesh26992/u-boot/tree/spl How to test this patch: 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y 2) export OPENSBI=<path to opensbi/build/platform/generic/firmware/fw_dynamic.bin> 3) Change to u-boot-dir 4) make sifive_fu540_defconfig 5) make all 6) Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch) # sudo sgdisk --clear \ > --set-alignment=2 \ > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ > --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > /dev/sda 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 Changes in v13: - Add a new patch to set the ethernet clock rate (riscv: sifive: dts: fu540: set ethernet clock rate) Changes in v12: - Rebase on mainline U-Boot Added necessary include files which are not part of common header now Remove unnecessary include files drivers/misc/sifive-otp.c +#include <linux/bitops.h> +#include <linux/delay.h> board/sifive/fu540/fu540.c -#include <common.h> +#include <log.h> board/sifive/fu540/spl.c +#include <init.h> +#include <log.h> +#include <linux/delay.h> drivers/ram/sifive/fu540_ddr.c +#include <linux/bitops.h> arch/riscv/cpu/fu540/cpu.c -#include <common.h> +#include <asm/cache.h> arch/riscv/cpu/fu540/spl.c -#include <common.h> +#include <log.h> board/sifive/fu540/spl.c -#include <common.h> +#include <init.h> +#include <log.h> +#include <linux/delay.h> - Update commit description for Release ethernet clock reset - Update OpenSBI building section in "doc/board/sifive/fu540.rst" Changes in v11: - Remove TPL related code and OF_PLATDATA from FU540 DDR driver (drivers/ram/sifive/fu540_ddr.c) - Update FU540 doc (doc/board/sifive/fu540.rst) Remove unnecessary print Changes in v10: - Update commit description for ethernet clock reset (https://patchwork.ozlabs.org/patch/1289003) - Update commit description for ddr clock initialization (https://patchwork.ozlabs.org/patch/1289000) Changes in v9: - Remove cache related patches from this series sifive: dts: fu540: Enable L2 Cache in U-Boot (https://patchwork.ozlabs.org/patch/1286705) riscv: sifive: fu540: enable all cache ways from U-Boot proper (https://patchwork.ozlabs.org/patch/1286706) - Rename SiFive DDR driver from sdram_fu540.c to fu540_ddr.c and also do some typo correction in driver - Remove CONFIG_SPL_BUILD for __prci_ddr_release_reset() - Release ethernet clock reset instead of ethernet clock initialization (https://patchwork.ozlabs.org/patch/1286697) - Squash fu540 cpu patches (https://patchwork.ozlabs.org/patch/1286699) (https://patchwork.ozlabs.org/patch/1286700) - Use spl_boot_device() instead of board_boot_order() Changes in v8: - Remove SPL_CRC7_SUPPORT Kconfig option and compile crc7.o when CONFIG_MMC_SPI selected - Add "TODO" in drivers/ram/sifive/sdram_fu540.c - Remove unnecessary TODO from drivers/clk/sifive/fu540-prci.c - Make fu540-hifive-unleashed-a00-sdram-ddr4.dtsi file dual-licensed - Add 2 new patches sifive: fu540: Add sample SD gpt partition layout (https://patchwork.ozlabs.org/patch/1092) sifive: fu540: Add U-Boot proper sector start (https://patchwork.ozlabs.org/patch/1093) - Remove patch riscv: Enable cpu clock if it is present (https://patchwork.ozlabs.org/patch/1281573) - Update doc/board/sifive/fu540.rst for PLATFORM=generic Changes in v7: - Standardize SD gpt partition layout - Add delay for SiFive OTP driver - Use DM way for corepll and ddrpll - Add new cpu fu540 (arch/riscv/cpu/fu540) - Update document for FU540 (doc/board/sifive/fu540.rst) Changes in v6: - Typo Correction - Make fu540-c000-u-boot.dtsi and hifive-unleashed-a00-u-boot.dtsi Dual Licensed - Sync Hifive unleashed dts from Linux - Add arch/riscv/fu540 for FU540 specific code Changes in v5: - Return read/write bytes for sifive_otp_read and sifive_otp_write - Correct Palmer's email address Changes in v4: - Split misc DM driver patch into multiple patches - Added new SPL_CRC7_SUPPORT Kconfig option - Added DM driver for DDR - Added clk_enable and clk_disable ops in SiFive PRCI driver - Added early clock initialization for SPL in SiFive PRCI driver - Added early clock initialization for SPL in SiFive PRCI driver - Added SPL config options in sifive_fu540_defconfig instead of creatiing a new config file for SPL - Update fu540.rst on how to build and flash U-boot SPL Changes in v3: - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ - Split SPL patches into DDR and SPL and spl defconfig - Update fu540/MAINTAINERS file - Update fu540.rst on how to build and flash U-boot SPL Changes in v2: - Add DM driver Sifive OTP - Split SPL patches into multiple patches - Add a seprate patch for _image_binary_end and crc7.c - Add a seprate patch to add board -u-boot.dtsi files - Update FU540 RISC-V documentation Jagan Teki (2): sifive: fu540: Add sample SD gpt partition layout sifive: fu540: Add U-Boot proper sector start Pragnesh Patel (17): misc: add driver for the SiFive otp controller riscv: sifive: fu540: Use OTP DM driver for serial environment variable riscv: Add _image_binary_end for SPL lib: Makefile: build crc7.c when CONFIG_MMC_SPI riscv: sifive: dts: fu540: Add board -u-boot.dtsi files sifive: fu540: add ddr driver sifive: dts: fu540: Add DDR controller and phy register settings riscv: sifive: dts: fu540: add U-Boot dmc node clk: sifive: fu540-prci: Add clock enable and disable ops clk: sifive: fu540-prci: Add ddr clock initialization clk: sifive: fu540-prci: Release ethernet clock reset riscv: sifive: dts: fu540: set ethernet clock rate riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux riscv: cpu: fu540: Add support for cpu fu540 riscv: sifive: fu540: add SPL configuration configs: fu540: Add config options for U-Boot SPL doc: sifive: fu540: Add description for OpenSBI generic platform arch/riscv/Kconfig | 1 + arch/riscv/cpu/fu540/Kconfig | 15 + arch/riscv/cpu/fu540/Makefile | 11 + arch/riscv/cpu/fu540/cpu.c | 22 + arch/riscv/cpu/fu540/dram.c | 38 + arch/riscv/cpu/fu540/spl.c | 23 + arch/riscv/cpu/u-boot-spl.lds | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 89 + arch/riscv/dts/fu540-c000.dtsi | 37 +- .../dts/fu540-hifive-unleashed-a00-ddr.dtsi | 1489 +++++++++++++++++ .../dts/hifive-unleashed-a00-u-boot.dtsi | 22 + arch/riscv/dts/hifive-unleashed-a00.dts | 9 + arch/riscv/include/asm/arch-fu540/clk.h | 14 + arch/riscv/include/asm/arch-fu540/gpio.h | 38 + arch/riscv/include/asm/arch-fu540/spl.h | 14 + board/sifive/fu540/Kconfig | 18 +- board/sifive/fu540/Makefile | 4 + board/sifive/fu540/fu540.c | 134 +- board/sifive/fu540/spl.c | 74 + common/spl/Kconfig | 3 +- configs/sifive_fu540_defconfig | 8 + doc/board/sifive/fu540.rst | 135 +- drivers/clk/sifive/fu540-prci.c | 177 +- drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/sifive-otp.c | 275 +++ drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 2 + drivers/ram/sifive/Kconfig | 13 + drivers/ram/sifive/Makefile | 6 + drivers/ram/sifive/fu540_ddr.c | 410 +++++ include/configs/sifive-fu540.h | 31 + lib/Makefile | 2 +- 33 files changed, 3018 insertions(+), 106 deletions(-) create mode 100644 arch/riscv/cpu/fu540/Kconfig create mode 100644 arch/riscv/cpu/fu540/Makefile create mode 100644 arch/riscv/cpu/fu540/cpu.c create mode 100644 arch/riscv/cpu/fu540/dram.c create mode 100644 arch/riscv/cpu/fu540/spl.c create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h create mode 100644 arch/riscv/include/asm/arch-fu540/spl.h create mode 100644 board/sifive/fu540/spl.c create mode 100644 drivers/misc/sifive-otp.c create mode 100644 drivers/ram/sifive/Kconfig create mode 100644 drivers/ram/sifive/Makefile create mode 100644 drivers/ram/sifive/fu540_ddr.c -- 2.17.1

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[ANN] U-Boot v2020.07-rc3 released
by Tom Rini 02 Jun '20

02 Jun '20

Hey all, It's release day and I've tagged v2020.07-rc3. We're moving along nicely and should continue with prioritizing stabilization and obviously correct updates / migrations at this time. Once again, for a changelog, git log --merges v2020.07-rc2..v2020.07-rc3 and as always, I ask for more details in the PRs people send me so I can put them in the merge commit. I'm going to continue with the every-other-week RC schedule and release on July 6th. I'm currently planning to branch -next on June 8th but PRs can be posted sooner and I'll get them queued up. Thanks all! -- Tom

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[PATCH v2 1/2] arm: dts: bcm283x: Allow UARTs to work before relocation
by Simon Glass 02 Jun '20

02 Jun '20

At present the pinctrl nodes are not enabled in pre-relocation U-Boot so the UARTs do not correctly select the pinconfig to enable the UART pins. Fix this so that the U-Boot banner is printed. This fixes serial output on rpi_3b_32b with the following config.txt options: enable_uart=1 gpu_freq=250 Signed-off-by: Simon Glass <sjg(a)chromium.org> Fixes: 9821636b64 (bcm2835_pinctrl: Probe pre-reloc) --- Changes in v2: - Update commit message arch/arm/dts/bcm283x-u-boot.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/bcm283x-u-boot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi index 36548dad62..68d03627f4 100644 --- a/arch/arm/dts/bcm283x-u-boot.dtsi +++ b/arch/arm/dts/bcm283x-u-boot.dtsi @@ -19,3 +19,11 @@ &gpio { u-boot,dm-pre-reloc; }; + +&uart0_gpio14 { + u-boot,dm-pre-reloc; +}; + +&uart1_gpio14 { + u-boot,dm-pre-reloc; +}; -- 2.25.1.696.g5e7596f4ac-goog

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[PATCH v2 00/12] TI: AM654/J721e: Add support to boot from OSPI
by Vignesh Raghavendra 02 Jun '20

02 Jun '20

This series adds support to boot from OSPI on TI's AM654 and J721e SoCs. These EVMs have Micron MT35x flash and works in 1-1-8 mode. v2: Update READMEs for OSPI boot Update HS EVM defconfigs to fix build issues Lokesh Vutla (1): ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW Vignesh Raghavendra (11): drivers: Descend to drivers/soc unconditionally ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU ARM: dts: k3-am65: Add OSPI DT nodes ARM: dts: k3-j721e: Add OSPI DT nodes configs: am65x_evm: Setup mtdparts for OSPI configs: j721e_evm: Setup mtdparts for OSPI configs: j721e_evm_defconfig: Enable OSPI configs configs: am65x_evm_defconfig: Enable OSPI configs board: ti: Update AM65x and J721e READMEs for OSPI boot configs: ama65x_hs_evm: Enable OSPI related configs configs: j721e_hs_evm: Enable OSPI related configs arch/arm/dts/k3-am65-mcu.dtsi | 38 +++++++++++++ arch/arm/dts/k3-am65.dtsi | 13 ++++- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 19 +++++++ arch/arm/dts/k3-am654-base-board.dts | 36 ++++++++++++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++++++++++++ .../k3-j721e-common-proc-board-u-boot.dtsi | 16 ++++++ arch/arm/dts/k3-j721e-common-proc-board.dts | 33 +++++++++++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 31 +++++++++++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++++++++++++ arch/arm/dts/k3-j721e-som-p0.dtsi | 36 ++++++++++++ arch/arm/dts/k3-j721e.dtsi | 2 + arch/arm/mach-k3/Kconfig | 8 +++ arch/arm/mach-k3/arm64-mmu.c | 7 +++ arch/arm/mach-k3/sysfw-loader.c | 31 ++++++++++- board/ti/am65x/README | 55 +++++++++++++++++++ board/ti/j721e/README | 47 ++++++++++++++++ configs/am65x_evm_a53_defconfig | 25 +++++++++ configs/am65x_evm_r5_defconfig | 17 ++++++ configs/am65x_hs_evm_a53_defconfig | 26 +++++++++ configs/am65x_hs_evm_r5_defconfig | 19 +++++++ configs/j721e_evm_a72_defconfig | 9 ++- configs/j721e_evm_r5_defconfig | 7 +++ configs/j721e_hs_evm_a72_defconfig | 8 ++- configs/j721e_hs_evm_r5_defconfig | 7 +++ drivers/Makefile | 3 +- include/configs/am65x_evm.h | 21 ++++++- include/configs/j721e_evm.h | 14 ++++- 27 files changed, 597 insertions(+), 9 deletions(-) -- 2.25.0

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[PATCH 2/2] sun8i-emac: Added sun8i-v3s-emac example to sun8i-v3s.dtsi
by Benedikt-Alexander Mokroß 02 Jun '20

02 Jun '20

This optional patch adds the needed device-tree node to sun8i-v3s.dtsi to enable ethernet for sun8i-v3s boards. Signed-off-by: Benedikt-Alexander Mokroß <u-boot(a)bamkrs.de> --- arch/arm/dts/sun8i-v3s.dtsi | 48 +++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi index ebefc0fefe..e6c090465a 100644 --- a/arch/arm/dts/sun8i-v3s.dtsi +++ b/arch/arm/dts/sun8i-v3s.dtsi @@ -280,5 +280,53 @@ #interrupt-cells = <3>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + + emac: ethernet@1c30000 { + compatible = "allwinner,sun8i-v3s-emac"; + syscon = <&syscon>; + reg = <0x01c30000 0x104>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <&int_mii_phy>; + phy = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "disabled"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; + + mdio-mux { + compatible = "allwinner,sun8i-h3-mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; + + mdio-parent-bus = <&mdio>; + + int_mdio: mdio@1 { + compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + int_mii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clocks = <&ccu CLK_BUS_EPHY>; + resets = <&ccu RST_BUS_EPHY>; + phy-is-integrated; + }; + }; + }; + }; }; }; -- 2.20.1

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[PATCH 00/24] spi: dm-conversion (part2)
by Jagan Teki 02 Jun '20

02 Jun '20

I believe some boards can directly enable DM_SPI if it has OF_CONTROL enabled already, so now it's the last call for board maintainers to take care of this. Now all boards which are using fsl_espi are removed due to no action on dm conversion from years. These will merge as soon as possible, based on the response. Travis-CI: https://travis-ci.org/github/openedev/u-boot-amarula/builds/691819005 Any inputs? Jagan. Jagan Teki (24): arm: Remove configs/B4420QDS_NAND_defconfig board arm: Remove configs/BSC9131RDB_NAND_SYSCLK100_defconfig board arm: Remove configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig board arm: Remove configs/C29XPCIE_NAND_defconfig board arm: Remove configs/Cyrus_P5020_defconfig board arm: Remove configs/MPC8536DS_36BIT_defconfig board arm: Remove configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig board arm: Remove configs/P1020MBG-PC_36BIT_SDCARD_defconfig board arm: Remove configs/P1022DS_36BIT_NAND_defconfig board arm: Remove configs/P2041RDB_NAND_defconfig board arm: Remove configs/P3041DS_NAND_SECURE_BOOT_defconfig board arm: Remove configs/T1023RDB_NAND_defconfig board arm: Remove configs/T1024QDS_DDR4_SECURE_BOOT_defconfig board arm: Remove configs/T1040D4RDB_NAND_defconfig board arm: Remove configs/T1040QDS_DDR4_defconfig board arm: Remove configs/T2080QDS_NAND_defconfig board arm: Remove configs/T2080RDB_NAND_defconfig board arm: Remove configs/T4160QDS_NAND_defconfig board arm: Remove configs/T4160RDB_defconfig board arm: Remove configs/TWR-P1025_defconfig board arm: Remove configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig board arm: Remove configs/kmcoge4_defconfig board spi: Zap fsl_espi mtd: spi: Drop fsl_espi_spl arch/powerpc/cpu/mpc85xx/Kconfig | 21 - arch/powerpc/cpu/mpc85xx/fdt.c | 7 - arch/powerpc/include/asm/immap_85xx.h | 2 - board/Arcturus/ucp1020/spl.c | 6 - board/freescale/b4860qds/Kconfig | 14 - board/freescale/b4860qds/MAINTAINERS | 17 - board/freescale/b4860qds/Makefile | 16 - board/freescale/b4860qds/b4860qds.c | 1274 ----------------- board/freescale/b4860qds/b4860qds.h | 12 - .../b4860qds/b4860qds_crossbar_con.h | 72 - board/freescale/b4860qds/b4860qds_qixis.h | 28 - board/freescale/b4860qds/b4_pbi.cfg | 30 - board/freescale/b4860qds/b4_rcw.cfg | 7 - board/freescale/b4860qds/ddr.c | 267 ---- board/freescale/b4860qds/eth_b4860qds.c | 454 ------ board/freescale/b4860qds/law.c | 28 - board/freescale/b4860qds/pci.c | 23 - board/freescale/b4860qds/spl.c | 119 -- board/freescale/b4860qds/tlb.c | 154 -- board/freescale/bsc9131rdb/Kconfig | 12 - board/freescale/bsc9131rdb/MAINTAINERS | 9 - board/freescale/bsc9131rdb/Makefile | 21 - board/freescale/bsc9131rdb/README | 151 -- board/freescale/bsc9131rdb/bsc9131rdb.c | 82 -- board/freescale/bsc9131rdb/ddr.c | 170 --- board/freescale/bsc9131rdb/law.c | 18 - board/freescale/bsc9131rdb/spl_minimal.c | 105 -- board/freescale/bsc9131rdb/tlb.c | 61 - board/freescale/bsc9132qds/Kconfig | 14 - board/freescale/bsc9132qds/MAINTAINERS | 25 - board/freescale/bsc9132qds/Makefile | 21 - board/freescale/bsc9132qds/README | 150 -- board/freescale/bsc9132qds/bsc9132qds.c | 432 ------ board/freescale/bsc9132qds/ddr.c | 191 --- board/freescale/bsc9132qds/law.c | 28 - board/freescale/bsc9132qds/spl_minimal.c | 117 -- board/freescale/bsc9132qds/tlb.c | 91 -- board/freescale/c29xpcie/Kconfig | 14 - board/freescale/c29xpcie/MAINTAINERS | 10 - board/freescale/c29xpcie/Makefile | 25 - board/freescale/c29xpcie/README | 100 -- board/freescale/c29xpcie/c29xpcie.c | 159 -- board/freescale/c29xpcie/cpld.c | 133 -- board/freescale/c29xpcie/cpld.h | 39 - board/freescale/c29xpcie/ddr.c | 106 -- board/freescale/c29xpcie/law.c | 18 - board/freescale/c29xpcie/spl.c | 81 -- board/freescale/c29xpcie/spl_minimal.c | 63 - board/freescale/c29xpcie/tlb.c | 84 -- board/freescale/corenet_ds/Kconfig | 59 - board/freescale/corenet_ds/MAINTAINERS | 37 - board/freescale/corenet_ds/Makefile | 16 - board/freescale/corenet_ds/corenet_ds.c | 215 --- board/freescale/corenet_ds/corenet_ds.h | 12 - board/freescale/corenet_ds/ddr.c | 286 ---- board/freescale/corenet_ds/eth_hydra.c | 520 ------- board/freescale/corenet_ds/eth_p4080.c | 483 ------- board/freescale/corenet_ds/eth_superhydra.c | 771 ---------- board/freescale/corenet_ds/p3041ds_ddr.c | 11 - board/freescale/corenet_ds/p4080ds_ddr.c | 347 ----- board/freescale/corenet_ds/p5020ds_ddr.c | 15 - board/freescale/corenet_ds/p5040ds_ddr.c | 15 - board/freescale/corenet_ds/pbi.cfg | 33 - board/freescale/corenet_ds/rcw_p2041rdb.cfg | 11 - board/freescale/corenet_ds/rcw_p3041ds.cfg | 11 - board/freescale/corenet_ds/rcw_p4080ds.cfg | 11 - board/freescale/corenet_ds/rcw_p5020ds.cfg | 11 - board/freescale/corenet_ds/rcw_p5040ds.cfg | 11 - board/freescale/mpc8536ds/Kconfig | 12 - board/freescale/mpc8536ds/MAINTAINERS | 9 - board/freescale/mpc8536ds/Makefile | 10 - board/freescale/mpc8536ds/README | 127 -- board/freescale/mpc8536ds/ddr.c | 59 - board/freescale/mpc8536ds/law.c | 19 - board/freescale/mpc8536ds/mpc8536ds.c | 293 ---- board/freescale/mpc8536ds/tlb.c | 70 - board/freescale/p1010rdb/Kconfig | 14 - board/freescale/p1010rdb/MAINTAINERS | 33 - board/freescale/p1010rdb/Makefile | 24 - board/freescale/p1010rdb/README.P1010RDB-PA | 208 --- board/freescale/p1010rdb/README.P1010RDB-PB | 188 --- board/freescale/p1010rdb/ddr.c | 235 --- board/freescale/p1010rdb/law.c | 16 - board/freescale/p1010rdb/p1010rdb.c | 731 ---------- board/freescale/p1010rdb/spl.c | 114 -- board/freescale/p1010rdb/spl_minimal.c | 65 - board/freescale/p1010rdb/tlb.c | 90 -- board/freescale/p1022ds/Kconfig | 12 - board/freescale/p1022ds/MAINTAINERS | 13 - board/freescale/p1022ds/Makefile | 25 - board/freescale/p1022ds/README | 23 - board/freescale/p1022ds/ddr.c | 106 -- board/freescale/p1022ds/diu.c | 478 ------- board/freescale/p1022ds/law.c | 18 - board/freescale/p1022ds/p1022ds.c | 364 ----- board/freescale/p1022ds/spl.c | 131 -- board/freescale/p1022ds/spl_minimal.c | 71 - board/freescale/p1022ds/tlb.c | 101 -- board/freescale/p1_p2_rdb_pc/Kconfig | 19 - board/freescale/p1_p2_rdb_pc/MAINTAINERS | 51 - board/freescale/p1_p2_rdb_pc/Makefile | 24 - board/freescale/p1_p2_rdb_pc/README | 66 - board/freescale/p1_p2_rdb_pc/ddr.c | 292 ---- board/freescale/p1_p2_rdb_pc/law.c | 22 - board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 536 ------- board/freescale/p1_p2_rdb_pc/spl.c | 123 -- board/freescale/p1_p2_rdb_pc/spl_minimal.c | 63 - board/freescale/p1_p2_rdb_pc/tlb.c | 110 -- board/freescale/p1_twr/Kconfig | 12 - board/freescale/p1_twr/MAINTAINERS | 6 - board/freescale/p1_twr/Makefile | 9 - board/freescale/p1_twr/ddr.c | 69 - board/freescale/p1_twr/law.c | 15 - board/freescale/p1_twr/p1_twr.c | 292 ---- board/freescale/p1_twr/tlb.c | 75 - board/freescale/p2041rdb/Kconfig | 14 - board/freescale/p2041rdb/MAINTAINERS | 11 - board/freescale/p2041rdb/Makefile | 10 - board/freescale/p2041rdb/README | 141 -- board/freescale/p2041rdb/cpld.c | 157 -- board/freescale/p2041rdb/cpld.h | 54 - board/freescale/p2041rdb/ddr.c | 143 -- board/freescale/p2041rdb/eth.c | 201 --- board/freescale/p2041rdb/p2041rdb.c | 244 ---- board/freescale/t102xqds/Kconfig | 14 - board/freescale/t102xqds/MAINTAINERS | 12 - board/freescale/t102xqds/Makefile | 15 - board/freescale/t102xqds/README | 328 ----- board/freescale/t102xqds/ddr.c | 195 --- board/freescale/t102xqds/eth_t102xqds.c | 445 ------ board/freescale/t102xqds/law.c | 31 - board/freescale/t102xqds/pci.c | 23 - board/freescale/t102xqds/spl.c | 156 -- board/freescale/t102xqds/t1024_nand_rcw.cfg | 10 - board/freescale/t102xqds/t1024_pbi.cfg | 26 - board/freescale/t102xqds/t1024_sd_rcw.cfg | 10 - board/freescale/t102xqds/t1024_spi_rcw.cfg | 10 - board/freescale/t102xqds/t102xqds.c | 497 ------- board/freescale/t102xqds/t102xqds.h | 14 - board/freescale/t102xqds/t102xqds_qixis.h | 63 - board/freescale/t102xqds/tlb.c | 116 -- board/freescale/t102xrdb/Kconfig | 14 - board/freescale/t102xrdb/MAINTAINERS | 15 - board/freescale/t102xrdb/Makefile | 17 - board/freescale/t102xrdb/README | 340 ----- board/freescale/t102xrdb/cpld.c | 102 -- board/freescale/t102xrdb/cpld.h | 48 - board/freescale/t102xrdb/ddr.c | 257 ---- board/freescale/t102xrdb/eth_t102xrdb.c | 146 -- board/freescale/t102xrdb/law.c | 31 - board/freescale/t102xrdb/pci.c | 25 - board/freescale/t102xrdb/spl.c | 143 -- board/freescale/t102xrdb/t1023_nand_rcw.cfg | 8 - board/freescale/t102xrdb/t1023_sd_rcw.cfg | 8 - board/freescale/t102xrdb/t1023_spi_rcw.cfg | 8 - board/freescale/t102xrdb/t1024_nand_rcw.cfg | 8 - board/freescale/t102xrdb/t1024_pbi.cfg | 26 - board/freescale/t102xrdb/t1024_sd_rcw.cfg | 8 - board/freescale/t102xrdb/t1024_spi_rcw.cfg | 8 - board/freescale/t102xrdb/t102xrdb.c | 394 ----- board/freescale/t102xrdb/t102xrdb.h | 15 - board/freescale/t102xrdb/tlb.c | 116 -- board/freescale/t1040qds/Kconfig | 14 - board/freescale/t1040qds/MAINTAINERS | 12 - board/freescale/t1040qds/Makefile | 11 - board/freescale/t1040qds/README | 169 --- board/freescale/t1040qds/ddr.c | 142 -- board/freescale/t1040qds/ddr.h | 52 - board/freescale/t1040qds/diu.c | 98 -- board/freescale/t1040qds/eth.c | 592 -------- board/freescale/t1040qds/law.c | 31 - board/freescale/t1040qds/pci.c | 23 - board/freescale/t1040qds/t1040_pbi.cfg | 27 - board/freescale/t1040qds/t1040_rcw.cfg | 7 - board/freescale/t1040qds/t1040qds.c | 305 ---- board/freescale/t1040qds/t1040qds.h | 14 - board/freescale/t1040qds/t1040qds_qixis.h | 51 - board/freescale/t1040qds/tlb.c | 107 -- board/freescale/t104xrdb/Kconfig | 16 - board/freescale/t104xrdb/MAINTAINERS | 38 - board/freescale/t104xrdb/Makefile | 16 - board/freescale/t104xrdb/README | 386 ----- board/freescale/t104xrdb/cpld.c | 115 -- board/freescale/t104xrdb/cpld.h | 46 - board/freescale/t104xrdb/ddr.c | 145 -- board/freescale/t104xrdb/ddr.h | 56 - board/freescale/t104xrdb/diu.c | 84 -- board/freescale/t104xrdb/eth.c | 154 -- board/freescale/t104xrdb/law.c | 31 - board/freescale/t104xrdb/pci.c | 25 - board/freescale/t104xrdb/spl.c | 142 -- board/freescale/t104xrdb/t1040_nand_rcw.cfg | 7 - board/freescale/t104xrdb/t1040_sd_rcw.cfg | 7 - board/freescale/t104xrdb/t1040_spi_rcw.cfg | 7 - board/freescale/t104xrdb/t1040d4_nand_rcw.cfg | 7 - board/freescale/t104xrdb/t1040d4_sd_rcw.cfg | 7 - board/freescale/t104xrdb/t1040d4_spi_rcw.cfg | 7 - board/freescale/t104xrdb/t1042_nand_rcw.cfg | 7 - .../freescale/t104xrdb/t1042_pi_nand_rcw.cfg | 7 - board/freescale/t104xrdb/t1042_pi_sd_rcw.cfg | 7 - board/freescale/t104xrdb/t1042_pi_spi_rcw.cfg | 7 - board/freescale/t104xrdb/t1042_sd_rcw.cfg | 7 - board/freescale/t104xrdb/t1042_spi_rcw.cfg | 7 - board/freescale/t104xrdb/t1042d4_nand_rcw.cfg | 7 - board/freescale/t104xrdb/t1042d4_sd_rcw.cfg | 7 - board/freescale/t104xrdb/t1042d4_spi_rcw.cfg | 7 - board/freescale/t104xrdb/t104x_pbi.cfg | 36 - board/freescale/t104xrdb/t104x_pbi_sb.cfg | 38 - board/freescale/t104xrdb/t104xrdb.c | 161 --- board/freescale/t104xrdb/t104xrdb.h | 12 - board/freescale/t104xrdb/tlb.c | 131 -- board/freescale/t208xqds/Kconfig | 14 - board/freescale/t208xqds/MAINTAINERS | 20 - board/freescale/t208xqds/Makefile | 17 - board/freescale/t208xqds/README | 293 ---- board/freescale/t208xqds/ddr.c | 125 -- board/freescale/t208xqds/ddr.h | 70 - board/freescale/t208xqds/eth_t208xqds.c | 826 ----------- board/freescale/t208xqds/law.c | 33 - board/freescale/t208xqds/pci.c | 25 - board/freescale/t208xqds/spl.c | 142 -- board/freescale/t208xqds/t2080_nand_rcw.cfg | 16 - board/freescale/t208xqds/t2080_sd_rcw.cfg | 16 - board/freescale/t208xqds/t2080_spi_rcw.cfg | 16 - board/freescale/t208xqds/t2081_nand_rcw.cfg | 8 - board/freescale/t208xqds/t2081_sd_rcw.cfg | 8 - board/freescale/t208xqds/t2081_spi_rcw.cfg | 8 - board/freescale/t208xqds/t208x_pbi.cfg | 40 - board/freescale/t208xqds/t208xqds.c | 489 ------- board/freescale/t208xqds/t208xqds.h | 12 - board/freescale/t208xqds/t208xqds_qixis.h | 48 - board/freescale/t208xqds/tlb.c | 152 -- board/freescale/t208xrdb/Kconfig | 14 - board/freescale/t208xrdb/MAINTAINERS | 15 - board/freescale/t208xrdb/Makefile | 16 - board/freescale/t208xrdb/README | 283 ---- board/freescale/t208xrdb/cpld.c | 70 - board/freescale/t208xrdb/cpld.h | 44 - board/freescale/t208xrdb/ddr.c | 118 -- board/freescale/t208xrdb/ddr.h | 46 - board/freescale/t208xrdb/eth_t208xrdb.c | 107 -- board/freescale/t208xrdb/law.c | 33 - board/freescale/t208xrdb/pci.c | 25 - board/freescale/t208xrdb/spl.c | 112 -- board/freescale/t208xrdb/t2080_nand_rcw.cfg | 19 - board/freescale/t208xrdb/t2080_pbi.cfg | 40 - board/freescale/t208xrdb/t2080_sd_rcw.cfg | 19 - board/freescale/t208xrdb/t2080_spi_rcw.cfg | 19 - board/freescale/t208xrdb/t208xrdb.c | 142 -- board/freescale/t208xrdb/t208xrdb.h | 12 - board/freescale/t208xrdb/tlb.c | 152 -- board/freescale/t4qds/Kconfig | 14 - board/freescale/t4qds/MAINTAINERS | 18 - board/freescale/t4qds/Makefile | 15 - board/freescale/t4qds/README | 194 --- board/freescale/t4qds/ddr.c | 134 -- board/freescale/t4qds/ddr.h | 81 -- board/freescale/t4qds/eth.c | 869 ----------- board/freescale/t4qds/law.c | 33 - board/freescale/t4qds/pci.c | 23 - board/freescale/t4qds/spl.c | 145 -- board/freescale/t4qds/t4240emu.c | 85 -- board/freescale/t4qds/t4240qds.c | 927 ------------ board/freescale/t4qds/t4240qds_qixis.h | 42 - board/freescale/t4qds/t4_nand_rcw.cfg | 7 - board/freescale/t4qds/t4_pbi.cfg | 21 - board/freescale/t4qds/t4_sd_rcw.cfg | 7 - board/freescale/t4qds/t4qds.h | 12 - board/freescale/t4qds/tlb.c | 146 -- board/freescale/t4rdb/Kconfig | 14 - board/freescale/t4rdb/MAINTAINERS | 8 - board/freescale/t4rdb/Makefile | 19 - board/freescale/t4rdb/cpld.c | 129 -- board/freescale/t4rdb/cpld.h | 48 - board/freescale/t4rdb/ddr.c | 127 -- board/freescale/t4rdb/ddr.h | 77 - board/freescale/t4rdb/eth.c | 152 -- board/freescale/t4rdb/law.c | 30 - board/freescale/t4rdb/pci.c | 25 - board/freescale/t4rdb/spl.c | 99 -- board/freescale/t4rdb/t4240rdb.c | 150 -- board/freescale/t4rdb/t4_pbi.cfg | 27 - board/freescale/t4rdb/t4_sd_rcw.cfg | 7 - board/freescale/t4rdb/t4rdb.h | 17 - board/freescale/t4rdb/tlb.c | 123 -- board/gdsys/p1022/Kconfig | 22 - board/gdsys/p1022/MAINTAINERS | 9 - board/gdsys/p1022/Makefile | 10 - board/gdsys/p1022/controlcenterd-id.c | 1244 ---------------- board/gdsys/p1022/controlcenterd-id.h | 15 - board/gdsys/p1022/controlcenterd.c | 431 ------ board/gdsys/p1022/ddr.c | 68 - board/gdsys/p1022/diu.c | 85 -- board/gdsys/p1022/law.c | 16 - board/gdsys/p1022/sdhc_boot.c | 63 - board/gdsys/p1022/tlb.c | 73 - board/keymile/Kconfig | 1 - board/keymile/kmp204x/Kconfig | 20 - board/keymile/kmp204x/MAINTAINERS | 6 - board/keymile/kmp204x/Makefile | 10 - board/keymile/kmp204x/ddr.c | 69 - board/keymile/kmp204x/eth.c | 71 - board/keymile/kmp204x/kmp204x.c | 265 ---- board/keymile/kmp204x/kmp204x.h | 8 - board/keymile/kmp204x/law.c | 39 - board/keymile/kmp204x/pbi.cfg | 74 - board/keymile/kmp204x/pci.c | 125 -- board/keymile/kmp204x/rcw_kmp204x.cfg | 11 - board/keymile/kmp204x/tlb.c | 109 -- board/varisys/cyrus/Kconfig | 14 - board/varisys/cyrus/MAINTAINERS | 7 - board/varisys/cyrus/Makefile | 8 - board/varisys/cyrus/README | 19 - board/varisys/cyrus/cyrus.c | 117 -- board/varisys/cyrus/cyrus.h | 9 - board/varisys/cyrus/ddr.c | 191 --- board/varisys/cyrus/eth.c | 100 -- board/varisys/cyrus/law.c | 26 - board/varisys/cyrus/pbi.cfg | 35 - board/varisys/cyrus/pci.c | 23 - board/varisys/cyrus/rcw_p5020_v2.cfg | 11 - board/varisys/cyrus/rcw_p5040.cfg | 11 - board/varisys/cyrus/tlb.c | 105 -- common/spl/Kconfig | 4 - configs/B4420QDS_NAND_defconfig | 69 - configs/B4420QDS_SPIFLASH_defconfig | 55 - configs/B4420QDS_defconfig | 53 - configs/B4860QDS_NAND_defconfig | 69 - configs/B4860QDS_SECURE_BOOT_defconfig | 56 - configs/B4860QDS_SPIFLASH_defconfig | 55 - configs/B4860QDS_SRIO_PCIE_BOOT_defconfig | 49 - configs/B4860QDS_defconfig | 53 - configs/BSC9131RDB_NAND_SYSCLK100_defconfig | 64 - configs/BSC9131RDB_NAND_defconfig | 63 - .../BSC9131RDB_SPIFLASH_SYSCLK100_defconfig | 56 - configs/BSC9131RDB_SPIFLASH_defconfig | 56 - ...BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig | 66 - configs/BSC9132QDS_NAND_DDRCLK100_defconfig | 72 - ...BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig | 66 - configs/BSC9132QDS_NAND_DDRCLK133_defconfig | 72 - .../BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig | 65 - configs/BSC9132QDS_NOR_DDRCLK100_defconfig | 63 - .../BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig | 65 - configs/BSC9132QDS_NOR_DDRCLK133_defconfig | 63 - ...C9132QDS_SDCARD_DDRCLK100_SECURE_defconfig | 66 - configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig | 63 - ...C9132QDS_SDCARD_DDRCLK133_SECURE_defconfig | 66 - configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig | 63 - ...132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig | 66 - .../BSC9132QDS_SPIFLASH_DDRCLK100_defconfig | 64 - ...132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig | 66 - .../BSC9132QDS_SPIFLASH_DDRCLK133_defconfig | 64 - configs/C29XPCIE_NAND_defconfig | 70 - configs/C29XPCIE_NOR_SECBOOT_defconfig | 55 - configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 57 - configs/C29XPCIE_SPIFLASH_defconfig | 55 - configs/C29XPCIE_defconfig | 53 - configs/Cyrus_P5020_defconfig | 45 - configs/Cyrus_P5040_defconfig | 45 - configs/MPC8536DS_36BIT_defconfig | 61 - configs/MPC8536DS_SDCARD_defconfig | 60 - configs/MPC8536DS_SPIFLASH_defconfig | 61 - configs/MPC8536DS_defconfig | 60 - .../P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig | 63 - configs/P1010RDB-PA_36BIT_NAND_defconfig | 85 -- .../P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig | 62 - configs/P1010RDB-PA_36BIT_NOR_defconfig | 67 - configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 79 - ...010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig | 64 - configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 81 -- configs/P1010RDB-PA_NAND_SECBOOT_defconfig | 62 - configs/P1010RDB-PA_NAND_defconfig | 84 -- configs/P1010RDB-PA_NOR_SECBOOT_defconfig | 60 - configs/P1010RDB-PA_NOR_defconfig | 66 - configs/P1010RDB-PA_SDCARD_defconfig | 78 - .../P1010RDB-PA_SPIFLASH_SECBOOT_defconfig | 63 - configs/P1010RDB-PA_SPIFLASH_defconfig | 80 -- .../P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig | 63 - configs/P1010RDB-PB_36BIT_NAND_defconfig | 85 -- .../P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig | 62 - configs/P1010RDB-PB_36BIT_NOR_defconfig | 67 - configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 79 - ...010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig | 64 - configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 81 -- configs/P1010RDB-PB_NAND_SECBOOT_defconfig | 62 - configs/P1010RDB-PB_NAND_defconfig | 84 -- configs/P1010RDB-PB_NOR_SECBOOT_defconfig | 61 - configs/P1010RDB-PB_NOR_defconfig | 66 - configs/P1010RDB-PB_SDCARD_defconfig | 78 - .../P1010RDB-PB_SPIFLASH_SECBOOT_defconfig | 63 - configs/P1010RDB-PB_SPIFLASH_defconfig | 80 -- configs/P1020MBG-PC_36BIT_SDCARD_defconfig | 67 - configs/P1020MBG-PC_36BIT_defconfig | 55 - configs/P1020MBG-PC_SDCARD_defconfig | 66 - configs/P1020MBG-PC_defconfig | 54 - configs/P1020RDB-PC_36BIT_NAND_defconfig | 85 -- configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 80 -- configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 82 -- configs/P1020RDB-PC_36BIT_defconfig | 69 - configs/P1020RDB-PC_NAND_defconfig | 84 -- configs/P1020RDB-PC_SDCARD_defconfig | 79 - configs/P1020RDB-PC_SPIFLASH_defconfig | 81 -- configs/P1020RDB-PC_defconfig | 68 - configs/P1020RDB-PD_NAND_defconfig | 88 -- configs/P1020RDB-PD_SDCARD_defconfig | 83 -- configs/P1020RDB-PD_SPIFLASH_defconfig | 85 -- configs/P1020RDB-PD_defconfig | 72 - configs/P1020UTM-PC_36BIT_SDCARD_defconfig | 67 - configs/P1020UTM-PC_36BIT_defconfig | 55 - configs/P1020UTM-PC_SDCARD_defconfig | 66 - configs/P1020UTM-PC_defconfig | 54 - configs/P1021RDB-PC_36BIT_NAND_defconfig | 84 -- configs/P1021RDB-PC_36BIT_SDCARD_defconfig | 79 - configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig | 81 -- configs/P1021RDB-PC_36BIT_defconfig | 67 - configs/P1021RDB-PC_NAND_defconfig | 83 -- configs/P1021RDB-PC_SDCARD_defconfig | 78 - configs/P1021RDB-PC_SPIFLASH_defconfig | 80 -- configs/P1021RDB-PC_defconfig | 66 - configs/P1022DS_36BIT_NAND_defconfig | 80 -- configs/P1022DS_36BIT_SDCARD_defconfig | 74 - configs/P1022DS_36BIT_SPIFLASH_defconfig | 76 - configs/P1022DS_36BIT_defconfig | 62 - configs/P1022DS_NAND_defconfig | 79 - configs/P1022DS_SDCARD_defconfig | 73 - configs/P1022DS_SPIFLASH_defconfig | 75 - configs/P1022DS_defconfig | 61 - configs/P1024RDB_36BIT_defconfig | 61 - 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configs/T1040QDS_SECURE_BOOT_defconfig delete mode 100644 configs/T1040QDS_defconfig delete mode 100644 configs/T1040RDB_NAND_defconfig delete mode 100644 configs/T1040RDB_SDCARD_defconfig delete mode 100644 configs/T1040RDB_SECURE_BOOT_defconfig delete mode 100644 configs/T1040RDB_SPIFLASH_defconfig delete mode 100644 configs/T1040RDB_defconfig delete mode 100644 configs/T1042D4RDB_NAND_defconfig delete mode 100644 configs/T1042D4RDB_SDCARD_defconfig delete mode 100644 configs/T1042D4RDB_SECURE_BOOT_defconfig delete mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig delete mode 100644 configs/T1042D4RDB_defconfig delete mode 100644 configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig delete mode 100644 configs/T1042RDB_PI_NAND_defconfig delete mode 100644 configs/T1042RDB_PI_SDCARD_defconfig delete mode 100644 configs/T1042RDB_PI_SPIFLASH_defconfig delete mode 100644 configs/T1042RDB_PI_defconfig delete mode 100644 configs/T1042RDB_SECURE_BOOT_defconfig delete mode 100644 configs/T1042RDB_defconfig delete mode 100644 configs/T2080QDS_NAND_defconfig delete mode 100644 configs/T2080QDS_SDCARD_defconfig delete mode 100644 configs/T2080QDS_SECURE_BOOT_defconfig delete mode 100644 configs/T2080QDS_SPIFLASH_defconfig delete mode 100644 configs/T2080QDS_SRIO_PCIE_BOOT_defconfig delete mode 100644 configs/T2080QDS_defconfig delete mode 100644 configs/T2080RDB_NAND_defconfig delete mode 100644 configs/T2080RDB_SDCARD_defconfig delete mode 100644 configs/T2080RDB_SECURE_BOOT_defconfig delete mode 100644 configs/T2080RDB_SPIFLASH_defconfig delete mode 100644 configs/T2080RDB_SRIO_PCIE_BOOT_defconfig delete mode 100644 configs/T2080RDB_defconfig delete mode 100644 configs/T2081QDS_NAND_defconfig delete mode 100644 configs/T2081QDS_SDCARD_defconfig delete mode 100644 configs/T2081QDS_SPIFLASH_defconfig delete mode 100644 configs/T2081QDS_SRIO_PCIE_BOOT_defconfig delete mode 100644 configs/T2081QDS_defconfig delete mode 100644 configs/T4160QDS_NAND_defconfig delete mode 100644 configs/T4160QDS_SDCARD_defconfig delete mode 100644 configs/T4160QDS_SECURE_BOOT_defconfig delete mode 100644 configs/T4160QDS_defconfig delete mode 100644 configs/T4160RDB_defconfig delete mode 100644 configs/T4240QDS_NAND_defconfig delete mode 100644 configs/T4240QDS_SDCARD_defconfig delete mode 100644 configs/T4240QDS_SECURE_BOOT_defconfig delete mode 100644 configs/T4240QDS_SRIO_PCIE_BOOT_defconfig delete mode 100644 configs/T4240QDS_defconfig delete mode 100644 configs/T4240RDB_SDCARD_defconfig delete mode 100644 configs/T4240RDB_defconfig delete mode 100644 configs/TWR-P1025_defconfig delete mode 100644 configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig delete mode 100644 configs/controlcenterd_36BIT_SDCARD_defconfig delete mode 100644 configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig delete mode 100644 configs/controlcenterd_TRAILBLAZER_defconfig delete mode 100644 configs/kmcoge4_defconfig delete mode 100644 drivers/mtd/spi/fsl_espi_spl.c delete mode 100644 drivers/spi/fsl_espi.c delete mode 100644 include/configs/B4860QDS.h delete mode 100644 include/configs/BSC9131RDB.h delete mode 100644 include/configs/BSC9132QDS.h delete mode 100644 include/configs/C29XPCIE.h delete mode 100644 include/configs/MPC8536DS.h delete mode 100644 include/configs/P1010RDB.h delete mode 100644 include/configs/P1022DS.h delete mode 100644 include/configs/P2041RDB.h delete mode 100644 include/configs/P3041DS.h delete mode 100644 include/configs/P4080DS.h delete mode 100644 include/configs/P5020DS.h delete mode 100644 include/configs/P5040DS.h delete mode 100644 include/configs/T102xQDS.h delete mode 100644 include/configs/T102xRDB.h delete mode 100644 include/configs/T1040QDS.h delete mode 100644 include/configs/T104xRDB.h delete mode 100644 include/configs/T208xQDS.h delete mode 100644 include/configs/T208xRDB.h delete mode 100644 include/configs/T4240QDS.h delete mode 100644 include/configs/T4240RDB.h delete mode 100644 include/configs/controlcenterd.h delete mode 100644 include/configs/cyrus.h delete mode 100644 include/configs/kmp204x.h delete mode 100644 include/configs/p1_p2_rdb_pc.h delete mode 100644 include/configs/p1_twr.h -- 2.25.1

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[PULL] Pull request: u-boot-stm32 for v2020.07: u-boot-stm32-20200528
by Patrick DELAUNAY 02 Jun '20

02 Jun '20

Hi Tom, Please pull the STM32 related patches for v2020.07: u-boot-stm32-20200528 With the following changes: - stm32mp15: fix DT on DHCOR SOM and avenger96 board - stm32mp15: re-enable KS8851 on DHCOM CI status: https://gitlab.denx.de/u-boot/custodians/u-boot-stm/pipelines/3462 Thanks, Patrick The following changes since commit ab80137cc436e977ef91a154372ae5aeae3f4fb0: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-05-27 10:56:25 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git tags/u-boot-stm32-20200528 for you to fetch changes up to 08f372ac2ade7a87581c00aa8fc59a2878525cb2: ARM: dts: stm32: Disable SDR104 mode on AV96 (2020-05-28 08:52:04 +0200) ---------------------------------------------------------------- - stm32mp15: fix DT on DHCOR SOM and avenger96 board - stm32mp15: re-enable KS8851 on DHCOM ---------------------------------------------------------------- Marek Vasut (5): ARM: stm32: Re-enable KS8851 on DHCOM ARM: stm32: Hog GPIO PF7 high on DHCOR to unlock SPI NOR nWP ARM: dts: stm32: Add alternate pinmux for I2C2 pins ARM: dts: stm32: Repair I2C2 operation on AV96 ARM: dts: stm32: Disable SDR104 mode on AV96 arch/arm/dts/stm32mp15-pinctrl.dtsi | 17 +++++++++++++++++ arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 7 +++---- arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 9 +++++++++ configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + 5 files changed, 31 insertions(+), 4 deletions(-)

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