January 2020 - U-Boot

Re: [PATCH v2 9/9] doc: update FU540 RISC-V documentation
by Rick Chen 20 Jan '20

20 Jan '20

Hi Pragnesh > From: Pragnesh Patel [mailto:pragnesh.patel@sifive.com] > Sent: Friday, January 17, 2020 8:46 PM > To: u-boot(a)lists.denx.de > Cc: atish.patra(a)wdc.com; palmerdabbelt(a)google.com; bmeng.cn(a)gmail.com; paul.walmsley(a)sifive.com; jagan(a)amarulasolutions.com; troy.benjegerdes(a)sifive.com; anup.patel(a)wdc.com; sagar.kadam(a)sifive.com; Pragnesh Patel; Anup Patel; Rick Jian-Zhi Chen(陳建志) > Subject: [PATCH v2 9/9] doc: update FU540 RISC-V documentation > > Add descriptions about U-Boot SPL feature and how to build and run. > > Signed-off-by: Pragnesh Patel <pragnesh.patel(a)sifive.com> > --- > doc/board/sifive/fu540.rst | 370 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 370 insertions(+) > > diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index 3937222c6c..e15427414d 100644 > --- a/doc/board/sifive/fu540.rst > +++ b/doc/board/sifive/fu540.rst > @@ -363,3 +363,373 @@ load uImage. > > Please press Enter to activate this console. > / # > + > + > +Running U-Boot SPL > +------------------ > +The U-Boot SPL will boot in M mode and load the FIT image which include > +OpenSBI and U-Boot proper images. After loading progress, it will jump > +to OpenSBI first and then U-Boot proper which will run in S mode. > + > + > +How to build U-Boot SPL > +----------------------- > +Before building U-Boot SPL, OpenSBI must be build first. OpenSBI can be > +cloned and build for FU540 as below: > + Please add .. code-block:: console > +git clone https://github.com/riscv/opensbi.git > +cd opensbi > +make PLATFORM=sifive/fu540 > + > +Copy OpenSBI FW_DYNAMIC image > +(build/platform/sifive/fu540/firmware/fw_dynamic.bin) > +into U-Boot root directory > + > + > +How to build U-Boot SPL booting from MMC > +---------------------------------------- > +With sifive_fu540_spl_defconfig: > + > +1. Add the RISC-V toolchain to your PATH. > +2. Setup ARCH & cross compilation enviornment variable: > + > +.. code-block:: none > + > + export ARCH=riscv > + export CROSS_COMPILE=<riscv64 toolchain prefix> > + > +3. make sifive_fu540_spl_defconfig > +4. make > + > + > +Flashing > +-------- > + > +The current U-Boot port is supported in S-mode only. > + > +A prior stage M-mode firmware/bootloader (e.g OpenSBI) is required to > +boot the u-boot.bin in S-mode and provide M-mode runtime services. > + > +First partition of the sdcard should contain "u-boot.itb" and Partition > +type should be of "8300 Linux filesystem". > + > +.. code-block:: none > + > + sudo dd if=spl/u-boot-spl.bin of=/dev/disk2s4 bs=1024 > + sudo dd if=u-boot.itb of=/dev/disk2s1 bs=1024 > + > +Booting > +------- > +Once you plugin the sdcard and power up, you should see the U-Boot prompt. > + > +Sample boot log from HiFive Unleashed board > +------------------------------------------- > + > +.. code-block:: none > + > + U-Boot SPL 2020.01-00176-gfb5af3c225 (Jan 16 2020 - 19:23:14 +0530) > + Trying to boot from MMC1 > + > + > + U-Boot 2020.01-00176-gfb5af3c225 (Jan 16 2020 - 19:23:14 +0530) > + > + CPU: rv64imafdc > + Model: SiFive HiFive Unleashed A00 > + DRAM: 8 GiB > + MMC: spi@10050000:mmc@0: 0 > + In: serial@10010000 > + Out: serial@10010000 > + Err: serial@10010000 > + Board serial number should not be 0 !! > + Net: Please fix ERROR: trailing whitespace #98: FILE: doc/board/sifive/fu540.rst:443: > + Warning: ethernet@10090000 (eth0) using random MAC address - 9e:33:74:04:6a:eb > + eth0: ethernet@10090000 > + Hit any key to stop autoboot: 0 > + => version > + U-Boot 2020.01-00176-gfb5af3c225 (Jan 16 2020 - 19:23:14 +0530) > + > + riscv64-unknown-linux-gnu-gcc (crosstool-NG 1.24.0.37-3f461da) 9.2.0 > + GNU ld (crosstool-NG 1.24.0.37-3f461da) 2.32 > + => mmc info > + Device: spi@10050000:mmc@0 > + Manufacturer ID: 3 > + OEM: 5344 > + Name: SC16G > + Bus Speed: 20000000 > + Mode: SD Legacy > + Rd Block Len: 512 > + SD version 2.0 > + High Capacity: Yes > + Capacity: 14.8 GiB > + Bus Width: 1-bit > + Erase Group Size: 512 Bytes > + => mmc part > + > + Partition Map for MMC device 0 -- Partition Type: EFI > + > + Part Start LBA End LBA Name > + Attributes > + Type GUID > + Partition GUID > + 1 0x00000800 0x000107ff "Linux filesystem" > + attrs: 0x0000000000000000 > + type: 0fc63daf-8483-4772-8e79-3d69d8477de4 > + guid: 36aab838-b418-4342-929e-678d85fb4438 > + 2 0x00040800 0x00ecdfde "Linux filesystem" > + attrs: 0x0000000000000000 > + type: 0fc63daf-8483-4772-8e79-3d69d8477de4 > + guid: 118ac296-e3ff-4ef2-b435-ec6a7bebdd6e > + > +Now you can configure your networking, tftp server and use tftp boot > +method to load uImage. > + > +.. code-block:: none > + > + => setenv serverip 172.16.35.74 > + => setenv ipaddr 172.16.35.40 > + => tftpboot 0x83000000 fit.itb > + ethernet@10090000: PHY present at 0 > + ethernet@10090000: Starting autonegotiation... > + ethernet@10090000: Autonegotiation complete > + ethernet@10090000: link up, 100Mbps full-duplex (lpa: 0x41e1) > + Using ethernet@10090000 device > + TFTP from server 172.16.35.74; our IP address is 172.16.35.40 > + Filename 'fit.itb'. > + Load address: 0x83000000 > + Loading: ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################################################# > + ################################### > + 880.9 KiB/s > + done > + Bytes transferred = 13823823 (d2ef4f hex) > + => bootm 0x83000000 > + ## Loading kernel from FIT Image at 83000000 ... > + Using 'config-1' configuration > + Trying 'kernel@1' kernel subimage > + Description: Linux kernel > + Type: Kernel Image > + Compression: uncompressed > + Data Start: 0x830000d8 > + Data Size: 9247260 Bytes = 8.8 MiB > + Architecture: RISC-V > + OS: Linux > + Load Address: 0x80200000 > + Entry Point: 0x80200000 > + Verifying Hash Integrity ... OK > + ## Loading ramdisk from FIT Image at 83000000 ... > + Using 'config-1' configuration > + Trying 'ramdisk@1' ramdisk subimage > + Description: ramdisk > + Type: RAMDisk Image > + Compression: gzip compressed > + Data Start: 0x838d3378 > + Data Size: 4568674 Bytes = 4.4 MiB > + Architecture: RISC-V > + OS: Linux > + Load Address: 0x82000000 > + Entry Point: unavailable > + Verifying Hash Integrity ... OK > + Loading ramdisk from 0x838d3378 to 0x82000000 > + WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its file! > + ## Loading fdt from FIT Image at 83000000 ... > + Using 'config-1' configuration > + Trying 'fdt@1' fdt subimage > + Description: unavailable > + Type: Flat Device Tree > + Compression: uncompressed > + Data Start: 0x838d1b80 > + Data Size: 6023 Bytes = 5.9 KiB > + Architecture: RISC-V > + Verifying Hash Integrity ... OK > + Booting using the fdt blob at 0x838d1b80 > + Loading Kernel Image > + Using Device Tree in place at 00000000838d1b80, end 00000000838d6306 > + > + Starting kernel ... > + > + [ 0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000 > + [ 0.000000] Linux version 5.3.0-13236-g97f9a3c4eee5 (pragneshp@sachinj2-OptiPlex-7010) (gcc version 8.2.0 (Buildroot 2018.11-rc2-00003-ga0787e9 > + [ 0.000000] earlycon: sifive0 at MMIO 0x0000000010010000 (options '') > + [ 0.000000] printk: bootconsole [sifive0] enabled > + [ 0.000000] Initial ramdisk at: 0x(____ptrval____) (4568674 bytes) > + [ 0.000000] Zone ranges: > + [ 0.000000] DMA32 [mem 0x0000000080200000-0x00000000ffffffff] > + [ 0.000000] Normal [mem 0x0000000100000000-0x000000027fffffff] > + [ 0.000000] Movable zone start for each node > + [ 0.000000] Early memory node ranges > + [ 0.000000] node 0: [mem 0x0000000080200000-0x000000027fffffff] > + [ 0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000027fffffff] > + [ 0.000000] software IO TLB: mapped [mem 0xfbfff000-0xfffff000] (64MB) > + [ 0.000000] CPU with hartid=0 is not available > + [ 0.000000] CPU with hartid=0 is not available > + [ 0.000000] elf_hwcap is 0x112d > + [ 0.000000] percpu: Embedded 17 pages/cpu s30680 r8192 d30760 u69632 > + [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2067975 > + [ 0.000000] Kernel command line: earlycon=sifive,0x10010000 console=ttySIF0,115200 > + [ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear) > + [ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) > + [ 0.000000] Sorting __ex_table... > + [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off > + [ 0.000000] Memory: 8179828K/8386560K available (6081K kernel code, 388K rwdata, 2025K rodata, 209K init, 307K bss, 206732K reserved, 0K cma-r) > + [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 > + [ 0.000000] rcu: Hierarchical RCU implementation. > + [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. > + [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. > + [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 > + [ 0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0 > + [ 0.000000] plic: mapped 53 interrupts with 4 handlers for 9 contexts. > + [ 0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1] > + [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns > + [ 0.000006] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns > + [ 0.008479] Console: colour dummy device 80x25 > + [ 0.012817] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000) > + [ 0.022842] pid_max: default: 32768 minimum: 301 > + [ 0.027915] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear) > + [ 0.035329] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear) > + [ 0.044787] rcu: Hierarchical SRCU implementation. > + [ 0.049253] smp: Bringing up secondary CPUs ... > + [ 0.055031] smp: Brought up 1 node, 4 CPUs > + [ 0.059662] devtmpfs: initialized > + [ 0.063815] random: get_random_u32 called from bucket_table_alloc.isra.29+0x4e/0x160 with crng_init=0 > + [ 0.072585] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns > + [ 0.081998] futex hash table entries: 1024 (order: 4, 65536 bytes, linear) > + [ 0.089506] NET: Registered protocol family 16 > + [ 0.105912] vgaarb: loaded > + [ 0.108166] SCSI subsystem initialized > + [ 0.111949] usbcore: registered new interface driver usbfs > + [ 0.117105] usbcore: registered new interface driver hub > + [ 0.122485] usbcore: registered new device driver usb > + [ 0.128071] clocksource: Switched to clocksource riscv_clocksource > + [ 0.140265] NET: Registered protocol family 2 > + [ 0.144438] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear) > + [ 0.152609] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear) > + [ 0.162230] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear) > + [ 0.172148] TCP: Hash tables configured (established 65536 bind 65536) > + [ 0.178333] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear) > + [ 0.185129] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear) > + [ 0.192542] NET: Registered protocol family 1 > + [ 0.196747] RPC: Registered named UNIX socket transport module. > + [ 0.202140] RPC: Registered udp transport module. > + [ 0.206824] RPC: Registered tcp transport module. > + [ 0.211500] RPC: Registered tcp NFSv4.1 backchannel transport module. > + [ 0.217929] PCI: CLS 0 bytes, default 64 > + [ 0.222133] Unpacking initramfs... > + [ 0.578890] Freeing initrd memory: 4460K > + [ 0.583069] workingset: timestamp_bits=62 max_order=21 bucket_order=0 > + [ 0.596744] NFS: Registering the id_resolver key type > + [ 0.601095] Key type id_resolver registered > + [ 0.605191] Key type id_legacy registered > + [ 0.609190] nfs4filelayout_init: NFSv4 File Layout Driver Registering... > + [ 0.616026] 9p: Installing v9fs 9p2000 file system support > + [ 0.621682] NET: Registered protocol family 38 > + [ 0.625801] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) > + [ 0.633151] io scheduler mq-deadline registered > + [ 0.637659] io scheduler kyber registered > + [ 0.685692] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled > + [ 0.692289] 10010000.serial: ttySIF0 at MMIO 0x10010000 (irq = 4, base_baud = 0) is a SiFive UART v0 > + [ 0.700672] printk: console [ttySIF0] enabled > + [ 0.700672] printk: console [ttySIF0] enabled > + [ 0.709334] printk: bootconsole [sifive0] disabled > + [ 0.709334] printk: bootconsole [sifive0] disabled > + [ 0.719129] 10011000.serial: ttySIF1 at MMIO 0x10011000 (irq = 1, base_baud = 0) is a SiFive UART v0 > + [ 0.728453] [drm] radeon kernel modesetting enabled. > + [ 0.745398] loop: module loaded > + [ 0.748320] sifive_spi 10040000.spi: mapped; irq=3, cs=1 > + [ 0.753595] sifive_spi 10050000.spi: mapped; irq=5, cs=1 > + [ 0.758916] libphy: Fixed MDIO Bus: probed > + [ 0.762992] macb 10090000.ethernet: Registered clk switch 'sifive-gemgxl-mgmt' > + [ 0.769750] macb: GEM doesn't support hardware ptp. > + [ 0.774636] libphy: MACB_mii_bus: probed > + [ 0.940362] Microsemi VSC8541 SyncE 10090000.ethernet-ffffffff:00: attached PHY driver [Microsemi VSC8541 SyncE] (mii_bus:phy_addr=10090000.et) > + [ 0.954905] macb 10090000.ethernet eth0: Cadence GEM rev 0x10070109 at 0x10090000 irq 6 (9e:33:74:04:6a:eb) > + [ 0.964712] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k > + [ 0.970429] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. > + [ 0.976422] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver > + [ 0.982845] ehci-pci: EHCI PCI platform driver > + [ 0.987301] ehci-platform: EHCI generic platform driver > + [ 0.992561] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver > + [ 0.998660] ohci-pci: OHCI PCI platform driver > + [ 1.003105] ohci-platform: OHCI generic platform driver > + [ 1.008570] usbcore: registered new interface driver uas > + [ 1.013632] usbcore: registered new interface driver usb-storage > + [ 1.019706] mousedev: PS/2 mouse device common for all mice > + [ 1.050576] mmc_spi spi1.0: SD/MMC host mmc0, no DMA, no WP, no poweroff, cd polling > + [ 1.057720] usbcore: registered new interface driver usbhid > + [ 1.063103] usbhid: USB HID core driver > + [ 1.067815] NET: Registered protocol family 10 > + [ 1.072430] Segment Routing with IPv6 > + [ 1.075375] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver > + [ 1.081750] NET: Registered protocol family 17 > + [ 1.085874] 9pnet: Installing 9P2000 support > + [ 1.089962] Key type dns_resolver registered > + [ 1.096391] Freeing unused kernel memory: 208K > + [ 1.100047] This architecture does not have kernel memory protection. > + [ 1.106486] Run /init as init process > + Starting syslogd: OK > + Starting klogd: OK > + Starting mdev... > + /etc/init.d/S10mdev: line 9: can't create /proc/sys/kernel/hotplug: nonexistent directory > + [ 1.167865] mmc0: host does not support reading read-only switch, assuming write-enable > + [ 1.175122] mmc0: new SDHC card on SPI > + [ 1.180128] mmcblk0: mmc0:0000 SC16G 14.8 GiB > + [ 1.214481] mmcblk0: p1 p2 p4 > + modprobe: can't change directory to '/lib/modules': No such file or directory > + Initializing random number generator... [ 1.655480] random: dd: uninitialized urandom read (512 bytes read) > + done. > + Starting network: udhcpc: started, v1.29.3 > + udhcpc: sending discover > + [ 3.724710] macb 10090000.ethernet eth0: link up (100/Full) > + [ 3.729529] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready > + udhcpc: sending discover > + udhcpc: sending discover > + udhcpc: sending select for 172.16.35.78 > + udhcpc: lease of 172.16.35.78 obtained, lease time 28800 > + deleting routers > + adding dns 172.16.34.150 > + adding dns 172.16.24.25 > + OK > + Starting dropbear sshd: [ 7.932851] random: dropbear: uninitialized urandom read (32 bytes read) > + OK > + > + Welcome to Buildroot > + buildroot login: root > + Password: Please fix ERROR: trailing whitespace #389: FILE: doc/board/sifive/fu540.rst:734: + Password: $ > + # > -- > 2.17.1 >

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[PATCH] ARC: Switch to generic accessors
by Alexey Brodkin 20 Jan '20

20 Jan '20

First of all U-Boot is not that performance oriented as real run-time software like OS or user bare-metal app so we may afford being not super fast as we only being executed once. That in return allows us to be more universal and support wider variety of devices. And looking forward that will significantly reduce maintenance and simplify support of newer architectures. And while at it we add quad-word accessors like readq(), writeq() etc. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- arch/arc/include/asm/io.h | 204 +++++++++++++++++----------------------------- 1 file changed, 75 insertions(+), 129 deletions(-) diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h index fa844b54f4..70d050590d 100644 --- a/arch/arc/include/asm/io.h +++ b/arch/arc/include/asm/io.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * Copyright (C) 2013-2014, 2020 Synopsys, Inc. All rights reserved. */ #ifndef __ASM_ARC_IO_H @@ -54,135 +54,98 @@ static inline void sync(void) /* Not yet implemented */ } -static inline u8 __raw_readb(const volatile void __iomem *addr) -{ - u8 b; +#define __arch_getb(a) (*(unsigned char *)(a)) +#define __arch_getw(a) (*(unsigned short *)(a)) +#define __arch_getl(a) (*(unsigned int *)(a)) +#define __arch_getq(a) (*(unsigned long long *)(a)) - __asm__ __volatile__("ldb%U1 %0, %1\n" - : "=r" (b) - : "m" (*(volatile u8 __force *)addr) - : "memory"); - return b; -} +#define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) +#define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) +#define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) +#define __arch_putq(v, a) (*(unsigned long long *)(a) = (v)) -static inline u16 __raw_readw(const volatile void __iomem *addr) -{ - u16 s; +#define __raw_writeb(v, a) __arch_putb(v, a) +#define __raw_writew(v, a) __arch_putw(v, a) +#define __raw_writel(v, a) __arch_putl(v, a) +#define __raw_writeq(v, a) __arch_putq(v, a) - __asm__ __volatile__("ldw%U1 %0, %1\n" - : "=r" (s) - : "m" (*(volatile u16 __force *)addr) - : "memory"); - return s; -} +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) +#define __raw_readq(a) __arch_getq(a) -static inline u32 __raw_readl(const volatile void __iomem *addr) +static inline void __raw_writesb(unsigned long addr, const void *data, + int bytelen) { - u32 w; + u8 *buf = (uint8_t *)data; - __asm__ __volatile__("ld%U1 %0, %1\n" - : "=r" (w) - : "m" (*(volatile u32 __force *)addr) - : "memory"); - return w; + while (bytelen--) + __arch_putb(*buf++, addr); } -static inline void __raw_writeb(u8 b, volatile void __iomem *addr) +static inline void __raw_writesw(unsigned long addr, const void *data, + int wordlen) { - __asm__ __volatile__("stb%U1 %0, %1\n" - : - : "r" (b), "m" (*(volatile u8 __force *)addr) - : "memory"); -} + u16 *buf = (uint16_t *)data; -static inline void __raw_writew(u16 s, volatile void __iomem *addr) -{ - __asm__ __volatile__("stw%U1 %0, %1\n" - : - : "r" (s), "m" (*(volatile u16 __force *)addr) - : "memory"); + while (wordlen--) + __arch_putw(*buf++, addr); } -static inline void __raw_writel(u32 w, volatile void __iomem *addr) +static inline void __raw_writesl(unsigned long addr, const void *data, + int longlen) { - __asm__ __volatile__("st%U1 %0, %1\n" - : - : "r" (w), "m" (*(volatile u32 __force *)addr) - : "memory"); -} + u32 *buf = (uint32_t *)data; -static inline int __raw_readsb(unsigned int addr, void *data, int bytelen) -{ - __asm__ __volatile__ ("1:ld.di r8, [r0]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "stb.ab r8, [r1, 1]\n" - : - : "r" (addr), "r" (data), "r" (bytelen) - : "r8"); - return bytelen; + while (longlen--) + __arch_putl(*buf++, addr); } -static inline int __raw_readsw(unsigned int addr, void *data, int wordlen) +static inline void __raw_readsb(unsigned long addr, void *data, int bytelen) { - __asm__ __volatile__ ("1:ld.di r8, [r0]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "stw.ab r8, [r1, 2]\n" - : - : "r" (addr), "r" (data), "r" (wordlen) - : "r8"); - return wordlen; -} + u8 *buf = (uint8_t *)data; -static inline int __raw_readsl(unsigned int addr, void *data, int longlen) -{ - __asm__ __volatile__ ("1:ld.di r8, [r0]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.ab r8, [r1, 4]\n" - : - : "r" (addr), "r" (data), "r" (longlen) - : "r8"); - return longlen; + while (bytelen--) + *buf++ = __arch_getb(addr); } -static inline int __raw_writesb(unsigned int addr, void *data, int bytelen) +static inline void __raw_readsw(unsigned long addr, void *data, int wordlen) { - __asm__ __volatile__ ("1:ldb.ab r8, [r1, 1]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.di r8, [r0, 0]\n" - : - : "r" (addr), "r" (data), "r" (bytelen) - : "r8"); - return bytelen; -} + u16 *buf = (uint16_t *)data; -static inline int __raw_writesw(unsigned int addr, void *data, int wordlen) -{ - __asm__ __volatile__ ("1:ldw.ab r8, [r1, 2]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.ab.di r8, [r0, 0]\n" - : - : "r" (addr), "r" (data), "r" (wordlen) - : "r8"); - return wordlen; + while (wordlen--) + *buf++ = __arch_getw(addr); } -static inline int __raw_writesl(unsigned int addr, void *data, int longlen) +static inline void __raw_readsl(unsigned long addr, void *data, int longlen) { - __asm__ __volatile__ ("1:ld.ab r8, [r1, 4]\n" - "sub.f r2, r2, 1\n" - "bnz.d 1b\n" - "st.ab.di r8, [r0, 0]\n" - : - : "r" (addr), "r" (data), "r" (longlen) - : "r8"); - return longlen; + u32 *buf = (uint32_t *)data; + + while (longlen--) + *buf++ = __arch_getl(addr); } +/* + * Relaxed I/O memory access primitives. These follow the Device memory + * ordering rules but do not guarantee any ordering relative to Normal memory + * accesses. + */ +#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; }) +#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ + __raw_readw(c)); __r; }) +#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ + __raw_readl(c)); __r; }) +#define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \ + __raw_readq(c)); __r; }) + +#define writeb_relaxed(v, c) ((void)__raw_writeb((v), (c))) +#define writew_relaxed(v, c) ((void)__raw_writew((__force u16) \ + cpu_to_le16(v), (c))) +#define writel_relaxed(v, c) ((void)__raw_writel((__force u32) \ + cpu_to_le32(v), (c))) +#define writeq_relaxed(v, c) ((void)__raw_writeq((__force u64) \ + cpu_to_le64(v), (c))) + /* * MMIO can also get buffered/optimized in micro-arch, so barriers needed * Based on ARM model for the typical use case @@ -195,32 +158,15 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen) * * http://lkml.kernel.org/r/20150622133656.GG1583@arm.com */ -#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) -#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) -#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) - -#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) -#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) -#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) - -/* - * Relaxed API for drivers which can handle barrier ordering themselves - * - * Also these are defined to perform little endian accesses. - * To provide the typical device register semantics of fixed endian, - * swap the byte order for Big Endian - * - * http://lkml.kernel.org/r/201603100845.30602.arnd@arndb.de - */ -#define readb_relaxed(c) __raw_readb(c) -#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ - __raw_readw(c)); __r; }) -#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ - __raw_readl(c)); __r; }) - -#define writeb_relaxed(v,c) __raw_writeb(v,c) -#define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) -#define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) +#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) +#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) +#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) +#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; }) + +#define writeb(v, c) ({ __iowmb(); writeb_relaxed(v, c); }) +#define writew(v, c) ({ __iowmb(); writew_relaxed(v, c); }) +#define writel(v, c) ({ __iowmb(); writel_relaxed(v, c); }) +#define writeq(v, c) ({ __iowmb(); writeq_relaxed(v, c); }) #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) -- 2.16.2

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[PATCH] arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi
by Peter Robinson 20 Jan '20

20 Jan '20

Move the U-Boot specific bits to a -u-boot.dtsi include so all the u-boot.dtsi hierarchy is included. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-puma-ddr1333.dts | 2 -- arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-puma-ddr1600.dts | 2 -- arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-puma-ddr1866.dts | 2 -- arch/arm/dts/rk3399-puma-u-boot.dtsi | 24 ++++++++++++++++++++ arch/arm/dts/rk3399-puma.dtsi | 19 ---------------- 8 files changed, 36 insertions(+), 25 deletions(-) create mode 100644 arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-u-boot.dtsi diff --git a/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi new file mode 100644 index 0000000000..39d3927f49 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1333.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1333.dts b/arch/arm/dts/rk3399-puma-ddr1333.dts index 8f1193cbe6..80f27699f4 100644 --- a/arch/arm/dts/rk3399-puma-ddr1333.dts +++ b/arch/arm/dts/rk3399-puma-ddr1333.dts @@ -6,5 +6,3 @@ /dts-v1/; #include "rk3399-puma.dtsi" -#include "rk3399-sdram-ddr3-1333.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi new file mode 100644 index 0000000000..be58311dc4 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1600.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1600.dts b/arch/arm/dts/rk3399-puma-ddr1600.dts index 42763f82d0..cb76b0165c 100644 --- a/arch/arm/dts/rk3399-puma-ddr1600.dts +++ b/arch/arm/dts/rk3399-puma-ddr1600.dts @@ -7,5 +7,3 @@ #include "rk3399-puma.dtsi" #include "rk3399-u-boot.dtsi" -#include "rk3399-sdram-ddr3-1600.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi new file mode 100644 index 0000000000..48da076329 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1866.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts index bb86a448fa..80f27699f4 100644 --- a/arch/arm/dts/rk3399-puma-ddr1866.dts +++ b/arch/arm/dts/rk3399-puma-ddr1866.dts @@ -6,5 +6,3 @@ /dts-v1/; #include "rk3399-puma.dtsi" -#include "rk3399-sdram-ddr3-1866.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-u-boot.dtsi b/arch/arm/dts/rk3399-puma-u-boot.dtsi new file mode 100644 index 0000000000..52f62b5d39 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-u-boot.dtsi" +/ { + config { + u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ + u-boot,boot-led = "module_led"; + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = \ + "same-as-spl", &spiflash, &sdhci, &sdmmc; + }; + + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; + +}; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index aae9998871..558b6337df 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -10,25 +10,6 @@ model = "Theobroma Systems RK3399-Q7 SoM"; compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399"; - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ - u-boot,boot-led = "module_led"; - sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = \ - "same-as-spl", &spiflash, &sdhci, &sdmmc; - }; - - aliases { - spi0 = &spi1; - spi1 = &spi5; - }; - leds { compatible = "gpio-leds"; pinctrl-names = "default"; -- 2.24.1

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[PATCH] arm: dts: rockchip: rk3399: Move U-Boot specific bits to rk3399-u-boot
by Peter Robinson 20 Jan '20

20 Jan '20

There's some bits in the U-Boot rk3399.dtsi that aren't yet in the upstream Linux dtsi but are needed for early boot. This moves them to the u-boot.dtsi to make it easier to sync the rest of rk3399.dtsi with upstream. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- arch/arm/dts/rk3399-u-boot.dtsi | 55 +++++++++++++++++++++++++++------ arch/arm/dts/rk3399.dtsi | 38 ----------------------- 2 files changed, 45 insertions(+), 48 deletions(-) diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 40240bbfc2..8b857ccfc7 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -2,19 +2,58 @@ /* * Copyright (C) 2019 Jagan Teki <jagan(a)amarulasolutions.com> */ +#define USB_CLASS_HUB 9 + +/ { + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + cic: syscon@ff620000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-cic", "syscon"; + reg = <0x0 0xff620000 0x0 0x100>; + }; + + dfi: dfi@ff630000 { + u-boot,dm-pre-reloc; + reg = <0x00 0xff630000 0x00 0x4000>; + compatible = "rockchip,rk3399-dfi"; + rockchip,pmu = <&pmugrf>; + clocks = <&cru PCLK_DDR_MON>; + clock-names = "pclk_ddr_mon"; + }; + + dmc: dmc { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-dmc"; + devfreq-events = <&dfi>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + reg = <0x0 0xffa80000 0x0 0x0800 + 0x0 0xffa80800 0x0 0x1800 + 0x0 0xffa82000 0x0 0x2000 + 0x0 0xffa84000 0x0 0x1000 + 0x0 0xffa88000 0x0 0x0800 + 0x0 0xffa88800 0x0 0x1800 + 0x0 0xffa8a000 0x0 0x2000 + 0x0 0xffa8c000 0x0 0x1000>; + }; + + pmusgrf: syscon@ff330000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pmusgrf", "syscon"; + reg = <0x0 0xff330000 0x0 0xe3d4>; + }; -&cic { - u-boot,dm-pre-reloc; }; &cru { u-boot,dm-pre-reloc; }; -&dmc { - u-boot,dm-pre-reloc; -}; - &grf { u-boot,dm-pre-reloc; }; @@ -39,10 +78,6 @@ u-boot,dm-pre-reloc; }; -&pmusgrf { - u-boot,dm-pre-reloc; -}; - &sdhci { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 3f773b10f4..6b7c136ab8 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -10,7 +10,6 @@ #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/power/rk3399-power.h> #include <dt-bindings/thermal/thermal.h> -#define USB_CLASS_HUB 9 / { compatible = "rockchip,rk3399"; @@ -34,8 +33,6 @@ serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; - mmc0 = &sdhci; - mmc1 = &sdmmc; }; cpus { @@ -1080,11 +1077,6 @@ }; }; - pmusgrf: syscon@ff330000 { - compatible = "rockchip,rk3399-pmusgrf", "syscon"; - reg = <0x0 0xff330000 0x0 0xe3d4>; - }; - spi3: spi@ff350000 { compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; reg = <0x0 0xff350000 0x0 0x1000>; @@ -1200,36 +1192,6 @@ status = "disabled"; }; - cic: syscon@ff620000 { - compatible = "rockchip,rk3399-cic", "syscon"; - reg = <0x0 0xff620000 0x0 0x100>; - }; - - dfi: dfi@ff630000 { - reg = <0x00 0xff630000 0x00 0x4000>; - compatible = "rockchip,rk3399-dfi"; - rockchip,pmu = <&pmugrf>; - clocks = <&cru PCLK_DDR_MON>; - clock-names = "pclk_ddr_mon"; - status = "disabled"; - }; - - dmc: dmc { - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&cru SCLK_DDRCLK>; - clock-names = "dmc_clk"; - reg = <0x0 0xffa80000 0x0 0x0800 - 0x0 0xffa80800 0x0 0x1800 - 0x0 0xffa82000 0x0 0x2000 - 0x0 0xffa84000 0x0 0x1000 - 0x0 0xffa88000 0x0 0x0800 - 0x0 0xffa88800 0x0 0x1800 - 0x0 0xffa8a000 0x0 0x2000 - 0x0 0xffa8c000 0x0 0x1000>; - }; - efuse0: efuse@ff690000 { compatible = "rockchip,rk3399-efuse"; reg = <0x0 0xff690000 0x0 0x80>; -- 2.24.1

2 1

[PATCH] arm: dts: rockchip: Update EVB/Puma devices to upstream USB/dwc3 conventions
by Peter Robinson 20 Jan '20

20 Jan '20

The upstream linux kernel for the Rockchip 3399 SoC use usbdrd3 naming so move the two remaining devices over to that for their device trees to make it easier to sync with upstream DTs. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- arch/arm/dts/rk3399-evb.dts | 4 ++-- arch/arm/dts/rk3399-puma.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index 8e887f3a17..4129e902a8 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -176,7 +176,7 @@ status = "okay"; }; -&dwc3_typec0 { +&usbdrd3_0 { vbus-supply = <&vcc5v0_typec0>; status = "okay"; }; @@ -189,7 +189,7 @@ status = "okay"; }; -&dwc3_typec1 { +&usbdrd3_1 { vbus-supply = <&vcc5v0_typec1>; status = "okay"; }; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 74368da550..aae9998871 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -518,7 +518,7 @@ status = "disabled"; }; -&dwc3_typec0 { +&usbdrd3_0 { status = "okay"; }; @@ -530,7 +530,7 @@ status = "disabled"; }; -&dwc3_typec1 { +&usbdrd3_1 { status = "okay"; tsd,usb-port-power = "usbhub_enable"; }; -- 2.24.1

2 1

[PATCH] ARC: Don't mess with endianess settings
by Alexey Brodkin 20 Jan '20

20 Jan '20

There seem to be not that much sense in explicitly setting endianess flags for the tools as we assume the tool with required endianess is used. I.e. we use LE tools for building for LE targets and BE tools for BE targets. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- arch/arc/config.mk | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arc/config.mk b/arch/arc/config.mk index 18005d9993..4b8a0870eb 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -8,16 +8,6 @@ else CONFIG_SYS_BIG_ENDIAN = 1 endif -ifdef CONFIG_SYS_LITTLE_ENDIAN -PLATFORM_LDFLAGS += -EL -PLATFORM_CPPFLAGS += -mlittle-endian -endif - -ifdef CONFIG_SYS_BIG_ENDIAN -PLATFORM_LDFLAGS += -EB -PLATFORM_CPPFLAGS += -mbig-endian -endif - ifdef CONFIG_ARC_MMU_VER CONFIG_MMU = 1 endif -- 2.16.2

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[PATCH v2 13/21] dts: mtmips: add alternative pinmux node for uart2
by Weijie Gao 20 Jan '20

20 Jan '20

This patch adds a new pinmux for UART2, which shares the pins with SPIS. Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v1: newly added --- arch/mips/dts/mt7628a.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi index 744594c45a..f265cb6ad9 100644 --- a/arch/mips/dts/mt7628a.dtsi +++ b/arch/mips/dts/mt7628a.dtsi @@ -93,6 +93,11 @@ function = "uart2"; }; + uart2_pwm_pins: uart2_pwm_pins { + groups = "spis"; + function = "pwm_uart2"; + }; + i2c_pins: i2c_pins { groups = "i2c"; function = "i2c"; -- 2.17.1

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[PATCH 1/2] MAINTAINERS, cortina: add common feature and platform enablement flag
by Alex Nemirovsky 20 Jan '20

20 Jan '20

Add a CONFIG which allows Cortina Access (CA) drivers to be configured in both ARM and MIPS based SoC platforms. Additionally, Cortina Access specific common board features will be enabled/disabled via a Cortina specific KConfig. Signed-off-by: Alex Nemirovsky <alex.nemirovsky(a)cortina-access.com> --- MAINTAINERS | 2 ++ board/cortina/common/Kconfig | 5 +++++ 2 files changed, 7 insertions(+) create mode 100644 board/cortina/common/Kconfig diff --git a/MAINTAINERS b/MAINTAINERS index c40e9ee..394a089 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -177,6 +177,7 @@ ARM CORTINA ACCESS CAxxxx M: Alex Nemirovsky <alex.nemirovsky(a)cortina-access.com> S: Supported F: board/cortina/common/* +F: board/cortina/common/Kconfig F: board/cortina/common/armv8/* ARM/CZ.NIC TURRIS MOX SUPPORT @@ -657,6 +658,7 @@ MIPS CORTINA ACCESS CAxxxx M: Alex Nemirovsky <alex.nemirovsky(a)cortina-access.com> S: Supported F: board/cortina/common/* +F: board/cortina/common/Kconfig F: board/cortina/common/mips/* MIPS MSCC diff --git a/board/cortina/common/Kconfig b/board/cortina/common/Kconfig new file mode 100644 index 0000000..a3d361e --- /dev/null +++ b/board/cortina/common/Kconfig @@ -0,0 +1,5 @@ +config CORTINA_PLATFORM + bool "Cortina-Access Platform" + default y + help + Select this option for Cortina-Access platform. -- 2.7.4

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[U-Boot] [PATCH] omap34xx: SPL: enable MMC raw boot with u-boot.img
by Denis 'GNUtoo' Carikli 20 Jan '20

20 Jan '20

The following commit enabled raw SPL booting: 22d90d560a omap3: Use raw SPL by default for mmc1 but it was reverted by the following commit: 821c89d38c Revert "omap3: Use raw SPL by default for mmc1" because SPL is unable to distinguish between RAW images and garbage. However if CONFIG_SPL_RAW_IMAGE_SUPPORT is disabled, SPL does identify if there is a valid image with spl_parse_image_header. With this change, and CONFIG_SPL_RAW_IMAGE_SUPPORT disabled, raw MMC boot will be tried first, and if it fails, it FS will be tried. The two scenarios have been tested on a BeagleBoard XM Revision C1. Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)cyberdimension.org> --- arch/arm/mach-omap2/boot-common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 734fa9d9e6..a48244e1c5 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -132,8 +132,10 @@ void save_omap_boot_params(void) (boot_device <= MMC_BOOT_DEVICES_END)) { switch (boot_device) { case BOOT_DEVICE_MMC1: +#ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT boot_mode = MMCSD_MODE_FS; break; +#endif case BOOT_DEVICE_MMC2: boot_mode = MMCSD_MODE_RAW; break; -- 2.24.0

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[PATCH v2 00/21] Refactor the architecture parts of mt7628
by Weijie Gao 20 Jan '20

20 Jan '20

This patch series are divided into two parts: The main part is to rewrite the whole architecture code of mt7628: 1. Lock parts of the d-cache for initial stack so the rest of the code can be reimplemented in C. 2. Memory controller & DDR initialization have been fully written to support detecting DDR size automatically. 3. DDR calibration has also been reimplemented with a clear logic. 4. Implemented a new sysreset driver to take advantage of the reset controller so we can drop the use of syscon-based sysreset to reduce size. The second part is to add SPL support for mt7628: 1. With SPL enabled we can build the ROM-bootable and RAM-bootable binary simultaneously, and we can drop RAM boot related configs and defconfig files. 2. Generate compressed u-boot.bin image for SPL to reduce size of final combined binary. 3. Enable DM support for SPL for a more flexible device probing. 4. Add a demo board (mt7628_rfb) aims at router application. Changes since v1: 1. Split 'mips: mtmips: rewrite lowlevel codes of mt7628' into multiple patches. 2. Dropped a patch which tried to use customized get_tbclk(). 3. Dropped a patch which tried to rename mt7628a.dtsi to mt7628.dtsi 4. Refactor the patch which restores exception vector base before booting linux. 5. Define a new option to enable u_boot_list in SPL. 6. Enable compressed spl payload for all boards. 7. Enable DM and DT support for linkit and gardena-smart-gateway. 8. Complete pinmux for all three UARTs for SPL. 9. Rewrite u_boot_lzma_img.py. Weijie Gao (21): mips: add support to restore exception vector base before booting linux mips: mtmips: add predefined i-cache/d-cache size and linesize mips: add an option to support initialize SRAM for initial stack mips: start.S: avoid overwriting outside gd when clearing global data in stack sysreset: add reset controller based reboot driver mips: mtmips: make use of sysreset-resetctrl for mt7628 soc configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards mips: add a mtmips-specific field to architecture-specific global data mips: add a option to support not reserving malloc space on initial stack mips: mtmips: rewrite lowlevel codes of mt7628 dts: mtmips: remove all unusable nodes and properties from mt7628s.dtsi dts: mtmips: add u-boot,dm-pre-reloc for some nodes in mt7628a.dtsi dts: mtmips: add alternative pinmux node for uart2 mips: enable support for appending dtb to spl binary mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds lib: enable lzma decompression support for SPL build Makefile: add support to generate LZMA compressed u-boot image tools: binman: add etype file for u-boot-lzma-img mips: mtmips: add SPL support mips: mtmips: enable SPL for all boards mips: mtmips: add support for mt7628-rfb Makefile | 22 ++ arch/mips/Kconfig | 60 ++++ arch/mips/cpu/start.S | 16 +- arch/mips/cpu/u-boot-spl.lds | 4 +- arch/mips/dts/Makefile | 1 + arch/mips/dts/mediatek,mt7628-rfb.dts | 67 ++++ arch/mips/dts/mt7628-u-boot.dtsi | 24 ++ arch/mips/dts/mt7628a.dtsi | 93 ++--- arch/mips/include/asm/global_data.h | 3 + arch/mips/include/asm/u-boot-mips.h | 2 + arch/mips/lib/bootm.c | 3 + arch/mips/lib/traps.c | 19 + arch/mips/mach-mtmips/Kconfig | 133 +++---- arch/mips/mach-mtmips/Makefile | 8 +- arch/mips/mach-mtmips/cpu.c | 58 +--- arch/mips/mach-mtmips/ddr_cal.c | 211 +++++++++++ arch/mips/mach-mtmips/ddr_calibrate.c | 309 ----------------- arch/mips/mach-mtmips/ddr_init.c | 194 +++++++++++ arch/mips/mach-mtmips/include/mach/ddr.h | 52 +++ arch/mips/mach-mtmips/include/mach/mc.h | 180 ++++++++++ arch/mips/mach-mtmips/include/mach/serial.h | 13 + arch/mips/mach-mtmips/include/mach/spl.h | 14 + arch/mips/mach-mtmips/lowlevel_init.S | 328 ------------------ arch/mips/mach-mtmips/mt7628/Makefile | 6 + arch/mips/mach-mtmips/mt7628/ddr.c | 173 +++++++++ arch/mips/mach-mtmips/mt7628/init.c | 109 ++++++ arch/mips/mach-mtmips/mt7628/lowlevel_init.S | 161 +++++++++ arch/mips/mach-mtmips/mt7628/mt7628.h | 104 ++++++ arch/mips/mach-mtmips/mt7628/serial.c | 34 ++ arch/mips/mach-mtmips/mt76xx.h | 32 -- arch/mips/mach-mtmips/spl.c | 35 ++ arch/mips/mach-mtmips/spl_load.c | 121 +++++++ board/gardena/smart-gateway-mt7688/board.c | 2 + board/mediatek/mt7628/Kconfig | 12 + board/mediatek/mt7628/MAINTAINERS | 7 + board/mediatek/mt7628/Makefile | 3 + board/mediatek/mt7628/board.c | 8 + ...gardena-smart-gateway-mt7688-ram_defconfig | 74 ---- .../gardena-smart-gateway-mt7688_defconfig | 15 +- configs/linkit-smart-7688-ram_defconfig | 65 ---- configs/linkit-smart-7688_defconfig | 15 +- configs/mt7628_rfb_defconfig | 45 +++ drivers/sysreset/Kconfig | 6 + drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_resetctl.c | 48 +++ .../configs/gardena-smart-gateway-mt7688.h | 18 +- include/configs/linkit-smart-7688.h | 19 +- include/configs/mt7628.h | 52 +++ lib/Kconfig | 5 + lib/Makefile | 1 + tools/binman/README.entries | 15 + tools/binman/etype/u_boot_lzma_img.py | 28 ++ 52 files changed, 1987 insertions(+), 1041 deletions(-) create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi create mode 100644 arch/mips/mach-mtmips/ddr_cal.c delete mode 100644 arch/mips/mach-mtmips/ddr_calibrate.c create mode 100644 arch/mips/mach-mtmips/ddr_init.c create mode 100644 arch/mips/mach-mtmips/include/mach/ddr.h create mode 100644 arch/mips/mach-mtmips/include/mach/mc.h create mode 100644 arch/mips/mach-mtmips/include/mach/serial.h create mode 100644 arch/mips/mach-mtmips/include/mach/spl.h delete mode 100644 arch/mips/mach-mtmips/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/Makefile create mode 100644 arch/mips/mach-mtmips/mt7628/ddr.c create mode 100644 arch/mips/mach-mtmips/mt7628/init.c create mode 100644 arch/mips/mach-mtmips/mt7628/lowlevel_init.S create mode 100644 arch/mips/mach-mtmips/mt7628/mt7628.h create mode 100644 arch/mips/mach-mtmips/mt7628/serial.c delete mode 100644 arch/mips/mach-mtmips/mt76xx.h create mode 100644 arch/mips/mach-mtmips/spl.c create mode 100644 arch/mips/mach-mtmips/spl_load.c create mode 100644 board/mediatek/mt7628/Kconfig create mode 100644 board/mediatek/mt7628/MAINTAINERS create mode 100644 board/mediatek/mt7628/Makefile create mode 100644 board/mediatek/mt7628/board.c delete mode 100644 configs/gardena-smart-gateway-mt7688-ram_defconfig delete mode 100644 configs/linkit-smart-7688-ram_defconfig create mode 100644 configs/mt7628_rfb_defconfig create mode 100644 drivers/sysreset/sysreset_resetctl.c create mode 100644 include/configs/mt7628.h create mode 100644 tools/binman/etype/u_boot_lzma_img.py -- 2.17.1

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