September 2019 - U-Boot

[U-Boot] Use of the go command
by Herburger, Gregor 11 Sep '19

11 Sep '19

Hello, i use the go command from the hush shell to execute a function from environment. That function has been initially compiled in U-Boot and was first called in board_late_init(). I call the function by using go #address on my Arm Cortex A-7 machine the do_go_exec becomes: e1a03000 mov r3, r0 e1a00001 mov r0, r1 e1a01002 mov r1, r2 e12fff13 bx r3 so instruction set is exchanged. This seems to work the function returns and returns back to the hush-shell. My question is now: Is it safe to use the go command to execute U-boot functions or do I miss something here? Does the exchange of the instruction set have some influence on the further execution of U-boot.? Mit freundlichen Grüßen / Best regards i.A. Gregor Herburger Entwicklung Software Delling Tel. +49 8153 9308-809, Fax +49 8153 9308-7809 gregor.herburger(a)tq-group.com TQ-Systems GmbH Mühlstraße 2, Gut Delling, 82229 Seefeld Amtsgericht München, HRB 105018 Sitz der Gesellschaft: Seefeld Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider www.tq-group.com

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[U-Boot] [PATCH] xilinx: Add support for SBC
by Michal Simek 11 Sep '19

11 Sep '19

There is a need to differentiate fit images for Zynq and ZynqMP U-Boot. Zynq is going to use u-boot-zynq.img and ZynqMP u-boot-zynqmp.img. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/topic_miami.h | 1 + include/configs/xilinx_zynqmp.h | 2 +- include/configs/zynq-common.h | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index b98656dd4c17..2ff0f694bb69 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -24,6 +24,7 @@ #undef CONFIG_SPL_ETH_SUPPORT #undef CONFIG_SPL_MAX_FOOTPRINT #define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS +#undef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" /* sspi command isn't useful */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index a1c55a83069e..ddeb24a0af6e 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -235,7 +235,7 @@ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* unused */ # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* unused */ # define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* unused */ -# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-zynqmp.img" #endif #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index ae08ebf2afc1..c765875ca85d 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -277,7 +277,7 @@ /* MMC support */ #ifdef CONFIG_MMC_SDHCI_ZYNQ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-zynq.img" #endif /* Address in RAM where the parameters must be copied by SPL. */ -- 2.17.1

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[U-Boot] [PATCH v4 00/15] Improvement for the DWC3 USB generic driver and fixes for the K2 platforms
by Jean-Jacques Hiblot 11 Sep '19

11 Sep '19

The K2 platforms have shown boot issues after switching to the DWC3 generic driver. Those are due to the fact that the USB domains are not turned off before booting linux and the phy were not properly initialized. Fixing it by improving the DWC3-generic driver and handling the USB power domain in the PHY driver. Improvements to the DWC3 generic driver are: - core: read quirks properties from DT and apply the fixes. - add a new host driver that uses the DWC3 core (more generic than xhci-dwc3). This should enable most platforms to drop their own version of the xhci-driver to use the generic one instead. This series also removes the now unused xhci-zynqmp driver and tries to better manage the Kconfig options related to DWC3 gadget/host mode selection. This has been tested with K2 and DRA7 platforms (host and device modes). Travis build: https://travis-ci.org/jjhiblot/u-boot/builds/583080674 Changes in v4: - removed patches already merged (DWC3 fixes) - update more defconfigs (u200, sei510, rock64-rk332 and odroid-n2) - Fix the test of the USB_DWC3_GADGET option. IS_ENABLED() requires the whole option name including the 'CONFIG_' prefix Changes in v3: - updated log message when defaulting to super speed Changes in v2: Update commit log Select USB_GADGET_DUALSPEED if USB_DWC3_GADGET is selected Jean-Jacques Hiblot (15): usb: host: remove the xhci-zynqmp driver usb: dwc3: switch to peripheral mode when exiting usb: xhci: move xhci.h to include usb usb: dwc3: always use the inlined version of dwc3_host_init/dwc3_host_exit usb: dwc3-generic: use platdata usb: dwc3-generic: factorize code usb: dwc3-generic: add a new host driver that uses the dwc3 core usb: dwc3-generic: if no max speed is specified in DT, assume super speed usb: dwc3: Add dwc3_of_parse() to get quirks information from DT usb: dwc3: Kconfig: get rid of obsolete mode selection ARM: keystone: increase PSC timeout ARM: keystone: Do not enable the USB power domains at the board level phy: keystone-usb: handle the transition of the USB power domain configs: k2g_evm_defconfig: disable XHCI_DWC3 and enable KEYSTONE_USB_PHY ARM: DTS: keystone: complete the description of the USB PHY devices MAINTAINERS | 1 + arch/arm/dts/keystone-k2e-evm-u-boot.dtsi | 32 ++++ arch/arm/dts/keystone-k2g-evm-u-boot.dtsi | 28 ++++ arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi | 14 ++ arch/arm/dts/keystone-k2l-evm-u-boot.dtsi | 18 +++ .../arm/mach-keystone/include/mach/psc_defs.h | 2 +- board/ti/ks2_evm/board.c | 13 -- configs/avnet_ultra96_rev1_defconfig | 1 - configs/evb-rk3328_defconfig | 1 + configs/k2g_evm_defconfig | 3 +- configs/odroid-n2_defconfig | 1 + configs/rock64-rk3328_defconfig | 1 + configs/sei510_defconfig | 1 + configs/u200_defconfig | 1 + .../xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 - .../xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 - .../xilinx_zynqmp_zc1751_xm017_dc3_defconfig | 1 - configs/xilinx_zynqmp_zcu100_revC_defconfig | 1 - configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 1 - configs/xilinx_zynqmp_zcu102_revA_defconfig | 1 - configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 - configs/xilinx_zynqmp_zcu104_revA_defconfig | 1 - configs/xilinx_zynqmp_zcu104_revC_defconfig | 1 - configs/xilinx_zynqmp_zcu106_revA_defconfig | 1 - configs/xilinx_zynqmp_zcu111_revA_defconfig | 1 - drivers/phy/keystone-usb-phy.c | 22 +++ drivers/usb/dwc3/Kconfig | 18 +-- drivers/usb/dwc3/core.c | 84 +++++++++- drivers/usb/dwc3/core.h | 6 +- drivers/usb/dwc3/dwc3-generic.c | 146 ++++++++++++++---- drivers/usb/host/Kconfig | 7 - drivers/usb/host/Makefile | 1 - drivers/usb/host/xhci-dwc3.c | 2 +- drivers/usb/host/xhci-exynos5.c | 2 +- drivers/usb/host/xhci-fsl.c | 2 +- drivers/usb/host/xhci-mem.c | 2 +- drivers/usb/host/xhci-mvebu.c | 2 +- drivers/usb/host/xhci-omap.c | 2 +- drivers/usb/host/xhci-pci.c | 2 +- drivers/usb/host/xhci-rcar.c | 2 +- drivers/usb/host/xhci-ring.c | 2 +- drivers/usb/host/xhci-rockchip.c | 2 +- drivers/usb/host/xhci-zynqmp.c | 146 ------------------ drivers/usb/host/xhci.c | 2 +- drivers/usb/phy/omap_usb_phy.c | 2 +- {drivers/usb/host => include/usb}/xhci.h | 0 46 files changed, 331 insertions(+), 251 deletions(-) create mode 100644 arch/arm/dts/keystone-k2l-evm-u-boot.dtsi delete mode 100644 drivers/usb/host/xhci-zynqmp.c rename {drivers/usb/host => include/usb}/xhci.h (100%) -- 2.17.1

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[U-Boot] [u-boot][xhci] Dealing with XHCI controllers with spurious success
by Aaron Williams 11 Sep '19

11 Sep '19

Hi All, I'm running into a problem with the XHCI driver on our SOC where I am getting spurious success TRBs after a short packet response. In this particular case, the driver for a USB network controller has a receive buffer that crosses a 64K boundary. This results in two TRBs being created to handle this with the first TRB having the chain and ISP bits set and the second having the IOC and ISP bits set as expected in this case. The network controller has a short response (as is expected) followed by a success response event (which is also valid) for the second TRB. The U-Boot XHCI driver, however, does not handle this properly. The xhci_bulk_tx function only looks at the first response and does not dequeue the second success response. The problem is when the next transaction occurs it dequeues the success response from the previous transaction so the responses events no longer match the TRBs. At some point the network driver goes from receive to transmit and at this point the driver panics because the event is still a response from a previous receive event and not the transmit event causing the endpoints to mismatch. This only happens in the two TRB case due to the receive buffer crossing a 64K boundary. The short packet response points to the first TRB and the success points to the second TRB. In the Linux driver I see the XHCI_SPURIOUS_SUCCESS flag is available. I'm not certain if this applies to our hardware or not. In any case, this could be solved in one of two ways. One way to solve this is to make sure that any driver where a short response is possible to not have the buffer cross a 64K boundary. The other (and correct) solution is to have the XHCI driver handle this case. If a short packet response is received and there are multiple TRBs involved, check if there is an additional success response that points to the last TRB. To me it seems valid that the two response events are received. The specification only says that there will be one response if the TRB has both the ISP and IOC bits set, but this is not the case. I came across this commit in the Linux kernel which seems to address this case: https://kernel.opensuse.org/cgit/kernel/commit/?id=ad808333d8201d53075a11bc… -Aaron

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[U-Boot] [PATCH] usb: musb_hcd: fix compilation error
by Jean-Jacques Hiblot 11 Sep '19

11 Sep '19

commit 65c1f9820c8f79f "usb: Add nonblock argument to submit_int_msg" breaks the musb_hcd driver. Fixing it by adding the missing argument Signed-off-by: Jean-Jacques Hiblot <jjhiblot(a)ti.com> --- This patch is intended only for the u-boot-usb tree. drivers/usb/musb/musb_hcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 1f2805270a..adcd319b6d 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -1049,8 +1049,8 @@ int usb_lowlevel_stop(int index) * This function supports usb interrupt transfers. Currently, usb interrupt * transfers are not supported. */ -int submit_int_msg(struct usb_device *dev, unsigned long pipe, - void *buffer, int len, int interval) +int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, + int len, int interval, bool nonblock) { int dir_out = usb_pipeout(pipe); int ep = usb_pipeendpoint(pipe); -- 2.17.1

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[U-Boot] [PATCH] arm64: versal: Also record versal name to versal fragment
by Michal Simek 11 Sep '19

11 Sep '19

Just to make sure that also drivers with versal name are assigned to proper fragment. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 08222fd56948..1e51a98924dd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -403,6 +403,7 @@ M: Michal Simek <michal.simek(a)xilinx.com> S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git F: arch/arm/mach-versal/ +N: versal ARM VERSATILE EXPRESS DRIVERS M: Liviu Dudau <liviu.dudau(a)foss.arm.com> -- 2.17.1

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[U-Boot] [PATCH] clk: sifive: Fix ethernet regression on HiFive Unleashed
by Marcus Comstedt 11 Sep '19

11 Sep '19

Commit ed0ef37 broke compatibility with HiFive Unleashed with SiFive FSBL 2018-03-20. This caused ethernet to stop working. Restore compatibility by adding back the needed compatible string, and removing the special handling of rtcclk which was dead code anyway since no __prci_clock actually names "rtcclk" as its parent. Signed-off-by: Marcus Comstedt <marcus(a)mc.pp.se> Cc: Anup Patel <Anup.Patel(a)wdc.com> --- drivers/clk/sifive/fu540-prci.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index ce0769f2d1..78a9fe3770 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -160,7 +160,6 @@ struct __prci_data { void *va; struct clk parent_hfclk; - struct clk parent_rtcclk; }; /** @@ -538,10 +537,7 @@ static ulong sifive_fu540_prci_parent_rate(struct __prci_clock *pc) return p->ops->recalc_rate(p, sifive_fu540_prci_parent_rate(p)); } - if (strcmp(pc->parent_name, "rtcclk") == 0) - parent_rate = clk_get_rate(&pc->pd->parent_rtcclk); - else - parent_rate = clk_get_rate(&pc->pd->parent_hfclk); + parent_rate = clk_get_rate(&pc->pd->parent_hfclk); return parent_rate; } @@ -593,10 +589,6 @@ static int sifive_fu540_prci_probe(struct udevice *dev) if (err) return err; - err = clk_get_by_index(dev, 1, &pd->parent_rtcclk); - if (err) - return err; - for (i = 0; i < ARRAY_SIZE(__prci_init_clocks); ++i) { pc = &__prci_init_clocks[i]; pc->pd = pd; @@ -614,6 +606,7 @@ static struct clk_ops sifive_fu540_prci_ops = { static const struct udevice_id sifive_fu540_prci_ids[] = { { .compatible = "sifive,fu540-c000-prci" }, + { .compatible = "sifive,aloeprci0" }, { } }; -- 2.21.0

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[U-Boot] [PATCH] configs: rockpro64-rk3399: Enable CONFIG_MISC_INIT_R and ROCKCHIP_EFUSE
by Hugh Cole-Baker 11 Sep '19

11 Sep '19

This enables reading the cpuid from e-fuse, and deriving a static MAC address from it. Without this, the ethernet interface on the rockpro64 can't be used to boot. Signed-off-by: Hugh Cole-Baker <sigmaris(a)gmail.com> Cc: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- configs/rockpro64-rk3399_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 40ebad5abb..22b8bc503b 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -28,6 +29,8 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent CONFIG_ENV_IS_IN_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y -- 2.17.2 (Apple Git-113)

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[U-Boot] [PATCH] ARM: dts: at91: sama5d27_wlsom1: add hlcdc node
by Eugen.Hristev＠microchip.com 11 Sep '19

11 Sep '19

From: Eugen Hristev <eugen.hristev(a)microchip.com> Add node for hlcld for u-boot logo display at boot. This is compatible with the Precision Design Associates (PDA) TM5000 screen. Timings are compatible with simple panel from Linux, panel name is pda_91_00156_a0 Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com> --- This patch depends on previous sent patches on at91-sama5d27_wlsom1_ek board. arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi | 4 ++ arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 60 ++++++++++++++++++++++++ configs/sama5d27_wlsom1_ek_mmc_defconfig | 8 ++++ 3 files changed, 72 insertions(+) diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi index dae1fba..8c84dd0 100644 --- a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi @@ -13,6 +13,10 @@ }; }; +&hlcdc { + u-boot,dm-pre-reloc; +}; + &qspi1 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts index 32d3404..ab23f5c 100644 --- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts @@ -38,6 +38,31 @@ }; apb { + hlcdc: hlcdc@f0000000 { + atmel,vl-bpix = <4>; + atmel,output-mode = <24>; + atmel,guard-time = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; + status = "okay"; + + display-timings { + 800x480 { + clock-frequency = <33300000>; + xres = <800>; + yres = <480>; + hactive = <800>; + vactive = <480>; + hsync-len = <64>; + hfront-porch = <1>; + hback-porch = <64>; + vfront-porch = <1>; + vback-porch = <22>; + vsync-len = <23>; + }; + }; + }; + qspi1: spi@f0024000 { status = "okay"; }; @@ -54,6 +79,41 @@ pioA: gpio@fc038000 { pinctrl { + pinctrl_lcd_base: pinctrl_lcd_base { + pinmux = <PIN_PC30__LCDVSYNC>, + <PIN_PC31__LCDHSYNC>, + <PIN_PD1__LCDDEN>, + <PIN_PD0__LCDPCK>; + bias-disable; + }; + + pinctrl_lcd_pwm: pinctrl_lcd_pwm { + pinmux = <PIN_PC28__LCDPWM>; + bias-disable; + }; + + pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { + pinmux = <PIN_PC10__LCDDAT2>, + <PIN_PC11__LCDDAT3>, + <PIN_PC12__LCDDAT4>, + <PIN_PC13__LCDDAT5>, + <PIN_PC14__LCDDAT6>, + <PIN_PC15__LCDDAT7>, + <PIN_PC16__LCDDAT10>, + <PIN_PC17__LCDDAT11>, + <PIN_PC18__LCDDAT12>, + <PIN_PC19__LCDDAT13>, + <PIN_PC20__LCDDAT14>, + <PIN_PC21__LCDDAT15>, + <PIN_PC22__LCDDAT18>, + <PIN_PC23__LCDDAT19>, + <PIN_PC24__LCDDAT20>, + <PIN_PC25__LCDDAT21>, + <PIN_PC26__LCDDAT22>, + <PIN_PC27__LCDDAT23>; + bias-disable; + }; + pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { pinmux = <PIN_PA1__SDMMC0_CMD>, <PIN_PA2__SDMMC0_DAT0>, diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index d7329a2..5584c9c 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -85,6 +85,14 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_ATMEL_PIT_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y -- 2.7.4

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[U-Boot] [PATCH 1/4] ARM: dts: at91: sama5d2: add seq for qspi1
by Eugen.Hristev＠microchip.com 11 Sep '19

11 Sep '19

From: Eugen Hristev <eugen.hristev(a)microchip.com> qspi1 does not have an alias/seq number. This is required for SPL default SF bus booting for the boards that have this SoC Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com> --- arch/arm/dts/sama5d2.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index 830251a..5adc47b 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -7,6 +7,7 @@ aliases { spi0 = &spi0; spi1 = &qspi0; + spi2 = &qspi1; i2c0 = &i2c0; i2c1 = &i2c1; }; -- 2.7.4

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