September 2019 - U-Boot

[U-Boot] [PATCH 00/14] dfu: update dfu stack and add MTD backend
by Patrick Delaunay 13 Sep '19

13 Sep '19

This serie based on v2019.10-rc3 propose updates on the DFU stack: - add capability to have several DFU backend running in parallel - add MTD backend for update of NAND, NOR or SPI-NAND - add VIRTUAL backend for board/command specific behavior - add some weak callback It is the same content that the previous RFC: http://patchwork.ozlabs.org/project/uboot/list/?series=120375 "dfu: update dfu stack and use them for stm32mp1" To test the new features and as example, I update the stm32mp1 board to use the new features; I test them with the command "dfu 0" (for test I have dependency with patch http://patchwork.ozlabs.org/patch/1162076/) The expected target of the dfu part for this serie is v2020.01. I will merge the stm32mp1 part when they will be accepted by dfu maintainers. This serie prepares the DFU backend for the coming 'stm32prog' command and for STM32CubeProgrammer on stm32mp1 platform. This STMicroelectronics tool is based on DFU protocol and allows to update all the boot devices and the OTPs on the ST boards (so several DFU target in parallel, including spi nand). Patrick Delaunay (14): dfu: cosmetic: cleanup sf to avoid checkpatch error dfu: sf: add partition support for nor backend dfu: prepare the support of multiple interface dfu: allow to manage DFU on several devices dfu: allow read with 0 data for EOF indication dfu: add backend for MTD device dfu: add partition support for MTD backend dfu: add DFU virtual backend dfu: add callback for flush and initiated operation stm32mp1: activate DFU support and command MTD stm32mp1: activate SET_DFU_ALT_INFO stp32mp1: configs: activate CONFIG_MTD_SPI_NAND stm32mp1: board: add spi nand support stm32mp1: add support for virtual partition read board/st/stm32mp1/README | 111 ++++++++++ board/st/stm32mp1/stm32mp1.c | 164 ++++++++++++++- cmd/dfu.c | 21 +- configs/stm32mp15_basic_defconfig | 6 + configs/stm32mp15_optee_defconfig | 6 + configs/stm32mp15_trusted_defconfig | 6 + drivers/dfu/Kconfig | 13 ++ drivers/dfu/Makefile | 2 + drivers/dfu/dfu.c | 145 +++++++++++-- drivers/dfu/dfu_mtd.c | 306 ++++++++++++++++++++++++++++ drivers/dfu/dfu_sf.c | 55 ++++- drivers/dfu/dfu_virt.c | 49 +++++ include/configs/stm32mp1.h | 42 +++- include/dfu.h | 51 +++++ 14 files changed, 947 insertions(+), 30 deletions(-) create mode 100644 drivers/dfu/dfu_mtd.c create mode 100644 drivers/dfu/dfu_virt.c -- 2.17.1

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[U-Boot] [PATCH] MAINTAINERS: Change fsl-qoriq, mpc86xx, mpc85xx maintainers
by Prabhakar Kushwaha 13 Sep '19

13 Sep '19

From: Priyanka Jain <priyanka.jain(a)nxp.com> Change maintainers to Priyanka Jain for fsl-qoriq, mpc85xx Signed-off-by: Priyanka Jain <priyanka.jain(a)nxp.com> --- MAINTAINERS | 6 +++--- board/freescale/mpc8536ds/MAINTAINERS | 2 +- board/freescale/mpc8541cds/MAINTAINERS | 2 +- board/freescale/mpc8544ds/MAINTAINERS | 2 +- board/freescale/mpc8548cds/MAINTAINERS | 2 +- board/freescale/mpc8555cds/MAINTAINERS | 2 +- board/freescale/mpc8568mds/MAINTAINERS | 2 +- board/freescale/mpc8569mds/MAINTAINERS | 2 +- board/freescale/mpc8572ds/MAINTAINERS | 2 +- board/freescale/mpc8610hpcd/MAINTAINERS | 2 +- board/freescale/mpc8641hpcn/MAINTAINERS | 2 +- doc/git-mailrc | 8 ++++---- 12 files changed, 17 insertions(+), 17 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 08222fd569..e752e4b3de 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -565,7 +565,7 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-freebsd.git FREESCALE QORIQ -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git F: drivers/watchdog/sp805_wdt.c @@ -723,13 +723,13 @@ F: arch/powerpc/cpu/mpc83xx/ F: arch/powerpc/include/asm/arch-mpc83xx/ POWERPC MPC85XX -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx.git F: arch/powerpc/cpu/mpc85xx/ POWERPC MPC86XX -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc86xx.git F: arch/powerpc/cpu/mpc86xx/ diff --git a/board/freescale/mpc8536ds/MAINTAINERS b/board/freescale/mpc8536ds/MAINTAINERS index d640f89845..5ce5164e49 100644 --- a/board/freescale/mpc8536ds/MAINTAINERS +++ b/board/freescale/mpc8536ds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8536DS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8536ds/ F: include/configs/MPC8536DS.h diff --git a/board/freescale/mpc8541cds/MAINTAINERS b/board/freescale/mpc8541cds/MAINTAINERS index 100077608b..cf3b9cf5f7 100644 --- a/board/freescale/mpc8541cds/MAINTAINERS +++ b/board/freescale/mpc8541cds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8541CDS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8541cds/ F: include/configs/MPC8541CDS.h diff --git a/board/freescale/mpc8544ds/MAINTAINERS b/board/freescale/mpc8544ds/MAINTAINERS index 78019fbfea..74e7249e47 100644 --- a/board/freescale/mpc8544ds/MAINTAINERS +++ b/board/freescale/mpc8544ds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8544DS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8544ds/ F: include/configs/MPC8544DS.h diff --git a/board/freescale/mpc8548cds/MAINTAINERS b/board/freescale/mpc8548cds/MAINTAINERS index 385dc85576..fbbedb1d1d 100644 --- a/board/freescale/mpc8548cds/MAINTAINERS +++ b/board/freescale/mpc8548cds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8548CDS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8548cds/ F: include/configs/MPC8548CDS.h diff --git a/board/freescale/mpc8555cds/MAINTAINERS b/board/freescale/mpc8555cds/MAINTAINERS index 815cffec1b..8f32febd91 100644 --- a/board/freescale/mpc8555cds/MAINTAINERS +++ b/board/freescale/mpc8555cds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8555CDS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8555cds/ F: include/configs/MPC8555CDS.h diff --git a/board/freescale/mpc8568mds/MAINTAINERS b/board/freescale/mpc8568mds/MAINTAINERS index 79f04d1a90..f4747866d2 100644 --- a/board/freescale/mpc8568mds/MAINTAINERS +++ b/board/freescale/mpc8568mds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8568MDS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8568mds/ F: include/configs/MPC8568MDS.h diff --git a/board/freescale/mpc8569mds/MAINTAINERS b/board/freescale/mpc8569mds/MAINTAINERS index b2e3bdfa11..9df3f3cca8 100644 --- a/board/freescale/mpc8569mds/MAINTAINERS +++ b/board/freescale/mpc8569mds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8569MDS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8569mds/ F: include/configs/MPC8569MDS.h diff --git a/board/freescale/mpc8572ds/MAINTAINERS b/board/freescale/mpc8572ds/MAINTAINERS index 80a3096653..d7e9b1f41f 100644 --- a/board/freescale/mpc8572ds/MAINTAINERS +++ b/board/freescale/mpc8572ds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8572DS BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8572ds/ F: include/configs/MPC8572DS.h diff --git a/board/freescale/mpc8610hpcd/MAINTAINERS b/board/freescale/mpc8610hpcd/MAINTAINERS index 633c5ed192..9b1e0cd4e5 100644 --- a/board/freescale/mpc8610hpcd/MAINTAINERS +++ b/board/freescale/mpc8610hpcd/MAINTAINERS @@ -1,5 +1,5 @@ MPC8610HPCD BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8610hpcd/ F: include/configs/MPC8610HPCD.h diff --git a/board/freescale/mpc8641hpcn/MAINTAINERS b/board/freescale/mpc8641hpcn/MAINTAINERS index 827bb79aef..c957218767 100644 --- a/board/freescale/mpc8641hpcn/MAINTAINERS +++ b/board/freescale/mpc8641hpcn/MAINTAINERS @@ -1,5 +1,5 @@ MPC8641HPCN BOARD -M: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +M: Priyanka Jain <priyanka.jain(a)nxp.com> S: Maintained F: board/freescale/mpc8641hpcn/ F: include/configs/MPC8641HPCN.h diff --git a/doc/git-mailrc b/doc/git-mailrc index 1d36f5845a..6f383b1f60 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -46,7 +46,7 @@ alias smcnutt Scott McNutt <smcnutt(a)psyent.com> alias stroese Stefan Roese <sr(a)denx.de> alias trini Tom Rini <trini(a)konsulko.com> alias wd Wolfgang Denk <wd(a)denx.de> -alias prabhu_kush Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> +alias priyankajain Priyanka Jain <priyanka.jain(a)nxp.com> # Architecture aliases alias arch arc, arm, m68k, microblaze, mips, nds32, nios2, powerpc, sandbox, superh, x86 @@ -91,12 +91,12 @@ alias nds32 uboot, macpaul alias nios uboot, Thomas Chou <thomas(a)wytron.com.tw>, smcnutt alias nios2 nios -alias powerpc uboot, afleming, stroese, wd, prabhu_kush, mariosix +alias powerpc uboot, afleming, stroese, wd, priyankajain, mariosix alias ppc powerpc alias mpc8xx uboot, wd, Christophe Leroy <christophe.leroy(a)c-s.fr> alias mpc83xx uboot, mariosix -alias mpc85xx uboot, afleming, prabhu_kush -alias mpc86xx uboot, afleming, prabhu_kush +alias mpc85xx uboot, afleming, priyankajain +alias mpc86xx uboot, afleming, priyankajain alias sandbox sjg alias sb sandbox -- 2.17.1

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[U-Boot] Pull request for UEFI sub-system for v2019.10-rc4 (4)
by Heinrich Schuchardt 13 Sep '19

13 Sep '19

The following changes since commit 2f760735c170c854ffca76be5607cec5c56fdc4f: Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-07 13:49:39 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2019-10-rc4-4 for you to fetch changes up to 8262578535f18cdab95318828e6fd6464721ac54: efi_loader: parameter checks EFI_FILE_PROTOCOL.SetInfo() (2019-09-11 21:51:38 +0200) No errors are reported in Gitlab CI nor in Travis CI: https://gitlab.denx.de/u-boot/custodians/u-boot-efi/pipelines/661 https://travis-ci.org/xypron2/u-boot/builds/583835035 Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4 ---------------------------------------------------------------- Pull request for UEFI sub-system for v2019.10-rc4 (4) Fixes for the EFI_FILE_PROTOCOL: * correctly iterate over directories * correct Unicode conversion of file names * parameter checks ---------------------------------------------------------------- Heinrich Schuchardt (8): efi_loader: EFI_FILE_PROTOCOL.Write() check args efi_loader: eliminate inline function ascii2unicode() efi_loader: correct reading of directories efi_loader: file size checks efi_loader: EFI_FILE_PROTOCOL rev 2 stub efi_loader: volume name in EFI_FILE_PROTOCOL.GetInfo() efi_loader: check parameters EFI_FILE_PROTOCOL.GetInfo() efi_loader: parameter checks EFI_FILE_PROTOCOL.SetInfo() include/efi_api.h | 24 +++- include/efi_loader.h | 16 --- lib/efi_loader/efi_device_path_to_text.c | 10 +- lib/efi_loader/efi_file.c | 226 ++++++++++++++++++++----------- 4 files changed, 174 insertions(+), 102 deletions(-)

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[U-Boot] Why do we need both MDIO and MII commands
by Ramon Fried 13 Sep '19

13 Sep '19

Hi. Marek raised this issue in IRC several weeks ago and I was wondering the same. why do we support this two commands which accomplish basically the same ? Can we ditch the mii comand and move the missing functionality to the mdio command ? Thanks, Ramon.

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[U-Boot] [PATCH 1/1] Dockerfile: build GRUB UEFI target for RISC-V 64bit
by Heinrich Schuchardt 13 Sep '19

13 Sep '19

Build GRUB UEFI target grubriscv64.efi. It is needed for running test_efi_grub_net(). Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- This patch applies to https://gitlab.denx.de/u-boot/gitlab-ci-runner --- Dockerfile | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Dockerfile b/Dockerfile index 23d4042..d73fd10 100644 --- a/Dockerfile +++ b/Dockerfile @@ -112,6 +112,20 @@ RUN git clone git://git.savannah.gnu.org/grub.git /tmp/grub && \ lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot \ search search_fs_file search_fs_uuid search_label serial sleep test \ true && \ + make clean && \ + ./configure --target=riscv64 --with-platform=efi \ + CC=gcc \ + TARGET_CC=/opt/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-gcc \ + TARGET_OBJCOPY=/opt/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-objcopy \ + TARGET_STRIP=/opt/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-strip \ + TARGET_NM=/opt/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-nm \ + TARGET_RANLIB=/opt/gcc-7.3.0-nolibc/riscv64-linux/bin/riscv64-linux-ranlib && \ + make && \ + ./grub-mkimage -O riscv64-efi -o /opt/grub/grubriscv64.efi --prefix= -d \ + grub-core cat chain configfile echo efinet ext2 fat halt help linux \ + lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot \ + search search_fs_file search_fs_uuid search_label serial sleep test \ + true && \ rm -rf /tmp/grub RUN git clone git://git.qemu.org/qemu.git /tmp/qemu && \ -- 2.20.1

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[U-Boot] [PATCH] arm: at91: gardena-smart-gateway-at91sam: Enable CONFIG_SYS_NAND_USE_FLASH_BBT
by Stefan Roese 13 Sep '19

13 Sep '19

This patch enables the BBT in NAND on the AT91SAM based GARDENA smart Gateway. This is especially important, since the Linux driver also enables this option and uses the BBT table pages. Without setting this option, U-Boot will try to re-use these pages again (e.g. UBI). Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Eugen Hristev <eugen.hristev(a)microchip.com> Cc: Tom Rini <trini(a)konsulko.com> --- Eugen, I would advise you to double-check, if your AT91 based boards using NAND also have this BBT option enabled in Linux. If yes, its definitely necessary to enable it in U-Boot as well to match the same layout. configs/gardena-smart-gateway-at91sam_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index c495ba4612..4a2cc331a6 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -17,6 +17,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SMBIOS_PRODUCT_NAME="at91sam9x5ek" CONFIG_DEBUG_UART=y +CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 @@ -24,7 +25,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set @@ -66,7 +66,6 @@ CONFIG_AT91_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y # CONFIG_MMC is not set -# CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_DM_ETH=y -- 2.23.0

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[U-Boot] u-boot working version for Rasberry Pi 4
by Sachin Mehrotra 13 Sep '19

13 Sep '19

Dear Concern, I am working for u-boot for rpi4, may I know do we have updated working version for Raspberry Pi 4. I was testing the version https://gitlab.denx.de/u-boot/u-boot with rpi4<https://gitlab.denx.de/u-boot/u-boot%20with%20rpi4> but getting error in file arch/arm/cpu/armv8/cpu.c:13 if I run for raspberry pi 4. Please guide or send me the link for the working version of u-boot for rasbessry pi 4 Thanks in advance. Best Regards / Mit freundlichen Grüßen, Sachin Mehrotra Application Engineer Security Solution Center Phone: +49 89 12 22 32 533 Swissbit AG BU Security Leuchtenbergring 3 D-81677 Munich Germany Email: sachin.mehrotra(a)swissbit.com<mailto:sachin.mehrotra@swissbit.com> Website: www.swissbit.com<http://www.swissbit.com/> [swissbit]

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[U-Boot] [PATCH] doc: driver-model: Update SPI migration status
by Jagan Teki 13 Sep '19

13 Sep '19

Update SPI drivers, driver model conversion status for v2019.10 release. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- doc/driver-model/migration.rst | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst index 75b85235ef..fd499fb74a 100644 --- a/doc/driver-model/migration.rst +++ b/doc/driver-model/migration.rst @@ -58,10 +58,8 @@ to move the migration with in the deadline. No dm conversion yet:: - drivers/spi/cf_spi.c drivers/spi/fsl_espi.c drivers/spi/lpc32xx_ssp.c - drivers/spi/mxs_spi.c drivers/spi/sh_spi.c drivers/spi/soft_spi_legacy.c @@ -74,6 +72,7 @@ Partially converted:: drivers/spi/fsl_dspi.c drivers/spi/kirkwood_spi.c drivers/spi/mxc_spi.c + drivers/spi/mxs_spi.c drivers/spi/omap3_spi.c drivers/spi/sh_qspi.c -- 2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 1/2] MTD: SPI: add missing SST26* flash IC protection ops
by Eugeniy Paltsev 13 Sep '19

13 Sep '19

Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework) performs switch from previous 'spi_flash' infrastructure without proper testing/investigations which results in a regressions for SST26 flash series. Add missing SST26* flash IC protection ops which were introduced previously by Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs protection ops) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev(a)synopsys.com> --- drivers/mtd/spi/sf_internal.h | 1 + drivers/mtd/spi/spi-nor-core.c | 181 +++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 4 + 3 files changed, 186 insertions(+) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index a6bf734830a..e6da768bf36 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -65,6 +65,7 @@ struct flash_info { #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */ #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */ #define USE_CLSR BIT(14) /* use CLSR command */ +#define SPI_NOR_HAS_SST26LOCK BIT(15) /* Flash supports lock/unlock via BPR */ }; extern const struct flash_info spi_nor_ids[]; diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 1acff745d1a..990e39d7c2f 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -945,6 +945,177 @@ read_err: } #ifdef CONFIG_SPI_FLASH_SST +/* + * sst26 flash series has its own block protection implementation: + * 4x - 8 KByte blocks - read & write protection bits - upper addresses + * 1x - 32 KByte blocks - write protection bits + * rest - 64 KByte blocks - write protection bits + * 1x - 32 KByte blocks - write protection bits + * 4x - 8 KByte blocks - read & write protection bits - lower addresses + * + * We'll support only per 64k lock/unlock so lower and upper 64 KByte region + * will be treated as single block. + */ +#define SST26_BPR_8K_NUM 4 +#define SST26_MAX_BPR_REG_LEN (18 + 1) +#define SST26_BOUND_REG_SIZE ((32 + SST26_BPR_8K_NUM * 8) * SZ_1K) + +enum lock_ctl { + SST26_CTL_LOCK, + SST26_CTL_UNLOCK, + SST26_CTL_CHECK +}; + +static bool sst26_process_bpr(u32 bpr_size, u8 *cmd, u32 bit, enum lock_ctl ctl) +{ + switch (ctl) { + case SST26_CTL_LOCK: + cmd[bpr_size - (bit / 8) - 1] |= BIT(bit % 8); + break; + case SST26_CTL_UNLOCK: + cmd[bpr_size - (bit / 8) - 1] &= ~BIT(bit % 8); + break; + case SST26_CTL_CHECK: + return !!(cmd[bpr_size - (bit / 8) - 1] & BIT(bit % 8)); + } + + return false; +} + +/* + * Lock, unlock or check lock status of the flash region of the flash (depending + * on the lock_ctl value) + */ +static int sst26_lock_ctl(struct spi_nor *nor, loff_t ofs, uint64_t len, enum lock_ctl ctl) +{ + struct mtd_info *mtd = &nor->mtd; + u32 i, bpr_ptr, rptr_64k, lptr_64k, bpr_size; + bool lower_64k = false, upper_64k = false; + u8 bpr_buff[SST26_MAX_BPR_REG_LEN] = {}; + int ret; + + /* Check length and offset for 64k alignment */ + if ((ofs & (SZ_64K - 1)) || (len & (SZ_64K - 1))) { + dev_err(nor->dev, "length or offset is not 64KiB allighned\n"); + return -EINVAL; + } + + if (ofs + len > mtd->size) { + dev_err(nor->dev, "range is more than device size: %#llx + %#llx > %#llx\n", + ofs, len, mtd->size); + return -EINVAL; + } + + /* SST26 family has only 16 Mbit, 32 Mbit and 64 Mbit IC */ + if (mtd->size != SZ_2M && + mtd->size != SZ_4M && + mtd->size != SZ_8M) + return -EINVAL; + + bpr_size = 2 + (mtd->size / SZ_64K / 8); + + ret = nor->read_reg(nor, SPINOR_OP_READ_BPR, bpr_buff, bpr_size); + if (ret < 0) { + dev_err(nor->dev, "fail to read block-protection register\n"); + return ret; + } + + rptr_64k = min_t(u32, ofs + len, mtd->size - SST26_BOUND_REG_SIZE); + lptr_64k = max_t(u32, ofs, SST26_BOUND_REG_SIZE); + + upper_64k = ((ofs + len) > (mtd->size - SST26_BOUND_REG_SIZE)); + lower_64k = (ofs < SST26_BOUND_REG_SIZE); + + /* Lower bits in block-protection register are about 64k region */ + bpr_ptr = lptr_64k / SZ_64K - 1; + + /* Process 64K blocks region */ + while (lptr_64k < rptr_64k) { + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + bpr_ptr++; + lptr_64k += SZ_64K; + } + + /* 32K and 8K region bits in BPR are after 64k region bits */ + bpr_ptr = (mtd->size - 2 * SST26_BOUND_REG_SIZE) / SZ_64K; + + /* Process lower 32K block region */ + if (lower_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + bpr_ptr++; + + /* Process upper 32K block region */ + if (upper_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + bpr_ptr++; + + /* Process lower 8K block regions */ + for (i = 0; i < SST26_BPR_8K_NUM; i++) { + if (lower_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + /* In 8K area BPR has both read and write protection bits */ + bpr_ptr += 2; + } + + /* Process upper 8K block regions */ + for (i = 0; i < SST26_BPR_8K_NUM; i++) { + if (upper_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + /* In 8K area BPR has both read and write protection bits */ + bpr_ptr += 2; + } + + /* If we check region status we don't need to write BPR back */ + if (ctl == SST26_CTL_CHECK) + return 0; + + ret = nor->write_reg(nor, SPINOR_OP_WRITE_BPR, bpr_buff, bpr_size); + if (ret < 0) { + dev_err(nor->dev, "fail to write block-protection register\n"); + return ret; + } + + return 0; +} + +static int sst26_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) +{ + return sst26_lock_ctl(nor, ofs, len, SST26_CTL_UNLOCK); +} + +static int sst26_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) +{ + return sst26_lock_ctl(nor, ofs, len, SST26_CTL_LOCK); +} + +/* + * Returns EACCES (positive value) if region is locked, 0 if region is unlocked, + * and negative on errors. + */ +static int sst26_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) +{ + /* + * is_locked function is used for check before reading or erasing flash + * region, so offset and length might be not 64k allighned, so adjust + * them to be 64k allighned as sst26_lock_ctl works only with 64k + * allighned regions. + */ + ofs -= ofs & (SZ_64K - 1); + len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len; + + return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK); +} + static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len, size_t *retlen, const u_char *buf) { @@ -2302,6 +2473,16 @@ int spi_nor_scan(struct spi_nor *nor) #endif #ifdef CONFIG_SPI_FLASH_SST + /* + * sst26 series block protection implementation differs from other + * series. + */ + if (info->flags & SPI_NOR_HAS_SST26LOCK) { + nor->flash_lock = sst26_lock; + nor->flash_unlock = sst26_unlock; + nor->flash_is_locked = sst26_is_locked; + } + /* sst nor chips use AAI word program */ if (info->flags & SST_WRITE) mtd->_write = sst_write; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 88e80af5794..709b49d3936 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -91,6 +91,10 @@ #define SPINOR_OP_WRDI 0x04 /* Write disable */ #define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */ +/* Used for SST26* flashes only. */ +#define SPINOR_OP_READ_BPR 0x72 /* Read block protection register */ +#define SPINOR_OP_WRITE_BPR 0x42 /* Write block protection register */ + /* Used for S3AN flashes only */ #define SPINOR_OP_XSE 0x50 /* Sector erase */ #define SPINOR_OP_XPP 0x82 /* Page program */ -- 2.21.0

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Re: [U-Boot] [U-Boot-DM] Sample RAM disk image for powerpc based boards
by Simon Glass 12 Sep '19

12 Sep '19

+Moving to normal mailing list as the -dm one isn't really used. +Marek Vasut do you think we could delete it or disable subscriptions? On Thu, 12 Sep 2019 at 07:22, Matt Sykes <zzebowa(a)hotmail.com> wrote: > > I am new to this and having a play to see how it all works, and have a board up and running (UBoot, LInux, Device Tree) with the uRamdisk image off the 4.2 ELDK. > > I was trying out the 5.5.2 powerpc base image ftp://ftp.denx.de/pub/eldk/5.5.3/targets/powerpc/core-image-base-generic-powerpc.tar.gz but it reports errors when running (invalid nodes). > > Is this not a RAM disk image, or am I missing something? > > If not are there any other PPC ram disk images I can play with? > _______________________________________________ > U-Boot-DM mailing list > U-Boot-DM(a)lists.denx.de > https://lists.denx.de/listinfo/u-boot-dm

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