September 2019 - U-Boot

[U-Boot] [PATCH] image: android: Fix possible build errors
by Sam Protsenko 17 Oct '19

17 Oct '19

As android_image.h uses types like u32, we need to include corresponding headers in place. Otherwise the user will be forced to include those in C file, or next build error can occur: include/android_image.h:32:5: error: unknown type name 'u32' u32 kernel_size; /* size in bytes */ Include required headers for data types used. While at it, remove typedef struct, which is prohibited by kernel coding style, and fix the comment. Signed-off-by: Sam Protsenko <semen.protsenko(a)linaro.org> --- include/android_image.h | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/include/android_image.h b/include/android_image.h index 0519ece368..54d25af068 100644 --- a/include/android_image.h +++ b/include/android_image.h @@ -11,18 +11,15 @@ #ifndef _ANDROID_IMAGE_H_ #define _ANDROID_IMAGE_H_ +#include <linux/compiler.h> +#include <linux/types.h> + #define ANDR_BOOT_MAGIC "ANDROID!" #define ANDR_BOOT_MAGIC_SIZE 8 #define ANDR_BOOT_NAME_SIZE 16 #define ANDR_BOOT_ARGS_SIZE 512 #define ANDR_BOOT_EXTRA_ARGS_SIZE 1024 -/* - * It is expected that callers would explicitly specify which version of the - * boot image header they need to use. - */ -typedef struct andr_img_hdr andr_img_hdr; - /* The bootloader expects the structure of andr_img_hdr with header * version 0 to be as follows: */ struct andr_img_hdr { @@ -115,7 +112,7 @@ struct andr_img_hdr { * +---------------------+ * | dtb | q pages * +---------------------+ - + * * n = (kernel_size + page_size - 1) / page_size * m = (ramdisk_size + page_size - 1) / page_size * o = (second_size + page_size - 1) / page_size -- 2.20.1

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[U-Boot] [PATCH v3 0/8] power: pmic: support more PMIC
by Elaine Zhang 16 Oct '19

16 Oct '19

Support more PMIC and improve compatibility between pmics. Change in V3: [PATCH v3 1/8]: Add document instructions, Correct error handling. [PATCH v3 2/8]: No change. [PATCH v3 3/8]: No change. [PATCH v3 4/8]: No change. [PATCH v3 5/8]: Update commit message. [PATCH v3 6/8]: Update commit message. [PATCH v3 7/8]: No change. [PATCH v3 8/8]: No change. Change in V2: [PATCH v2 1/8]: Add regulator suspend volatge and en/disable test. [PATCH v2 2/8]: Split the [PATCH v1 2/7], rk808 and rk818 updates. [PATCH v2 3/8]: Split the [PATCH v1 2/7], support rk816 pmic and update commit message. [PATCH v2 4/8]: Update commit message. [PATCH v2 5/8]: No change. [PATCH v2 6/8]: No change. [PATCH v2 7/8]: Remove rk809 keywords and update commit message. [PATCH v2 8/8]: Update commit message. Elaine Zhang (3): power: regulator: rk8xx: update the driver for rk808 and rk818 power: pmic: rk816: support rk816 pmic power: pmic: rk805: support rk805 pmic Joseph Chen (5): dm: regulator: support regulator more state dm: pmic: add pmic_shutdown() interface power: pmic: rk8xx: add pmic_shutdown() implement power: pmic: rk817: support rk817 pmic power: pmic: rk809: support rk809 pmic doc/device-tree-bindings/regulator/regulator.txt | 27 + drivers/power/pmic/pmic-uclass.c | 11 + drivers/power/pmic/rk8xx.c | 135 +++- drivers/power/regulator/regulator-uclass.c | 70 ++ drivers/power/regulator/rk8xx.c | 939 +++++++++++++++++++++-- include/power/pmic.h | 9 + include/power/regulator.h | 64 ++ include/power/rk8xx_pmic.h | 42 + test/dm/regulator.c | 46 ++ 9 files changed, 1255 insertions(+), 88 deletions(-) -- 1.9.1

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[U-Boot] [PATCH 0/3] RPi one binary for RPi3/4 and RPi1/2
by matthias.bgg＠kernel.org 16 Oct '19

16 Oct '19

From: Matthias Brugger <mbrugger(a)suse.com> In this series we prepare the RaspberryPi source code to be able to build one binary for RPi[3,4] and one for RPi[1,2]. To achieve this we need to set the IO base address on runtime. Apart from that, for arm64 we also need to set memory region correctly. This patches fix this stuff. With this we could create one binary for each armv7 and armv8 based RPis. There is still some work to do to create a unified config, which will be done in a later patch series. Matthias Brugger (3): ARM: bcm283x: Move BCM283x_BASE to a global variable ARM: bcm283x: Set rpi_bcm283x_base at run-time ARM: bcm283x: Set memory map at run-time arch/arm/mach-bcm283x/Kconfig | 6 - arch/arm/mach-bcm283x/include/mach/base.h | 11 ++ arch/arm/mach-bcm283x/include/mach/mbox.h | 2 +- arch/arm/mach-bcm283x/include/mach/sdhci.h | 2 +- arch/arm/mach-bcm283x/include/mach/timer.h | 2 +- arch/arm/mach-bcm283x/include/mach/wdog.h | 2 +- arch/arm/mach-bcm283x/init.c | 123 +++++++++++++++++++++ arch/arm/mach-bcm283x/mbox.c | 8 +- arch/arm/mach-bcm283x/reset.c | 7 +- board/raspberrypi/rpi/lowlevel_init.S | 14 +++ board/raspberrypi/rpi/rpi.c | 45 -------- include/configs/rpi.h | 7 +- 12 files changed, 169 insertions(+), 60 deletions(-) create mode 100644 arch/arm/mach-bcm283x/include/mach/base.h -- 2.22.0

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[U-Boot] [PATCH 1/1] sunxi: Fix pll1 clock calculation
by Stefan Mavrodiev 16 Oct '19

16 Oct '19

clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families. PLL1 clock sets the default system clock, defined as: sun6i: 1008000000 sun8i: 1008000000 sun50i: 816000000 With the current calculation, m = 2 and k = 3. Solving for n, this results 28. Solving back: (24MHz * 28 * 3) / 2 = 1008MHz However if the requested clock is 816, n is 22.66 rounded to 22, which results: (24MHz * 28 * 3) / 2 = 792MHz Changing k to 4 satisfies both system clocks: (24E6 * 21 * 4) / 2 = 1008MHz (24E6 * 17 * 4) / 2 = 816MHz Signed-off-by: Stefan Mavrodiev <stefan(a)olimex.com> --- arch/arm/mach-sunxi/clock_sun6i.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index 1628f3a7b6..6ca38f73d9 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -118,7 +118,7 @@ void clock_set_pll1(unsigned int clk) if (clk > 1152000000) { k = 2; } else if (clk > 768000000) { - k = 3; + k = 4; m = 2; } -- 2.17.1

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[U-Boot] [PATCH v3] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
by Sunil Mohan Adapa 16 Oct '19

16 Oct '19

A64 OLinuXino board from Olimex has three variants with onboard eMMC: A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In addition, there are two variants without eMMC. One without eMMC and one with SPI flash. This suggests the need for separate device tree for the three eMMC variants. The Linux kernel upstream has chosen to create and use a separate device tree for the eMMC variants instead of adding eMMC support existing device tree. These changes to Linux kernel are queued for Linux 5.4. https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=s… This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux device-tree and a64-olinuxino_defconfig. changes: v3: Squash two separate patches into a single one. v2: Separate device tree for emmc models. Signed-off-by: Sunil Mohan Adapa <sunil(a)medhas.org> Reviewed-by: Jagan Teki <jagan(a)amarulasolutions.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 ++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 +++++ configs/a64-olinuxino-emmc_defconfig | 17 ++++++++++++++++ 4 files changed, 46 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts create mode 100644 configs/a64-olinuxino-emmc_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 05ff624c07..d28906a63b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -530,6 +530,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-nanopi-a64.dtb \ sun50i-a64-oceanic-5205-5inmfd.dtb \ sun50i-a64-olinuxino.dtb \ + sun50i-a64-olinuxino-emmc.dtb \ sun50i-a64-orangepi-win.dtb \ sun50i-a64-pine64-lts.dtb \ sun50i-a64-pine64-plus.dtb \ diff --git a/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts new file mode 100644 index 0000000000..96ab0227e8 --- /dev/null +++ b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Martin Ayotte <martinayotte(a)gmail.com> + * Copyright (C) 2019 Sunil Mohan Adapa <sunil(a)medhas.org> + */ + +#include "sun50i-a64-olinuxino.dts" + +/ { + model = "Olimex A64-Olinuxino-eMMC"; + compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <&reg_dcdc1>; + vqmmc-supply = <&reg_dcdc1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index c7e9d3eda0..442ff3d9cd 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -106,6 +106,11 @@ M: Jagan Teki <jagan(a)amarulasolutions.com> S: Maintained F: configs/a64-olinuxino_defconfig +A64-OLINUXINO-EMMC BOARD +M: Sunil Mohan Adapa <sunil(a)medhas.org> +S: Maintained +F: configs/a64-olinuxino-emmc_defconfig + A80 OPTIMUS BOARD M: Chen-Yu Tsai <wens(a)csie.org> S: Maintained diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig new file mode 100644 index 0000000000..56153e38a7 --- /dev/null +++ b/configs/a64-olinuxino-emmc_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_USE_PREBOOT=y +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc" +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -- 2.20.1

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[U-Boot] [PATCH v2] sunxi: H6: DRAM: Add support for half DQ
by Jernej Skrabec 16 Oct '19

16 Oct '19

Half DQ configuration seems to be very rare for H6 based boards/STBs, but exists nevertheless. Currently the only known product which needs this support is Tanix TX6 mini. This commit adds support for half DQ configuration. Code was tested for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix TX6 4 GiB/DDR3) and none were found. Thanks to Icenowy Zheng for help with this code. Reviewed-by: Andre Przywara <andre.przywara(a)arm.com> Tested-by: thomas graichen <thomas.graichen(a)gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec(a)siol.net> --- Changes from v1: - expanded comment with note that dual rank, half bus width combination was not tested. - added Rb and Tb tags .../include/asm/arch-sunxi/dram_sun50i_h6.h | 1 + arch/arm/mach-sunxi/dram_sun50i_h6.c | 78 +++++++++++++------ 2 files changed, 54 insertions(+), 25 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h index 0a1da02376..49a8a66f7b 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h @@ -315,6 +315,7 @@ struct dram_para { u8 cols; u8 rows; u8 ranks; + u8 bus_full_width; const u8 dx_read_delays[NR_OF_BYTE_LANES][RD_LINES_PER_BYTE_LANE]; const u8 dx_write_delays[NR_OF_BYTE_LANES][WR_LINES_PER_BYTE_LANE]; }; diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c index 2a8275da3a..9375db76a1 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h6.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c @@ -201,6 +201,9 @@ static void mctl_set_addrmap(struct dram_para *para) u8 rows = para->rows; u8 ranks = para->ranks; + if (!para->bus_full_width) + cols -= 1; + /* Ranks */ if (ranks == 2) mctl_ctl->addrmap[0] = rows + cols - 3; @@ -213,6 +216,10 @@ static void mctl_set_addrmap(struct dram_para *para) /* Columns */ mctl_ctl->addrmap[2] = 0; switch (cols) { + case 7: + mctl_ctl->addrmap[3] = 0x1F1F1F00; + mctl_ctl->addrmap[4] = 0x1F1F; + break; case 8: mctl_ctl->addrmap[3] = 0x1F1F0000; mctl_ctl->addrmap[4] = 0x1F1F; @@ -300,13 +307,16 @@ static void mctl_com_init(struct dram_para *para) reg_val = 0x3f00; clrsetbits_le32(&mctl_com->unk_0x008, 0x3f00, reg_val); - /* TODO: half DQ, DDR4 */ - reg_val = MSTR_BUSWIDTH_FULL | MSTR_BURST_LENGTH(8) | - MSTR_ACTIVE_RANKS(para->ranks); + /* TODO: DDR4 */ + reg_val = MSTR_BURST_LENGTH(8) | MSTR_ACTIVE_RANKS(para->ranks); if (para->type == SUNXI_DRAM_TYPE_LPDDR3) reg_val |= MSTR_DEVICETYPE_LPDDR3; if (para->type == SUNXI_DRAM_TYPE_DDR3) reg_val |= MSTR_DEVICETYPE_DDR3 | MSTR_2TMODE; + if (para->bus_full_width) + reg_val |= MSTR_BUSWIDTH_FULL; + else + reg_val |= MSTR_BUSWIDTH_HALF; writel(reg_val | BIT(31), &mctl_ctl->mstr); if (para->type == SUNXI_DRAM_TYPE_LPDDR3) @@ -333,7 +343,10 @@ static void mctl_com_init(struct dram_para *para) } writel(reg_val, &mctl_ctl->odtcfg); - /* TODO: half DQ */ + if (!para->bus_full_width) { + writel(0x0, &mctl_phy->dx[2].gcr[0]); + writel(0x0, &mctl_phy->dx[3].gcr[0]); + } } static void mctl_bit_delay_set(struct dram_para *para) @@ -514,22 +527,35 @@ static void mctl_channel_init(struct dram_para *para) if (readl(&mctl_phy->pgsr[0]) & 0x400000) { - /* - * Detect single rank. - * TODO: also detect half DQ. - */ + /* Check for single rank and optionally half DQ. */ if ((readl(&mctl_phy->dx[0].rsr[0]) & 0x3) == 2 && - (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 2 && - (readl(&mctl_phy->dx[2].rsr[0]) & 0x3) == 2 && - (readl(&mctl_phy->dx[3].rsr[0]) & 0x3) == 2) { + (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 2) { para->ranks = 1; + + if ((readl(&mctl_phy->dx[2].rsr[0]) & 0x3) != 2 || + (readl(&mctl_phy->dx[3].rsr[0]) & 0x3) != 2) + para->bus_full_width = 0; + /* Restart DRAM initialization from scratch. */ mctl_core_init(para); return; } - else { - panic("This DRAM setup is currently not supported.\n"); + + /* + * Check for dual rank and half DQ. NOTE: This combination + * is highly unlikely and was not tested. Condition is the + * same as in libdram, though. + */ + if ((readl(&mctl_phy->dx[0].rsr[0]) & 0x3) == 0 && + (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 0) { + para->bus_full_width = 0; + + /* Restart DRAM initialization from scratch. */ + mctl_core_init(para); + return; } + + panic("This DRAM setup is currently not supported.\n"); } if (readl(&mctl_phy->pgsr[0]) & 0xff00000) { @@ -557,11 +583,8 @@ static void mctl_channel_init(struct dram_para *para) static void mctl_auto_detect_dram_size(struct dram_para *para) { - /* TODO: non-LPDDR3, half DQ */ - /* - * Detect rank number by the code in mctl_channel_init. Furtherly - * when DQ detection is available it will also be executed there. - */ + /* TODO: non-(LP)DDR3 */ + /* Detect rank number and half DQ by the code in mctl_channel_init. */ mctl_core_init(para); /* detect row address bits */ @@ -570,8 +593,9 @@ static void mctl_auto_detect_dram_size(struct dram_para *para) mctl_core_init(para); for (para->rows = 13; para->rows < 18; para->rows++) { - /* 8 banks, 8 bit per byte and 32 bit width */ - if (mctl_mem_matches((1 << (para->rows + para->cols + 5)))) + /* 8 banks, 8 bit per byte and 16/32 bit width */ + if (mctl_mem_matches((1 << (para->rows + para->cols + + 4 + para->bus_full_width)))) break; } @@ -580,18 +604,21 @@ static void mctl_auto_detect_dram_size(struct dram_para *para) mctl_core_init(para); for (para->cols = 8; para->cols < 11; para->cols++) { - /* 8 bits per byte and 32 bit width */ - if (mctl_mem_matches(1 << (para->cols + 2))) + /* 8 bits per byte and 16/32 bit width */ + if (mctl_mem_matches(1 << (para->cols + 1 + + para->bus_full_width))) break; } } unsigned long mctl_calc_size(struct dram_para *para) { - /* TODO: non-LPDDR3, half DQ */ + u8 width = para->bus_full_width ? 4 : 2; + + /* TODO: non-(LP)DDR3 */ - /* 8 banks, 32-bit (4 byte) data width */ - return (1ULL << (para->cols + para->rows + 3)) * 4 * para->ranks; + /* 8 banks */ + return (1ULL << (para->cols + para->rows + 3)) * width * para->ranks; } #define SUN50I_H6_LPDDR3_DX_WRITE_DELAYS \ @@ -625,6 +652,7 @@ unsigned long sunxi_dram_init(void) .ranks = 2, .cols = 11, .rows = 14, + .bus_full_width = 1, #ifdef CONFIG_SUNXI_DRAM_H6_LPDDR3 .type = SUNXI_DRAM_TYPE_LPDDR3, .dx_read_delays = SUN50I_H6_LPDDR3_DX_READ_DELAYS, -- 2.23.0

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[U-Boot] [PATCH v1 0/5] apalis/colibri_t30: uart pinmuxing improvements
by Marcel Ziswiler 16 Oct '19

16 Oct '19

This series addresses some weaknesses in the current UART pinmuxing mainly observable when trying to use a different UART instance as main U-Boot serial console. Marcel Ziswiler (5): apalis/colibri_t30: add comment about tristate and input vs. output pinmuxing colibri_t30: fix spi1 and uart2/3 resp. uartb/c pinmuxing apalis/colibri_t30: avoid uart input from floating pins apalis/colibri_t30: add note about colibri vs. nvidia uart mapping colibri_t30: disable rs232 serial transceiver forceoff pins .../apalis_t30/pinmux-config-apalis_t30.h | 11 +++++-- board/toradex/colibri_t30/colibri_t30.c | 11 +++++++ .../colibri_t30/pinmux-config-colibri_t30.h | 32 +++++++++++-------- include/configs/apalis_t30.h | 9 +++++- include/configs/colibri_t30.h | 8 ++++- 5 files changed, 52 insertions(+), 19 deletions(-) -- 2.21.0

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[U-Boot] [PATCH v2 3/3] ubi: Add "skipcheck" command to set/clear this bit in the UBI volume hdr
by Stefan Roese 16 Oct '19

16 Oct '19

U-Boot now supports the "skip_check" flag to optionally skip the CRC check at open time. Currently its only possible to set this bit upon UBI volume creation. But it might be very useful to also set this bit on already installed systems (e.g. field upgrade) to make also use of the boot-time decrease on those systems. This patch now adds a new "ubi" command "ubi skipcheck" to set or clear this bit in the UBI volume header: => ubi skipcheck rootfs0 on Setting skip_check on volume rootfs0 BTW: This saves approx. 10 seconds Linux bootup time on a MT7688 based target with 128MiB of SPI NAND. Signed-off-by: Stefan Roese <sr(a)denx.de> Reviewed-by: Heiko Schocher <hs(a)denx.de> Cc: Quentin Schulz <quentin.schulz(a)bootlin.com> Cc: Boris Brezillon <boris.brezillon(a)collabora.com> Cc: Heiko Schocher <hs(a)denx.de> Cc: Andreas Dannenberg <dannenberg(a)ti.com> --- v2: - Add documentation to doc/README.ubi as suggested by Andreas cmd/ubi.c | 34 ++++++++++++++++++++++++++++++++++ doc/README.ubi | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/cmd/ubi.c b/cmd/ubi.c index c857f07d93..42b5641b32 100644 --- a/cmd/ubi.c +++ b/cmd/ubi.c @@ -419,6 +419,30 @@ static int ubi_dev_scan(struct mtd_info *info, const char *vid_header_offset) return 0; } +static int ubi_set_skip_check(char *volume, bool skip_check) +{ + struct ubi_vtbl_record vtbl_rec; + struct ubi_volume *vol; + + vol = ubi_find_volume(volume); + if (vol == NULL) + return ENODEV; + + printf("%sing skip_check on volume %s\n", + skip_check ? "Sett" : "Clear", volume); + + vtbl_rec = ubi->vtbl[vol->vol_id]; + if (skip_check) { + vtbl_rec.flags |= UBI_VTBL_SKIP_CRC_CHECK_FLG; + vol->skip_check = 1; + } else { + vtbl_rec.flags &= ~UBI_VTBL_SKIP_CRC_CHECK_FLG; + vol->skip_check = 0; + } + + return ubi_change_vtbl_record(ubi, vol->vol_id, &vtbl_rec); +} + static int ubi_detach(void) { #ifdef CONFIG_CMD_UBIFS @@ -578,6 +602,14 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return ubi_remove_vol(argv[2]); } + if (strncmp(argv[1], "skipcheck", 9) == 0) { + /* E.g., change skip_check flag */ + if (argc == 4) { + skipcheck = strncmp(argv[3], "on", 2) == 0; + return ubi_set_skip_check(argv[2], skipcheck); + } + } + if (strncmp(argv[1], "write", 5) == 0) { int ret; @@ -658,6 +690,8 @@ U_BOOT_CMD( " - Read volume to address with size\n" "ubi remove[vol] volume" " - Remove volume\n" + "ubi skipcheck volume on/off" + " - Set or clear skip_check flag in volume header\n" "[Legends]\n" " volume: character name\n" " size: specified in bytes\n" diff --git a/doc/README.ubi b/doc/README.ubi index 9efab6cdc9..c78a81795b 100644 --- a/doc/README.ubi +++ b/doc/README.ubi @@ -223,3 +223,36 @@ For example: => ubifsumount Unmounting UBIFS volume recovery! + + +Usage of the UBI CRC skip-check flag of static volumes: +------------------------------------------------------- +Some users of static UBI volumes implement their own integrity check, +thus making the volume CRC check done at open time useless. For +instance, this is the case when one use the ubiblock + dm-verity + +squashfs combination, where dm-verity already checks integrity of the +block device but this time at the block granularity instead of verifying +the whole volume. + +Skipping this test drastically improves the boot-time. + +U-Boot now supports the "skip_check" flag to optionally skip the CRC +check at open time. + +Usage: Case A - Upon UBI volume creation: +You can optionally add "--skipcheck" to the "ubi create" command: + +ubi create[vol] volume [size] [type] [id] [--skipcheck] + - create volume name with size ('-' for maximum available size) + +Usage: Case B - With an already existing UBI volume: +Use the "ubi skipcheck" command: + +ubi skipcheck volume on/off - Set or clear skip_check flag in volume header + +Example: +=> ubi skipcheck rootfs0 on +Setting skip_check on volume rootfs0 + +BTW: This saves approx. 10 seconds Linux bootup time on a MT7688 based +target with 128MiB of SPI NAND. -- 2.23.0

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[U-Boot] [PATCH 1/3] ubi: provide a way to skip CRC checks
by Stefan Roese 16 Oct '19

16 Oct '19

From: Quentin Schulz <quentin.schulz(a)bootlin.com> Some users of static UBI volumes implement their own integrity check, thus making the volume CRC check done at open time useless. For instance, this is the case when one use the ubiblock + dm-verity + squashfs combination, where dm-verity already checks integrity of the block device but this time at the block granularity instead of verifying the whole volume. Skipping this test drastically improves the boot-time. Adapted to U-Boot by Stefan Roese. Signed-off-by: Quentin Schulz <quentin.schulz(a)bootlin.com> Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Quentin Schulz <quentin.schulz(a)bootlin.com> Cc: Boris Brezillon <boris.brezillon(a)bootlin.com> Cc: Heiko Schocher <hs(a)denx.de> --- cmd/ubi.c | 25 +++++++++++++++++++------ drivers/mtd/ubi/kapi.c | 2 +- drivers/mtd/ubi/ubi-media.h | 6 ++++++ drivers/mtd/ubi/ubi.h | 4 ++++ drivers/mtd/ubi/vmt.c | 12 ++++++++++++ drivers/mtd/ubi/vtbl.c | 3 +++ include/mtd/ubi-user.h | 18 ++++++++++++++++-- 7 files changed, 61 insertions(+), 9 deletions(-) diff --git a/cmd/ubi.c b/cmd/ubi.c index ca5dc9021b..c857f07d93 100644 --- a/cmd/ubi.c +++ b/cmd/ubi.c @@ -146,7 +146,8 @@ bad: return err; } -static int ubi_create_vol(char *volume, int64_t size, int dynamic, int vol_id) +static int ubi_create_vol(char *volume, int64_t size, int dynamic, int vol_id, + bool skipcheck) { struct ubi_mkvol_req req; int err; @@ -163,7 +164,10 @@ static int ubi_create_vol(char *volume, int64_t size, int dynamic, int vol_id) strcpy(req.name, volume); req.name_len = strlen(volume); req.name[req.name_len] = '\0'; - req.padding1 = 0; + req.flags = 0; + if (skipcheck) + req.flags |= UBI_VOL_SKIP_CRC_CHECK_FLG; + /* It's duplicated at drivers/mtd/ubi/cdev.c */ err = verify_mkvol_req(ubi, &req); if (err) { @@ -469,6 +473,7 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int64_t size = 0; ulong addr = 0; + bool skipcheck = false; if (argc < 2) return CMD_RET_USAGE; @@ -527,6 +532,12 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* Use maximum available size */ size = 0; + /* E.g., create volume with "skipcheck" bit set */ + if (argc == 7) { + skipcheck = strncmp(argv[6], "--skipcheck", 11) == 0; + argc--; + } + /* E.g., create volume size type vol_id */ if (argc == 6) { id = simple_strtoull(argv[5], NULL, 16); @@ -555,8 +566,10 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("No size specified -> Using max size (%lld)\n", size); } /* E.g., create volume */ - if (argc == 3) - return ubi_create_vol(argv[2], size, dynamic, id); + if (argc == 3) { + return ubi_create_vol(argv[2], size, dynamic, id, + skipcheck); + } } if (strncmp(argv[1], "remove", 6) == 0) { @@ -623,7 +636,7 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } U_BOOT_CMD( - ubi, 6, 1, do_ubi, + ubi, 7, 1, do_ubi, "ubi commands", "detach" " - detach ubi from a mtd partition\n" @@ -634,7 +647,7 @@ U_BOOT_CMD( " - Display volume and ubi layout information\n" "ubi check volumename" " - check if volumename exists\n" - "ubi create[vol] volume [size] [type] [id]\n" + "ubi create[vol] volume [size] [type] [id] [--skipcheck]\n" " - create volume name with size ('-' for maximum" " available size)\n" "ubi write[vol] address volume size" diff --git a/drivers/mtd/ubi/kapi.c b/drivers/mtd/ubi/kapi.c index 2e171b0209..bcea71b1b2 100644 --- a/drivers/mtd/ubi/kapi.c +++ b/drivers/mtd/ubi/kapi.c @@ -196,7 +196,7 @@ struct ubi_volume_desc *ubi_open_volume(int ubi_num, int vol_id, int mode) desc->mode = mode; mutex_lock(&ubi->ckvol_mutex); - if (!vol->checked) { + if (!vol->checked && !vol->skip_check) { /* This is the first open - check the volume */ err = ubi_check_volume(ubi, vol_id); if (err < 0) { diff --git a/drivers/mtd/ubi/ubi-media.h b/drivers/mtd/ubi/ubi-media.h index bd7a580961..4af85c4247 100644 --- a/drivers/mtd/ubi/ubi-media.h +++ b/drivers/mtd/ubi/ubi-media.h @@ -48,6 +48,11 @@ enum { * Volume flags used in the volume table record. * * @UBI_VTBL_AUTORESIZE_FLG: auto-resize this volume + * @UBI_VTBL_SKIP_CRC_CHECK_FLG: skip the CRC check done on a static volume at + * open time. Should only be set on volumes that + * are used by upper layers doing this kind of + * check. Main use-case for this flag is + * boot-time reduction * * %UBI_VTBL_AUTORESIZE_FLG flag can be set only for one volume in the volume * table. UBI automatically re-sizes the volume which has this flag and makes @@ -79,6 +84,7 @@ enum { */ enum { UBI_VTBL_AUTORESIZE_FLG = 0x01, + UBI_VTBL_SKIP_CRC_CHECK_FLG = 0x02, }; /* diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h index 918d03590c..f44960186b 100644 --- a/drivers/mtd/ubi/ubi.h +++ b/drivers/mtd/ubi/ubi.h @@ -293,6 +293,9 @@ struct ubi_fm_pool { * atomic LEB change * * @eba_tbl: EBA table of this volume (LEB->PEB mapping) + * @skip_check: %1 if CRC check of this static volume should be skipped. + * Directly reflects the presence of the + * %UBI_VTBL_SKIP_CRC_CHECK_FLG flag in the vtbl entry * @checked: %1 if this static volume was checked * @corrupted: %1 if the volume is corrupted (static volumes only) * @upd_marker: %1 if the update marker is set for this volume @@ -341,6 +344,7 @@ struct ubi_volume { void *upd_buf; int *eba_tbl; + unsigned int skip_check:1; unsigned int checked:1; unsigned int corrupted:1; unsigned int upd_marker:1; diff --git a/drivers/mtd/ubi/vmt.c b/drivers/mtd/ubi/vmt.c index 94c8a98d47..a2ff1b5769 100644 --- a/drivers/mtd/ubi/vmt.c +++ b/drivers/mtd/ubi/vmt.c @@ -162,6 +162,9 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req) if (!vol) return -ENOMEM; + if (req->flags & UBI_VOL_SKIP_CRC_CHECK_FLG) + vol->skip_check = 1; + spin_lock(&ubi->volumes_lock); if (vol_id == UBI_VOL_NUM_AUTO) { /* Find unused volume ID */ @@ -295,6 +298,10 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req) vtbl_rec.vol_type = UBI_VID_DYNAMIC; else vtbl_rec.vol_type = UBI_VID_STATIC; + + if (vol->skip_check) + vtbl_rec.flags |= UBI_VTBL_SKIP_CRC_CHECK_FLG; + memcpy(vtbl_rec.name, vol->name, vol->name_len); err = ubi_change_vtbl_record(ubi, vol_id, &vtbl_rec); @@ -738,6 +745,11 @@ static int self_check_volume(struct ubi_device *ubi, int vol_id) ubi_err(ubi, "bad used_bytes"); goto fail; } + + if (vol->skip_check) { + ubi_err(ubi, "bad skip_check"); + goto fail; + } } else { if (vol->used_ebs < 0 || vol->used_ebs > vol->reserved_pebs) { ubi_err(ubi, "bad used_ebs"); diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c index fe96d3a894..fb535c1a87 100644 --- a/drivers/mtd/ubi/vtbl.c +++ b/drivers/mtd/ubi/vtbl.c @@ -554,6 +554,9 @@ static int init_volumes(struct ubi_device *ubi, vol->name[vol->name_len] = '\0'; vol->vol_id = i; + if (vtbl[i].flags & UBI_VTBL_SKIP_CRC_CHECK_FLG) + vol->skip_check = 1; + if (vtbl[i].flags & UBI_VTBL_AUTORESIZE_FLG) { /* Auto re-size flag may be set only for one volume */ if (ubi->autoresize_vol_id != -1) { diff --git a/include/mtd/ubi-user.h b/include/mtd/ubi-user.h index cd81ef965c..8d472cc013 100644 --- a/include/mtd/ubi-user.h +++ b/include/mtd/ubi-user.h @@ -271,6 +271,20 @@ struct ubi_attach_req { __s8 padding[10]; }; +/* + * UBI volume flags. + * + * @UBI_VOL_SKIP_CRC_CHECK_FLG: skip the CRC check done on a static volume at + * open time. Only valid for static volumes and + * should only be used if the volume user has a + * way to verify data integrity + */ +enum { + UBI_VOL_SKIP_CRC_CHECK_FLG = 0x1, +}; + +#define UBI_VOL_VALID_FLGS (UBI_VOL_SKIP_CRC_CHECK_FLG) + /** * struct ubi_mkvol_req - volume description data structure used in * volume creation requests. @@ -278,7 +292,7 @@ struct ubi_attach_req { * @alignment: volume alignment * @bytes: volume size in bytes * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) - * @padding1: reserved for future, not used, has to be zeroed + * @flags: volume flags (%UBI_VOL_SKIP_CRC_CHECK_FLG) * @name_len: volume name length * @padding2: reserved for future, not used, has to be zeroed * @name: volume name @@ -307,7 +321,7 @@ struct ubi_mkvol_req { __s32 alignment; __s64 bytes; __s8 vol_type; - __s8 padding1; + __u8 flags; __s16 name_len; __s8 padding2[4]; char name[UBI_MAX_VOLUME_NAME + 1]; -- 2.23.0

3 9

[U-Boot] [PATCH 000/126] x86: Add initial support for apollolake
by Simon Glass 16 Oct '19

16 Oct '19

Apollolake is an Intel SoC generation aimed at relatively low-end embedded systems. It was released in 2016 but has become more popular recently with some embedded boards using it. This series adds support for apollolake. As an example it adds an implementation of chromebook_coral (a large range of Chromebooks released in 2017). The series provides only enough to boot to a prompt. It does not include display, storage, USB, etc. But it does include the major part of the plumbing. Since this is the first time U-Boot has used FSP2 there is quite a bit of refactoring needed. Some of this is in previous series, but much of it is here. Some further clean-up is needed with this series and it needs more documentation, but it is ready for review. This series is available at u-boot-dm/coral-working Simon Glass (126): dm: core: Use U-Boot logging instead of pr_debug() dm: core: Correct low cell in ofnode_read_pci_addr() dm: core: Drop a few early returns dm: core: Add documentation on how to debug driver model dm: core: Don't include ofnode functions with of-platdata dm: core: Correct bad cast in ofnode_get_addr_size_index() dm: test: Fix running of multiple test from command line dm: test: Don't fail when tests are skipped due to build dm: core: Call ofdata_to_platdata() with of-platdata dm: doc: Correct of-platdata CONFIG_IS_ENABLED() condition dm: core: Correct the return value for uclass_find_first_device() dm: core: Add device_foreach_child() dm: test: Correct a stray backslash in dm_test_destroy() fdt: Show the preprocessed .dts file on error sandbox: spmi: Add ranges property for address translation sandbox: mmc: Fix up MMC emulator for valgrind sandbox: Rename PCI ID for swap_case to be more specific sandbox: Add support for clrsetio_32() and friends sandbox: swap_case: Use statics where possible sandbox: pci: Drop the get_devfn() method sandbox: net: Suppress the MAC-address warnings sandbox: pci: Move pci_offset_to_barnum() to pci.h sandbox: Add a -T flag to use the test device tree sandbox: pci: Increase the memory space sandbox: Allow use of real I/O with readl(), etc. pci: sandbox: Move the emulators into their own node pci: sandbox: Probe PCI emulation devices when used pci: Show the result of binding a device pci: Disable autoconfig in SPL pci: Correct 'specifified' and 'Plese' typos pci: Add more debug detail when resources are exhausted pci: Show a message if PCI autoconfig fails dm: pci: Add a function to read a PCI BAR serial: ns16550: Add a PCI device/function field binman: Allow verbose output with all commands binman: Add a base implementation of Entry.ReadChildData() binman: Handle reading data for end-at-4gb sections binman: Take account of skip-at-start with image-header log: Add log_nop() to avoid unused-variable warnings cros_ec: Add MEC_EMI_BASE and size to the header file iod: Enhance to support display of multiple values arm: mxs: Correct CONFIG_SPL_NO_CPU_SUPPORT option spl: Allow tiny printf() to be controlled in SPL and TPL spl: Convert CONFIG_SPL_LIMIT to hex spl: Add a size check for TPL spl: Allow distinguishing between two phases in U-Boot spl: Allow SPL/TPL to use of-platdata without libfdt x86: Move acpi_s3.h to a common location x86: pci: Drop the first parameter in pci_x86_r/w_config() x86: timer: Reduce timer code size in TPL on Intel CPUs x86: Use a common definition of MSR_IA32_PERF_CTL x86: Add a common function to set CPU thermal target x86: Use a common bus clock for Intel CPUs x86: Add common functions for TDP and perf control x86: Tidy up some duplicate MSR defines x86: Add new common CPU functions for turbo/burst mode dm: core: Drop fdtdec_get_pci_addr() sandbox: pci: Create a new sandbox_pci_read_bar() function x86: Allow the PCH and LPC uclasses to work with of-platdata x86: timer: Set up the timer in timer_early_get_count() x86: Refactor mtrr_commit() to allow for shared code x86: Add a function to set variable MTRRs x86: pci: Add a function to decode a PCI BDF x86: cpu: Don't include the cpu driver in TPL x86: Use mtrr_commit() with FSP2 x86: spl: Support init of a PUNIT x86: Panic when SPL or TPL fail x86: tpl: Add a fake PCI bus sandbox: pci: Remember the device being emulated x86: power: Add a PMC uclass x86: sandbox: Add a PMC emulator and test x86: power: Add a 'pmc' command trace: Remove the const from write functions pci: Add support for p2sb uclass sandbox: Add PCI driver and test for p2sb x86: Add a uclass for ITSS sandbox: Add a test for ITSS x86: Define the SPL image start x86: Reduce mrccache record alignment size x86: Add a function to find the size of an mrccache record x86: Correct mrccache find_next_mrc_cache() calculation x86: Adjust mrccache_get_region() to use livetree x86: Add a new global_data member for the cache record x86: Tidy up error handling in mrccache_save() x86: Update mrccache to support multiple caches x86: Add mrccache support for a 'variable' cache x86: Move fsp_prepare_mrc_cache() to fsp1 directory x86: Set the DRAM banks to reflect real location x86: Set up the MTRR for SDRAM x86: Update Kconfig options for FSP1 x86: Don't imply TPL_OF_LIBFDT x86: Allow removal of standard PCH drivers x86: Allow interrupt to happen once x86: Add FSP2 base support x86: Don't include the BIOS emulator in TPL x86: Add an option to include a FIT x86: Add support for newer CAR schemes x86: Drop RESET_BASE x86: Drop RESET_SEG_SIZE x86: Disable microcode section for FSP2 x86: Use fsp command with FSP1 x86: Update .dtsi file for FSP2 x86: Add an option to control the position of U-Boot x86: Add an option to control the position of SPL x86: Reduce resetvec size x86: Add an fdtmap and image-header x86: Don't repeat microcode in U-Boot if not needed x86: apollolake: Add basic IO addresses x86: apollolake: Add PMC driver x86: apollolake: Add UART driver x86: apollolake: Add GPIO driver x86: apollolake: Add defintions for the Intel Fast SPI interface x86: apollolake: Add systemagent driver x86: apollolake: Add hostbridge driver x86: apollolake: Add ITSS driver x86: apollolake: Add LPC driver x86: apollolake: Add PCH driver x86: apollolake: Add PUNIT driver x86: apollolake: Add SPL loaders x86: apollolake: Add a CPU driver x86: apollolake: Add SPL/TPL init x86: apollolake: Add P2SB driver x86: apollolake: Add Kconfig and Makefile x86: apollolake: Add FSP structures x86: Add chromebook_coral RFC: x86: coral: Add binary MRC data Kconfig | 9 +- Makefile | 20 +- arch/Kconfig | 4 +- arch/arm/Kconfig | 2 +- arch/arm/cpu/arm926ejs/Makefile | 2 +- arch/arm/mach-omap2/Kconfig | 6 +- arch/arm/mach-rmobile/Kconfig | 2 +- arch/arm/mach-rmobile/Kconfig.32 | 14 +- arch/arm/mach-socfpga/Kconfig | 6 +- arch/arm/mach-uniphier/pinctrl-glue.c | 4 +- arch/sandbox/cpu/cpu.c | 51 ++ arch/sandbox/cpu/start.c | 25 + arch/sandbox/cpu/state.c | 1 + arch/sandbox/dts/sandbox.dtsi | 25 +- arch/sandbox/dts/test.dts | 78 +- arch/sandbox/include/asm/io.h | 69 +- arch/sandbox/include/asm/state.h | 1 + arch/sandbox/include/asm/test.h | 28 +- arch/sandbox/lib/pci_io.c | 12 +- arch/x86/Kconfig | 100 ++- arch/x86/cpu/Makefile | 8 +- arch/x86/cpu/apollolake/Kconfig | 68 ++ arch/x86/cpu/apollolake/Makefile | 21 + arch/x86/cpu/apollolake/cpu.c | 51 ++ arch/x86/cpu/apollolake/cpu_spl.c | 272 +++++++ arch/x86/cpu/apollolake/gpio.c | 742 ++++++++++++++++++ arch/x86/cpu/apollolake/hostbridge.c | 127 +++ arch/x86/cpu/apollolake/itss.c | 129 +++ arch/x86/cpu/apollolake/lpc.c | 155 ++++ arch/x86/cpu/apollolake/p2sb.c | 167 ++++ arch/x86/cpu/apollolake/pch.c | 29 + arch/x86/cpu/apollolake/pmc.c | 216 +++++ arch/x86/cpu/apollolake/punit.c | 121 +++ arch/x86/cpu/apollolake/spl.c | 122 +++ arch/x86/cpu/apollolake/systemagent.c | 19 + arch/x86/cpu/apollolake/uart.c | 157 ++++ arch/x86/cpu/baytrail/acpi.c | 2 +- arch/x86/cpu/baytrail/cpu.c | 6 +- arch/x86/cpu/broadwell/cpu.c | 18 +- arch/x86/cpu/broadwell/cpu_full.c | 41 +- arch/x86/cpu/broadwell/sdram.c | 8 +- arch/x86/cpu/config.mk | 2 - arch/x86/cpu/cpu.c | 2 +- arch/x86/cpu/intel_common/Kconfig | 18 + arch/x86/cpu/intel_common/Makefile | 8 + arch/x86/cpu/intel_common/car2.S | 490 ++++++++++++ arch/x86/cpu/intel_common/car2_uninit.S | 87 ++ arch/x86/cpu/intel_common/cpu.c | 104 ++- arch/x86/cpu/intel_common/fast_spi.c | 3 +- arch/x86/cpu/ivybridge/cpu.c | 3 +- arch/x86/cpu/ivybridge/model_206ax.c | 52 +- arch/x86/cpu/ivybridge/northbridge.c | 2 +- arch/x86/cpu/ivybridge/sdram.c | 8 +- arch/x86/cpu/mtrr.c | 57 +- arch/x86/cpu/pci.c | 38 +- arch/x86/cpu/quark/dram.c | 8 +- arch/x86/cpu/resetvec.S | 3 - arch/x86/cpu/turbo.c | 10 +- arch/x86/cpu/u-boot-spl.lds | 5 +- arch/x86/cpu/wakeup.S | 2 +- arch/x86/dts/Makefile | 1 + arch/x86/dts/chromebook_coral.dts | 298 +++++++ arch/x86/dts/u-boot.dtsi | 89 ++- arch/x86/include/asm/arch-apollolake/cpu.h | 21 + .../include/asm/arch-apollolake/fast_spi.h | 176 +++++ .../asm/arch-apollolake/fsp/fsp_configs.h | 13 + .../asm/arch-apollolake/fsp/fsp_m_upd.h | 127 +++ .../include/asm/arch-apollolake/fsp/fsp_vpd.h | 11 + arch/x86/include/asm/arch-apollolake/gpio.h | 156 ++++ .../include/asm/arch-apollolake/gpio_apl.h | 491 ++++++++++++ .../include/asm/arch-apollolake/gpio_defs.h | 398 ++++++++++ arch/x86/include/asm/arch-apollolake/iomap.h | 28 + arch/x86/include/asm/arch-apollolake/itss.h | 43 + arch/x86/include/asm/arch-apollolake/lpc.h | 61 ++ arch/x86/include/asm/arch-apollolake/pch.h | 9 + arch/x86/include/asm/arch-apollolake/pm.h | 19 + .../include/asm/arch-apollolake/systemagent.h | 31 + arch/x86/include/asm/arch-apollolake/uart.h | 17 + arch/x86/include/asm/arch-broadwell/cpu.h | 3 - arch/x86/include/asm/arch-broadwell/pch.h | 3 - .../include/asm/arch-ivybridge/model_206ax.h | 5 +- arch/x86/include/asm/cpu.h | 1 + arch/x86/include/asm/cpu_common.h | 83 +- arch/x86/include/asm/fsp/fsp_support.h | 7 - arch/x86/include/asm/fsp2/fsp_api.h | 38 + arch/x86/include/asm/fsp2/fsp_internal.h | 16 + arch/x86/include/asm/global_data.h | 21 +- arch/x86/include/asm/mrccache.h | 14 +- arch/x86/include/asm/msr-index.h | 106 +-- arch/x86/include/asm/mtrr.h | 12 + arch/x86/include/asm/pci.h | 37 +- arch/x86/lib/Makefile | 2 + arch/x86/lib/acpi_s3.c | 2 +- arch/x86/lib/coreboot_table.c | 2 +- arch/x86/lib/fsp/fsp_common.c | 22 +- arch/x86/lib/fsp/fsp_dram.c | 35 +- arch/x86/lib/fsp1/fsp_common.c | 22 +- arch/x86/lib/fsp1/fsp_dram.c | 8 +- arch/x86/lib/fsp2/Makefile | 7 + arch/x86/lib/fsp2/fsp_dram.c | 73 ++ arch/x86/lib/fsp2/fsp_meminit.c | 344 ++++++++ arch/x86/lib/fsp2/fsp_support.c | 109 +++ arch/x86/lib/init_helpers.c | 22 +- arch/x86/lib/lpc-uclass.c | 2 + arch/x86/lib/mrccache.c | 186 +++-- arch/x86/lib/spl.c | 42 +- arch/x86/lib/tpl.c | 27 +- board/google/Kconfig | 15 + board/google/chromebook_coral/Kconfig | 43 + board/google/chromebook_coral/MAINTAINERS | 6 + board/google/chromebook_coral/Makefile | 5 + board/google/chromebook_coral/coral.c | 18 + board/google/chromebook_coral/rw-mrc-cache | Bin 0 -> 65536 bytes .../google/chromebook_coral/rw-var-mrc-cache | Bin 0 -> 4096 bytes cmd/Kconfig | 8 + cmd/Makefile | 1 + cmd/io.c | 84 +- cmd/pmc.c | 81 ++ cmd/x86/Makefile | 2 +- common/iotrace.c | 6 +- common/spl/Kconfig | 12 +- common/xyzModem.c | 2 +- configs/am335x_pdu001_defconfig | 2 +- configs/chromebook_coral_defconfig | 95 +++ configs/chromebook_samus_tpl_defconfig | 1 + configs/evb-rk3288_defconfig | 2 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 2 +- .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig | 2 +- configs/sandbox_defconfig | 2 + configs/sandbox_spl_defconfig | 3 +- configs/tinker-rk3288_defconfig | 2 +- doc/arch/sandbox.rst | 9 + doc/board/google/chromebook_coral.rst | 25 + doc/driver-model/debugging.rst | 62 ++ doc/driver-model/of-plat.rst | 2 +- doc/driver-model/pci-info.rst | 25 +- drivers/Makefile | 2 + drivers/block/blk-uclass.c | 4 +- drivers/core/Makefile | 4 +- drivers/core/device.c | 3 +- drivers/core/fdtaddr.c | 30 + drivers/core/lists.c | 20 +- drivers/core/ofnode.c | 9 +- drivers/core/read.c | 11 + drivers/core/uclass.c | 16 +- drivers/gpio/gpio-uclass.c | 4 +- drivers/gpio/pm8916_gpio.c | 12 +- drivers/misc/Kconfig | 42 + drivers/misc/Makefile | 7 +- drivers/misc/itss-uclass.c | 34 + drivers/misc/itss_sandbox.c | 44 ++ drivers/misc/p2sb-uclass.c | 199 +++++ drivers/misc/p2sb_emul.c | 272 +++++++ drivers/misc/p2sb_sandbox.c | 44 ++ drivers/misc/sandbox_adder.c | 60 ++ drivers/misc/swap_case.c | 48 +- drivers/mmc/mmc.c | 2 +- drivers/mmc/sandbox_mmc.c | 4 + drivers/mtd/spi/sf-uclass.c | 2 +- drivers/nvme/nvme.h | 4 +- drivers/pch/Kconfig | 18 + drivers/pch/Makefile | 4 +- drivers/pch/pch-uclass.c | 2 + drivers/pci/pci-emul-uclass.c | 74 +- drivers/pci/pci-uclass.c | 5 +- drivers/pci/pci_auto.c | 12 +- drivers/pci/pci_auto_common.c | 3 +- drivers/pci/pci_rom.c | 2 +- drivers/pci/pci_sandbox.c | 1 + drivers/pci/pci_x86.c | 16 +- drivers/power/Kconfig | 2 + drivers/power/power_mgr/Kconfig | 34 + drivers/power/power_mgr/Makefile | 6 + drivers/power/power_mgr/pmc_emul.c | 246 ++++++ drivers/power/power_mgr/power-mgr-uclass.c | 242 ++++++ drivers/power/power_mgr/sandbox.c | 97 +++ drivers/serial/ns16550.c | 31 +- drivers/serial/sandbox.c | 2 + drivers/sysreset/sysreset_x86.c | 2 +- drivers/timer/Kconfig | 29 +- drivers/timer/tsc_timer.c | 9 +- {arch/x86/include/asm => include}/acpi_s3.h | 0 include/configs/chromebook_coral.h | 29 + include/configs/mxs.h | 2 +- include/dm/device.h | 9 + include/dm/fdtaddr.h | 8 + include/dm/read.h | 28 +- include/dm/uclass-id.h | 4 + include/dm/uclass-internal.h | 4 +- include/ec_commands.h | 4 + include/fdtdec.h | 17 - include/iotrace.h | 13 +- include/itss.h | 56 ++ include/log.h | 33 +- include/ns16550.h | 4 + include/p2sb.h | 127 +++ include/pci.h | 33 +- include/power/power_mgr.h | 177 +++++ include/spl.h | 16 +- lib/Kconfig | 24 +- lib/Makefile | 2 +- lib/fdtdec.c | 54 -- net/eth-uclass.c | 34 +- scripts/Makefile.lib | 4 +- scripts/config_whitelist.txt | 1 - test/dm/Makefile | 3 + test/dm/core.c | 3 +- test/dm/itss.c | 29 + test/dm/p2sb.c | 28 + test/dm/pci.c | 51 +- test/dm/pmc.c | 33 + test/dm/test-main.c | 16 +- tools/binman/control.py | 36 +- tools/binman/entry.py | 18 + tools/binman/etype/image_header.py | 1 + tools/binman/etype/section.py | 16 +- tools/binman/image.py | 2 + 219 files changed, 9447 insertions(+), 787 deletions(-) create mode 100644 arch/x86/cpu/apollolake/Kconfig create mode 100644 arch/x86/cpu/apollolake/Makefile create mode 100644 arch/x86/cpu/apollolake/cpu.c create mode 100644 arch/x86/cpu/apollolake/cpu_spl.c create mode 100644 arch/x86/cpu/apollolake/gpio.c create mode 100644 arch/x86/cpu/apollolake/hostbridge.c create mode 100644 arch/x86/cpu/apollolake/itss.c create mode 100644 arch/x86/cpu/apollolake/lpc.c create mode 100644 arch/x86/cpu/apollolake/p2sb.c create mode 100644 arch/x86/cpu/apollolake/pch.c create mode 100644 arch/x86/cpu/apollolake/pmc.c create mode 100644 arch/x86/cpu/apollolake/punit.c create mode 100644 arch/x86/cpu/apollolake/spl.c create mode 100644 arch/x86/cpu/apollolake/systemagent.c create mode 100644 arch/x86/cpu/apollolake/uart.c create mode 100644 arch/x86/cpu/intel_common/Kconfig create mode 100644 arch/x86/cpu/intel_common/car2.S create mode 100644 arch/x86/cpu/intel_common/car2_uninit.S create mode 100644 arch/x86/dts/chromebook_coral.dts create mode 100644 arch/x86/include/asm/arch-apollolake/cpu.h create mode 100644 arch/x86/include/asm/arch-apollolake/fast_spi.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio_apl.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio_defs.h create mode 100644 arch/x86/include/asm/arch-apollolake/iomap.h create mode 100644 arch/x86/include/asm/arch-apollolake/itss.h create mode 100644 arch/x86/include/asm/arch-apollolake/lpc.h create mode 100644 arch/x86/include/asm/arch-apollolake/pch.h create mode 100644 arch/x86/include/asm/arch-apollolake/pm.h create mode 100644 arch/x86/include/asm/arch-apollolake/systemagent.h create mode 100644 arch/x86/include/asm/arch-apollolake/uart.h create mode 100644 arch/x86/include/asm/fsp2/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_internal.h create mode 100644 arch/x86/lib/fsp2/Makefile create mode 100644 arch/x86/lib/fsp2/fsp_dram.c create mode 100644 arch/x86/lib/fsp2/fsp_meminit.c create mode 100644 arch/x86/lib/fsp2/fsp_support.c create mode 100644 board/google/chromebook_coral/Kconfig create mode 100644 board/google/chromebook_coral/MAINTAINERS create mode 100644 board/google/chromebook_coral/Makefile create mode 100644 board/google/chromebook_coral/coral.c create mode 100644 board/google/chromebook_coral/rw-mrc-cache create mode 100644 board/google/chromebook_coral/rw-var-mrc-cache create mode 100644 cmd/pmc.c create mode 100644 configs/chromebook_coral_defconfig create mode 100644 doc/board/google/chromebook_coral.rst create mode 100644 doc/driver-model/debugging.rst create mode 100644 drivers/misc/itss-uclass.c create mode 100644 drivers/misc/itss_sandbox.c create mode 100644 drivers/misc/p2sb-uclass.c create mode 100644 drivers/misc/p2sb_emul.c create mode 100644 drivers/misc/p2sb_sandbox.c create mode 100644 drivers/misc/sandbox_adder.c create mode 100644 drivers/power/power_mgr/Kconfig create mode 100644 drivers/power/power_mgr/Makefile create mode 100644 drivers/power/power_mgr/pmc_emul.c create mode 100644 drivers/power/power_mgr/power-mgr-uclass.c create mode 100644 drivers/power/power_mgr/sandbox.c rename {arch/x86/include/asm => include}/acpi_s3.h (100%) create mode 100644 include/configs/chromebook_coral.h create mode 100644 include/itss.h create mode 100644 include/p2sb.h create mode 100644 include/power/power_mgr.h create mode 100644 test/dm/itss.c create mode 100644 test/dm/p2sb.c create mode 100644 test/dm/pmc.c -- 2.23.0.444.g18eeb5a265-goog

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